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Commit 3748d61

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jediejedie
committed
remove .get() calls
Idea from: #1
1 parent 7542cfe commit 3748d61

22 files changed

+309
-335
lines changed

‎MC6809/components/cpu_utils/MC6809_registers.py

+42-70
Original file line numberDiff line numberDiff line change
@@ -28,8 +28,6 @@ def __init__(self, name, initial_value):
2828
def set(self, v):
2929
self.value = v
3030
return self.value # e.g.: r = operand.set(a + 1)
31-
def get(self):
32-
return self.value
3331

3432
# FIXME:
3533
def decrement(self, value=1):
@@ -94,41 +92,26 @@ def __str__(self):
9492

9593

9694

97-
def _register_bit(key):
98-
def set_flag(self, value):
99-
assert value in (0, 1)
100-
self._register[key] = value
101-
def get_flag(self):
102-
return self._register[key]
103-
return property(get_flag, set_flag)
104-
105-
10695
class ConditionCodeRegister(object):
10796
""" CC - 8 bit condition code register bits """
10897

109-
WIDTH = 8 # 8 Bit
98+
WIDTH = 8 # 8 Bit
11099

111100
def __init__(self, *cmd_args, **kwargs):
112101
self.name = "CC"
113-
self._register = {}
114-
self.set(0x0) # create all keys in dict with value 0
115-
116-
E = _register_bit("E") # E - 0x80 - bit 7 - Entire register state stacked
117-
F = _register_bit("F") # F - 0x40 - bit 6 - FIRQ interrupt masked
118-
H = _register_bit("H") # H - 0x20 - bit 5 - Half-Carry
119-
I = _register_bit("I") # I - 0x10 - bit 4 - IRQ interrupt masked
120-
N = _register_bit("N") # N - 0x08 - bit 3 - Negative result (twos complement)
121-
Z = _register_bit("Z") # Z - 0x04 - bit 2 - Zero result
122-
V = _register_bit("V") # V - 0x02 - bit 1 - Overflow
123-
C = _register_bit("C") # C - 0x01 - bit 0 - Carry (or borrow)
102+
self.E = 0 # E - 0x80 - bit 7 - Entire register state stacked
103+
self.F = 0 # F - 0x40 - bit 6 - FIRQ interrupt masked
104+
self.H = 0 # H - 0x20 - bit 5 - Half-Carry
105+
self.I = 0 # I - 0x10 - bit 4 - IRQ interrupt masked
106+
self.N = 0 # N - 0x08 - bit 3 - Negative result (twos complement)
107+
self.Z = 0 # Z - 0x04 - bit 2 - Zero result
108+
self.V = 0 # V - 0x02 - bit 1 - Overflow
109+
self.C = 0 # C - 0x01 - bit 0 - Carry (or borrow)
124110

125111
####
126112

127-
def set(self, status):
128-
self.E, self.F, self.H, self.I, self.N, self.Z, self.V, self.C = \
129-
[0 if status & x == 0 else 1 for x in (128, 64, 32, 16, 8, 4, 2, 1)]
130-
131-
def get(self):
113+
@property
114+
def value(self):
132115
return self.C | \
133116
self.V << 1 | \
134117
self.Z << 2 | \
@@ -138,6 +121,15 @@ def get(self):
138121
self.F << 6 | \
139122
self.E << 7
140123

124+
@value.setter
125+
def value(self, status):
126+
self.E, self.F, self.H, self.I, self.N, self.Z, self.V, self.C = \
127+
[0 if status & x == 0 else 1 for x in (128, 64, 32, 16, 8, 4, 2, 1)]
128+
129+
def set(self, status):
130+
self.E, self.F, self.H, self.I, self.N, self.Z, self.V, self.C = \
131+
[0 if status & x == 0 else 1 for x in (128, 64, 32, 16, 8, 4, 2, 1)]
132+
141133
@property
142134
def get_info(self):
143135
"""
@@ -146,28 +138,16 @@ def get_info(self):
146138
>>> cc.get_info
147139
'E.H....C'
148140
"""
149-
return cc_value2txt(self.get())
141+
return cc_value2txt(self.value)
150142

151143
def __str__(self):
152144
return "%s=%s" % (self.name, self.get_info)
153145

154146
####
155147

156-
"""
157-
#define SET_Z(r) ( REG_CC |= ((r) ? 0 : CC_Z) )
158-
#define SET_N8(r) ( REG_CC |= (r&0x80)>>4 )
159-
#define SET_N16(r) ( REG_CC |= (r&0x8000)>>12 )
160-
#define SET_H(a,b,r) ( REG_CC |= ((a^b^r)&0x10)<<1 )
161-
#define SET_C8(r) ( REG_CC |= (r&0x100)>>8 )
162-
#define SET_C16(r) ( REG_CC |= (r&0x10000)>>16 )
163-
#define SET_V8(a,b,r) ( REG_CC |= ((a^b^r^(r>>1))&0x80)>>6 )
164-
#define SET_V16(a,b,r) ( REG_CC |= ((a^b^r^(r>>1))&0x8000)>>14 )
165-
"""
166-
167148
def set_H(self, a, b, r):
168-
if self.H == 0:
169-
r2 = (a ^ b ^ r) & 0x10
170-
self.H = 0 if r2 == 0 else 1
149+
if not self.H and (a ^ b ^ r) & 0x10:
150+
self.H = 1
171151
# log.debug("\tset_H(): set half-carry flag to %i: ($%02x ^ $%02x ^ $%02x) & 0x10 = $%02x",
172152
# self.H, a, b, r, r2
173153
# )
@@ -185,69 +165,62 @@ def set_Z8(self, r):
185165
# log.debug("\tset_Z8(): leave old value 1")
186166

187167
def set_Z16(self, r):
188-
if self.Z == 0:
189-
r2 = r & 0xffff
190-
self.Z = 1 if r2 == 0 else 0
168+
if not self.Z and not r & 0xffff:
169+
self.Z = 1
191170
# log.debug("\tset_Z16(): set zero flag to %i: $%04x & 0xffff = $%04x",
192171
# self.Z, r, r2
193172
# )
194173
# else:
195174
# log.debug("\tset_Z16(): leave old value 1")
196175

197176
def set_N8(self, r):
198-
if self.N == 0:
199-
r2 = r & 0x80
200-
self.N = 0 if r2 == 0 else 1
177+
if not self.N and r & 0x80:
178+
self.N = 1
201179
# log.debug("\tset_N8(): set negative flag to %i: ($%02x & 0x80) = $%02x",
202180
# self.N, r, r2
203181
# )
204182
# else:
205183
# log.debug("\tset_N8(): leave old value 1")
206184

207185
def set_N16(self, r):
208-
if self.N == 0:
209-
r2 = r & 0x8000
210-
self.N = 0 if r2 == 0 else 1
186+
if not self.N and r & 0x8000:
187+
self.N = 1
211188
# log.debug("\tset_N16(): set negative flag to %i: ($%04x & 0x8000) = $%04x",
212189
# self.N, r, r2
213190
# )
214191
# else:
215192
# log.debug("\tset_N16(): leave old value 1")
216193

217194
def set_C8(self, r):
218-
if self.C == 0:
219-
r2 = r & 0x100
220-
self.C = 0 if r2 == 0 else 1
195+
if not self.C and r & 0x100:
196+
self.C = 1
221197
# log.debug("\tset_C8(): carry flag to %i: ($%02x & 0x100) = $%02x",
222198
# self.C, r, r2
223199
# )
224200
# else:
225201
# log.debug("\tset_C8(): leave old value 1")
226202

227203
def set_C16(self, r):
228-
if self.C == 0:
229-
r2 = r & 0x10000
230-
self.C = 0 if r2 == 0 else 1
204+
if not self.C and r & 0x10000:
205+
self.C = 1
231206
# log.debug("\tset_C16(): carry flag to %i: ($%04x & 0x10000) = $%04x",
232207
# self.C, r, r2
233208
# )
234209
# else:
235210
# log.debug("\tset_C16(): leave old value 1")
236211

237212
def set_V8(self, a, b, r):
238-
if self.V == 0:
239-
r2 = (a ^ b ^ r ^ (r >> 1)) & 0x80
240-
self.V = 0 if r2 == 0 else 1
213+
if not self.V and (a ^ b ^ r ^ (r >> 1)) & 0x80:
214+
self.V = 1
241215
# log.debug("\tset_V8(): overflow flag to %i: (($%02x ^ $%02x ^ $%02x ^ ($%02x >> 1)) & 0x80) = $%02x",
242216
# self.V, a, b, r, r, r2
243217
# )
244218
# else:
245219
# log.debug("\tset_V8(): leave old value 1")
246220

247221
def set_V16(self, a, b, r):
248-
if self.V == 0:
249-
r2 = (a ^ b ^ r ^ (r >> 1)) & 0x8000
250-
self.V = 0 if r2 == 0 else 1
222+
if not self.V and (a ^ b ^ r ^ (r >> 1)) & 0x8000:
223+
self.V = 1
251224
# log.debug("\tset_V16(): overflow flag to %i: (($%04x ^ $%04x ^ $%04x ^ ($%04x >> 1)) & 0x8000) = $%04x",
252225
# self.V, a, b, r, r, r2
253226
# )
@@ -361,13 +334,12 @@ def set(self, value):
361334
self._a.set(value >> 8)
362335
self._b.set(value & 0xff)
363336

364-
def get(self):
365-
a = self._a.get()
366-
b = self._b.get()
367-
return a * 256 + b
337+
@property
338+
def value(self):
339+
return self._a.value * 256 + self._b.value
368340

369341
def __str__(self):
370-
return "%s=%04x" % (self.name, self.get())
342+
return "%s=%04x" % (self.name, self.value)
371343

372344

373345
def convert_differend_width(src_reg, dst_reg):
@@ -389,7 +361,7 @@ def convert_differend_width(src_reg, dst_reg):
389361
TODO: verify this behaviour on real hardware
390362
see: http://archive.worldofdragon.org/phpBB3/viewtopic.php?f=8&t=4886
391363
"""
392-
src_value = src_reg.get()
364+
src_value = src_reg.value
393365
if src_reg.WIDTH == 8 and dst_reg.WIDTH == 16:
394366
# e.g.: $cd -> $ffcd
395367
src_value += 0xff00

‎MC6809/components/mc6809_addressing.py

+9-9
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@ def get_m_immediate_word(self):
4444

4545
def get_ea_direct(self):
4646
op_addr, m = self.read_pc_byte()
47-
dp = self.direct_page.get()
47+
dp = self.direct_page.value
4848
ea = dp << 8 | m
4949
# log.debug("\tget_ea_direct(): ea = dp << 8 | m => $%x=$%x<<8|$%x", ea, dp, m)
5050
return ea
@@ -89,7 +89,7 @@ def get_ea_indexed(self):
8989
raise RuntimeError("Register $%x doesn't exists! (postbyte: $%x)" % (rr, postbyte))
9090

9191
register_obj = self.register_str2object[register_str]
92-
register_value = register_obj.get()
92+
register_value = register_obj.value
9393
# log.debug("\t%02x == register %s: value $%x",
9494
# rr, register_obj.name, register_value
9595
# )
@@ -129,10 +129,10 @@ def get_ea_indexed(self):
129129
ea = register_value
130130
elif addr_mode == 0x5:
131131
# log.debug("\t0101 0x5 | B, R | B register offset")
132-
offset = signed8(self.accu_b.get())
132+
offset = signed8(self.accu_b.value)
133133
elif addr_mode == 0x6:
134134
# log.debug("\t0110 0x6 | A, R | A register offset")
135-
offset = signed8(self.accu_a.get())
135+
offset = signed8(self.accu_a.value)
136136
elif addr_mode == 0x8:
137137
# log.debug("\t1000 0x8 | n, R | 8 bit offset")
138138
offset = signed8(self.read_pc_byte()[1])
@@ -146,13 +146,13 @@ def get_ea_indexed(self):
146146
elif addr_mode == 0xb:
147147
# log.debug("\t1011 0xb | D, R | D register offset")
148148
# D - 16 bit concatenated reg. (A + B)
149-
offset = signed16(self.accu_d.get()) # FIXME: signed16() ok?
149+
offset = signed16(self.accu_d.value) # FIXME: signed16() ok?
150150
self.cycles += 1
151151
elif addr_mode == 0xc:
152152
# log.debug("\t1100 0xc | n, PCR | 8 bit offset from program counter")
153153
__, value = self.read_pc_byte()
154154
value_signed = signed8(value)
155-
ea = self.program_counter.get() + value_signed
155+
ea = self.program_counter.value + value_signed
156156
# log.debug("\tea = pc($%x) + $%x = $%x (dez.: %i + %i = %i)",
157157
# self.program_counter, value_signed, ea,
158158
# self.program_counter, value_signed, ea,
@@ -161,7 +161,7 @@ def get_ea_indexed(self):
161161
# log.debug("\t1101 0xd | n, PCR | 16 bit offset from program counter")
162162
__, value = self.read_pc_word()
163163
value_signed = signed16(value)
164-
ea = self.program_counter.get() + value_signed
164+
ea = self.program_counter.value + value_signed
165165
self.cycles += 1
166166
# log.debug("\tea = pc($%x) + $%x = $%x (dez.: %i + %i = %i)",
167167
# self.program_counter, value_signed, ea,
@@ -240,7 +240,7 @@ def get_m_extended_word(self):
240240
def get_ea_relative(self):
241241
addr, x = self.read_pc_byte()
242242
x = signed8(x)
243-
ea = self.program_counter.get() + x
243+
ea = self.program_counter.value + x
244244
# log.debug("\tget_ea_relative(): ea = $%x + %i = $%x \t| %s",
245245
# self.program_counter, x, ea,
246246
# self.cfg.mem_info.get_shortest(ea)
@@ -249,7 +249,7 @@ def get_ea_relative(self):
249249

250250
def get_ea_relative_word(self):
251251
addr, x = self.read_pc_word()
252-
ea = self.program_counter.get() + x
252+
ea = self.program_counter.value + x
253253
# log.debug("\tget_ea_relative_word(): ea = $%x + %i = $%x \t| %s",
254254
# self.program_counter, x, ea,
255255
# self.cfg.mem_info.get_shortest(ea)

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