Fix a number of issues in CMSE examples #264
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There's a couple of mentions of FPSCR that still need to be updated. EG:
"Save and clear bits [27:0] of FPSCR (Armv8.1-M Mainline only)"
I'm not sure where this has come from, but for v8.1 we should be using the FPCXT payloads to handle FPSCR. For v8.0 manual handling is required, but unless I'm missing something it the whole register must be set to a reasonable value (which may not be zero), and not just bits 27:0
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I have replaced occurrences of FPSCR by FPCXT.
- Use CLRM to clear registers instead of a sequence of mov rX, #0. - Save and restore FPCXTS in transitions from Secure to Non-secure and vice-versa. - Use VSCCLRM to clear floating-point registers if necessary.
| @@ -1173,7 +1178,8 @@ registers that contain secret information | |||
| > * Clear all registers and flags that have undefined values at the return of a | |||
| > procedure, according to [[AAPCS]](#AAPCS). | |||
| > * Restore all callee-saved registers as mandated by [[AAPCS]](#AAPCS). | |||
| > * Restore bits [27:0] of FPSCR (Armv8.1-M Mainline only). | |||
| > * Restore the Non-secure Floating-point context payload (`FPCXTNS`) | |||
| > (Armv8.1-M Mainline only). | |||
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Saying "v8.1 mainline only" makes it sound like this isn't required on a v8.0 CPU. This is required on any CPU that has FP and MVE. If you have 8.1 then the new FPCXTNS payload makes it easier to do. However if you have v8.0 you still have to restore the context, but using the old approach detecting only restoring the FPSCR value if there's an active context etc.
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Fix for #210
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