diff --git a/TESTS/events/queue/main.cpp b/TESTS/events/queue/main.cpp index c034d60d419..f779ee0c24d 100644 --- a/TESTS/events/queue/main.cpp +++ b/TESTS/events/queue/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "mbed_events.h" #include "mbed.h" #include "rtos.h" diff --git a/TESTS/events/timing/main.cpp b/TESTS/events/timing/main.cpp index 6a7e0fcf6f6..d568b0f5b67 100644 --- a/TESTS/events/timing/main.cpp +++ b/TESTS/events/timing/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "mbed_events.h" #include "mbed.h" #include "rtos.h" diff --git a/TESTS/integration/basic/main.cpp b/TESTS/integration/basic/main.cpp index e0e2cff25b1..ec202446879 100644 --- a/TESTS/integration/basic/main.cpp +++ b/TESTS/integration/basic/main.cpp @@ -1,6 +1,21 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "test_env.h" int main() { GREENTEA_SETUP(15, "default_auto"); GREENTEA_TESTSUITE_RESULT(true); -} \ No newline at end of file +} diff --git a/TESTS/mbed_functional/callback/main.cpp b/TESTS/mbed_functional/callback/main.cpp index 55d70879e11..f14d7537937 100644 --- a/TESTS/mbed_functional/callback/main.cpp +++ b/TESTS/mbed_functional/callback/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "mbed.h" #include "greentea-client/test_env.h" #include "unity.h" diff --git a/TESTS/mbed_functional/callback_big/main.cpp b/TESTS/mbed_functional/callback_big/main.cpp index efa1fb088ac..1aec88470e7 100644 --- a/TESTS/mbed_functional/callback_big/main.cpp +++ b/TESTS/mbed_functional/callback_big/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "mbed.h" #include "greentea-client/test_env.h" #include "unity.h" diff --git a/TESTS/mbed_functional/callback_small/main.cpp b/TESTS/mbed_functional/callback_small/main.cpp index 4e9bf904bfc..583b8d0f534 100644 --- a/TESTS/mbed_functional/callback_small/main.cpp +++ b/TESTS/mbed_functional/callback_small/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "mbed.h" #include "greentea-client/test_env.h" #include "unity.h" diff --git a/TESTS/mbed_functional/functionpointer/main.cpp b/TESTS/mbed_functional/functionpointer/main.cpp index 603bd4336f8..0850cf0da0b 100644 --- a/TESTS/mbed_functional/functionpointer/main.cpp +++ b/TESTS/mbed_functional/functionpointer/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "mbed.h" #include "greentea-client/test_env.h" #include "unity.h" diff --git a/TESTS/mbed_hal/lp_us_tickers/main.cpp b/TESTS/mbed_hal/lp_us_tickers/main.cpp new file mode 100644 index 00000000000..ddeab5de491 --- /dev/null +++ b/TESTS/mbed_hal/lp_us_tickers/main.cpp @@ -0,0 +1,110 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "utest/utest.h" +#include "unity/unity.h" +#include "greentea-client/test_env.h" + +#include "mbed.h" +#include "us_ticker_api.h" +#include "ticker_api.h" + +using namespace utest::v1; + +namespace { + volatile bool complete; + const ticker_interface_t* intf; +} + +/* Ticker init should be run just once, thus read should always return a value that + * increases (no reset). + */ +void test_ticker_init(void) +{ + intf->init(); + uint32_t previous = intf->read(); + + intf->init(); + uint32_t current = intf->read(); + TEST_ASSERT_TRUE_MESSAGE(previous <= current, "init() changed the counter"); + + previous = intf->read(); + intf->init(); + current = intf->read(); + TEST_ASSERT_TRUE_MESSAGE(previous <= current, "init() changed the counter"); +} + +/* Read multiple times, each returned time should be bigger than the previous one + * Counter up. + */ +void test_ticker_read(void) +{ + // this test assumes that to wrap around we would need to run >60 minutes + // therefore wrapping should not happen - previous <= current + const uint32_t test_loop = 15000; + uint32_t previous = intf->read(); + uint32_t current; + for (uint32_t i = 0UL; i < test_loop; i++) { + current = intf->read(); + TEST_ASSERT_TRUE_MESSAGE(previous <= current, "us ticker counter wrapped around"); + } +} + +/* Implement simple read while loop to check if time is increasing (counter up) + */ +void test_ticker_read_loop() +{ + uint32_t future_time = intf->read() + 10000UL; + while (intf->read() < future_time); + TEST_ASSERT_TRUE_MESSAGE(future_time <= intf->read(), "Future time is in the past"); +} + +utest::v1::status_t us_ticker_setup(const Case *const source, const size_t index_of_case) +{ + intf = get_us_ticker_data()->interface; + return greentea_case_setup_handler(source, index_of_case); +} + +#if DEVICE_LOWPOWERTIMER +utest::v1::status_t lp_ticker_setup(const Case *const source, const size_t index_of_case) +{ + intf = get_lp_ticker_data()->interface; + return greentea_case_setup_handler(source, index_of_case); +} +#endif + +Case cases[] = { + Case("us ticker HAL - Init", us_ticker_setup, test_ticker_init), + Case("us ticker HAL - Read", us_ticker_setup, test_ticker_read), + Case("us ticker HAL - Read in the loop", us_ticker_setup, test_ticker_read_loop), +#if DEVICE_LOWPOWERTIMER + Case("lp ticker HAL - Init", lp_ticker_setup, test_ticker_init), + Case("lp ticker HAL - Read", lp_ticker_setup, test_ticker_read), + Case("lp ticker HAL - Read in the loop", lp_ticker_setup, test_ticker_read_loop), +#endif +}; + +utest::v1::status_t greentea_test_setup(const size_t number_of_cases) +{ + GREENTEA_SETUP(20, "default_auto"); + return greentea_test_setup_handler(number_of_cases); +} + +Specification specification(greentea_test_setup, cases, greentea_test_teardown_handler); + +int main() +{ + Harness::run(specification); +} diff --git a/TESTS/mbedmicro-mbed/attributes/main.cpp b/TESTS/mbedmicro-mbed/attributes/main.cpp index faf3209f47f..c64c29cba79 100644 --- a/TESTS/mbedmicro-mbed/attributes/main.cpp +++ b/TESTS/mbedmicro-mbed/attributes/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include #include diff --git a/TESTS/mbedmicro-mbed/call_before_main/main.cpp b/TESTS/mbedmicro-mbed/call_before_main/main.cpp index 9a713d3f303..1d6266b7b6f 100644 --- a/TESTS/mbedmicro-mbed/call_before_main/main.cpp +++ b/TESTS/mbedmicro-mbed/call_before_main/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "greentea-client/test_env.h" namespace { diff --git a/TESTS/mbedmicro-mbed/cpp/main.cpp b/TESTS/mbedmicro-mbed/cpp/main.cpp index fc5bcc21ce2..931748e316b 100644 --- a/TESTS/mbedmicro-mbed/cpp/main.cpp +++ b/TESTS/mbedmicro-mbed/cpp/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "greentea-client/test_env.h" #define PATTERN_CHECK_VALUE 0xF0F0ADAD diff --git a/TESTS/mbedmicro-mbed/div/main.cpp b/TESTS/mbedmicro-mbed/div/main.cpp index 6658d6db157..1e9fc4cd589 100644 --- a/TESTS/mbedmicro-mbed/div/main.cpp +++ b/TESTS/mbedmicro-mbed/div/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include // std::pair #include "mbed.h" #include "greentea-client/test_env.h" diff --git a/TESTS/mbedmicro-mbed/static_assert/main.cpp b/TESTS/mbedmicro-mbed/static_assert/main.cpp index 969452b93ed..844a60aff44 100644 --- a/TESTS/mbedmicro-mbed/static_assert/main.cpp +++ b/TESTS/mbedmicro-mbed/static_assert/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include #include diff --git a/TESTS/mbedmicro-rtos-mbed/isr/main.cpp b/TESTS/mbedmicro-rtos-mbed/isr/main.cpp index 17baca863c5..1ba963f37d2 100644 --- a/TESTS/mbedmicro-rtos-mbed/isr/main.cpp +++ b/TESTS/mbedmicro-rtos-mbed/isr/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "mbed.h" #include "greentea-client/test_env.h" #include "rtos.h" diff --git a/TESTS/mbedmicro-rtos-mbed/mail/main.cpp b/TESTS/mbedmicro-rtos-mbed/mail/main.cpp index f66e307e521..dada44f4960 100644 --- a/TESTS/mbedmicro-rtos-mbed/mail/main.cpp +++ b/TESTS/mbedmicro-rtos-mbed/mail/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "mbed.h" #include "greentea-client/test_env.h" #include "rtos.h" diff --git a/TESTS/mbedmicro-rtos-mbed/malloc/main.cpp b/TESTS/mbedmicro-rtos-mbed/malloc/main.cpp index e9ca87bef98..8c4cae324f3 100644 --- a/TESTS/mbedmicro-rtos-mbed/malloc/main.cpp +++ b/TESTS/mbedmicro-rtos-mbed/malloc/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "mbed.h" #include "test_env.h" #include "rtos.h" diff --git a/TESTS/mbedmicro-rtos-mbed/mutex/main.cpp b/TESTS/mbedmicro-rtos-mbed/mutex/main.cpp index 9e41e80342d..a3aef568b09 100644 --- a/TESTS/mbedmicro-rtos-mbed/mutex/main.cpp +++ b/TESTS/mbedmicro-rtos-mbed/mutex/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "mbed.h" #include "greentea-client/test_env.h" #include "unity.h" diff --git a/TESTS/mbedmicro-rtos-mbed/queue/main.cpp b/TESTS/mbedmicro-rtos-mbed/queue/main.cpp index 016b99c182b..374dc8662c6 100644 --- a/TESTS/mbedmicro-rtos-mbed/queue/main.cpp +++ b/TESTS/mbedmicro-rtos-mbed/queue/main.cpp @@ -1,70 +1,306 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "mbed.h" #include "greentea-client/test_env.h" +#include "unity.h" +#include "utest.h" #include "rtos.h" #if defined(MBED_RTOS_SINGLE_THREAD) #error [NOT_SUPPORTED] test not supported #endif -typedef struct { - float voltage; /* AD result of measured voltage */ - float current; /* AD result of measured current */ - uint32_t counter; /* A counter value */ -} message_t; - -#define CREATE_VOLTAGE(COUNTER) (COUNTER * 0.1) * 33 -#define CREATE_CURRENT(COUNTER) (COUNTER * 0.1) * 11 -#define QUEUE_SIZE 16 -#define QUEUE_PUT_DELAY 100 - -#define TEST_STACK_SIZE 512 - -MemoryPool mpool; -Queue queue; - -/* Send Thread */ -void send_thread () { - static uint32_t i = 10; - while (true) { - i++; // Fake data update - message_t *message = mpool.alloc(); - message->voltage = CREATE_VOLTAGE(i); - message->current = CREATE_CURRENT(i); - message->counter = i; - queue.put(message); - Thread::wait(QUEUE_PUT_DELAY); - } +using namespace utest::v1; + +#define THREAD_STACK_SIZE 512 +#define TEST_UINT_MSG 0xDEADBEEF +#define TEST_UINT_MSG2 0xE1EE7 +#define TEST_TIMEOUT 50 + +template +void thread_put_uint_msg(Queue *q) +{ + Thread::wait(ms); + osStatus stat = q->put((uint32_t*) TEST_UINT_MSG); + TEST_ASSERT_EQUAL(osOK, stat); +} + +template +void thread_get_uint_msg(Queue *q) +{ + Thread::wait(ms); + osEvent evt = q->get(); + TEST_ASSERT_EQUAL(osEventMessage, evt.status); + TEST_ASSERT_EQUAL(val, evt.value.v); +} + +/** Test pass uint msg + + Given a queue for uint32_t messages with one slot + When a uin32_t value is inserted into the queue + and a message is extracted from the queue + Then the extracted message is the same as previously inserted message + */ +void test_pass_uint() +{ + Queue q; + osStatus stat = q.put((uint32_t*)TEST_UINT_MSG); + TEST_ASSERT_EQUAL(osOK, stat); + + osEvent evt = q.get(); + TEST_ASSERT_EQUAL(osEventMessage, evt.status); + TEST_ASSERT_EQUAL(TEST_UINT_MSG, evt.value.v); +} + +/** Test pass uint msg twice + + Given a queue for uint32_t messages with one slot + When a uin32_t value is inserted into the queue + and a message is extracted from the queue + and the procedure is repeated with different message + Then the extracted message is the same as previously inserted message for both iterations + + */ +void test_pass_uint_twice() +{ + Queue q; + osStatus stat = q.put((uint32_t*)TEST_UINT_MSG); + TEST_ASSERT_EQUAL(osOK, stat); + + osEvent evt = q.get(); + TEST_ASSERT_EQUAL(osEventMessage, evt.status); + TEST_ASSERT_EQUAL(TEST_UINT_MSG, evt.value.v); + + stat = q.put((uint32_t*)TEST_UINT_MSG2); + TEST_ASSERT_EQUAL(osOK, stat); + + evt = q.get(); + TEST_ASSERT_EQUAL(osEventMessage, evt.status); + TEST_ASSERT_EQUAL(TEST_UINT_MSG2, evt.value.v); +} + +/** Test pass ptr msg + + Given a queue for pointers to uint32_t messages with one slot + When a pointer to an uint32_t is inserted into the queue + and a message is extracted from the queue + Then the extracted message is the same as previously inserted message + */ +void test_pass_ptr() +{ + Queue q; + uint32_t msg = TEST_UINT_MSG; + + osStatus stat = q.put(&msg); + TEST_ASSERT_EQUAL(osOK, stat); + + osEvent evt = q.get(); + TEST_ASSERT_EQUAL(osEventMessage, evt.status); + TEST_ASSERT_EQUAL(&msg, evt.value.p); +} + +/** Test get from empty queue + + Given an empty queue for uint32_t values + When @a get is called on the queue with timeout of 0 + Then queue returns status of osOK, but no data + */ +void test_get_empty_no_timeout() +{ + Queue q; + + osEvent evt = q.get(0); + TEST_ASSERT_EQUAL(osOK, evt.status); +} + +/** Test get from empty queue with timeout + + Given an empty queue for uint32_t values + When @a get is called on the queue with timeout of 50ms + Then queue returns status of osEventTimeout after about 50ms wait + */ +void test_get_empty_timeout() +{ + Queue q; + uint32_t start = us_ticker_read(); + + osEvent evt = q.get(50); + TEST_ASSERT_EQUAL(osEventTimeout, evt.status); + TEST_ASSERT_UINT32_WITHIN(5000, 50000, us_ticker_read() - start); +} + +/** Test get empty wait forever + + Given a two threads A & B and a queue for uint32_t values + When thread A calls @a get on an empty queue with osWaitForever + Then the thread A waits for a message to appear in the queue + When thread B puts a message in the queue + Then thread A wakes up and receives it + */ +void test_get_empty_wait_forever() +{ + Thread t(osPriorityNormal, THREAD_STACK_SIZE); + Queue q; + + t.start(callback(thread_put_uint_msg, &q)); + + uint32_t start = us_ticker_read(); + + osEvent evt = q.get(); + TEST_ASSERT_EQUAL(osEventMessage, evt.status); + TEST_ASSERT_EQUAL(TEST_UINT_MSG, evt.value.v); + TEST_ASSERT_UINT32_WITHIN(TEST_TIMEOUT * 100, TEST_TIMEOUT * 1000, us_ticker_read() - start); } -int main (void) { - GREENTEA_SETUP(20, "default_auto"); - - Thread thread(osPriorityNormal, TEST_STACK_SIZE); - thread.start(send_thread); - bool result = true; - int result_counter = 0; - - while (true) { - osEvent evt = queue.get(); - if (evt.status == osEventMessage) { - message_t *message = (message_t*)evt.value.p; - const float expected_voltage = CREATE_VOLTAGE(message->counter); - const float expected_current = CREATE_CURRENT(message->counter); - // Check using macros if received values correspond to values sent via queue - bool expected_values = (expected_voltage == message->voltage) && - (expected_current == message->current); - result = result && expected_values; - const char *result_msg = expected_values ? "OK" : "FAIL"; - printf("%3d %.2fV %.2fA ... [%s]\r\n", message->counter, - message->voltage, - message->current, - result_msg); - mpool.free(message); - if (result == false || ++result_counter == QUEUE_SIZE) { - break; - } - } - } - GREENTEA_TESTSUITE_RESULT(result); - return 0; +/** Test put full no timeout + * + * Given a queue with one slot for uint32_t data + * When a thread tries to insert two messages + * Then first operation succeeds and second fails with @a osErrorResource + */ +void test_put_full_no_timeout() +{ + Queue q; + + osStatus stat = q.put((uint32_t*) TEST_UINT_MSG); + TEST_ASSERT_EQUAL(osOK, stat); + + stat = q.put((uint32_t*) TEST_UINT_MSG); + TEST_ASSERT_EQUAL(osErrorResource, stat); +} + +/** Test put full timeout + * + * Given a queue with one slot for uint32_t data + * When a thread tries to insert two messages with @ TEST_TIMEOUT timeout + * Then first operation succeeds and second fails with @a osErrorTimeout + */ +void test_put_full_timeout() +{ + Queue q; + + osStatus stat = q.put((uint32_t*) TEST_UINT_MSG, TEST_TIMEOUT); + TEST_ASSERT_EQUAL(osOK, stat); + + uint32_t start = us_ticker_read(); + + stat = q.put((uint32_t*) TEST_UINT_MSG, TEST_TIMEOUT); + TEST_ASSERT_EQUAL(osErrorTimeout, stat); + TEST_ASSERT_UINT32_WITHIN(TEST_TIMEOUT * 100, TEST_TIMEOUT * 1000, us_ticker_read() - start); +} + +/** Test put full wait forever + * + * Given two threads A & B and a queue with one slot for uint32_t data + * When thread A puts a message to the queue and tries to put second one with @a osWaitForever timeout + * Then thread waits for a slot to become empty in the queue + * When thread B takes one message out of the queue + * Then thread A successfully inserts message into the queue + */ +void test_put_full_waitforever() +{ + Thread t(osPriorityNormal, THREAD_STACK_SIZE); + Queue q; + + t.start(callback(thread_get_uint_msg, &q)); + + osStatus stat = q.put((uint32_t*) TEST_UINT_MSG); + TEST_ASSERT_EQUAL(osOK, stat); + + uint32_t start = us_ticker_read(); + stat = q.put((uint32_t*) TEST_UINT_MSG, osWaitForever); + TEST_ASSERT_EQUAL(osOK, stat); + TEST_ASSERT_UINT32_WITHIN(TEST_TIMEOUT * 100, TEST_TIMEOUT * 1000, us_ticker_read() - start); + + t.join(); +} + +/** Test message ordering + + Given a queue of uint32_t data + When two messages are inserted with equal priority + Then messages should be returned in the exact order they were inserted + */ +void test_msg_order() +{ + Queue q; + + osStatus stat = q.put((uint32_t*) TEST_UINT_MSG, TEST_TIMEOUT); + TEST_ASSERT_EQUAL(osOK, stat); + + stat = q.put((uint32_t*) TEST_UINT_MSG2, TEST_TIMEOUT); + TEST_ASSERT_EQUAL(osOK, stat); + + osEvent evt = q.get(); + TEST_ASSERT_EQUAL(osEventMessage, evt.status); + TEST_ASSERT_EQUAL(TEST_UINT_MSG, evt.value.v); + + evt = q.get(); + TEST_ASSERT_EQUAL(osEventMessage, evt.status); + TEST_ASSERT_EQUAL(TEST_UINT_MSG2, evt.value.v); +} + +/** Test message priority + + Given a queue of uint32_t data + When two messages are inserted with ascending priority + Then messages should be returned in descending priority order + */ +void test_msg_prio() +{ + Queue q; + + osStatus stat = q.put((uint32_t*) TEST_UINT_MSG, TEST_TIMEOUT, 0); + TEST_ASSERT_EQUAL(osOK, stat); + + stat = q.put((uint32_t*) TEST_UINT_MSG2, TEST_TIMEOUT, 1); + TEST_ASSERT_EQUAL(osOK, stat); + + osEvent evt = q.get(); + TEST_ASSERT_EQUAL(osEventMessage, evt.status); + TEST_ASSERT_EQUAL(TEST_UINT_MSG2, evt.value.v); + + evt = q.get(); + TEST_ASSERT_EQUAL(osEventMessage, evt.status); + TEST_ASSERT_EQUAL(TEST_UINT_MSG, evt.value.v); +} + +utest::v1::status_t test_setup(const size_t number_of_cases) +{ + GREENTEA_SETUP(5, "default_auto"); + return verbose_test_setup_handler(number_of_cases); +} + +Case cases[] = { + Case("Test pass uint msg", test_pass_uint), + Case("Test pass uint msg twice", test_pass_uint_twice), + Case("Test pass ptr msg", test_pass_ptr), + Case("Test get from empty queue no timeout", test_get_empty_no_timeout), + Case("Test get from empty queue timeout", test_get_empty_timeout), + Case("Test get empty wait forever", test_get_empty_wait_forever), + Case("Test put full no timeout", test_put_full_no_timeout), + Case("Test put full timeout", test_put_full_timeout), + Case("Test put full wait forever", test_put_full_waitforever), + Case("Test message ordering", test_msg_order), + Case("Test message priority", test_msg_prio) +}; + +Specification specification(test_setup, cases); + +int main() +{ + return !Harness::run(specification); } diff --git a/TESTS/mbedmicro-rtos-mbed/semaphore/main.cpp b/TESTS/mbedmicro-rtos-mbed/semaphore/main.cpp index 7de652b1c3c..33f50204c9f 100644 --- a/TESTS/mbedmicro-rtos-mbed/semaphore/main.cpp +++ b/TESTS/mbedmicro-rtos-mbed/semaphore/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "mbed.h" #include "greentea-client/test_env.h" #include "unity.h" diff --git a/TESTS/mbedmicro-rtos-mbed/signals/main.cpp b/TESTS/mbedmicro-rtos-mbed/signals/main.cpp index 06e05db970c..195bfcf2c21 100644 --- a/TESTS/mbedmicro-rtos-mbed/signals/main.cpp +++ b/TESTS/mbedmicro-rtos-mbed/signals/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "mbed.h" #include "greentea-client/test_env.h" #include "rtos.h" diff --git a/TESTS/mbedmicro-rtos-mbed/threads/main.cpp b/TESTS/mbedmicro-rtos-mbed/threads/main.cpp index b6ad51985ba..1ece21524df 100644 --- a/TESTS/mbedmicro-rtos-mbed/threads/main.cpp +++ b/TESTS/mbedmicro-rtos-mbed/threads/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "mbed.h" #include "greentea-client/test_env.h" #include "unity.h" diff --git a/TESTS/netsocket/ip_parsing/main.cpp b/TESTS/netsocket/ip_parsing/main.cpp index 54702f1d1be..6d00816256f 100644 --- a/TESTS/netsocket/ip_parsing/main.cpp +++ b/TESTS/netsocket/ip_parsing/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "mbed.h" #include "greentea-client/test_env.h" #include "unity.h" diff --git a/features/FEATURE_BLE/targets/TARGET_Maxim/MaximBLE.cpp b/features/FEATURE_BLE/targets/TARGET_Maxim/MaximBLE.cpp index 5d442d70c3a..439001b79ce 100644 --- a/features/FEATURE_BLE/targets/TARGET_Maxim/MaximBLE.cpp +++ b/features/FEATURE_BLE/targets/TARGET_Maxim/MaximBLE.cpp @@ -1,5 +1,5 @@ /******************************************************************************* - * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. + * Copyright (C) 2017 Maxim Integrated Products, Inc., All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -52,10 +52,10 @@ #include "hci_vs.h" /* Number of WSF buffer pools */ -#define WSF_BUF_POOLS 4 +#define WSF_BUF_POOLS 5 /*! Free memory for pool buffers. */ -static uint8_t mainBufMem[768]; +static uint8_t mainBufMem[1040]; /*! Default pool descriptor. */ static wsfBufPoolDesc_t mainPoolDesc[WSF_BUF_POOLS] = @@ -63,24 +63,52 @@ static wsfBufPoolDesc_t mainPoolDesc[WSF_BUF_POOLS] = { 16, 8 }, { 32, 4 }, { 64, 2 }, - { 128, 2 } + { 128, 2 }, + { 272, 1 } }; +/* Store the Event signalling */ +bool isEventsSignaled = false; + /*! WSF handler ID */ wsfHandlerId_t maximHandlerId; static volatile int reset_complete; +#ifdef BLE_HCI_UART +static DigitalIn _rts(BT_CTS); +static DigitalIn _cts(BT_RTS); +static DigitalIn _clk(BT_CLK); +static DigitalOut _shutdown(BT_RST, 0); +static Serial _uart(BT_TX, BT_RX, 115200); +#else /* Current mbed SPI API does not support HW slave selects. Configured in HCI driver. */ static DigitalOut _csn(HCI_CSN, 1); static SPI _spi(HCI_MOSI, HCI_MISO, HCI_SCK, HCI_CSN); static DigitalOut _rst(HCI_RST, 0); static InterruptIn _irq(HCI_IRQ); +#endif /** * The singleton which represents the MaximBLE transport for the BLE. */ static MaximBLE deviceInstance; +extern "C" { + +/* + * This function will signal to the user code by calling signalEventsToProcess. + * It is registered and called into the Wsf Stack. + */ +void wsf_mbed_ble_signal_event(void) +{ + if (isEventsSignaled == false) { + isEventsSignaled = true; + deviceInstance.signalEventsToProcess(::BLE::DEFAULT_INSTANCE); + } +} + +} + /** * BLE-API requires an implementation of the following function in order to * obtain its transport handle. @@ -240,16 +268,20 @@ ble_error_t MaximBLE::init(BLE::InstanceID_t instanceID, FunctionPointerWithCont maximHandlerId = WsfOsSetNextHandler(maximHandler); /* init HCI */ +#ifdef BLE_HCI_UART + hciDrvInit(BT_TX, BT_RST, BT_CLK); +#else _irq.disable_irq(); _irq.rise(hciDrvIsr); _irq.fall(NULL); hciDrvInit(HCI_CSN, HCI_RST, HCI_IRQ); +#endif /* Register for stack callbacks */ DmRegister(DmCback); DmConnRegister(DM_CLIENT_ID_APP, DmCback); AttConnRegister(AppServerConnCback); - + /* Reset the device */ reset_complete = 0; DmDevReset(); @@ -301,12 +333,15 @@ void MaximBLE::waitForEvent(void) void MaximBLE::processEvents() { - callDispatcher(); + if (isEventsSignaled) { + isEventsSignaled = false; + callDispatcher(); + } } void MaximBLE::timeoutCallback(void) { - // do nothing. just an interrupt for wake up. + wsf_mbed_ble_signal_event(); } void MaximBLE::callDispatcher(void) diff --git a/features/FEATURE_BLE/targets/TARGET_Maxim/exactLE/hci/maxwsn/hci_drv.h b/features/FEATURE_BLE/targets/TARGET_Maxim/exactLE/hci/hci_drv.h similarity index 100% rename from features/FEATURE_BLE/targets/TARGET_Maxim/exactLE/hci/maxwsn/hci_drv.h rename to features/FEATURE_BLE/targets/TARGET_Maxim/exactLE/hci/hci_drv.h diff --git a/features/FEATURE_BLE/targets/TARGET_Maxim/exactLE/hci/maxwsn/hci_vs.h b/features/FEATURE_BLE/targets/TARGET_Maxim/exactLE/hci/hci_vs.h similarity index 100% rename from features/FEATURE_BLE/targets/TARGET_Maxim/exactLE/hci/maxwsn/hci_vs.h rename to features/FEATURE_BLE/targets/TARGET_Maxim/exactLE/hci/hci_vs.h diff --git a/features/FEATURE_COMMON_PAL/mbed-coap/CHANGELOG.md b/features/FEATURE_COMMON_PAL/mbed-coap/CHANGELOG.md index f4f7ad81624..7995a1d87a8 100644 --- a/features/FEATURE_COMMON_PAL/mbed-coap/CHANGELOG.md +++ b/features/FEATURE_COMMON_PAL/mbed-coap/CHANGELOG.md @@ -1,5 +1,14 @@ # Change Log +## [v4.0.8](https://github.com/ARMmbed/mbed-coap/releases/tag/v4.0.8) + +-[Full Changelog](https://github.com/ARMmbed/mbed-coap/compare/v4.0.4...v4.0.8) + + **Closed issues:** + - IOTCLT-1880 Lwm2m blockwise data transfer (using Block1 option) with Leshan not working + - IOTCLT-1885 Return 4.08 Request Entity Incomplete on Block transfer errors + - IOTCLT-1883 Detected message duplications stop mbed-client + ## [v4.0.4](https://github.com/ARMmbed/mbed-coap/releases/tag/v4.0.4) -[Full Changelog](https://github.com/ARMmbed/mbed-coap/compare/v4.0.3...v4.0.4) diff --git a/features/FEATURE_COMMON_PAL/mbed-coap/module.json b/features/FEATURE_COMMON_PAL/mbed-coap/module.json index 28d37c9f414..df17fbba504 100644 --- a/features/FEATURE_COMMON_PAL/mbed-coap/module.json +++ b/features/FEATURE_COMMON_PAL/mbed-coap/module.json @@ -1,6 +1,6 @@ { "name": "mbed-coap", - "version": "4.0.6", + "version": "4.0.8", "description": "COAP library", "keywords": [ "coap", diff --git a/features/FEATURE_COMMON_PAL/mbed-coap/source/include/sn_coap_protocol_internal.h b/features/FEATURE_COMMON_PAL/mbed-coap/source/include/sn_coap_protocol_internal.h index d3cc664503a..3a603d3dfa4 100644 --- a/features/FEATURE_COMMON_PAL/mbed-coap/source/include/sn_coap_protocol_internal.h +++ b/features/FEATURE_COMMON_PAL/mbed-coap/source/include/sn_coap_protocol_internal.h @@ -189,6 +189,7 @@ typedef struct coap_blockwise_payload_ { uint8_t addr_len; uint8_t *addr_ptr; uint16_t port; + uint32_t block_number; uint16_t payload_len; uint8_t *payload_ptr; diff --git a/features/FEATURE_COMMON_PAL/mbed-coap/source/sn_coap_protocol.c b/features/FEATURE_COMMON_PAL/mbed-coap/source/sn_coap_protocol.c index fc643e329ae..aed99fb242b 100644 --- a/features/FEATURE_COMMON_PAL/mbed-coap/source/sn_coap_protocol.c +++ b/features/FEATURE_COMMON_PAL/mbed-coap/source/sn_coap_protocol.c @@ -56,8 +56,9 @@ static void sn_coap_protocol_linked_list_duplication_info_remov #endif #if SN_COAP_MAX_BLOCKWISE_PAYLOAD_SIZE /* If Message blockwising is not used at all, this part of code will not be compiled */ static void sn_coap_protocol_linked_list_blockwise_msg_remove(struct coap_s *handle, coap_blockwise_msg_s *removed_msg_ptr); -static void sn_coap_protocol_linked_list_blockwise_payload_store(struct coap_s *handle, sn_nsdl_addr_s *addr_ptr, uint16_t stored_payload_len, uint8_t *stored_payload_ptr); +static void sn_coap_protocol_linked_list_blockwise_payload_store(struct coap_s *handle, sn_nsdl_addr_s *addr_ptr, uint16_t stored_payload_len, uint8_t *stored_payload_ptr, uint32_t block_number); static uint8_t *sn_coap_protocol_linked_list_blockwise_payload_search(struct coap_s *handle, sn_nsdl_addr_s *src_addr_ptr, uint16_t *payload_length); +static bool sn_coap_protocol_linked_list_blockwise_payload_compare_block_number(struct coap_s *handle, sn_nsdl_addr_s *src_addr_ptr, uint32_t block_number); static void sn_coap_protocol_linked_list_blockwise_payload_remove(struct coap_s *handle, coap_blockwise_payload_s *removed_payload_ptr); static void sn_coap_protocol_linked_list_blockwise_payload_remove_oldest(struct coap_s *handle); static uint32_t sn_coap_protocol_linked_list_blockwise_payloads_get_len(struct coap_s *handle, sn_nsdl_addr_s *src_addr_ptr); @@ -653,9 +654,11 @@ sn_coap_hdr_s *sn_coap_protocol_parse(struct coap_s *handle, sn_nsdl_addr_s *src returned_dst_coap_msg_ptr->msg_id); /* Send ACK response */ if (response) { - response->coap->sn_coap_tx_callback(response->packet_ptr, - response->packet_len, response->address, response->param); - + /* Check that response has been created */ + if (response->packet_ptr) { + response->coap->sn_coap_tx_callback(response->packet_ptr, + response->packet_len, response->address, response->param); + } } return returned_dst_coap_msg_ptr; @@ -795,7 +798,6 @@ int8_t sn_coap_protocol_exec(struct coap_s *handle, uint32_t current_time) if (tmp_coap_hdr_ptr != 0) { tmp_coap_hdr_ptr->coap_status = COAP_STATUS_BUILDER_MESSAGE_SENDING_FAILED; - stored_msg_ptr->coap->sn_coap_rx_callback(tmp_coap_hdr_ptr, stored_msg_ptr->send_msg_ptr->dst_addr_ptr, stored_msg_ptr->param); sn_coap_parser_release_allocated_coap_msg_mem(stored_msg_ptr->coap, tmp_coap_hdr_ptr); @@ -1210,7 +1212,8 @@ static void sn_coap_protocol_linked_list_blockwise_msg_remove(struct coap_s *han static void sn_coap_protocol_linked_list_blockwise_payload_store(struct coap_s *handle, sn_nsdl_addr_s *addr_ptr, uint16_t stored_payload_len, - uint8_t *stored_payload_ptr) + uint8_t *stored_payload_ptr, + uint32_t block_number) { if (!addr_ptr || !stored_payload_len || !stored_payload_ptr) { return; @@ -1227,6 +1230,7 @@ static void sn_coap_protocol_linked_list_blockwise_payload_store(struct coap_s * return; } + /* Allocate memory for stored Payload's data */ stored_blockwise_payload_ptr->payload_ptr = handle->sn_coap_protocol_malloc(stored_payload_len); @@ -1259,6 +1263,8 @@ static void sn_coap_protocol_linked_list_blockwise_payload_store(struct coap_s * stored_blockwise_payload_ptr->coap = handle; + stored_blockwise_payload_ptr->block_number = block_number; + /* * * * Storing Payload to Linked list * * * */ ns_list_add_to_end(&handle->linked_list_blockwise_received_payloads, stored_blockwise_payload_ptr); @@ -1295,6 +1301,27 @@ static uint8_t *sn_coap_protocol_linked_list_blockwise_payload_search(struct coa return NULL; } +static bool sn_coap_protocol_linked_list_blockwise_payload_compare_block_number(struct coap_s *handle, + sn_nsdl_addr_s *src_addr_ptr, + uint32_t block_number) +{ + /* Loop all stored blockwise payloads in Linked list */ + ns_list_foreach(coap_blockwise_payload_s, stored_payload_info_ptr, &handle->linked_list_blockwise_received_payloads) { + /* If payload's Source address is same than is searched */ + if (0 == memcmp(src_addr_ptr->addr_ptr, stored_payload_info_ptr->addr_ptr, src_addr_ptr->addr_len)) { + /* If payload's Source address port is same than is searched */ + if (stored_payload_info_ptr->port == src_addr_ptr->port) { + // Check that incoming block number matches to last received one + if (block_number - 1 == stored_payload_info_ptr->block_number) { + tr_debug("sn_coap_protocol_linked_list_blockwise_payload_search_block_number - found %d", stored_payload_info_ptr->block_number); + return true; + } + } + } + } + return false; +} + /**************************************************************************//** * \fn static void sn_coap_protocol_linked_list_blockwise_payload_remove_oldest(struct coap_s *handle) * @@ -1326,7 +1353,6 @@ static void sn_coap_protocol_linked_list_blockwise_payload_remove(struct coap_s coap_blockwise_payload_s *removed_payload_ptr) { ns_list_remove(&handle->linked_list_blockwise_received_payloads, removed_payload_ptr); - /* Free memory of stored payload */ if (removed_payload_ptr->addr_ptr != NULL) { handle->sn_coap_protocol_free(removed_payload_ptr->addr_ptr); @@ -1658,7 +1684,22 @@ static sn_coap_hdr_s *sn_coap_handle_blockwise_message(struct coap_s *handle, sn received_coap_msg_ptr->payload_len = handle->sn_coap_block_data_size; } - sn_coap_protocol_linked_list_blockwise_payload_store(handle, src_addr_ptr, received_coap_msg_ptr->payload_len, received_coap_msg_ptr->payload_ptr); + // Check that incoming block number is in order. + uint32_t block_number = received_coap_msg_ptr->options_list_ptr->block1 >> 4; + bool blocks_in_order = true; + if (block_number > 0 && + !sn_coap_protocol_linked_list_blockwise_payload_compare_block_number(handle, + src_addr_ptr, + block_number)) { + blocks_in_order = false; + } + + sn_coap_protocol_linked_list_blockwise_payload_store(handle, + src_addr_ptr, + received_coap_msg_ptr->payload_len, + received_coap_msg_ptr->payload_ptr, + block_number); + /* If not last block (more value is set) */ /* Block option length can be 1-3 bytes. First 4-20 bits are for block number. Last 4 bits are ALWAYS more bit + block size. */ if (received_coap_msg_ptr->options_list_ptr->block1 & 0x08) { @@ -1678,12 +1719,14 @@ static sn_coap_hdr_s *sn_coap_handle_blockwise_message(struct coap_s *handle, sn // Response with COAP_MSG_CODE_RESPONSE_REQUEST_ENTITY_TOO_LARGE if the payload size is more than we can handle tr_debug("sn_coap_handle_blockwise_message - block1 received - incoming size: [%d]", received_coap_msg_ptr->options_list_ptr->size1); + uint32_t max_size = SN_COAP_MAX_INCOMING_BLOCK_MESSAGE_SIZE; - if (received_coap_msg_ptr->options_list_ptr->size1 > max_size) { + if (!blocks_in_order) { + src_coap_blockwise_ack_msg_ptr->msg_code = COAP_MSG_CODE_RESPONSE_REQUEST_ENTITY_INCOMPLETE; + } else if (received_coap_msg_ptr->options_list_ptr->size1 > max_size) { // Include maximum size that stack can handle into response src_coap_blockwise_ack_msg_ptr->msg_code = COAP_MSG_CODE_RESPONSE_REQUEST_ENTITY_TOO_LARGE; src_coap_blockwise_ack_msg_ptr->options_list_ptr->size1 = max_size; - } else if (received_coap_msg_ptr->msg_code == COAP_MSG_CODE_REQUEST_GET) { src_coap_blockwise_ack_msg_ptr->msg_code = COAP_MSG_CODE_RESPONSE_CONTENT; } else if (received_coap_msg_ptr->msg_code == COAP_MSG_CODE_REQUEST_POST) { @@ -1706,6 +1749,13 @@ static sn_coap_hdr_s *sn_coap_handle_blockwise_message(struct coap_s *handle, sn src_coap_blockwise_ack_msg_ptr->msg_id = received_coap_msg_ptr->msg_id; + // Copy token to response + src_coap_blockwise_ack_msg_ptr->token_ptr = handle->sn_coap_protocol_malloc(received_coap_msg_ptr->token_len); + if (src_coap_blockwise_ack_msg_ptr->token_ptr) { + memcpy(src_coap_blockwise_ack_msg_ptr->token_ptr, received_coap_msg_ptr->token_ptr, received_coap_msg_ptr->token_len); + src_coap_blockwise_ack_msg_ptr->token_len = received_coap_msg_ptr->token_len; + } + dst_packed_data_needed_mem = sn_coap_builder_calc_needed_packet_data_size_2(src_coap_blockwise_ack_msg_ptr, handle->sn_coap_block_data_size); dst_ack_packet_data_ptr = handle->sn_coap_protocol_malloc(dst_packed_data_needed_mem); @@ -1776,7 +1826,11 @@ static sn_coap_hdr_s *sn_coap_handle_blockwise_message(struct coap_s *handle, sn /* Store blockwise payload to Linked list */ //todo: add block number to stored values - just to make sure all packets are in order - sn_coap_protocol_linked_list_blockwise_payload_store(handle, src_addr_ptr, received_coap_msg_ptr->payload_len, received_coap_msg_ptr->payload_ptr); + sn_coap_protocol_linked_list_blockwise_payload_store(handle, + src_addr_ptr, + received_coap_msg_ptr->payload_len, + received_coap_msg_ptr->payload_ptr, + received_coap_msg_ptr->options_list_ptr->block1 >> 4); /* If not last block (more value is set) */ if (received_coap_msg_ptr->options_list_ptr->block2 & 0x08) { diff --git a/features/FEATURE_LWIP/TESTS/mbedmicro-net/connectivity/main.cpp b/features/FEATURE_LWIP/TESTS/mbedmicro-net/connectivity/main.cpp index eb9272e65a7..67119ea20fb 100644 --- a/features/FEATURE_LWIP/TESTS/mbedmicro-net/connectivity/main.cpp +++ b/features/FEATURE_LWIP/TESTS/mbedmicro-net/connectivity/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #if !FEATURE_LWIP #error [NOT_SUPPORTED] LWIP not supported for this target #endif diff --git a/features/FEATURE_LWIP/TESTS/mbedmicro-net/gethostbyname/main.cpp b/features/FEATURE_LWIP/TESTS/mbedmicro-net/gethostbyname/main.cpp index ab0101b576a..b0a5d4eb7b7 100644 --- a/features/FEATURE_LWIP/TESTS/mbedmicro-net/gethostbyname/main.cpp +++ b/features/FEATURE_LWIP/TESTS/mbedmicro-net/gethostbyname/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #if !FEATURE_LWIP #error [NOT_SUPPORTED] LWIP not supported for this target #endif diff --git a/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_echo/main.cpp b/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_echo/main.cpp index 01337af1015..6324e6d1043 100644 --- a/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_echo/main.cpp +++ b/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_echo/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #if !FEATURE_LWIP #error [NOT_SUPPORTED] LWIP not supported for this target #endif diff --git a/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_echo_parallel/main.cpp b/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_echo_parallel/main.cpp index f1465650028..377a4229b66 100644 --- a/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_echo_parallel/main.cpp +++ b/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_echo_parallel/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #if !FEATURE_LWIP #error [NOT_SUPPORTED] LWIP not supported for this target #endif diff --git a/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_hello_world/main.cpp b/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_hello_world/main.cpp index c489f956cef..f5a0b0b9a98 100644 --- a/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_hello_world/main.cpp +++ b/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_hello_world/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #if !FEATURE_LWIP #error [NOT_SUPPORTED] LWIP not supported for this target #endif diff --git a/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_packet_pressure/main.cpp b/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_packet_pressure/main.cpp index 5710276768e..ec0731c9c78 100644 --- a/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_packet_pressure/main.cpp +++ b/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_packet_pressure/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #if !FEATURE_LWIP #error [NOT_SUPPORTED] LWIP not supported for this target #endif diff --git a/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_packet_pressure_parallel/main.cpp b/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_packet_pressure_parallel/main.cpp index 40b658fd33f..847e40ae15d 100644 --- a/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_packet_pressure_parallel/main.cpp +++ b/features/FEATURE_LWIP/TESTS/mbedmicro-net/tcp_packet_pressure_parallel/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #if !FEATURE_LWIP #error [NOT_SUPPORTED] LWIP not supported for this target #endif diff --git a/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_dtls_handshake/main.cpp b/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_dtls_handshake/main.cpp index 0c485336649..2563bc2dfae 100644 --- a/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_dtls_handshake/main.cpp +++ b/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_dtls_handshake/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #if !FEATURE_LWIP #error [NOT_SUPPORTED] LWIP not supported for this target #endif diff --git a/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_echo/main.cpp b/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_echo/main.cpp index 44c24dd98a8..ab07f52f038 100644 --- a/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_echo/main.cpp +++ b/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_echo/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #if !FEATURE_LWIP #error [NOT_SUPPORTED] LWIP not supported for this target #endif diff --git a/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_echo_parallel/main.cpp b/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_echo_parallel/main.cpp index cf3ee5c20d0..8e8c19ccf11 100644 --- a/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_echo_parallel/main.cpp +++ b/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_echo_parallel/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #if !FEATURE_LWIP #error [NOT_SUPPORTED] LWIP not supported for this target #endif diff --git a/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_packet_pressure/main.cpp b/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_packet_pressure/main.cpp index ef3a9b403b5..3faa23b4669 100644 --- a/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_packet_pressure/main.cpp +++ b/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_packet_pressure/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #if !FEATURE_LWIP #error [NOT_SUPPORTED] LWIP not supported for this target #endif diff --git a/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_packet_pressure_parallel/main.cpp b/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_packet_pressure_parallel/main.cpp index 31279e1e924..acb543b4bb3 100644 --- a/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_packet_pressure_parallel/main.cpp +++ b/features/FEATURE_LWIP/TESTS/mbedmicro-net/udp_packet_pressure_parallel/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #if !FEATURE_LWIP #error [NOT_SUPPORTED] LWIP not supported for this target #endif diff --git a/features/frameworks/utest/TESTS/unit_tests/basic_test/main.cpp b/features/frameworks/utest/TESTS/unit_tests/basic_test/main.cpp index bc70d42046e..0a647f6b248 100644 --- a/features/frameworks/utest/TESTS/unit_tests/basic_test/main.cpp +++ b/features/frameworks/utest/TESTS/unit_tests/basic_test/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "mbed.h" #include "greentea-client/test_env.h" #include "utest/utest.h" diff --git a/features/frameworks/utest/TESTS/unit_tests/basic_test_default/main.cpp b/features/frameworks/utest/TESTS/unit_tests/basic_test_default/main.cpp index 474f509a885..38c808d6e6d 100644 --- a/features/frameworks/utest/TESTS/unit_tests/basic_test_default/main.cpp +++ b/features/frameworks/utest/TESTS/unit_tests/basic_test_default/main.cpp @@ -1,3 +1,18 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ /* This is a copy of the basic_test unit test without a custom setup handler being provided. */ diff --git a/features/mbedtls/targets/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F439ZI/mbedtls_device.h b/features/mbedtls/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/mbedtls_device.h similarity index 95% rename from features/mbedtls/targets/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F439ZI/mbedtls_device.h rename to features/mbedtls/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/mbedtls_device.h index c78d135083f..dfbc82055ef 100644 --- a/features/mbedtls/targets/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F439ZI/mbedtls_device.h +++ b/features/mbedtls/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/mbedtls_device.h @@ -1,5 +1,5 @@ /* - * mbedtls_device.h + * mbedtls_device.h ******************************************************************************* * Copyright (c) 2017, STMicroelectronics * SPDX-License-Identifier: Apache-2.0 @@ -26,4 +26,6 @@ #define MBEDTLS_SHA1_ALT +#define MBEDTLS_MD5_ALT + #endif /* MBEDTLS_DEVICE_H */ diff --git a/features/mbedtls/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F756ZG/mbedtls_device.h b/features/mbedtls/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F756ZG/mbedtls_device.h index 9a06a1cba55..8382789dfbe 100644 --- a/features/mbedtls/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F756ZG/mbedtls_device.h +++ b/features/mbedtls/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F756ZG/mbedtls_device.h @@ -1,5 +1,5 @@ /* - * mbedtls_device.h + * mbedtls_device.h ******************************************************************************* * Copyright (c) 2017, STMicroelectronics * SPDX-License-Identifier: Apache-2.0 @@ -21,6 +21,10 @@ #define MBEDTLS_DEVICE_H #define MBEDTLS_AES_ALT +#define MBEDTLS_SHA1_ALT +#define MBEDTLS_SHA256_ALT +#define MBEDTLS_MD5_ALT + #endif /* MBEDTLS_DEVICE_H */ diff --git a/features/mbedtls/targets/TARGET_STM/md5_alt.c b/features/mbedtls/targets/TARGET_STM/md5_alt.c new file mode 100644 index 00000000000..1a954ca2135 --- /dev/null +++ b/features/mbedtls/targets/TARGET_STM/md5_alt.c @@ -0,0 +1,191 @@ +/* + * MD5 hw acceleration + ******************************************************************************* + * Copyright (c) 2017, STMicroelectronics + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ +#if defined(MBEDTLS_MD5_C) +#include "mbedtls/md5.h" + +#if defined(MBEDTLS_MD5_ALT) +#include "mbedtls/platform.h" + +/* Implementation that should never be optimized out by the compiler */ +static void mbedtls_zeroize( void *v, size_t n ) { + volatile unsigned char *p = v; while( n-- ) *p++ = 0; +} + +static int st_md5_restore_hw_context(mbedtls_md5_context *ctx) +{ + uint32_t i; + uint32_t tickstart; + /* allow multi-instance of HASH use: save context for HASH HW module CR */ + /* Check that there is no HASH activity on going */ + tickstart = HAL_GetTick(); + while ((HASH->SR & (HASH_FLAG_BUSY | HASH_FLAG_DMAS)) != 0) { + if ((HAL_GetTick() - tickstart) > ST_MD5_TIMEOUT) { + return 0; // timeout: HASH processor is busy + } + } + HASH->STR = ctx->ctx_save_str; + HASH->CR = (ctx->ctx_save_cr | HASH_CR_INIT); + for (i=0;i<38;i++) { + HASH->CSR[i] = ctx->ctx_save_csr[i]; + } + return 1; +} + +static int st_md5_save_hw_context(mbedtls_md5_context *ctx) +{ + uint32_t i; + uint32_t tickstart; + /* Check that there is no HASH activity on going */ + tickstart = HAL_GetTick(); + while ((HASH->SR & (HASH_FLAG_BUSY | HASH_FLAG_DMAS)) != 0) { + if ((HAL_GetTick() - tickstart) > ST_MD5_TIMEOUT) { + return 0; // timeout: HASH processor is busy + } + } + /* allow multi-instance of HASH use: restore context for HASH HW module CR */ + ctx->ctx_save_cr = HASH->CR; + ctx->ctx_save_str = HASH->STR; + for (i=0;i<38;i++) { + ctx->ctx_save_csr[i] = HASH->CSR[i]; + } + return 1; +} + +void mbedtls_md5_init( mbedtls_md5_context *ctx ) +{ + mbedtls_zeroize( ctx, sizeof( mbedtls_md5_context ) ); + + /* Enable HASH clock */ + __HAL_RCC_HASH_CLK_ENABLE(); + +} + +void mbedtls_md5_free( mbedtls_md5_context *ctx ) +{ + if( ctx == NULL ) + return; + mbedtls_zeroize( ctx, sizeof( mbedtls_md5_context ) ); +} + +void mbedtls_md5_clone( mbedtls_md5_context *dst, + const mbedtls_md5_context *src ) +{ + *dst = *src; +} + +void mbedtls_md5_starts( mbedtls_md5_context *ctx ) +{ + /* HASH IP initialization */ + if (HAL_HASH_DeInit(&ctx->hhash_md5) != 0) { + // error found to be returned + return; + } + + /* HASH Configuration */ + ctx->hhash_md5.Init.DataType = HASH_DATATYPE_8B; + /* clear CR ALGO value */ + HASH->CR &= ~HASH_CR_ALGO_Msk; + if (HAL_HASH_Init(&ctx->hhash_md5) != 0) { + // return error code + return; + } + if (st_md5_save_hw_context(ctx) != 1) { + return; // return HASH_BUSY timeout Error here + } +} + +void mbedtls_md5_process( mbedtls_md5_context *ctx, const unsigned char data[ST_MD5_BLOCK_SIZE] ) +{ + if (st_md5_restore_hw_context(ctx) != 1) { + return; // Return HASH_BUSY timout error here + } + if (HAL_HASH_MD5_Accumulate(&ctx->hhash_md5, (uint8_t *)data, ST_MD5_BLOCK_SIZE) != 0) { + return; // Return error code here + } + if (st_md5_save_hw_context(ctx) != 1) { + return; // return HASH_BUSY timeout Error here + } +} + +void mbedtls_md5_update( mbedtls_md5_context *ctx, const unsigned char *input, size_t ilen ) +{ + size_t currentlen = ilen; + if (st_md5_restore_hw_context(ctx) != 1) { + return; // Return HASH_BUSY timout error here + } + // store mechanism to accumulate ST_MD5_BLOCK_SIZE bytes (512 bits) in the HW + if (currentlen == 0){ // only change HW status is size if 0 + if(ctx->hhash_md5.Phase == HAL_HASH_PHASE_READY) { + /* Select the MD5 mode and reset the HASH processor core, so that the HASH will be ready to compute + the message digest of a new message */ + HASH->CR |= HASH_ALGOSELECTION_MD5 | HASH_CR_INIT; + } + ctx->hhash_md5.Phase = HAL_HASH_PHASE_PROCESS; + } else if (currentlen < (ST_MD5_BLOCK_SIZE - ctx->sbuf_len)) { + // only buffurize + memcpy(ctx->sbuf+ctx->sbuf_len, input, currentlen); + ctx->sbuf_len += currentlen; + } else { + // fill buffer and process it + memcpy(ctx->sbuf + ctx->sbuf_len, input, (ST_MD5_BLOCK_SIZE - ctx->sbuf_len)); + currentlen -= (ST_MD5_BLOCK_SIZE - ctx->sbuf_len); + mbedtls_md5_process(ctx, ctx->sbuf); + // Process every input as long as it is %64 bytes, ie 512 bits + size_t iter = currentlen / ST_MD5_BLOCK_SIZE; + if (iter !=0) { + if (HAL_HASH_MD5_Accumulate(&ctx->hhash_md5, (uint8_t *)(input + ST_MD5_BLOCK_SIZE - ctx->sbuf_len), (iter * ST_MD5_BLOCK_SIZE)) != 0) { + return; // Return error code here + } + } + // sbuf is completely accumulated, now copy up to 63 remaining bytes + ctx->sbuf_len = currentlen % ST_MD5_BLOCK_SIZE; + if (ctx->sbuf_len !=0) { + memcpy(ctx->sbuf, input + ilen - ctx->sbuf_len, ctx->sbuf_len); + } + } + if (st_md5_save_hw_context(ctx) != 1) { + return; // return HASH_BUSY timeout Error here + } +} + +void mbedtls_md5_finish( mbedtls_md5_context *ctx, unsigned char output[16] ) +{ + if (st_md5_restore_hw_context(ctx) != 1) { + return; // Return HASH_BUSY timout error here + } + if (ctx->sbuf_len > 0) { + if (HAL_HASH_MD5_Accumulate(&ctx->hhash_md5, ctx->sbuf, ctx->sbuf_len) != 0) { + return; // Return error code here + } + } + mbedtls_zeroize( ctx->sbuf, ST_MD5_BLOCK_SIZE); + ctx->sbuf_len = 0; + __HAL_HASH_START_DIGEST(); + + if (HAL_HASH_MD5_Finish(&ctx->hhash_md5, output, 10)) { + // error code to be returned + } + if (st_md5_save_hw_context(ctx) != 1) { + return; // return HASH_BUSY timeout Error here + } +} + +#endif /* MBEDTLS_MD5_ALT */ +#endif /* MBEDTLS_MD5_C */ diff --git a/features/mbedtls/targets/TARGET_STM/md5_alt.h b/features/mbedtls/targets/TARGET_STM/md5_alt.h new file mode 100644 index 00000000000..7ea0df21e19 --- /dev/null +++ b/features/mbedtls/targets/TARGET_STM/md5_alt.h @@ -0,0 +1,111 @@ +/** + * \file md5_alt.h + * + * \brief MD5 hw acceleration (hash function) + * + * Copyright (c) 2017, STMicroelectronics + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ +#ifndef MBEDTLS_MD5_ALT_H +#define MBEDTLS_MD5_ALT_H + +#if defined(MBEDTLS_MD5_ALT) + +#include "cmsis.h" +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define ST_MD5_BLOCK_SIZE ((size_t)(64)) // HW handles 512 bits, ie 64 bytes +#define ST_MD5_TIMEOUT ((uint32_t) 3) + +/** + * \brief MD5 context structure + * \note HAL_HASH_MD5_Accumulate will accumulate 512 bits packets, unless it is the last call to the function + * A ST_MD5_BLOCK_SIZE bytes buffer is used to save values and handle the processing + * ST_MD5_BLOCK_SIZE bytes per ST_MD5_BLOCK_SIZE bytes + * If MD5_finish is called and sbuf_len>0, the remaining bytes are accumulated prior to the call to HAL_HASH_MD5_Finish + */ +typedef struct +{ + HASH_HandleTypeDef hhash_md5;/*!< ST HAL HASH struct */ + unsigned char sbuf[ST_MD5_BLOCK_SIZE]; /*!< MBEDTLS_MD5_BLOCK_SIZE buffer to store values so that algorithm is caled once the buffer is filled */ + unsigned char sbuf_len; /*!< number of bytes to be processed in sbuf */ + uint32_t ctx_save_cr; + uint32_t ctx_save_str; + uint32_t ctx_save_csr[38]; +} +mbedtls_md5_context; + +/** + * \brief Initialize MD5 context + * + * \param ctx MD5 context to be initialized + */ +void mbedtls_md5_init( mbedtls_md5_context *ctx ); + +/** + * \brief Clear MD5 context + * + * \param ctx MD5 context to be cleared + */ +void mbedtls_md5_free( mbedtls_md5_context *ctx ); + +/** + * \brief Clone (the state of) an MD5 context + * + * \param dst The destination context + * \param src The context to be cloned + */ +void mbedtls_md5_clone( mbedtls_md5_context *dst, + const mbedtls_md5_context *src ); + +/** + * \brief MD5 context setup + * + * \param ctx context to be initialized + */ +void mbedtls_md5_starts( mbedtls_md5_context *ctx ); + +/** + * \brief MD5 process buffer + * + * \param ctx MD5 context + * \param input buffer holding the data + * \param ilen length of the input data + */ +void mbedtls_md5_update( mbedtls_md5_context *ctx, const unsigned char *input, size_t ilen ); + +/** + * \brief MD5 final digest + * + * \param ctx MD5 context + * \param output MD5 checksum result + */ +void mbedtls_md5_finish( mbedtls_md5_context *ctx, unsigned char output[16] ); + +/* Internal use */ +void mbedtls_md5_process( mbedtls_md5_context *ctx, const unsigned char data[ST_MD5_BLOCK_SIZE] ); + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_MD5_ALT */ + +#endif /* md5_alt.h */ diff --git a/features/mbedtls/targets/TARGET_STM/sha1_alt.c b/features/mbedtls/targets/TARGET_STM/sha1_alt.c index 98317c21fa6..cfd90416f29 100644 --- a/features/mbedtls/targets/TARGET_STM/sha1_alt.c +++ b/features/mbedtls/targets/TARGET_STM/sha1_alt.c @@ -98,6 +98,8 @@ void mbedtls_sha1_starts( mbedtls_sha1_context *ctx ) /* HASH Configuration */ ctx->hhash_sha1.Init.DataType = HASH_DATATYPE_8B; + /* clear CR ALGO value */ + HASH->CR &= ~HASH_CR_ALGO_Msk; if (HAL_HASH_Init(&ctx->hhash_sha1) == HAL_ERROR) { // error found to be returned return; diff --git a/features/mbedtls/targets/TARGET_STM/sha256_alt.c b/features/mbedtls/targets/TARGET_STM/sha256_alt.c index a3354e9968a..6729cdac2e2 100644 --- a/features/mbedtls/targets/TARGET_STM/sha256_alt.c +++ b/features/mbedtls/targets/TARGET_STM/sha256_alt.c @@ -99,6 +99,8 @@ void mbedtls_sha256_starts( mbedtls_sha256_context *ctx, int is224 ) ctx->is224 = is224; /* HASH Configuration */ ctx->hhash_sha256.Init.DataType = HASH_DATATYPE_8B; + /* clear CR ALGO value */ + HASH->CR &= ~HASH_CR_ALGO_Msk; if (HAL_HASH_Init(&ctx->hhash_sha256) == HAL_ERROR) { // error found to be returned return; diff --git a/features/unsupported/USBHost/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/USBHALHost_DISCO_L475VG_IOT01A.h b/features/unsupported/USBHost/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/USBHALHost_DISCO_L475VG_IOT01A.h new file mode 100644 index 00000000000..21860af5361 --- /dev/null +++ b/features/unsupported/USBHost/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/USBHALHost_DISCO_L475VG_IOT01A.h @@ -0,0 +1,120 @@ +/* Copyright (c) 2017 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ +#ifndef USBHALHOST_DISCO_L475VG_IOT01A +#define USBHALHOST_DISCO_L475VG_IOT01A + +#define USBHAL_IRQn OTG_FS_IRQn + +#define HCCA_SIZE sizeof(HCD_HandleTypeDef) +#define ED_SIZE sizeof(HCED) +#define TD_SIZE sizeof(HCTD) + +#define TOTAL_SIZE (HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE) + (MAX_TD*TD_SIZE)) + +/* STM device FS have 11 channels (definition is for 60 channels) */ +static volatile uint8_t usb_buf[TOTAL_SIZE]; + +typedef struct { + /* store the request ongoing on each endpoit */ + /* 1st field of structure avoid giving knowledge of all structure to + * endpoint */ + volatile uint32_t addr[MAX_ENDPOINT]; + USBHALHost *inst; + void (USBHALHost::*deviceConnected)(int hub, int port, bool lowSpeed, USBHostHub * hub_parent); + void (USBHALHost::*deviceDisconnected)(int hub, int port, USBHostHub * hub_parent, volatile uint32_t addr); + void (USBHALHost::*transferCompleted)(volatile uint32_t addr); +} USBHALHost_Private_t; + +static gpio_t gpio_powerpin; + +#define USB_POWER_OFF 1 +#define USB_POWER_ON 0 +#define USB_POWERPIN_CONFIG {gpio_init_out_ex(&gpio_powerpin, PD_12, USB_POWER_OFF);} + + +void usb_vbus( uint8_t state) +{ + if (state == 0) { + gpio_write(&gpio_powerpin, USB_POWER_OFF); + } else { + gpio_write(&gpio_powerpin, USB_POWER_ON); + } + wait(0.2); +} + + +USBHALHost::USBHALHost() +{ + instHost = this; + HCD_HandleTypeDef *hhcd; + USBHALHost_Private_t *HALPriv = new(USBHALHost_Private_t); + + memset(HALPriv, 0, sizeof(USBHALHost_Private_t)); + memInit(); + memset((void*)usb_hcca, 0, HCCA_SIZE); + + hhcd = (HCD_HandleTypeDef *)usb_hcca; + hhcd->Instance = USB_OTG_FS; + hhcd->pData = (void*)HALPriv; + hhcd->Init.Host_channels = 11; + + /* for now failed with dma */ + hhcd->Init.dma_enable = 0; + hhcd->Init.speed = HCD_SPEED_FULL; + hhcd->Init.phy_itface = HCD_PHY_EMBEDDED; + hhcd->Init.use_external_vbus = 1; + + HALPriv->inst = this; + HALPriv->deviceConnected = &USBHALHost::deviceConnected; + HALPriv->deviceDisconnected = &USBHALHost::deviceDisconnected; + HALPriv->transferCompleted = &USBHALHost::transferCompleted; + + for (int i = 0; i < MAX_ENDPOINT; i++) { + edBufAlloc[i] = false; + HALPriv->addr[i]=(uint32_t)-1; + } + + for (int i = 0; i < MAX_TD; i++) { + tdBufAlloc[i] = false; + } + + __HAL_RCC_PWR_CLK_ENABLE(); + +#ifdef TARGET_STM32L4 + HAL_PWREx_EnableVddUSB(); +#endif + + /* Configure USB GPIOs */ + __HAL_RCC_GPIOA_CLK_ENABLE(); + pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM pin + pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP pin + pin_function(PA_9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS pin + + /* Configure USB POWER pin */ + USB_POWERPIN_CONFIG; + + /* Enable USB FS Clocks */ + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + + /* Set USBFS Interrupt priority */ + HAL_NVIC_SetPriority(USBHAL_IRQn, 5, 0); + NVIC_SetVector(USBHAL_IRQn, (uint32_t)&_usbisr); +} + +#endif // USBHALHOST_DISCO_L475VG_IOT01A diff --git a/features/unsupported/USBHost/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/USBHALHost_STM_TARGET.h b/features/unsupported/USBHost/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/USBHALHost_STM_TARGET.h new file mode 100644 index 00000000000..cfa73918229 --- /dev/null +++ b/features/unsupported/USBHost/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/USBHALHost_STM_TARGET.h @@ -0,0 +1,18 @@ +/* Copyright (c) 2016 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ +#include "USBHALHost_DISCO_L475VG_IOT01A.h" diff --git a/mbed.h b/mbed.h index 530d677b4fd..693fd8ecb04 100644 --- a/mbed.h +++ b/mbed.h @@ -16,13 +16,13 @@ #ifndef MBED_H #define MBED_H -#define MBED_LIBRARY_VERSION 148 +#define MBED_LIBRARY_VERSION 149 #if MBED_CONF_RTOS_PRESENT // RTOS present, this is valid only for mbed OS 5 #define MBED_MAJOR_VERSION 5 #define MBED_MINOR_VERSION 5 -#define MBED_PATCH_VERSION 4 +#define MBED_PATCH_VERSION 5 #else // mbed 2 diff --git a/rtos/Queue.h b/rtos/Queue.h index 1ce46292fbf..56739522ae9 100644 --- a/rtos/Queue.h +++ b/rtos/Queue.h @@ -68,15 +68,24 @@ class Queue : private mbed::NonCopyable > { @param data message pointer. @param millisec timeout value or 0 in case of no time-out. (default: 0) @param prio priority value or 0 in case of default. (default: 0) - @return status code that indicates the execution status of the function. + @return status code that indicates the execution status of the function: + @a osOK the message has been put into the queue. + @a osErrorTimeout the message could not be put into the queue in the given time. + @a osErrorResource not enough space in the queue. + @a osErrorParameter internal error or non-zero timeout specified in an ISR. */ osStatus put(T* data, uint32_t millisec=0, uint8_t prio=0) { return osMessageQueuePut(_id, &data, prio, millisec); } - /** Get a message or Wait for a message from a Queue. + /** Get a message or Wait for a message from a Queue. Messages are retrieved in a descending priority order or + first in first out when the priorities are the same. @param millisec timeout value or 0 in case of no time-out. (default: osWaitForever). - @return event information that includes the message and the status code. + @return event information that includes the message in event.value and the status code in event.status: + @a osEventMessage message received. + @a osOK no message is available in the queue and no timeout was specified. + @a osEventTimeout no message has arrived during the given timeout period. + @a osErrorParameter a parameter is invalid or outside of a permitted range. */ osEvent get(uint32_t millisec=osWaitForever) { osEvent event; diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/i2c_api.c b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/i2c_api.c index c89c327678b..b3a8fad88ca 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/i2c_api.c +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/i2c_api.c @@ -173,7 +173,7 @@ void i2c_frequency(i2c_t *obj, int hz) int32_t baud_rate; int32_t tmp_baud; int32_t tmp_baud_hs; - enum status_code tmp_status_code; + enum status_code tmp_status_code = STATUS_OK; /* Sanity check arguments */ MBED_ASSERT(obj); diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/pwmout_api.c b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/pwmout_api.c index be896ccd16e..7e83ed67e82 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/pwmout_api.c +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/pwmout_api.c @@ -60,7 +60,7 @@ static void pwmout_set_period(pwmout_t* obj, int period_us) freq_hz = system_gclk_gen_get_hz(obj->clock_source); - for (i=0; i> tcc_prescaler[i]; if (!div_freq) break; us_per_cycle = 1000000.00 / div_freq; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_dspi.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_dspi.c index 4bc67d7ad37..d3b3f0aa5f7 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_dspi.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_dspi.c @@ -1,32 +1,32 @@ /* -* Copyright (c) 2015, Freescale Semiconductor, Inc. -* All rights reserved. -* -* Redistribution and use in source and binary forms, with or without modification, -* are permitted provided that the following conditions are met: -* -* o Redistributions of source code must retain the above copyright notice, this list -* of conditions and the following disclaimer. -* -* o Redistributions in binary form must reproduce the above copyright notice, this -* list of conditions and the following disclaimer in the documentation and/or -* other materials provided with the distribution. -* -* o Neither the name of Freescale Semiconductor, Inc. nor the names of its -* contributors may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ + * Copyright (c) 2015, Freescale Semiconductor, Inc. + * Copyright 2016-2017 NXP + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * o Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * o Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * o Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ #include "fsl_dspi.h" @@ -65,27 +65,27 @@ static void DSPI_SetOnePcsPolarity(SPI_Type *base, dspi_which_pcs_t pcs, dspi_pc /*! * @brief Master fill up the TX FIFO with data. - * This is not a public API as it is called from other driver functions. + * This is not a public API. */ static void DSPI_MasterTransferFillUpTxFifo(SPI_Type *base, dspi_master_handle_t *handle); /*! * @brief Master finish up a transfer. * It would call back if there is callback function and set the state to idle. - * This is not a public API as it is called from other driver functions. + * This is not a public API. */ static void DSPI_MasterTransferComplete(SPI_Type *base, dspi_master_handle_t *handle); /*! * @brief Slave fill up the TX FIFO with data. - * This is not a public API as it is called from other driver functions. + * This is not a public API. */ static void DSPI_SlaveTransferFillUpTxFifo(SPI_Type *base, dspi_slave_handle_t *handle); /*! * @brief Slave finish up a transfer. * It would call back if there is callback function and set the state to idle. - * This is not a public API as it is called from other driver functions. + * This is not a public API. */ static void DSPI_SlaveTransferComplete(SPI_Type *base, dspi_slave_handle_t *handle); @@ -100,7 +100,7 @@ static void DSPI_CommonIRQHandler(SPI_Type *base, void *param); /*! * @brief Master prepare the transfer. * Basically it set up dspi_master_handle . - * This is not a public API as it is called from other driver functions. fsl_dspi_edma.c also call this function. + * This is not a public API. */ static void DSPI_MasterTransferPrepare(SPI_Type *base, dspi_master_handle_t *handle, dspi_transfer_t *transfer); @@ -129,7 +129,7 @@ static clock_ip_name_t const s_dspiClock[] = DSPI_CLOCKS; #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */ /*! @brief Pointers to dspi handles for each instance. */ -static void *g_dspiHandle[FSL_FEATURE_SOC_DSPI_COUNT]; +static void *g_dspiHandle[ARRAY_SIZE(s_dspiBases)]; /*! @brief Pointer to master IRQ handler for each instance. */ static dspi_master_isr_t s_dspiMasterIsr; @@ -137,6 +137,8 @@ static dspi_master_isr_t s_dspiMasterIsr; /*! @brief Pointer to slave IRQ handler for each instance. */ static dspi_slave_isr_t s_dspiSlaveIsr; +/* @brief Dummy data for each instance. This data is used when user's tx buffer is NULL*/ +volatile uint8_t s_dummyData[ARRAY_SIZE(s_dspiBases)] = {0}; /********************************************************************************************************************** * Code *********************************************************************************************************************/ @@ -145,7 +147,7 @@ uint32_t DSPI_GetInstance(SPI_Type *base) uint32_t instance; /* Find the instance index from base address mappings. */ - for (instance = 0; instance < FSL_FEATURE_SOC_DSPI_COUNT; instance++) + for (instance = 0; instance < ARRAY_SIZE(s_dspiBases); instance++) { if (s_dspiBases[instance] == base) { @@ -153,11 +155,17 @@ uint32_t DSPI_GetInstance(SPI_Type *base) } } - assert(instance < FSL_FEATURE_SOC_DSPI_COUNT); + assert(instance < ARRAY_SIZE(s_dspiBases)); return instance; } +void DSPI_SetDummyData(SPI_Type *base, uint8_t dummyData) +{ + uint32_t instance = DSPI_GetInstance(base); + s_dummyData[instance] = dummyData; +} + void DSPI_MasterInit(SPI_Type *base, const dspi_master_config_t *masterConfig, uint32_t srcClock_Hz) { assert(masterConfig); @@ -202,6 +210,7 @@ void DSPI_MasterInit(SPI_Type *base, const dspi_master_config_t *masterConfig, u DSPI_MasterSetDelayTimes(base, masterConfig->whichCtar, kDSPI_BetweenTransfer, srcClock_Hz, masterConfig->ctarConfig.betweenTransferDelayInNanoSec); + DSPI_SetDummyData(base, DSPI_DUMMY_DATA); DSPI_StartTransfer(base); } @@ -262,6 +271,8 @@ void DSPI_SlaveInit(SPI_Type *base, const dspi_slave_config_t *slaveConfig) SPI_CTAR_SLAVE_CPOL(slaveConfig->ctarConfig.cpol) | SPI_CTAR_SLAVE_CPHA(slaveConfig->ctarConfig.cpha); + DSPI_SetDummyData(base, DSPI_DUMMY_DATA); + DSPI_StartTransfer(base); } @@ -582,7 +593,7 @@ status_t DSPI_MasterTransferBlocking(SPI_Type *base, dspi_transfer_t *transfer) uint16_t wordToSend = 0; uint16_t wordReceived = 0; - uint8_t dummyData = DSPI_DUMMY_DATA; + uint8_t dummyData = s_dummyData[DSPI_GetInstance(base)]; uint8_t bitsPerFrame; uint32_t command; @@ -897,13 +908,10 @@ status_t DSPI_MasterTransferNonBlocking(SPI_Type *base, dspi_master_handle_t *ha handle->state = kDSPI_Busy; DSPI_MasterTransferPrepare(base, handle, transfer); - DSPI_StartTransfer(base); /* Enable the NVIC for DSPI peripheral. */ EnableIRQ(s_dspiIRQ[DSPI_GetInstance(base)]); - DSPI_MasterTransferFillUpTxFifo(base, handle); - /* RX FIFO Drain request: RFDF_RE to enable RFDF interrupt * Since SPI is a synchronous interface, we only need to enable the RX interrupt. * The IRQ handler will get the status of RX and TX interrupt flags. @@ -911,7 +919,10 @@ status_t DSPI_MasterTransferNonBlocking(SPI_Type *base, dspi_master_handle_t *ha s_dspiMasterIsr = DSPI_MasterTransferHandleIRQ; DSPI_EnableInterrupts(base, kDSPI_RxFifoDrainRequestInterruptEnable); + DSPI_StartTransfer(base); + /* Fill up the Tx FIFO to trigger the transfer. */ + DSPI_MasterTransferFillUpTxFifo(base, handle); return kStatus_Success; } @@ -952,13 +963,12 @@ static void DSPI_MasterTransferComplete(SPI_Type *base, dspi_master_handle_t *ha status = kStatus_Success; } + handle->state = kDSPI_Idle; + if (handle->callback) { handle->callback(base, handle, status, handle->userData); } - - /* The transfer is complete.*/ - handle->state = kDSPI_Idle; } static void DSPI_MasterTransferFillUpTxFifo(SPI_Type *base, dspi_master_handle_t *handle) @@ -966,7 +976,7 @@ static void DSPI_MasterTransferFillUpTxFifo(SPI_Type *base, dspi_master_handle_t assert(handle); uint16_t wordToSend = 0; - uint8_t dummyData = DSPI_DUMMY_DATA; + uint8_t dummyData = s_dummyData[DSPI_GetInstance(base)]; /* If bits/frame is greater than one byte */ if (handle->bitsPerFrame > 8) @@ -1257,11 +1267,6 @@ status_t DSPI_SlaveTransferNonBlocking(SPI_Type *base, dspi_slave_handle_t *hand DSPI_FlushFifo(base, true, true); DSPI_ClearStatusFlags(base, kDSPI_AllStatusFlag); - DSPI_StartTransfer(base); - - /* Prepare data to transmit */ - DSPI_SlaveTransferFillUpTxFifo(base, handle); - s_dspiSlaveIsr = DSPI_SlaveTransferHandleIRQ; /* Enable RX FIFO drain request, the slave only use this interrupt */ @@ -1278,6 +1283,11 @@ status_t DSPI_SlaveTransferNonBlocking(SPI_Type *base, dspi_slave_handle_t *hand DSPI_EnableInterrupts(base, kDSPI_TxFifoUnderflowInterruptEnable); } + DSPI_StartTransfer(base); + + /* Prepare data to transmit */ + DSPI_SlaveTransferFillUpTxFifo(base, handle); + return kStatus_Success; } @@ -1306,7 +1316,7 @@ static void DSPI_SlaveTransferFillUpTxFifo(SPI_Type *base, dspi_slave_handle_t * assert(handle); uint16_t transmitData = 0; - uint8_t dummyPattern = DSPI_DUMMY_DATA; + uint8_t dummyPattern = s_dummyData[DSPI_GetInstance(base)]; /* Service the transmitter, if transmit buffer provided, transmit the data, * else transmit dummy pattern @@ -1413,12 +1423,12 @@ static void DSPI_SlaveTransferComplete(SPI_Type *base, dspi_slave_handle_t *hand status = kStatus_Success; } + handle->state = kDSPI_Idle; + if (handle->callback) { handle->callback(base, handle, status, handle->userData); } - - handle->state = kDSPI_Idle; } void DSPI_SlaveTransferAbort(SPI_Type *base, dspi_slave_handle_t *handle) @@ -1440,7 +1450,7 @@ void DSPI_SlaveTransferHandleIRQ(SPI_Type *base, dspi_slave_handle_t *handle) { assert(handle); - uint8_t dummyPattern = DSPI_DUMMY_DATA; + uint8_t dummyPattern = s_dummyData[DSPI_GetInstance(base)]; uint32_t dataReceived; uint32_t dataSend = 0; @@ -1617,7 +1627,7 @@ static void DSPI_CommonIRQHandler(SPI_Type *base, void *param) } } -#if (FSL_FEATURE_SOC_DSPI_COUNT > 0) +#if defined(SPI0) void SPI0_DriverIRQHandler(void) { assert(g_dspiHandle[0]); @@ -1625,7 +1635,7 @@ void SPI0_DriverIRQHandler(void) } #endif -#if (FSL_FEATURE_SOC_DSPI_COUNT > 1) +#if defined(SPI1) void SPI1_DriverIRQHandler(void) { assert(g_dspiHandle[1]); @@ -1633,7 +1643,7 @@ void SPI1_DriverIRQHandler(void) } #endif -#if (FSL_FEATURE_SOC_DSPI_COUNT > 2) +#if defined(SPI2) void SPI2_DriverIRQHandler(void) { assert(g_dspiHandle[2]); @@ -1641,7 +1651,7 @@ void SPI2_DriverIRQHandler(void) } #endif -#if (FSL_FEATURE_SOC_DSPI_COUNT > 3) +#if defined(SPI3) void SPI3_DriverIRQHandler(void) { assert(g_dspiHandle[3]); @@ -1649,7 +1659,7 @@ void SPI3_DriverIRQHandler(void) } #endif -#if (FSL_FEATURE_SOC_DSPI_COUNT > 4) +#if defined(SPI4) void SPI4_DriverIRQHandler(void) { assert(g_dspiHandle[4]); @@ -1657,7 +1667,7 @@ void SPI4_DriverIRQHandler(void) } #endif -#if (FSL_FEATURE_SOC_DSPI_COUNT > 5) +#if defined(SPI5) void SPI5_DriverIRQHandler(void) { assert(g_dspiHandle[5]); diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_dspi.h b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_dspi.h index eb730bd13a0..48d7353935e 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_dspi.h +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_dspi.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2015, Freescale Semiconductor, Inc. - * All rights reserved. + * Copyright 2016-2017 NXP * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: @@ -12,7 +12,7 @@ * list of conditions and the following disclaimer in the documentation and/or * other materials provided with the distribution. * - * o Neither the name of Freescale Semiconductor, Inc. nor the names of its + * o Neither the name of the copyright holder nor the names of its * contributors may be used to endorse or promote products derived from this * software without specific prior written permission. * @@ -37,15 +37,14 @@ * @{ */ - /********************************************************************************************************************** * Definitions *********************************************************************************************************************/ /*! @name Driver version */ /*@{*/ -/*! @brief DSPI driver version 2.1.3. */ -#define FSL_DSPI_DRIVER_VERSION (MAKE_VERSION(2, 1, 3)) +/*! @brief DSPI driver version 2.2.0. */ +#define FSL_DSPI_DRIVER_VERSION (MAKE_VERSION(2, 2, 0)) /*@}*/ #ifndef DSPI_DUMMY_DATA @@ -107,7 +106,8 @@ typedef enum _dspi_master_slave_mode } dspi_master_slave_mode_t; /*! - * @brief DSPI Sample Point: Controls when the DSPI master samples SIN in the Modified Transfer Format. This field is valid + * @brief DSPI Sample Point: Controls when the DSPI master samples SIN in the Modified Transfer Format. This field is + * valid * only when the CPHA bit in the CTAR register is 0. */ typedef enum _dspi_master_sample_point @@ -216,8 +216,9 @@ enum _dspi_transfer_config_flag_for_master kDSPI_MasterPcs4 = 4U << DSPI_MASTER_PCS_SHIFT, /*!< DSPI master transfer use PCS4 signal. */ kDSPI_MasterPcs5 = 5U << DSPI_MASTER_PCS_SHIFT, /*!< DSPI master transfer use PCS5 signal. */ - kDSPI_MasterPcsContinuous = 1U << 20, /*!< Indicates whether the PCS signal is continuous. */ - kDSPI_MasterActiveAfterTransfer = 1U << 21, /*!< Indicates whether the PCS signal is active after the last frame transfer.*/ + kDSPI_MasterPcsContinuous = 1U << 20, /*!< Indicates whether the PCS signal is continuous. */ + kDSPI_MasterActiveAfterTransfer = + 1U << 21, /*!< Indicates whether the PCS signal is active after the last frame transfer.*/ }; #define DSPI_SLAVE_CTAR_SHIFT (0U) /*!< DSPI slave CTAR shift macro; used internally. */ @@ -240,7 +241,7 @@ enum _dspi_transfer_state /*! @brief DSPI master command date configuration used for the SPIx_PUSHR.*/ typedef struct _dspi_command_data_config { - bool isPcsContinuous; /*!< Option to enable the continuous assertion of the chip select between transfers.*/ + bool isPcsContinuous; /*!< Option to enable the continuous assertion of the chip select between transfers.*/ dspi_ctar_selection_t whichCtar; /*!< The desired Clock and Transfer Attributes Register (CTAR) to use for CTAS.*/ dspi_which_pcs_t whichPcs; /*!< The desired PCS signal to use for the data transfer.*/ @@ -257,10 +258,10 @@ typedef struct _dspi_master_ctar_config dspi_clock_phase_t cpha; /*!< Clock phase. */ dspi_shift_direction_t direction; /*!< MSB or LSB data shift direction. */ - uint32_t pcsToSckDelayInNanoSec; /*!< PCS to SCK delay time in nanoseconds; setting to 0 sets the minimum - delay. It also sets the boundary value if out of range.*/ - uint32_t lastSckToPcsDelayInNanoSec; /*!< The last SCK to PCS delay time in nanoseconds; setting to 0 sets the - minimum delay. It also sets the boundary value if out of range.*/ + uint32_t pcsToSckDelayInNanoSec; /*!< PCS to SCK delay time in nanoseconds; setting to 0 sets the minimum + delay. It also sets the boundary value if out of range.*/ + uint32_t lastSckToPcsDelayInNanoSec; /*!< The last SCK to PCS delay time in nanoseconds; setting to 0 sets the + minimum delay. It also sets the boundary value if out of range.*/ uint32_t betweenTransferDelayInNanoSec; /*!< After the SCK delay time in nanoseconds; setting to 0 sets the minimum delay. It also sets the boundary value if out of range.*/ @@ -370,8 +371,9 @@ struct _dspi_master_handle uint8_t fifoSize; /*!< FIFO dataSize. */ - volatile bool isPcsActiveAfterTransfer; /*!< Indicates whether the PCS signal is active after the last frame transfer.*/ - volatile bool isThereExtraByte; /*!< Indicates whether there are extra bytes.*/ + volatile bool + isPcsActiveAfterTransfer; /*!< Indicates whether the PCS signal is active after the last frame transfer.*/ + volatile bool isThereExtraByte; /*!< Indicates whether there are extra bytes.*/ uint8_t *volatile txData; /*!< Send buffer. */ uint8_t *volatile rxData; /*!< Receive buffer. */ @@ -575,6 +577,7 @@ static inline void DSPI_ClearStatusFlags(SPI_Type *base, uint32_t statusFlags) * * This function configures the various interrupt masks of the DSPI. The parameters are a base and an interrupt mask. * Note, for Tx Fill and Rx FIFO drain requests, enable the interrupt request and disable the DMA request. + * Do not use this API(write to RSER register) while DSPI is in running state. * * @code * DSPI_EnableInterrupts(base, kDSPI_TxCompleteInterruptEnable | kDSPI_EndOfQueueInterruptEnable ); @@ -950,10 +953,12 @@ static inline uint32_t DSPI_MasterGetFormattedCommand(dspi_command_data_config_t * @brief Writes a 32-bit data word (16-bit command appended with 16-bit data) into the data * buffer master mode and waits till complete to return. * - * In this function, the user must append the 16-bit data to the 16-bit command information and then provide the total 32-bit word + * In this function, the user must append the 16-bit data to the 16-bit command information and then provide the total +* 32-bit word * as the data to send. * The command portion provides characteristics of the data, such as the optional continuous chip select operation - * between transfers, the desired Clock and Transfer Attributes register to use for the associated SPI frame, the desired PCS + * between transfers, the desired Clock and Transfer Attributes register to use for the associated SPI frame, the +* desired PCS * signal to use for the data transfer, whether the current transfer is the last in the queue, and whether to clear the * transfer count (normally needed when sending the first frame of a data packet). The user is responsible for * appending this command with the data to send. This is an example: @@ -1022,6 +1027,14 @@ static inline uint32_t DSPI_ReadData(SPI_Type *base) return (base->POPR); } +/*! + * @brief Set up the dummy data. + * + * @param base DSPI peripheral address. + * @param dummyData Data to be transferred when tx buffer is NULL. + */ +void DSPI_SetDummyData(SPI_Type *base, uint8_t dummyData); + /*! *@} */ diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_dspi_edma.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_dspi_edma.c index a110c18881b..467c892ff49 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_dspi_edma.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_dspi_edma.c @@ -1,32 +1,32 @@ /* -* Copyright (c) 2015, Freescale Semiconductor, Inc. -* All rights reserved. -* -* Redistribution and use in source and binary forms, with or without modification, -* are permitted provided that the following conditions are met: -* -* o Redistributions of source code must retain the above copyright notice, this list -* of conditions and the following disclaimer. -* -* o Redistributions in binary form must reproduce the above copyright notice, this -* list of conditions and the following disclaimer in the documentation and/or -* other materials provided with the distribution. -* -* o Neither the name of Freescale Semiconductor, Inc. nor the names of its -* contributors may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ + * Copyright (c) 2015, Freescale Semiconductor, Inc. + * Copyright 2016-2017 NXP + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * o Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * o Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * o Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ #include "fsl_dspi_edma.h" @@ -57,7 +57,7 @@ typedef struct _dspi_slave_edma_private_handle ***********************************************************************************************************************/ /*! * @brief EDMA_DspiMasterCallback after the DSPI master transfer completed by using EDMA. -* This is not a public API as it is called from other driver functions. +* This is not a public API. */ static void EDMA_DspiMasterCallback(edma_handle_t *edmaHandle, void *g_dspiEdmaPrivateHandle, @@ -66,7 +66,7 @@ static void EDMA_DspiMasterCallback(edma_handle_t *edmaHandle, /*! * @brief EDMA_DspiSlaveCallback after the DSPI slave transfer completed by using EDMA. -* This is not a public API as it is called from other driver functions. +* This is not a public API. */ static void EDMA_DspiSlaveCallback(edma_handle_t *edmaHandle, void *g_dspiEdmaPrivateHandle, @@ -89,6 +89,8 @@ extern uint32_t DSPI_GetInstance(SPI_Type *base); static dspi_master_edma_private_handle_t s_dspiMasterEdmaPrivateHandle[FSL_FEATURE_SOC_DSPI_COUNT]; static dspi_slave_edma_private_handle_t s_dspiSlaveEdmaPrivateHandle[FSL_FEATURE_SOC_DSPI_COUNT]; +/*! @brief Global variable for dummy data value setting. */ +extern volatile uint8_t s_dummyData[]; /*********************************************************************************************************************** * Code ***********************************************************************************************************************/ @@ -103,7 +105,9 @@ void DSPI_MasterTransferCreateHandleEDMA(SPI_Type *base, { assert(handle); assert(edmaRxRegToRxDataHandle); +#if (!(defined(FSL_FEATURE_DSPI_HAS_GASKET) && FSL_FEATURE_DSPI_HAS_GASKET)) assert(edmaTxDataToIntermediaryHandle); +#endif assert(edmaIntermediaryToTxRegHandle); /* Zero the handle. */ @@ -145,9 +149,11 @@ status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *hand return kStatus_DSPI_Busy; } + handle->state = kDSPI_Busy; + uint32_t instance = DSPI_GetInstance(base); uint16_t wordToSend = 0; - uint8_t dummyData = DSPI_DUMMY_DATA; + uint8_t dummyData = s_dummyData[DSPI_GetInstance(base)]; uint8_t dataAlreadyFed = 0; uint8_t dataFedMax = 2; @@ -158,9 +164,8 @@ status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *hand edma_transfer_config_t transferConfigA; edma_transfer_config_t transferConfigB; - edma_transfer_config_t transferConfigC; - handle->txBuffIfNull = ((uint32_t)DSPI_DUMMY_DATA << 8) | DSPI_DUMMY_DATA; + handle->txBuffIfNull = ((uint32_t)dummyData << 8) | dummyData; dspi_command_data_config_t commandStruct; DSPI_StopTransfer(base); @@ -196,20 +201,32 @@ status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *hand handle->remainingReceiveByteCount = transfer->dataSize; handle->totalByteCount = transfer->dataSize; - /* This limits the amount of data we can transfer due to the linked channel. - * The max bytes is 511 if 8-bit/frame or 1022 if 16-bit/frame + /* If using a shared RX/TX DMA request, then this limits the amount of data we can transfer + * due to the linked channel. The max bytes is 511 if 8-bit/frame or 1022 if 16-bit/frame */ + uint32_t limited_size = 0; + if (1 == FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) + { + limited_size = 32767u; + } + else + { + limited_size = 511u; + } + if (handle->bitsPerFrame > 8) { - if (transfer->dataSize > 1022) + if (transfer->dataSize > (limited_size << 1u)) { + handle->state = kDSPI_Idle; return kStatus_DSPI_OutOfRange; } } else { - if (transfer->dataSize > 511) + if (transfer->dataSize > limited_size) { + handle->state = kDSPI_Idle; return kStatus_DSPI_OutOfRange; } } @@ -217,16 +234,38 @@ status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *hand /*The data size should be even if the bitsPerFrame is greater than 8 (that is 2 bytes per frame in dspi) */ if ((handle->bitsPerFrame > 8) && (transfer->dataSize & 0x1)) { + handle->state = kDSPI_Idle; return kStatus_InvalidArgument; } - handle->state = kDSPI_Busy; - DSPI_DisableDMA(base, kDSPI_RxDmaEnable | kDSPI_TxDmaEnable); EDMA_SetCallback(handle->edmaRxRegToRxDataHandle, EDMA_DspiMasterCallback, &s_dspiMasterEdmaPrivateHandle[instance]); + /* + (1)For DSPI instances with shared RX/TX DMA requests: Rx DMA request -> channel_A -> channel_B-> channel_C. + channel_A minor link to channel_B , channel_B minor link to channel_C. + + Already pushed 1 or 2 data in SPI_PUSHR , then start the DMA tansfer. + channel_A:SPI_POPR to rxData, + channel_B:next txData to handle->command (low 16 bits), + channel_C:handle->command (32 bits) to SPI_PUSHR, and use the scatter/gather to transfer the last data + (handle->lastCommand to SPI_PUSHR). + + (2)For DSPI instances with separate RX and TX DMA requests: + Rx DMA request -> channel_A + Tx DMA request -> channel_C -> channel_B . + channel_C major link to channel_B. + So need prepare the first data in "intermediary" before the DMA + transfer and then channel_B is used to prepare the next data to "intermediary" + + channel_A:SPI_POPR to rxData, + channel_C: handle->command (32 bits) to SPI_PUSHR, + channel_B: next txData to handle->command (low 16 bits), and use the scatter/gather to prepare the last data + (handle->lastCommand to handle->Command). + */ + /*If dspi has separate dma request , prepare the first data in "intermediary" . else (dspi has shared dma request) , send first 2 data if there is fifo or send first 1 data if there is no fifo*/ if (1 == FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) @@ -252,6 +291,7 @@ status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *hand wordToSend = ((uint32_t)dummyData << 8) | dummyData; } handle->lastCommand = (handle->lastCommand & 0xffff0000U) | wordToSend; + handle->command = handle->lastCommand; } else /* For all words except the last word , frame > 8bits */ { @@ -284,6 +324,7 @@ status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *hand if (handle->remainingSendByteCount == 1) { handle->lastCommand = (handle->lastCommand & 0xffff0000U) | wordToSend; + handle->command = handle->lastCommand; } else { @@ -293,11 +334,10 @@ status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *hand } else /*dspi has shared dma request*/ - { /* For DSPI instances with shared RX/TX DMA requests, we'll use the RX DMA request to - * trigger ongoing transfers and will link to the TX DMA channel from the RX DMA channel. - */ + * trigger ongoing transfers and will link to the TX DMA channel from the RX DMA channel. + */ /* If bits/frame is greater than one byte */ if (handle->bitsPerFrame > 8) @@ -388,7 +428,7 @@ status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *hand } } - /***channel_A *** used for carry the data from Rx_Data_Register(POPR) to User_Receive_Buffer*/ + /***channel_A *** used for carry the data from Rx_Data_Register(POPR) to User_Receive_Buffer(rxData)*/ EDMA_ResetChannel(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel); transferConfigA.srcAddr = (uint32_t)rxAddr; @@ -428,12 +468,226 @@ status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *hand EDMA_EnableChannelInterrupts(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel, kEDMA_MajorInterruptEnable); + /*Calculate the last data : handle->lastCommand*/ + if (((handle->remainingSendByteCount > 0) && (1 != FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base))) || + ((((handle->remainingSendByteCount > 1) && (handle->bitsPerFrame <= 8)) || + ((handle->remainingSendByteCount > 2) && (handle->bitsPerFrame > 8))) && + (1 == FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)))) + { + if (handle->txData) + { + uint32_t bufferIndex = 0; + + if (1 == FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) + { + if (handle->bitsPerFrame <= 8) + { + bufferIndex = handle->remainingSendByteCount - 1; + } + else + { + bufferIndex = handle->remainingSendByteCount - 2; + } + } + else + { + bufferIndex = handle->remainingSendByteCount; + } + + if (handle->bitsPerFrame <= 8) + { + handle->lastCommand = (handle->lastCommand & 0xffff0000U) | handle->txData[bufferIndex - 1]; + } + else + { + handle->lastCommand = (handle->lastCommand & 0xffff0000U) | + ((uint32_t)handle->txData[bufferIndex - 1] << 8) | + handle->txData[bufferIndex - 2]; + } + } + else + { + if (handle->bitsPerFrame <= 8) + { + wordToSend = dummyData; + } + else + { + wordToSend = ((uint32_t)dummyData << 8) | dummyData; + } + handle->lastCommand = (handle->lastCommand & 0xffff0000U) | wordToSend; + } + } + +/* The feature of GASKET is that the SPI supports 8-bit or 16-bit writes to the PUSH TX FIFO, + * allowing a single write to the command word followed by multiple writes to the transmit word. + * The TX FIFO will save the last command word written, and convert a 8-bit/16-bit write to the + * transmit word into a 32-bit write that pushes both the command word and transmit word into + * the TX FIFO (PUSH TX FIFO Register In Master Mode) + * So, if this feature is supported, we can use use one channel to carry the receive data from + * receive regsiter to user data buffer, use the other channel to carry the data from user data buffer + * to transmit register,and use the scatter/gather function to prepare the last data. + * That is to say, if GASKET feature is supported, we can use only two channels for tansferring data. + */ +#if defined(FSL_FEATURE_DSPI_HAS_GASKET) && FSL_FEATURE_DSPI_HAS_GASKET + /* For DSPI instances with separate RX and TX DMA requests: use the scatter/gather to prepare the last data + * (handle->lastCommand) to PUSHR register. + */ + + EDMA_ResetChannel(handle->edmaIntermediaryToTxRegHandle->base, handle->edmaIntermediaryToTxRegHandle->channel); + + if ((1 == FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) || + ((handle->remainingSendByteCount > 0) && (1 != FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)))) + { + transferConfigB.srcAddr = (uint32_t) & (handle->lastCommand); + transferConfigB.destAddr = (uint32_t)txAddr; + transferConfigB.srcTransferSize = kEDMA_TransferSize4Bytes; + transferConfigB.destTransferSize = kEDMA_TransferSize4Bytes; + transferConfigB.srcOffset = 0; + transferConfigB.destOffset = 0; + transferConfigB.minorLoopBytes = 4; + transferConfigB.majorLoopCounts = 1; + + EDMA_TcdReset(softwareTCD); + EDMA_TcdSetTransferConfig(softwareTCD, &transferConfigB, NULL); + } + + /*User_Send_Buffer(txData) to PUSHR register. */ + if (((handle->remainingSendByteCount > 2) && (handle->bitsPerFrame <= 8)) || + ((handle->remainingSendByteCount > 4) && (handle->bitsPerFrame > 8))) + { + if (handle->txData) + { + if (1 == FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) + { + /* For DSPI with separate RX and TX DMA requests, one frame data has been carry + * to handle->command, so need to reduce the pointer of txData. + */ + transferConfigB.srcAddr = + (uint32_t)((uint8_t *)(handle->txData) - ((handle->bitsPerFrame <= 8) ? (1U) : (2U))); + transferConfigB.srcOffset = 1; + } + else + { + /* For DSPI with shared RX and TX DMA requests, one or two frame data have been carry + * to PUSHR register, so no need to change the pointer of txData. + */ + transferConfigB.srcAddr = (uint32_t)((uint8_t *)(handle->txData)); + transferConfigB.srcOffset = 1; + } + } + else + { + transferConfigB.srcAddr = (uint32_t)(&handle->txBuffIfNull); + transferConfigB.srcOffset = 0; + } + + transferConfigB.destAddr = (uint32_t)txAddr; + transferConfigB.destOffset = 0; + + transferConfigB.srcTransferSize = kEDMA_TransferSize1Bytes; + + if (handle->bitsPerFrame <= 8) + { + transferConfigB.destTransferSize = kEDMA_TransferSize1Bytes; + transferConfigB.minorLoopBytes = 1; + + transferConfigB.majorLoopCounts = handle->remainingSendByteCount - 1; + } + else + { + transferConfigB.destTransferSize = kEDMA_TransferSize2Bytes; + transferConfigB.minorLoopBytes = 2; + transferConfigB.majorLoopCounts = (handle->remainingSendByteCount / 2) - 1; + } + + EDMA_SetTransferConfig(handle->edmaIntermediaryToTxRegHandle->base, + handle->edmaIntermediaryToTxRegHandle->channel, &transferConfigB, softwareTCD); + } + /* If only one word to transmit, only carry the lastcommand. */ + else + { + EDMA_SetTransferConfig(handle->edmaIntermediaryToTxRegHandle->base, + handle->edmaIntermediaryToTxRegHandle->channel, &transferConfigB, NULL); + } + + /*Start the EDMA channel_A , channel_C. */ + EDMA_StartTransfer(handle->edmaRxRegToRxDataHandle); + EDMA_StartTransfer(handle->edmaIntermediaryToTxRegHandle); + + /* Set the channel link. + * For DSPI instances with shared TX and RX DMA requests, setup channel minor link, first receive data from the + * receive register, and then carry transmit data to PUSHER register. + * For DSPI instance with separate TX and RX DMA requests, there is no need to set up channel link. + */ + if (1 != FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) + { + /*Set channel priority*/ + uint8_t channelPriorityLow = handle->edmaRxRegToRxDataHandle->channel; + uint8_t channelPriorityHigh = handle->edmaIntermediaryToTxRegHandle->channel; + uint8_t t = 0; + + if (channelPriorityLow > channelPriorityHigh) + { + t = channelPriorityLow; + channelPriorityLow = channelPriorityHigh; + channelPriorityHigh = t; + } + + edma_channel_Preemption_config_t preemption_config_t; + preemption_config_t.enableChannelPreemption = true; + preemption_config_t.enablePreemptAbility = true; + preemption_config_t.channelPriority = channelPriorityLow; + + EDMA_SetChannelPreemptionConfig(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel, + &preemption_config_t); + + preemption_config_t.channelPriority = channelPriorityHigh; + EDMA_SetChannelPreemptionConfig(handle->edmaIntermediaryToTxRegHandle->base, + handle->edmaIntermediaryToTxRegHandle->channel, &preemption_config_t); + /*if there is Rx DMA request , carry the 32bits data (handle->command) to user data first , then link to + channelC to carry the next data to PUSHER register.(txData to PUSHER) */ + if (handle->remainingSendByteCount > 0) + { + EDMA_SetChannelLink(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel, + kEDMA_MinorLink, handle->edmaIntermediaryToTxRegHandle->channel); + } + } + + DSPI_EnableDMA(base, kDSPI_RxDmaEnable | kDSPI_TxDmaEnable); + + /* Setup control info to PUSHER register. */ + *((uint16_t *)&(base->PUSHR) + 1) = (handle->command >> 16U); +#else + /***channel_B *** used for carry the data from User_Send_Buffer to "intermediary" because the SPIx_PUSHR should write the 32bits at once time . Then use channel_C to carry the "intermediary" to SPIx_PUSHR. Note that the SPIx_PUSHR upper 16 bits are the "command" and the low 16bits are data */ + EDMA_ResetChannel(handle->edmaTxDataToIntermediaryHandle->base, handle->edmaTxDataToIntermediaryHandle->channel); - if (handle->remainingSendByteCount > 0) + /*For DSPI instances with separate RX and TX DMA requests: use the scatter/gather to prepare the last data + * (handle->lastCommand) to handle->Command*/ + if (1 == FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) + { + transferConfigB.srcAddr = (uint32_t) & (handle->lastCommand); + transferConfigB.destAddr = (uint32_t) & (handle->command); + transferConfigB.srcTransferSize = kEDMA_TransferSize4Bytes; + transferConfigB.destTransferSize = kEDMA_TransferSize4Bytes; + transferConfigB.srcOffset = 0; + transferConfigB.destOffset = 0; + transferConfigB.minorLoopBytes = 4; + transferConfigB.majorLoopCounts = 1; + + EDMA_TcdReset(softwareTCD); + EDMA_TcdSetTransferConfig(softwareTCD, &transferConfigB, NULL); + } + + /*User_Send_Buffer(txData) to intermediary(handle->command)*/ + if (((((handle->remainingSendByteCount > 2) && (handle->bitsPerFrame <= 8)) || + ((handle->remainingSendByteCount > 4) && (handle->bitsPerFrame > 8))) && + (1 == FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base))) || + (1 != FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base))) { if (handle->txData) { @@ -458,8 +712,7 @@ status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *hand if (1 == FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) { - /*already prepared the first data in "intermediary" , so minus 1 */ - transferConfigB.majorLoopCounts = handle->remainingSendByteCount - 1; + transferConfigB.majorLoopCounts = handle->remainingSendByteCount - 2; } else { @@ -474,8 +727,7 @@ status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *hand transferConfigB.minorLoopBytes = 2; if (1 == FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) { - /*already prepared the first data in "intermediary" , so minus 1 */ - transferConfigB.majorLoopCounts = handle->remainingSendByteCount / 2 - 1; + transferConfigB.majorLoopCounts = handle->remainingSendByteCount / 2 - 2; } else { @@ -485,66 +737,34 @@ status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *hand } } + if (1 == FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) + { + EDMA_SetTransferConfig(handle->edmaTxDataToIntermediaryHandle->base, + handle->edmaTxDataToIntermediaryHandle->channel, &transferConfigB, softwareTCD); + EDMA_EnableAutoStopRequest(handle->edmaIntermediaryToTxRegHandle->base, + handle->edmaIntermediaryToTxRegHandle->channel, false); + } + else + { + EDMA_SetTransferConfig(handle->edmaTxDataToIntermediaryHandle->base, + handle->edmaTxDataToIntermediaryHandle->channel, &transferConfigB, NULL); + } + } + else + { EDMA_SetTransferConfig(handle->edmaTxDataToIntermediaryHandle->base, handle->edmaTxDataToIntermediaryHandle->channel, &transferConfigB, NULL); } /***channel_C ***carry the "intermediary" to SPIx_PUSHR. used the edma Scatter Gather function on channel_C to handle the last data */ - EDMA_ResetChannel(handle->edmaIntermediaryToTxRegHandle->base, handle->edmaIntermediaryToTxRegHandle->channel); - if (((handle->remainingSendByteCount > 0) && (1 != FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base))) || - ((((handle->remainingSendByteCount > 1) && (handle->bitsPerFrame <= 8)) || - ((handle->remainingSendByteCount > 2) && (handle->bitsPerFrame > 8))) && - (1 == FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)))) - { - if (handle->txData) - { - uint32_t bufferIndex = 0; - - if (1 == FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) - { - if (handle->bitsPerFrame <= 8) - { - bufferIndex = handle->remainingSendByteCount - 1; - } - else - { - bufferIndex = handle->remainingSendByteCount - 2; - } - } - else - { - bufferIndex = handle->remainingSendByteCount; - } - - if (handle->bitsPerFrame <= 8) - { - handle->lastCommand = (handle->lastCommand & 0xffff0000U) | handle->txData[bufferIndex - 1]; - } - else - { - handle->lastCommand = (handle->lastCommand & 0xffff0000U) | - ((uint32_t)handle->txData[bufferIndex - 1] << 8) | - handle->txData[bufferIndex - 2]; - } - } - else - { - if (handle->bitsPerFrame <= 8) - { - wordToSend = dummyData; - } - else - { - wordToSend = ((uint32_t)dummyData << 8) | dummyData; - } - handle->lastCommand = (handle->lastCommand & 0xffff0000U) | wordToSend; - } - } + edma_transfer_config_t transferConfigC; + EDMA_ResetChannel(handle->edmaIntermediaryToTxRegHandle->base, handle->edmaIntermediaryToTxRegHandle->channel); - if ((1 == FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) || - ((1 != FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) && (handle->remainingSendByteCount > 0))) + /*For DSPI instances with shared RX/TX DMA requests: use the scatter/gather to prepare the last data + * (handle->lastCommand) to SPI_PUSHR*/ + if (((1 != FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) && (handle->remainingSendByteCount > 0))) { transferConfigC.srcAddr = (uint32_t) & (handle->lastCommand); transferConfigC.destAddr = (uint32_t)txAddr; @@ -560,7 +780,8 @@ status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *hand } if (((handle->remainingSendByteCount > 1) && (handle->bitsPerFrame <= 8)) || - ((handle->remainingSendByteCount > 2) && (handle->bitsPerFrame > 8))) + ((handle->remainingSendByteCount > 2) && (handle->bitsPerFrame > 8)) || + (1 == FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base))) { transferConfigC.srcAddr = (uint32_t)(&(handle->command)); transferConfigC.destAddr = (uint32_t)txAddr; @@ -570,18 +791,28 @@ status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *hand transferConfigC.srcOffset = 0; transferConfigC.destOffset = 0; transferConfigC.minorLoopBytes = 4; - - if (handle->bitsPerFrame <= 8) + if (1 != FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) { - transferConfigC.majorLoopCounts = handle->remainingSendByteCount - 1; + if (handle->bitsPerFrame <= 8) + { + transferConfigC.majorLoopCounts = handle->remainingSendByteCount - 1; + } + else + { + transferConfigC.majorLoopCounts = handle->remainingSendByteCount / 2 - 1; + } + + EDMA_SetTransferConfig(handle->edmaIntermediaryToTxRegHandle->base, + handle->edmaIntermediaryToTxRegHandle->channel, &transferConfigC, softwareTCD); } else { - transferConfigC.majorLoopCounts = handle->remainingSendByteCount / 2 - 1; + transferConfigC.majorLoopCounts = 1; + + EDMA_SetTransferConfig(handle->edmaIntermediaryToTxRegHandle->base, + handle->edmaIntermediaryToTxRegHandle->channel, &transferConfigC, NULL); } - EDMA_SetTransferConfig(handle->edmaIntermediaryToTxRegHandle->base, - handle->edmaIntermediaryToTxRegHandle->channel, &transferConfigC, softwareTCD); EDMA_EnableAutoStopRequest(handle->edmaIntermediaryToTxRegHandle->base, handle->edmaIntermediaryToTxRegHandle->channel, false); } @@ -653,20 +884,15 @@ status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *hand &preemption_config_t); } - /*Set the channel link. - For DSPI instances with shared RX/TX DMA requests: Rx DMA request -> channel_A -> channel_B-> channel_C. - For DSPI instances with separate RX and TX DMA requests: - Rx DMA request -> channel_A - Tx DMA request -> channel_C -> channel_B . (so need prepare the first data in "intermediary" before the DMA - transfer and then channel_B is used to prepare the next data to "intermediary" ) */ + /*Set the channel link.*/ if (1 == FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) { /*if there is Tx DMA request , carry the 32bits data (handle->command) to PUSHR first , then link to channelB - to prepare the next 32bits data (User_send_buffer to handle->command) */ + to prepare the next 32bits data (txData to handle->command) */ if (handle->remainingSendByteCount > 1) { EDMA_SetChannelLink(handle->edmaIntermediaryToTxRegHandle->base, - handle->edmaIntermediaryToTxRegHandle->channel, kEDMA_MinorLink, + handle->edmaIntermediaryToTxRegHandle->channel, kEDMA_MajorLink, handle->edmaTxDataToIntermediaryHandle->channel); } @@ -686,7 +912,7 @@ status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *hand DSPI_EnableDMA(base, kDSPI_RxDmaEnable); } - +#endif DSPI_StartTransfer(base); return kStatus_Success; @@ -805,6 +1031,8 @@ status_t DSPI_SlaveTransferEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle return kStatus_DSPI_Busy; } + handle->state = kDSPI_Busy; + uint32_t instance = DSPI_GetInstance(base); uint8_t whichCtar = (transfer->configFlags & DSPI_SLAVE_CTAR_MASK) >> DSPI_SLAVE_CTAR_SHIFT; handle->bitsPerFrame = @@ -813,34 +1041,42 @@ status_t DSPI_SlaveTransferEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle /* If using a shared RX/TX DMA request, then this limits the amount of data we can transfer * due to the linked channel. The max bytes is 511 if 8-bit/frame or 1022 if 16-bit/frame */ - if (1 != FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) + uint32_t limited_size = 0; + if (1 == FSL_FEATURE_DSPI_HAS_SEPARATE_DMA_RX_TX_REQn(base)) { - if (handle->bitsPerFrame > 8) + limited_size = 32767u; + } + else + { + limited_size = 511u; + } + + if (handle->bitsPerFrame > 8) + { + if (transfer->dataSize > (limited_size << 1u)) { - if (transfer->dataSize > 1022) - { - return kStatus_DSPI_OutOfRange; - } + handle->state = kDSPI_Idle; + return kStatus_DSPI_OutOfRange; } - else + } + else + { + if (transfer->dataSize > limited_size) { - if (transfer->dataSize > 511) - { - return kStatus_DSPI_OutOfRange; - } + handle->state = kDSPI_Idle; + return kStatus_DSPI_OutOfRange; } } /*The data size should be even if the bitsPerFrame is greater than 8 (that is 2 bytes per frame in dspi) */ if ((handle->bitsPerFrame > 8) && (transfer->dataSize & 0x1)) { + handle->state = kDSPI_Idle; return kStatus_InvalidArgument; } EDMA_SetCallback(handle->edmaRxRegToRxDataHandle, EDMA_DspiSlaveCallback, &s_dspiSlaveEdmaPrivateHandle[instance]); - handle->state = kDSPI_Busy; - /* Store transfer information */ handle->txData = transfer->txData; handle->rxData = transfer->rxData; @@ -849,7 +1085,7 @@ status_t DSPI_SlaveTransferEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle handle->totalByteCount = transfer->dataSize; uint16_t wordToSend = 0; - uint8_t dummyData = DSPI_DUMMY_DATA; + uint8_t dummyData = s_dummyData[DSPI_GetInstance(base)]; uint8_t dataAlreadyFed = 0; uint8_t dataFedMax = 2; @@ -1003,11 +1239,11 @@ status_t DSPI_SlaveTransferEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle transferConfigC.srcOffset = 0; if (handle->bitsPerFrame <= 8) { - handle->txBuffIfNull = DSPI_DUMMY_DATA; + handle->txBuffIfNull = dummyData; } else { - handle->txBuffIfNull = (DSPI_DUMMY_DATA << 8) | DSPI_DUMMY_DATA; + handle->txBuffIfNull = ((uint32_t)dummyData << 8) | dummyData; } } @@ -1106,13 +1342,13 @@ static void EDMA_DspiSlaveCallback(edma_handle_t *edmaHandle, DSPI_DisableDMA((dspiEdmaPrivateHandle->base), kDSPI_RxDmaEnable | kDSPI_TxDmaEnable); + dspiEdmaPrivateHandle->handle->state = kDSPI_Idle; + if (dspiEdmaPrivateHandle->handle->callback) { dspiEdmaPrivateHandle->handle->callback(dspiEdmaPrivateHandle->base, dspiEdmaPrivateHandle->handle, kStatus_Success, dspiEdmaPrivateHandle->handle->userData); } - - dspiEdmaPrivateHandle->handle->state = kDSPI_Idle; } void DSPI_SlaveTransferAbortEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle) diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_dspi_edma.h b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_dspi_edma.h index 4b4dbd930ea..23e29ce2983 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_dspi_edma.h +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_dspi_edma.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2015, Freescale Semiconductor, Inc. - * All rights reserved. + * Copyright 2016-2017 NXP * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: @@ -12,7 +12,7 @@ * list of conditions and the following disclaimer in the documentation and/or * other materials provided with the distribution. * - * o Neither the name of Freescale Semiconductor, Inc. nor the names of its + * o Neither the name of the copyright holder nor the names of its * contributors may be used to endorse or promote products derived from this * software without specific prior written permission. * diff --git a/targets/TARGET_Maxim/TARGET_MAX32610/TOOLCHAIN_ARM_STD/libexactLE.ar b/targets/TARGET_Maxim/TARGET_MAX32610/TOOLCHAIN_ARM_STD/libexactLE.ar index 3df62abfba9..697a33c2f11 100644 Binary files a/targets/TARGET_Maxim/TARGET_MAX32610/TOOLCHAIN_ARM_STD/libexactLE.ar and b/targets/TARGET_Maxim/TARGET_MAX32610/TOOLCHAIN_ARM_STD/libexactLE.ar differ diff --git a/targets/TARGET_Maxim/TARGET_MAX32610/TOOLCHAIN_GCC_ARM/libexactLE.a b/targets/TARGET_Maxim/TARGET_MAX32610/TOOLCHAIN_GCC_ARM/libexactLE.a index 7ac5141b89d..f0cd46aff56 100644 Binary files a/targets/TARGET_Maxim/TARGET_MAX32610/TOOLCHAIN_GCC_ARM/libexactLE.a and b/targets/TARGET_Maxim/TARGET_MAX32610/TOOLCHAIN_GCC_ARM/libexactLE.a differ diff --git a/targets/TARGET_Maxim/TARGET_MAX32610/TOOLCHAIN_IAR/libexactLE.a b/targets/TARGET_Maxim/TARGET_MAX32610/TOOLCHAIN_IAR/libexactLE.a index 707947146e9..56933038c6e 100644 Binary files a/targets/TARGET_Maxim/TARGET_MAX32610/TOOLCHAIN_IAR/libexactLE.a and b/targets/TARGET_Maxim/TARGET_MAX32610/TOOLCHAIN_IAR/libexactLE.a differ diff --git a/targets/TARGET_Maxim/TARGET_MAX32620/TOOLCHAIN_ARM_STD/libexactLE.ar b/targets/TARGET_Maxim/TARGET_MAX32620/TOOLCHAIN_ARM_STD/libexactLE.ar index f05e395dfdb..ee465787e02 100644 Binary files a/targets/TARGET_Maxim/TARGET_MAX32620/TOOLCHAIN_ARM_STD/libexactLE.ar and b/targets/TARGET_Maxim/TARGET_MAX32620/TOOLCHAIN_ARM_STD/libexactLE.ar differ diff --git a/targets/TARGET_Maxim/TARGET_MAX32620/TOOLCHAIN_GCC_ARM/libexactLE.a b/targets/TARGET_Maxim/TARGET_MAX32620/TOOLCHAIN_GCC_ARM/libexactLE.a index ecc6df531e5..5bdf6476c7b 100644 Binary files a/targets/TARGET_Maxim/TARGET_MAX32620/TOOLCHAIN_GCC_ARM/libexactLE.a and b/targets/TARGET_Maxim/TARGET_MAX32620/TOOLCHAIN_GCC_ARM/libexactLE.a differ diff --git a/targets/TARGET_Maxim/TARGET_MAX32620/TOOLCHAIN_IAR/libexactLE.a b/targets/TARGET_Maxim/TARGET_MAX32620/TOOLCHAIN_IAR/libexactLE.a index e4728cce3a0..050573918ad 100644 Binary files a/targets/TARGET_Maxim/TARGET_MAX32620/TOOLCHAIN_IAR/libexactLE.a and b/targets/TARGET_Maxim/TARGET_MAX32620/TOOLCHAIN_IAR/libexactLE.a differ diff --git a/targets/TARGET_Maxim/TARGET_MAX32620/sleep.c b/targets/TARGET_Maxim/TARGET_MAX32620/sleep.c index 2d531e35f66..35c3d729364 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620/sleep.c +++ b/targets/TARGET_Maxim/TARGET_MAX32620/sleep.c @@ -115,7 +115,7 @@ void hal_deepsleep(void) // Deep Sleep is not working properly on Revisions A3 and earlier if (part_rev <= REVISION_A3) { - sleep(); + hal_sleep(); return; } @@ -128,7 +128,7 @@ void hal_deepsleep(void) // Do not enter Deep Sleep if connected to VBUS if (MXC_USB->dev_intfl & MXC_F_USB_DEV_INTFL_VBUS_ST) { __enable_irq(); - sleep(); + hal_sleep(); return; } diff --git a/targets/TARGET_Maxim/TARGET_MAX32630/TARGET_MAX32630FTHR/PinNames.h b/targets/TARGET_Maxim/TARGET_MAX32630/TARGET_MAX32630FTHR/PinNames.h index 1b5719533a1..adb5c9dac16 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32630/TARGET_MAX32630FTHR/PinNames.h +++ b/targets/TARGET_Maxim/TARGET_MAX32630/TARGET_MAX32630FTHR/PinNames.h @@ -1,5 +1,5 @@ /******************************************************************************* - * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. + * Copyright (C) 2016-2017 Maxim Integrated Products, Inc., All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -144,6 +144,10 @@ typedef enum { OWM = P4_0, // BTLE Module hardwired + BT_TX = P0_0, + BT_RX = P0_1, + BT_RTS = P0_2, + BT_CTS = P0_3, BT_RST = P1_6, BT_CLK = P1_7, diff --git a/targets/TARGET_Maxim/TARGET_MAX32630/TOOLCHAIN_ARM_STD/libexactLE.ar b/targets/TARGET_Maxim/TARGET_MAX32630/TOOLCHAIN_ARM_STD/libexactLE.ar new file mode 100644 index 00000000000..e27f50d9550 Binary files /dev/null and b/targets/TARGET_Maxim/TARGET_MAX32630/TOOLCHAIN_ARM_STD/libexactLE.ar differ diff --git a/targets/TARGET_Maxim/TARGET_MAX32630/TOOLCHAIN_GCC_ARM/libexactLE.a b/targets/TARGET_Maxim/TARGET_MAX32630/TOOLCHAIN_GCC_ARM/libexactLE.a new file mode 100644 index 00000000000..c61dae9aa22 Binary files /dev/null and b/targets/TARGET_Maxim/TARGET_MAX32630/TOOLCHAIN_GCC_ARM/libexactLE.a differ diff --git a/targets/TARGET_Maxim/TARGET_MAX32630/TOOLCHAIN_IAR/libexactLE.a b/targets/TARGET_Maxim/TARGET_MAX32630/TOOLCHAIN_IAR/libexactLE.a new file mode 100644 index 00000000000..2626cf0774b Binary files /dev/null and b/targets/TARGET_Maxim/TARGET_MAX32630/TOOLCHAIN_IAR/libexactLE.a differ diff --git a/targets/TARGET_Maxim/TARGET_MAX32630/gpio_api.c b/targets/TARGET_Maxim/TARGET_MAX32630/gpio_api.c index 2b5bb5e41b7..c59a879a2be 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32630/gpio_api.c +++ b/targets/TARGET_Maxim/TARGET_MAX32630/gpio_api.c @@ -67,6 +67,13 @@ void gpio_init(gpio_t *obj, PinName name) void gpio_mode(gpio_t *obj, PinMode mode) { +#ifdef OPEN_DRAIN_LEDS + if ((obj->name == LED1) || (obj->name == LED2) || + (obj->name == LED3) || (obj->name == LED4)) { + mode = OpenDrain; + } +#endif + obj->mode = mode; pin_mode(obj->name, mode); } diff --git a/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_IAR/NCS36510.icf b/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_IAR/NCS36510.icf index 572cdcd2bec..6fd9f00fad1 100644 --- a/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_IAR/NCS36510.icf +++ b/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_IAR/NCS36510.icf @@ -1,49 +1,82 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_1.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x00003000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_IROM1_start__ = 0x00003000; /* FLASHA program start*/ +define symbol __ICFEDIT_region_IROM1_end__ = 0x00051FFF; /* 316K = 320K - 4K(FIB table), FLASHA end */ +define symbol __ICFEDIT_region_IROM2_start__ = 0x00102000; +define symbol __ICFEDIT_region_IROM2_end__ = 0x00151FFF; /* 320K */ +define symbol __ICFEDIT_region_EROM1_start__ = 0x0; +define symbol __ICFEDIT_region_EROM1_end__ = 0x0; +define symbol __ICFEDIT_region_EROM2_start__ = 0x0; +define symbol __ICFEDIT_region_EROM2_end__ = 0x0; +define symbol __ICFEDIT_region_EROM3_start__ = 0x0; +define symbol __ICFEDIT_region_EROM3_end__ = 0x0; -/* The memory space denoting the maximum possible amount of addressable memory */ -define memory Mem with size = 4G; +define symbol __ICFEDIT_region_IRAM1_start__ = 0x3FFFC000; /* RAMA start */ +define symbol __ICFEDIT_region_IRAM1_end__ = 0x3FFFFFFF; /* RAMA end */ +define symbol __ICFEDIT_region_IRAM2_start__ = 0x3FFF8000; /* RAMB start */ +define symbol __ICFEDIT_region_IRAM2_end__ = 0x3FFFBFFF; /* RAMB end */ +define symbol __ICFEDIT_region_IRAM3_start__ = 0x3FFF4000; /* RAMC start */ +define symbol __ICFEDIT_region_IRAM3_end__ = 0x3FFF7FFF; /* RAMC end */ +define symbol __ICFEDIT_region_ERAM1_start__ = 0x0; +define symbol __ICFEDIT_region_ERAM1_end__ = 0x0; +define symbol __ICFEDIT_region_ERAM2_start__ = 0x0; +define symbol __ICFEDIT_region_ERAM2_end__ = 0x0; +define symbol __ICFEDIT_region_ERAM3_start__ = 0x0; +define symbol __ICFEDIT_region_ERAM3_end__ = 0x0; -/* Memory regions in an address space */ -define region FLASHA = Mem:[from 0x00003000 size 0x4D000]; /* 308K = 320K - 4K(FIB table) - 8K(Persistent) */ -define region FLASHB = Mem:[from 0x00100000 size 0x50000]; -define region RAMA = Mem:[from 0x3FFFC000 size 0x4000]; -define region RAMB = Mem:[from 0x3FFF8000 size 0x4000]; -/* G2H ZPRO requires RAMC to be enabled */ -define region RAMC = Mem:[from 0x3FFF4000 + 0x90 size 0x4000 - 0x90]; /* 8_byte_aligned(35 vectors * 4 bytes each) = 0x90 */ -define region RAM_ALL = Mem:[from 0x3FFF4000 + 0x90 size 0xC000 - 0x90]; /* 8_byte_aligned(35 vectors * 4 bytes each) = 0x90 */ +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x200; +define symbol __ICFEDIT_size_heap__ = 0x4000; +/**** End of ICF editor section. ###ICF###*/ -/* Create a stack */ -define block CSTACK with size = 0x200, alignment = 8 { }; -/* No Heap is created for C library, all memory management should be handled by the application */ - define block HEAP with alignment = 8, size = 0x3000 { }; +define memory mem with size = 4G; +define region FLASH_region = mem:[from __ICFEDIT_region_IROM1_start__ to __ICFEDIT_region_IROM1_end__] + | mem:[from __ICFEDIT_region_IROM2_start__ to __ICFEDIT_region_IROM2_end__]; -/* Handle initialization */ -do not initialize { section .noinit }; +define region RAM_VECTOR_region = mem:[from __ICFEDIT_region_IRAM3_start__ to __ICFEDIT_region_IRAM3_start__ + 0x90 - 1]; -/* Initialize RW sections, exclude zero-initialized sections */ -initialize by copy with packing = none { readwrite }; +define region RAM_region = mem:[from __ICFEDIT_region_IRAM3_start__ + 0x90 to __ICFEDIT_region_IRAM3_end__] + | mem:[from __ICFEDIT_region_IRAM2_start__ to __ICFEDIT_region_IRAM2_end__] + | mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__ - __ICFEDIT_size_cstack__ ]; + +define region CSTACK_region = mem:[from __ICFEDIT_region_IRAM1_end__ - __ICFEDIT_size_cstack__ + 1 to __ICFEDIT_region_IRAM1_end__]; + + +/* Define overlays for MIB's, ths allows view of one MIB from a application level while + * MAC and PHY only know about their own MIB */ +define overlay MIBOVERLAY { section MIBSTARTSECTION }; +define overlay MIBOVERLAY { section MIBSECTION }; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block RAM_VECTORS with alignment = 8, size = 0x90 { }; + +initialize by copy { readwrite }; + +if (isdefinedsymbol(__USE_DLIB_PERTHREAD)) +{ + // Required in a multi-threaded application + initialize by copy with packing = none { section __DLIB_PERTHREAD }; +} /* Initialize the code in RAM, copied over from FLASH */ initialize by copy with packing = none { readonly code section EXECINRAM }; -/*keep { readonly code section .EXECINRAM* } except { readonly code section EXECINRAM };*/ -/* Place startup code at a fixed address */ -place at start of FLASHA { readonly section .intvec, readonly section SWVERSION,readonly section FIBTABLE,readonly section .cstartup }; +/*initialize by copy { readwrite };*/ +do not initialize { section .noinit }; + -/* Place code and data */ +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, readonly section SWVERSION, readonly section FIBTABLE }; -/* Place constants and initializers in FLASHA: .rodata and .data_init */ -place in FLASHA { readonly }; +place in FLASH_region { readonly section .cstartup, readonly }; -/* Place .data, .bss, and .noinit */ -/* and STACK */ -/* The relocatable exception table needs to be aligned at 0x0 or multiple of 0x100, - * hence, place it as first block in RAM. - */ -place at start of RAM_ALL { section RAM_VECTORS }; -place in RAM_ALL { readonly code section EXECINRAM }; -place at end of RAM_ALL { block CSTACK }; +place at start of RAM_VECTOR_region {block RAM_VECTORS}; +place in RAM_region { readwrite, block HEAP, section XHEAP, readonly code section EXECINRAM, overlay MIBOVERLAY, readwrite section MIBENDSECTION}; -place in RAM_ALL { readwrite }; -place in RAM_ALL { block HEAP }; +place at end of CSTACK_region { block CSTACK }; diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/objects.h b/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/objects.h index e81d7277591..45a37ac57d5 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - #include "common_objects.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/objects.h b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/objects.h index cc273c9206c..d0f3565f66d 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - #include "common_objects.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/objects.h b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/objects.h index cc273c9206c..d0f3565f66d 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - #include "common_objects.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/objects.h b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/objects.h index e83cd368dc1..8022de0cb78 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/objects.h b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/objects.h index cc273c9206c..d0f3565f66d 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - #include "common_objects.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/objects.h b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/objects.h index e83cd368dc1..8022de0cb78 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/objects.h b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/objects.h index e83cd368dc1..8022de0cb78 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F0/analogin_api.c b/targets/TARGET_STM/TARGET_STM32F0/analogin_api.c index 50335b936f4..8c4f34c8103 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/analogin_api.c +++ b/targets/TARGET_STM/TARGET_STM32F0/analogin_api.c @@ -36,15 +36,13 @@ #include "PeripheralPins.h" #include "mbed_error.h" -ADC_HandleTypeDef AdcHandle; - int adc_inited = 0; void analogin_init(analogin_t *obj, PinName pin) { // Get the peripheral name from the pin and assign it to the object - obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC); - MBED_ASSERT(obj->adc != (ADCName)NC); - + obj->handle.Instance = (ADC_TypeDef *) pinmap_peripheral(pin, PinMap_ADC); + MBED_ASSERT(obj->handle.Instance != (ADC_TypeDef *)NC); + // Get the functions (adc channel) from the pin and assign it to the object uint32_t function = pinmap_function(pin, PinMap_ADC); MBED_ASSERT(function != (uint32_t)NC); @@ -67,25 +65,25 @@ void analogin_init(analogin_t *obj, PinName pin) { __ADC1_CLK_ENABLE(); // Configure ADC - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - AdcHandle.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; - AdcHandle.Init.Resolution = ADC_RESOLUTION12b; - AdcHandle.Init.DataAlign = ADC_DATAALIGN_RIGHT; - AdcHandle.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD; - AdcHandle.Init.EOCSelection = EOC_SINGLE_CONV; - AdcHandle.Init.LowPowerAutoWait = DISABLE; - AdcHandle.Init.LowPowerAutoPowerOff = DISABLE; - AdcHandle.Init.ContinuousConvMode = DISABLE; - AdcHandle.Init.DiscontinuousConvMode = DISABLE; - AdcHandle.Init.ExternalTrigConv = ADC_SOFTWARE_START; - AdcHandle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - AdcHandle.Init.DMAContinuousRequests = DISABLE; - AdcHandle.Init.Overrun = OVR_DATA_OVERWRITTEN; - if (HAL_ADC_Init(&AdcHandle) != HAL_OK) { + obj->handle.State = HAL_ADC_STATE_RESET; + obj->handle.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; + obj->handle.Init.Resolution = ADC_RESOLUTION12b; + obj->handle.Init.DataAlign = ADC_DATAALIGN_RIGHT; + obj->handle.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD; + obj->handle.Init.EOCSelection = EOC_SINGLE_CONV; + obj->handle.Init.LowPowerAutoWait = DISABLE; + obj->handle.Init.LowPowerAutoPowerOff = DISABLE; + obj->handle.Init.ContinuousConvMode = DISABLE; + obj->handle.Init.DiscontinuousConvMode = DISABLE; + obj->handle.Init.ExternalTrigConv = ADC_SOFTWARE_START; + obj->handle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + obj->handle.Init.DMAContinuousRequests = DISABLE; + obj->handle.Init.Overrun = OVR_DATA_OVERWRITTEN; + if (HAL_ADC_Init(&obj->handle) != HAL_OK) { error("Cannot initialize ADC"); } // Run the ADC calibration - if (HAL_ADCEx_Calibration_Start(&AdcHandle) != HAL_OK) { + if (HAL_ADCEx_Calibration_Start(&obj->handle) != HAL_OK) { error("Cannot Start ADC_Calibration"); } } @@ -94,8 +92,6 @@ void analogin_init(analogin_t *obj, PinName pin) { static inline uint16_t adc_read(analogin_t *obj) { ADC_ChannelConfTypeDef sConfig; - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - // Configure ADC channel sConfig.Rank = ADC_RANK_CHANNEL_NUMBER; #if defined (TARGET_STM32F091RC) @@ -169,15 +165,15 @@ static inline uint16_t adc_read(analogin_t *obj) { } // Clear all channels as it is not done in HAL_ADC_ConfigChannel() - AdcHandle.Instance->CHSELR = 0; + obj->handle.Instance->CHSELR = 0; - HAL_ADC_ConfigChannel(&AdcHandle, &sConfig); + HAL_ADC_ConfigChannel(&obj->handle, &sConfig); - HAL_ADC_Start(&AdcHandle); // Start conversion + HAL_ADC_Start(&obj->handle); // Start conversion // Wait end of conversion and get value - if (HAL_ADC_PollForConversion(&AdcHandle, 10) == HAL_OK) { - return (HAL_ADC_GetValue(&AdcHandle)); + if (HAL_ADC_PollForConversion(&obj->handle, 10) == HAL_OK) { + return (HAL_ADC_GetValue(&obj->handle)); } else { return 0; } diff --git a/targets/TARGET_STM/TARGET_STM32F0/common_objects.h b/targets/TARGET_STM/TARGET_STM32F0/common_objects.h index c0e1bc1dd45..3d11acebd0a 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/common_objects.h +++ b/targets/TARGET_STM/TARGET_STM32F0/common_objects.h @@ -111,6 +111,12 @@ struct i2c_s { #endif }; +struct analogin_s { + ADC_HandleTypeDef handle; + PinName pin; + uint8_t channel; +}; + #include "gpio_object.h" #if DEVICE_ANALOGOUT diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_BLUEPILL_F103C8/objects.h b/targets/TARGET_STM/TARGET_STM32F1/TARGET_BLUEPILL_F103C8/objects.h index ff3e69e73f0..24fa9d1f175 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_BLUEPILL_F103C8/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_BLUEPILL_F103C8/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/objects.h b/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/objects.h index c6411ece64b..493408b24f4 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - #include "common_objects.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/objects.h b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/objects.h index ff3e69e73f0..24fa9d1f175 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F1/analogin_api.c b/targets/TARGET_STM/TARGET_STM32F1/analogin_api.c index 68d72d62511..490410a1a02 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/analogin_api.c +++ b/targets/TARGET_STM/TARGET_STM32F1/analogin_api.c @@ -35,8 +35,6 @@ #include "pinmap.h" #include "PeripheralPins.h" -ADC_HandleTypeDef AdcHandle; - int adc_inited = 0; void analogin_init(analogin_t *obj, PinName pin) @@ -44,9 +42,9 @@ void analogin_init(analogin_t *obj, PinName pin) RCC_PeriphCLKInitTypeDef PeriphClkInit; // Get the peripheral name from the pin and assign it to the object - obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC); - MBED_ASSERT(obj->adc != (ADCName)NC); - + obj->handle.Instance = (ADC_TypeDef *) pinmap_peripheral(pin, PinMap_ADC); + MBED_ASSERT(obj->handle.Instance != (ADC_TypeDef *)NC); + // Get the functions (adc channel) from the pin and assign it to the object uint32_t function = pinmap_function(pin, PinMap_ADC); MBED_ASSERT(function != (uint32_t)NC); @@ -79,15 +77,15 @@ void analogin_init(analogin_t *obj, PinName pin) HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit); // Configure ADC - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - AdcHandle.Init.DataAlign = ADC_DATAALIGN_RIGHT; - AdcHandle.Init.ScanConvMode = DISABLE; - AdcHandle.Init.ContinuousConvMode = DISABLE; - AdcHandle.Init.NbrOfConversion = 1; - AdcHandle.Init.DiscontinuousConvMode = DISABLE; - AdcHandle.Init.NbrOfDiscConversion = 0; - AdcHandle.Init.ExternalTrigConv = ADC_SOFTWARE_START; - HAL_ADC_Init(&AdcHandle); + obj->handle.State = HAL_ADC_STATE_RESET; + obj->handle.Init.DataAlign = ADC_DATAALIGN_RIGHT; + obj->handle.Init.ScanConvMode = DISABLE; + obj->handle.Init.ContinuousConvMode = DISABLE; + obj->handle.Init.NbrOfConversion = 1; + obj->handle.Init.DiscontinuousConvMode = DISABLE; + obj->handle.Init.NbrOfDiscConversion = 0; + obj->handle.Init.ExternalTrigConv = ADC_SOFTWARE_START; + HAL_ADC_Init(&obj->handle); } } @@ -95,8 +93,6 @@ static inline uint16_t adc_read(analogin_t *obj) { ADC_ChannelConfTypeDef sConfig; - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - // Configure ADC channel sConfig.Rank = 1; sConfig.SamplingTime = ADC_SAMPLETIME_7CYCLES_5; @@ -160,13 +156,13 @@ static inline uint16_t adc_read(analogin_t *obj) return 0; } - HAL_ADC_ConfigChannel(&AdcHandle, &sConfig); + HAL_ADC_ConfigChannel(&obj->handle, &sConfig); - HAL_ADC_Start(&AdcHandle); // Start conversion + HAL_ADC_Start(&obj->handle); // Start conversion // Wait end of conversion and get value - if (HAL_ADC_PollForConversion(&AdcHandle, 10) == HAL_OK) { - return (HAL_ADC_GetValue(&AdcHandle)); + if (HAL_ADC_PollForConversion(&obj->handle, 10) == HAL_OK) { + return (HAL_ADC_GetValue(&obj->handle)); } else { return 0; } diff --git a/targets/TARGET_STM/TARGET_STM32F1/common_objects.h b/targets/TARGET_STM/TARGET_STM32F1/common_objects.h index 31b80fe17c7..12487fcf0b6 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/common_objects.h +++ b/targets/TARGET_STM/TARGET_STM32F1/common_objects.h @@ -110,6 +110,12 @@ struct i2c_s { #endif }; +struct analogin_s { + ADC_HandleTypeDef handle; + PinName pin; + uint8_t channel; +}; + #include "gpio_object.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32F2/analogin_api.c b/targets/TARGET_STM/TARGET_STM32F2/analogin_api.c index ba154c94f10..19c82c20362 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/analogin_api.c +++ b/targets/TARGET_STM/TARGET_STM32F2/analogin_api.c @@ -36,12 +36,9 @@ #include "mbed_error.h" #include "PeripheralPins.h" -ADC_HandleTypeDef AdcHandle; - void analogin_init(analogin_t *obj, PinName pin) { uint32_t function = (uint32_t)NC; - obj->adc = (ADCName)NC; #if defined(ADC1) static int adc1_inited = 0; @@ -58,18 +55,18 @@ void analogin_init(analogin_t *obj, PinName pin) if ((pin < 0xF0) || (pin >= 0x100)) { // Normal channels // Get the peripheral name from the pin and assign it to the object - obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC); + obj->handle.Instance = (ADC_TypeDef *) pinmap_peripheral(pin, PinMap_ADC); // Get the functions (adc channel) from the pin and assign it to the object function = pinmap_function(pin, PinMap_ADC); // Configure GPIO pinmap_pinout(pin, PinMap_ADC); } else { // Internal channels - obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC_Internal); + obj->handle.Instance = (ADC_TypeDef *) pinmap_peripheral(pin, PinMap_ADC_Internal); function = pinmap_function(pin, PinMap_ADC_Internal); // No GPIO configuration for internal channels } - MBED_ASSERT(obj->adc != (ADCName)NC); + MBED_ASSERT(obj->handle.Instance != (ADC_TypeDef *)NC); MBED_ASSERT(function != (uint32_t)NC); obj->channel = STM_PIN_CHANNEL(function); @@ -80,41 +77,41 @@ void analogin_init(analogin_t *obj, PinName pin) // Check if ADC is already initialized // Enable ADC clock #if defined(ADC1) - if ((obj->adc == ADC_1) && adc1_inited) return; - if (obj->adc == ADC_1) { + if (((ADCName)obj->handle.Instance == ADC_1) && adc1_inited) return; + if ((ADCName)obj->handle.Instance == ADC_1) { __ADC1_CLK_ENABLE(); adc1_inited = 1; } #endif #if defined(ADC2) - if ((obj->adc == ADC_2) && adc2_inited) return; - if (obj->adc == ADC_2) { + if (((ADCName)obj->handle.Instance == ADC_2) && adc2_inited) return; + if ((ADCName)obj->handle.Instance == ADC_2) { __ADC2_CLK_ENABLE(); adc2_inited = 1; } #endif #if defined(ADC3) - if ((obj->adc == ADC_3) && adc3_inited) return; - if (obj->adc == ADC_3) { + if (((ADCName)obj->handle.Instance == ADC_3) && adc3_inited) return; + if ((ADCName)obj->handle.Instance == ADC_3) { __ADC3_CLK_ENABLE(); adc3_inited = 1; } #endif // Configure ADC - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - AdcHandle.Init.ClockPrescaler = ADC_CLOCKPRESCALER_PCLK_DIV2; - AdcHandle.Init.Resolution = ADC_RESOLUTION12b; - AdcHandle.Init.ScanConvMode = DISABLE; - AdcHandle.Init.ContinuousConvMode = DISABLE; - AdcHandle.Init.DiscontinuousConvMode = DISABLE; - AdcHandle.Init.NbrOfDiscConversion = 0; - AdcHandle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - AdcHandle.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_CC1; - AdcHandle.Init.DataAlign = ADC_DATAALIGN_RIGHT; - AdcHandle.Init.NbrOfConversion = 1; - AdcHandle.Init.DMAContinuousRequests = DISABLE; - AdcHandle.Init.EOCSelection = DISABLE; - if (HAL_ADC_Init(&AdcHandle) != HAL_OK) { + obj->handle.State = HAL_ADC_STATE_RESET; + obj->handle.Init.ClockPrescaler = ADC_CLOCKPRESCALER_PCLK_DIV2; + obj->handle.Init.Resolution = ADC_RESOLUTION12b; + obj->handle.Init.ScanConvMode = DISABLE; + obj->handle.Init.ContinuousConvMode = DISABLE; + obj->handle.Init.DiscontinuousConvMode = DISABLE; + obj->handle.Init.NbrOfDiscConversion = 0; + obj->handle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + obj->handle.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_CC1; + obj->handle.Init.DataAlign = ADC_DATAALIGN_RIGHT; + obj->handle.Init.NbrOfConversion = 1; + obj->handle.Init.DMAContinuousRequests = DISABLE; + obj->handle.Init.EOCSelection = DISABLE; + if (HAL_ADC_Init(&obj->handle) != HAL_OK) { error("Cannot initialize ADC\n"); } } @@ -123,8 +120,6 @@ static inline uint16_t adc_read(analogin_t *obj) { ADC_ChannelConfTypeDef sConfig = {0}; - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - // Configure ADC channel sConfig.Rank = 1; sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; @@ -192,13 +187,13 @@ static inline uint16_t adc_read(analogin_t *obj) return 0; } - HAL_ADC_ConfigChannel(&AdcHandle, &sConfig); + HAL_ADC_ConfigChannel(&obj->handle, &sConfig); - HAL_ADC_Start(&AdcHandle); // Start conversion + HAL_ADC_Start(&obj->handle); // Start conversion // Wait end of conversion and get value - if (HAL_ADC_PollForConversion(&AdcHandle, 10) == HAL_OK) { - return (HAL_ADC_GetValue(&AdcHandle)); + if (HAL_ADC_PollForConversion(&obj->handle, 10) == HAL_OK) { + return (HAL_ADC_GetValue(&obj->handle)); } else { return 0; } diff --git a/targets/TARGET_STM/TARGET_STM32F2/objects.h b/targets/TARGET_STM/TARGET_STM32F2/objects.h index b2824cacd22..c2489cb8511 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F2/objects.h @@ -55,7 +55,7 @@ struct port_s { }; struct analogin_s { - ADCName adc; + ADC_HandleTypeDef handle; PinName pin; uint8_t channel; }; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/objects.h b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/objects.h index e83cd368dc1..8022de0cb78 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/objects.h b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/objects.h index e83cd368dc1..8022de0cb78 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/objects.h b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/objects.h index 1706a1a1205..8022de0cb78 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/objects.h @@ -54,13 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; - DAC_HandleTypeDef handle; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/objects.h b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/objects.h index e83cd368dc1..8022de0cb78 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/objects.h b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/objects.h index de612becfb7..90b0f732c14 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - #if defined (DEVICE_CAN) struct can_s { CANName can; diff --git a/targets/TARGET_STM/TARGET_STM32F3/analogin_api.c b/targets/TARGET_STM/TARGET_STM32F3/analogin_api.c index 92d3e244b98..8e8e234fe06 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/analogin_api.c +++ b/targets/TARGET_STM/TARGET_STM32F3/analogin_api.c @@ -36,7 +36,6 @@ #include "mbed_error.h" #include "PeripheralPins.h" -ADC_HandleTypeDef AdcHandle; void analogin_init(analogin_t *obj, PinName pin) { @@ -54,8 +53,8 @@ void analogin_init(analogin_t *obj, PinName pin) #endif // Get the peripheral name from the pin and assign it to the object - obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC); - MBED_ASSERT(obj->adc != (ADCName)NC); + obj->handle.Instance = (ADC_TypeDef *) pinmap_peripheral(pin, PinMap_ADC); + MBED_ASSERT(obj->handle.Instance != (ADC_TypeDef *)NC); // Get the pin function and assign the used channel to the object uint32_t function = pinmap_function(pin, PinMap_ADC); @@ -74,56 +73,52 @@ void analogin_init(analogin_t *obj, PinName pin) // Check if ADC is already initialized // Enable ADC clock #if defined(ADC1) - if ((obj->adc == ADC_1) && adc1_inited) return; - if (obj->adc == ADC_1) { - AdcHandle.State = HAL_ADC_STATE_RESET; + if (((ADCName)obj->handle.Instance == ADC_1) && adc1_inited) return; + if ((ADCName)obj->handle.Instance == ADC_1) { __ADC1_CLK_ENABLE(); adc1_inited = 1; } #endif #if defined(ADC2) - if ((obj->adc == ADC_2) && adc2_inited) return; - if (obj->adc == ADC_2) { - AdcHandle.State = HAL_ADC_STATE_RESET; + if (((ADCName)obj->handle.Instance == ADC_2) && adc2_inited) return; + if ((ADCName)obj->handle.Instance == ADC_2) { __ADC2_CLK_ENABLE(); adc2_inited = 1; } #endif #if defined(ADC3) - if ((obj->adc == ADC_3) && adc3_inited) return; - if (obj->adc == ADC_3) { - AdcHandle.State = HAL_ADC_STATE_RESET; + if (((ADCName)obj->handle.Instance == ADC_3) && adc3_inited) return; + if ((ADCName)obj->handle.Instance == ADC_3) { __ADC34_CLK_ENABLE(); adc3_inited = 1; } #endif #if defined(ADC4) - if ((obj->adc == ADC_4) && adc4_inited) return; - if (obj->adc == ADC_4) { - AdcHandle.State = HAL_ADC_STATE_RESET; + if (((ADCName)obj->handle.Instance == ADC_4) && adc4_inited) return; + if ((ADCName)obj->handle.Instance == ADC_4) { __ADC34_CLK_ENABLE(); adc4_inited = 1; } #endif // Configure ADC - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - AdcHandle.Init.ClockPrescaler = ADC_CLOCKPRESCALER_PCLK_DIV2; - AdcHandle.Init.Resolution = ADC_RESOLUTION12b; - AdcHandle.Init.DataAlign = ADC_DATAALIGN_RIGHT; - AdcHandle.Init.ScanConvMode = DISABLE; - AdcHandle.Init.EOCSelection = EOC_SINGLE_CONV; - AdcHandle.Init.LowPowerAutoWait = DISABLE; - AdcHandle.Init.ContinuousConvMode = DISABLE; - AdcHandle.Init.NbrOfConversion = 1; - AdcHandle.Init.DiscontinuousConvMode = DISABLE; - AdcHandle.Init.NbrOfDiscConversion = 0; - AdcHandle.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_CC1; - AdcHandle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - AdcHandle.Init.DMAContinuousRequests = DISABLE; - AdcHandle.Init.Overrun = OVR_DATA_OVERWRITTEN; - - if (HAL_ADC_Init(&AdcHandle) != HAL_OK) { + obj->handle.State = HAL_ADC_STATE_RESET; + obj->handle.Init.ClockPrescaler = ADC_CLOCKPRESCALER_PCLK_DIV2; + obj->handle.Init.Resolution = ADC_RESOLUTION12b; + obj->handle.Init.DataAlign = ADC_DATAALIGN_RIGHT; + obj->handle.Init.ScanConvMode = DISABLE; + obj->handle.Init.EOCSelection = EOC_SINGLE_CONV; + obj->handle.Init.LowPowerAutoWait = DISABLE; + obj->handle.Init.ContinuousConvMode = DISABLE; + obj->handle.Init.NbrOfConversion = 1; + obj->handle.Init.DiscontinuousConvMode = DISABLE; + obj->handle.Init.NbrOfDiscConversion = 0; + obj->handle.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_CC1; + obj->handle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + obj->handle.Init.DMAContinuousRequests = DISABLE; + obj->handle.Init.Overrun = OVR_DATA_OVERWRITTEN; + + if (HAL_ADC_Init(&obj->handle) != HAL_OK) { error("Cannot initialize ADC"); } } @@ -132,8 +127,6 @@ static inline uint16_t adc_read(analogin_t *obj) { ADC_ChannelConfTypeDef sConfig = {0}; - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - // Configure ADC channel sConfig.Rank = ADC_REGULAR_RANK_1; sConfig.SamplingTime = ADC_SAMPLETIME_19CYCLES_5; @@ -200,13 +193,13 @@ static inline uint16_t adc_read(analogin_t *obj) return 0; } - HAL_ADC_ConfigChannel(&AdcHandle, &sConfig); + HAL_ADC_ConfigChannel(&obj->handle, &sConfig); - HAL_ADC_Start(&AdcHandle); // Start conversion + HAL_ADC_Start(&obj->handle); // Start conversion // Wait end of conversion and get value - if (HAL_ADC_PollForConversion(&AdcHandle, 10) == HAL_OK) { - return (HAL_ADC_GetValue(&AdcHandle)); + if (HAL_ADC_PollForConversion(&obj->handle, 10) == HAL_OK) { + return (HAL_ADC_GetValue(&obj->handle)); } else { return 0; } diff --git a/targets/TARGET_STM/TARGET_STM32F3/common_objects.h b/targets/TARGET_STM/TARGET_STM32F3/common_objects.h index 1e1d3c1263e..8db726ed146 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/common_objects.h +++ b/targets/TARGET_STM/TARGET_STM32F3/common_objects.h @@ -118,6 +118,12 @@ struct dac_s { DAC_HandleTypeDef handle; }; +struct analogin_s { + ADC_HandleTypeDef handle; + PinName pin; + uint8_t channel; +}; + #include "gpio_object.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/objects.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/objects.h index d423c5ebef3..16467b7c876 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - #include "common_objects.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/objects.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/objects.h index d423c5ebef3..16467b7c876 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - #include "common_objects.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/objects.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/objects.h index d423c5ebef3..16467b7c876 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - #include "common_objects.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/objects.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/objects.h index d423c5ebef3..16467b7c876 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - #include "common_objects.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/objects.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/objects.h index d423c5ebef3..16467b7c876 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - #include "common_objects.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/objects.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/objects.h index 48f9b79b016..d0f283f0224 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - #include "common_objects.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/objects.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/objects.h index 1766e2b570e..bea7fef5477 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - struct trng_s { RNG_HandleTypeDef handle; }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/objects.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/objects.h index d423c5ebef3..16467b7c876 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - #include "common_objects.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/system_clock.c index 5c546c53b4b..2ffdfc51c0b 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/system_clock.c @@ -30,6 +30,7 @@ **/ #include "stm32f4xx.h" +#include "nvic_addr.h" #include "mbed_assert.h" /*!< Uncomment the following line if you need to relocate your vector Table in @@ -92,7 +93,7 @@ void SystemInit(void) #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ + SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */ #endif } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_MICRO/stm32f412xg.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_MICRO/stm32f412xg.sct index cdc67e0b8ed..ee3cbf2e438 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_MICRO/stm32f412xg.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_MICRO/stm32f412xg.sct @@ -1,6 +1,7 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; Copyright (c) 2016, STMicroelectronics +; Copyright (c) 2017, STMicroelectronics ; All rights reserved. ; ; Redistribution and use in source and binary forms, with or without @@ -27,10 +28,18 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x100000 +#endif + ; STM32F412ZG: 1024 KB FLASH (0x100000) + 256 KB SRAM (0x40000) -LR_IROM1 0x08000000 0x100000 { ; load region size_region +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region - ER_IROM1 0x08000000 0x100000 { ; load address = execution address + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_STD/stm32f412xg.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_STD/stm32f412xg.sct index cdc67e0b8ed..ee3cbf2e438 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_STD/stm32f412xg.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_STD/stm32f412xg.sct @@ -1,6 +1,7 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; Copyright (c) 2016, STMicroelectronics +; Copyright (c) 2017, STMicroelectronics ; All rights reserved. ; ; Redistribution and use in source and binary forms, with or without @@ -27,10 +28,18 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x100000 +#endif + ; STM32F412ZG: 1024 KB FLASH (0x100000) + 256 KB SRAM (0x40000) -LR_IROM1 0x08000000 0x100000 { ; load region size_region +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region - ER_IROM1 0x08000000 0x100000 { ; load address = execution address + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_GCC_ARM/STM32F412xG.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_GCC_ARM/STM32F412xG.ld index d5b80ee40e2..c10094b9caa 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_GCC_ARM/STM32F412xG.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_GCC_ARM/STM32F412xG.ld @@ -1,7 +1,14 @@ +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 1024K +#endif /* Linker script to configure memory regions. */ MEMORY { - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K + FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE RAM (rwx) : ORIGIN = 0x200001C4, LENGTH = 256K - 0x1C4 } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_IAR/stm32f412xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_IAR/stm32f412xx.icf index 279400bbe62..f702047a09c 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_IAR/stm32f412xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_IAR/stm32f412xx.icf @@ -1,7 +1,10 @@ +if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; } +if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; } + /* [ROM = 1024kb = 0x100000] */ -define symbol __intvec_start__ = 0x08000000; -define symbol __region_ROM_start__ = 0x08000000; -define symbol __region_ROM_end__ = 0x080FFFFF; +define symbol __intvec_start__ = MBED_APP_START; +define symbol __region_ROM_start__ = MBED_APP_START; +define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE; /* [RAM = 256kb = 0x40000] Vector table dynamic copy: 113 vectors = 452 bytes (0x1C4) to be reserved in RAM */ define symbol __NVIC_start__ = 0x20000000; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/flash_data.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/flash_data.h new file mode 100644 index 00000000000..9a4964bfad0 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/flash_data.h @@ -0,0 +1,59 @@ +/* mbed Microcontroller Library + ******************************************************************************* + * Copyright (c) 2016, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + */ +#ifndef MBED_FLASH_DATA_H +#define MBED_FLASH_DATA_H + +#include "device.h" +#include + +#if DEVICE_FLASH + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Flash size */ +#define FLASH_SIZE (uint32_t) 0x100000 + +/* Base address of the Flash sectors Bank 1 */ +#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base @ of Sector 0, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08004000) /* Base @ of Sector 1, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_2 ((uint32_t)0x08008000) /* Base @ of Sector 2, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_3 ((uint32_t)0x0800C000) /* Base @ of Sector 3, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_4 ((uint32_t)0x08010000) /* Base @ of Sector 4, 64 Kbytes */ +#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08020000) /* Base @ of Sector 5, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08040000) /* Base @ of Sector 6, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x08060000) /* Base @ of Sector 7, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_8 ((uint32_t)0x08080000) /* Base @ of Sector 8, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_9 ((uint32_t)0x080A0000) /* Base @ of Sector 9, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_10 ((uint32_t)0x080C0000) /* Base @ of Sector 10, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_11 ((uint32_t)0x080E0000) /* Base @ of Sector 11, 128 Kbytes */ + +#endif +#endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/objects.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/objects.h index aa714d61180..9ab04158e02 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/objects.h @@ -40,12 +40,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/objects.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/objects.h index f8625bb9424..ceee07a5945 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/objects.h @@ -40,12 +40,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/flash_data.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/flash_data.h index 6ae8994ad5a..daa6e974b96 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/flash_data.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/flash_data.h @@ -38,6 +38,9 @@ /* Exported types ------------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/ +/* FLASH SIZE */ +#define FLASH_SIZE (uint32_t) 0x200000 + /* Base address of the Flash sectors Bank 1 */ #define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base @ of Sector 0, 16 Kbytes */ #define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08004000) /* Base @ of Sector 1, 16 Kbytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/objects.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/objects.h index 7229a50a288..a7e928ec3a8 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TARGET_UBLOX_C030/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TARGET_UBLOX_C030/system_clock.c index 94c06fb8e90..798ccd41008 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TARGET_UBLOX_C030/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TARGET_UBLOX_C030/system_clock.c @@ -34,6 +34,7 @@ #include "ublox_low_level_api.h" #include "stm32f4xx.h" +#include "nvic_addr.h" /*!< Uncomment the following line if you need to relocate your vector Table in Internal SRAM. */ @@ -89,7 +90,7 @@ void SystemInit(void) #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ + SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ #endif ublox_board_init(); diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_ARM_STD/stm32f437xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_ARM_STD/stm32f437xx.sct index a6be2a4097f..aefd968058a 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_ARM_STD/stm32f437xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_ARM_STD/stm32f437xx.sct @@ -29,9 +29,18 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; 1 MB FLASH (0x100000) + 192 KB SRAM (0x30000) + 64 KB CCBRAM (0x10000)+ 4 KB BKPSRAM -LR_IROM1 0x08000000 0x100000 { ; load region size_region - ER_IROM1 0x08000000 0x100000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x100000 +#endif + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_GCC_ARM/STM32F437xx.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_GCC_ARM/STM32F437xx.ld index 43ec5682da6..0dc4a686ff2 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_GCC_ARM/STM32F437xx.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_GCC_ARM/STM32F437xx.ld @@ -1,10 +1,18 @@ +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 1024k +#endif + /* Linker script to configure memory regions. */ MEMORY { RAM (xrw) : ORIGIN = 0x200001AC, LENGTH = 192K - 0x1AC /* 0x1AC is to leave room for vectors */ CCM_RAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K BACKUP_SRAM (rw) : ORIGIN = 0x40024000, LENGTH = 4096 -FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K +FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE } /* Linker script to place sections and symbol values. Should be used together diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_IAR/stm32f437xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_IAR/stm32f437xx.icf index 5187ce3419a..97fd4ac509a 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_IAR/stm32f437xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_IAR/stm32f437xx.icf @@ -1,11 +1,13 @@ /*###ICF### Section handled by ICF editor, don't touch! ****/ /*-Editor annotation file-*/ /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; } +if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; } /*-Specials-*/ -define symbol __ICFEDIT_intvec_start__ = 0x08000000; +define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; /*-Memory Regions-*/ -define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; -define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; +define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START; +define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; define symbol __ICFEDIT_region_NVIC_start__ = 0x20000000; define symbol __ICFEDIT_region_NVIC_end__ = 0x200001AF; define symbol __ICFEDIT_region_RAM_start__ = 0x200001B0; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/flash_data.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/flash_data.h new file mode 100644 index 00000000000..614246dcefd --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/flash_data.h @@ -0,0 +1,60 @@ +/* mbed Microcontroller Library + ******************************************************************************* + * Copyright (c) 2016, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + */ +#ifndef MBED_FLASH_DATA_H +#define MBED_FLASH_DATA_H + +#include "device.h" +#include + +#if DEVICE_FLASH + +#if defined (STM32F427xx) || defined (STM32F437xx) +#define FLASH_SIZE (uint32_t) 0x100000 +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Base address of the Flash sectors */ +#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base @ of Sector 0, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08004000) /* Base @ of Sector 1, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_2 ((uint32_t)0x08008000) /* Base @ of Sector 2, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_3 ((uint32_t)0x0800C000) /* Base @ of Sector 3, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_4 ((uint32_t)0x08010000) /* Base @ of Sector 4, 64 Kbytes */ +#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08020000) /* Base @ of Sector 5, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08040000) /* Base @ of Sector 6, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x08060000) /* Base @ of Sector 7, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_8 ((uint32_t)0x08080000) /* Base @ of Sector 8, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_9 ((uint32_t)0x080A0000) /* Base @ of Sector 9, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_10 ((uint32_t)0x080C0000) /* Base @ of Sector 10, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_11 ((uint32_t)0x080E0000) /* Base @ of Sector 11, 128 Kbytes */ + +#endif +#endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/nvic_addr.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/nvic_addr.h new file mode 100644 index 00000000000..307c99edd60 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/nvic_addr.h @@ -0,0 +1,40 @@ +/* mbed Microcontroller Library + * Copyright (c) 2017-2017 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef NVIC_ADDR_H +#define NVIC_ADDR_H + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(__ICCARM__) + #pragma section=".intvec" + #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)__section_begin(".intvec")) +#elif defined(__CC_ARM) + extern uint32_t Load$$LR$$LR_IROM1$$Base[]; + #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)Load$$LR$$LR_IROM1$$Base) +#elif defined(__GNUC__) + extern uint32_t g_pfnVectors[]; + #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)g_pfnVectors) +#else + #error "Flash vector address not set for this toolchain" +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/objects.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/objects.h index d92fa159012..e1b80b20e45 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - struct trng_s { RNG_HandleTypeDef handle; }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/flash_api.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/flash_api.c deleted file mode 100644 index 1dfc60ec195..00000000000 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/flash_api.c +++ /dev/null @@ -1,192 +0,0 @@ -/* mbed Microcontroller Library - ******************************************************************************* - * Copyright (c) 2017, STMicroelectronics - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - ******************************************************************************* - */ - -#include "flash_api.h" -#include "flash_data.h" -#include "platform/mbed_critical.h" - -// This file is automatically generated - -#if DEVICE_FLASH - -#if defined (STM32F429xx) || defined (STM32F439xx) -#define FLASH_SIZE (uint32_t) 0x200000 -#endif - -static uint32_t GetSector(uint32_t Address); -static uint32_t GetSectorSize(uint32_t Sector); - -int32_t flash_init(flash_t *obj) -{ - /* Allow Access to Flash control registers and user Falsh */ - if (HAL_FLASH_Unlock()) { - return -1; - } else { - return 0; - } -} -int32_t flash_free(flash_t *obj) -{ - /* Disable the Flash option control register access (recommended to protect - the option Bytes against possible unwanted operations) */ - if (HAL_FLASH_Lock()) { - return -1; - } else { - return 0; - } -} -int32_t flash_erase_sector(flash_t *obj, uint32_t address) -{ - /*Variable used for Erase procedure*/ - static FLASH_EraseInitTypeDef EraseInitStruct; - uint32_t FirstSector; - uint32_t SectorError = 0; - - if ((address >= (FLASH_BASE + FLASH_SIZE)) || (address < FLASH_BASE)) { - - return -1; - } - - /* Get the 1st sector to erase */ - FirstSector = GetSector(address); - - /* Fill EraseInit structure*/ - EraseInitStruct.TypeErase = FLASH_TYPEERASE_SECTORS; - EraseInitStruct.VoltageRange = FLASH_VOLTAGE_RANGE_3; - EraseInitStruct.Sector = FirstSector; - EraseInitStruct.NbSectors = 1; - if(HAL_FLASHEx_Erase(&EraseInitStruct, &SectorError) != HAL_OK){ - return -1; - } else { - return 0; - } -} - -int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data, uint32_t size) -{ - - if ((address >= (FLASH_BASE + FLASH_SIZE)) || (address < FLASH_BASE)) { - return -1; - } - - /* Note: If an erase operation in Flash memory also concerns data in the data or instruction cache, - you have to make sure that these data are rewritten before they are accessed during code - execution. If this cannot be done safely, it is recommended to flush the caches by setting the - DCRST and ICRST bits in the FLASH_CR register. */ - __HAL_FLASH_DATA_CACHE_DISABLE(); - __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); - - __HAL_FLASH_DATA_CACHE_RESET(); - __HAL_FLASH_INSTRUCTION_CACHE_RESET(); - - __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); - __HAL_FLASH_DATA_CACHE_ENABLE(); - - while (size > 0) { - if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_BYTE, address, (uint64_t)*data) != HAL_OK) { - return -1; - } else { - size--; - address++; - data++; - } - } - return 0; -} - -uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address) -{ - - if ((address >= (FLASH_BASE + FLASH_SIZE)) || (address < FLASH_BASE)) { - return MBED_FLASH_INVALID_SIZE; - } - - return (GetSectorSize(GetSector(address))); -} - -uint32_t flash_get_page_size(const flash_t *obj) -{ - // not applicable for STM32F4 - return (0x4000); // minimum sector size -} -uint32_t flash_get_start_address(const flash_t *obj) -{ - return FLASH_BASE; -} -uint32_t flash_get_size(const flash_t *obj) -{ - return FLASH_SIZE; -} - -/** - * @brief Gets the sector of a given address - * @param None - * @retval The sector of a given address - */ -static uint32_t GetSector(uint32_t address) -{ - uint32_t sector = 0; - uint32_t tmp = address - ADDR_FLASH_SECTOR_0; - if (address & 0x100000) { // handle 2nd bank - sector = FLASH_SECTOR_12; - tmp = address - ADDR_FLASH_SECTOR_12; - } - if (address < ADDR_FLASH_SECTOR_4) { // 16k sectorsize - //printf("tmp for sectors less than 4: 0X%4x") - sector += tmp >>14; - } else if (address < ADDR_FLASH_SECTOR_5) { //64k sector size - sector += FLASH_SECTOR_4; - } else { - sector += 4 + (tmp >>17); - } - return sector; -} - -/** - * @brief Gets sector Size - * @param None - * @retval The size of a given sector - */ -static uint32_t GetSectorSize(uint32_t Sector) -{ - uint32_t sectorsize = 0x00; - if((Sector == FLASH_SECTOR_0) || (Sector == FLASH_SECTOR_1) || (Sector == FLASH_SECTOR_2) ||\ - (Sector == FLASH_SECTOR_3) || (Sector == FLASH_SECTOR_12) || (Sector == FLASH_SECTOR_13) ||\ - (Sector == FLASH_SECTOR_14) || (Sector == FLASH_SECTOR_15)) { - sectorsize = 16 * 1024; - } else if((Sector == FLASH_SECTOR_4) || (Sector == FLASH_SECTOR_16)){ - sectorsize = 64 * 1024; - } else { - sectorsize = 128 * 1024; - } - return sectorsize; -} - -#endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/flash_data.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/flash_data.h index 6ae8994ad5a..2248d9f774b 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/flash_data.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/flash_data.h @@ -38,6 +38,9 @@ /* Exported types ------------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/ +/* Flash Size */ +#define FLASH_SIZE (uint32_t) 0x200000 + /* Base address of the Flash sectors Bank 1 */ #define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base @ of Sector 0, 16 Kbytes */ #define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08004000) /* Base @ of Sector 1, 16 Kbytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/objects.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/objects.h index 7229a50a288..a7e928ec3a8 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/objects.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/objects.h index f3fde7a6218..a2e2ad0f34f 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/objects.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/objects.h index 50f0cfc362c..0de614ff89a 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F4/analogin_api.c b/targets/TARGET_STM/TARGET_STM32F4/analogin_api.c index ee62a48d97c..867d1e87fbd 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/analogin_api.c +++ b/targets/TARGET_STM/TARGET_STM32F4/analogin_api.c @@ -36,12 +36,9 @@ #include "mbed_error.h" #include "PeripheralPins.h" -ADC_HandleTypeDef AdcHandle; - void analogin_init(analogin_t *obj, PinName pin) { uint32_t function = (uint32_t)NC; - obj->adc = (ADCName)NC; #if defined(ADC1) static int adc1_inited = 0; @@ -58,18 +55,18 @@ void analogin_init(analogin_t *obj, PinName pin) if (pin < 0xF0) { // Normal channels // Get the peripheral name from the pin and assign it to the object - obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC); + obj->handle.Instance = (ADC_TypeDef *) pinmap_peripheral(pin, PinMap_ADC); // Get the functions (adc channel) from the pin and assign it to the object function = pinmap_function(pin, PinMap_ADC); // Configure GPIO pinmap_pinout(pin, PinMap_ADC); } else { // Internal channels - obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC_Internal); + obj->handle.Instance = (ADC_TypeDef *) pinmap_peripheral(pin, PinMap_ADC_Internal); function = pinmap_function(pin, PinMap_ADC_Internal); // No GPIO configuration for internal channels } - MBED_ASSERT(obj->adc != (ADCName)NC); + MBED_ASSERT(obj->handle.Instance != (ADC_TypeDef *)NC); MBED_ASSERT(function != (uint32_t)NC); obj->channel = STM_PIN_CHANNEL(function); @@ -80,42 +77,42 @@ void analogin_init(analogin_t *obj, PinName pin) // Check if ADC is already initialized // Enable ADC clock #if defined(ADC1) - if ((obj->adc == ADC_1) && adc1_inited) return; - if (obj->adc == ADC_1) { + if (((ADCName)obj->handle.Instance == ADC_1) && adc1_inited) return; + if ((ADCName)obj->handle.Instance == ADC_1) { __HAL_RCC_ADC1_CLK_ENABLE(); adc1_inited = 1; } #endif #if defined(ADC2) - if ((obj->adc == ADC_2) && adc2_inited) return; - if (obj->adc == ADC_2) { + if (((ADCName)obj->handle.Instance == ADC_2) && adc2_inited) return; + if ((ADCName)obj->handle.Instance == ADC_2) { __HAL_RCC_ADC2_CLK_ENABLE(); adc2_inited = 1; } #endif #if defined(ADC3) - if ((obj->adc == ADC_3) && adc3_inited) return; - if (obj->adc == ADC_3) { + if (((ADCName)obj->handle.Instance == ADC_3) && adc3_inited) return; + if ((ADCName)obj->handle.Instance == ADC_3) { __HAL_RCC_ADC3_CLK_ENABLE(); adc3_inited = 1; } #endif // Configure ADC - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - AdcHandle.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; - AdcHandle.Init.Resolution = ADC_RESOLUTION_12B; - AdcHandle.Init.ScanConvMode = DISABLE; - AdcHandle.Init.ContinuousConvMode = DISABLE; - AdcHandle.Init.DiscontinuousConvMode = DISABLE; - AdcHandle.Init.NbrOfDiscConversion = 0; - AdcHandle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - AdcHandle.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_CC1; - AdcHandle.Init.DataAlign = ADC_DATAALIGN_RIGHT; - AdcHandle.Init.NbrOfConversion = 1; - AdcHandle.Init.DMAContinuousRequests = DISABLE; - AdcHandle.Init.EOCSelection = DISABLE; - - if (HAL_ADC_Init(&AdcHandle) != HAL_OK) { + obj->handle.State = HAL_ADC_STATE_RESET; + obj->handle.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; + obj->handle.Init.Resolution = ADC_RESOLUTION_12B; + obj->handle.Init.ScanConvMode = DISABLE; + obj->handle.Init.ContinuousConvMode = DISABLE; + obj->handle.Init.DiscontinuousConvMode = DISABLE; + obj->handle.Init.NbrOfDiscConversion = 0; + obj->handle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + obj->handle.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_CC1; + obj->handle.Init.DataAlign = ADC_DATAALIGN_RIGHT; + obj->handle.Init.NbrOfConversion = 1; + obj->handle.Init.DMAContinuousRequests = DISABLE; + obj->handle.Init.EOCSelection = DISABLE; + + if (HAL_ADC_Init(&obj->handle) != HAL_OK) { error("Cannot initialize ADC\n"); } } @@ -124,8 +121,6 @@ static inline uint16_t adc_read(analogin_t *obj) { ADC_ChannelConfTypeDef sConfig = {0}; - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - // Configure ADC channel sConfig.Rank = 1; sConfig.SamplingTime = ADC_SAMPLETIME_15CYCLES; @@ -202,13 +197,13 @@ static inline uint16_t adc_read(analogin_t *obj) // so VBAT readings are returned in place of temperature. ADC->CCR &= ~(ADC_CCR_VBATE | ADC_CCR_TSVREFE); - HAL_ADC_ConfigChannel(&AdcHandle, &sConfig); + HAL_ADC_ConfigChannel(&obj->handle, &sConfig); - HAL_ADC_Start(&AdcHandle); // Start conversion + HAL_ADC_Start(&obj->handle); // Start conversion // Wait end of conversion and get value - if (HAL_ADC_PollForConversion(&AdcHandle, 10) == HAL_OK) { - return (uint16_t)HAL_ADC_GetValue(&AdcHandle); + if (HAL_ADC_PollForConversion(&obj->handle, 10) == HAL_OK) { + return (uint16_t)HAL_ADC_GetValue(&obj->handle); } else { return 0; } diff --git a/targets/TARGET_STM/TARGET_STM32F4/common_objects.h b/targets/TARGET_STM/TARGET_STM32F4/common_objects.h index f294fa25954..d5d8a6c1849 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/common_objects.h +++ b/targets/TARGET_STM/TARGET_STM32F4/common_objects.h @@ -109,11 +109,19 @@ struct i2c_s { uint8_t available_events; #endif }; + #if DEVICE_FLASH struct flash_s { uint32_t dummy; }; #endif + +struct analogin_s { + ADC_HandleTypeDef handle; + PinName pin; + uint8_t channel; +}; + #define GPIO_IP_WITHOUT_BRR #include "gpio_object.h" diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_mmc.c b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_mmc.c index 04d269c6fb6..6b4c063d60f 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_mmc.c +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_mmc.c @@ -1316,7 +1316,7 @@ HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, hmmc->State = HAL_MMC_STATE_BUSY; /* Check if the card command class supports erase command */ - if((hmmc->MmcCard.Class) & SDIO_CCCC_ERASE == 0U) + if(((hmmc->MmcCard.Class) & SDIO_CCCC_ERASE) == 0U) { /* Clear all the static flags */ __HAL_MMC_CLEAR_FLAG(hmmc, SDIO_STATIC_FLAGS); diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/flash_api.c b/targets/TARGET_STM/TARGET_STM32F4/flash_api.c similarity index 93% rename from targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/flash_api.c rename to targets/TARGET_STM/TARGET_STM32F4/flash_api.c index a13eab6cd4b..a173c0a196c 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/flash_api.c +++ b/targets/TARGET_STM/TARGET_STM32F4/flash_api.c @@ -28,17 +28,13 @@ ******************************************************************************* */ +#if DEVICE_FLASH #include "flash_api.h" #include "flash_data.h" #include "platform/mbed_critical.h" // This file is automatically generated -#if DEVICE_FLASH - -#if defined (STM32F429xx) || defined (STM32F439xx) -#define FLASH_SIZE (uint32_t) 0x200000 -#endif static uint32_t GetSector(uint32_t Address); static uint32_t GetSectorSize(uint32_t Sector); @@ -154,10 +150,13 @@ static uint32_t GetSector(uint32_t address) { uint32_t sector = 0; uint32_t tmp = address - ADDR_FLASH_SECTOR_0; + /* This function supports 1Mb and 2Mb flash sizes */ +#if defined(ADDR_FLASH_SECTOR_12) if (address & 0x100000) { // handle 2nd bank sector = FLASH_SECTOR_12; tmp = address - ADDR_FLASH_SECTOR_12; } +#endif if (address < ADDR_FLASH_SECTOR_4) { // 16k sectorsize sector += tmp >>14; } else if (address < ADDR_FLASH_SECTOR_5) { //64k sector size @@ -176,11 +175,18 @@ static uint32_t GetSector(uint32_t address) static uint32_t GetSectorSize(uint32_t Sector) { uint32_t sectorsize = 0x00; +#if defined(FLASH_SECTOR_12) if((Sector == FLASH_SECTOR_0) || (Sector == FLASH_SECTOR_1) || (Sector == FLASH_SECTOR_2) ||\ (Sector == FLASH_SECTOR_3) || (Sector == FLASH_SECTOR_12) || (Sector == FLASH_SECTOR_13) ||\ (Sector == FLASH_SECTOR_14) || (Sector == FLASH_SECTOR_15)) { - sectorsize = 16 * 1024; - } else if((Sector == FLASH_SECTOR_4) || (Sector == FLASH_SECTOR_16)) { + sectorsize = 16 * 1024; + } else if((Sector == FLASH_SECTOR_4) || (Sector == FLASH_SECTOR_16)) { +#else +if((Sector == FLASH_SECTOR_0) || (Sector == FLASH_SECTOR_1) || (Sector == FLASH_SECTOR_2) ||\ + (Sector == FLASH_SECTOR_3)) { + sectorsize = 16 * 1024; + } else if(Sector == FLASH_SECTOR_4) { +#endif sectorsize = 64 * 1024; } else { sectorsize = 128 * 1024; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/objects.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/objects.h index e43e5aea051..52b8e159eba 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/objects.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/objects.h index e43e5aea051..52b8e159eba 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/objects.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/objects.h index e43e5aea051..52b8e159eba 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/objects.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/objects.h index e43e5aea051..52b8e159eba 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/objects.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint8_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32F7/analogin_api.c b/targets/TARGET_STM/TARGET_STM32F7/analogin_api.c index 4751affe0b4..431ddb846a1 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/analogin_api.c +++ b/targets/TARGET_STM/TARGET_STM32F7/analogin_api.c @@ -36,12 +36,9 @@ #include "PeripheralPins.h" #include "mbed_error.h" -ADC_HandleTypeDef AdcHandle; - void analogin_init(analogin_t *obj, PinName pin) { uint32_t function = (uint32_t)NC; - obj->adc = (ADCName)NC; #if defined(ADC1) static int adc1_inited = 0; @@ -58,18 +55,17 @@ void analogin_init(analogin_t *obj, PinName pin) if (pin < 0xF0) { // Normal channels // Get the peripheral name from the pin and assign it to the object - obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC); - // Get the functions (adc channel) from the pin and assign it to the object + obj->handle.Instance = (ADC_TypeDef *) pinmap_peripheral(pin, PinMap_ADC); function = pinmap_function(pin, PinMap_ADC); // Configure GPIO pinmap_pinout(pin, PinMap_ADC); } else { // Internal channels - obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC_Internal); + obj->handle.Instance = (ADC_TypeDef *) pinmap_peripheral(pin, PinMap_ADC_Internal); function = pinmap_function(pin, PinMap_ADC_Internal); // No GPIO configuration for internal channels } - MBED_ASSERT(obj->adc != (ADCName)NC); + MBED_ASSERT(obj->handle.Instance != (ADC_TypeDef *)NC); MBED_ASSERT(function != (uint32_t)NC); obj->channel = STM_PIN_CHANNEL(function); @@ -80,43 +76,43 @@ void analogin_init(analogin_t *obj, PinName pin) // Check if ADC is already initialized // Enable ADC clock #if defined(ADC1) - if ((obj->adc == ADC_1) && adc1_inited) return; - if (obj->adc == ADC_1) { + if (((ADCName)obj->handle.Instance == ADC_1) && adc1_inited) return; + if ((ADCName)obj->handle.Instance == ADC_1) { __HAL_RCC_ADC1_CLK_ENABLE(); adc1_inited = 1; } #endif #if defined(ADC2) - if ((obj->adc == ADC_2) && adc2_inited) return; - if (obj->adc == ADC_2) { + if (((ADCName)obj->handle.Instance == ADC_2) && adc2_inited) return; + if ((ADCName)obj->handle.Instance == ADC_2) { __HAL_RCC_ADC2_CLK_ENABLE(); adc2_inited = 1; } #endif #if defined(ADC3) - if ((obj->adc == ADC_3) && adc3_inited) return; - if (obj->adc == ADC_3) { + if (((ADCName)obj->handle.Instance == ADC_3) && adc3_inited) return; + if ((ADCName)obj->handle.Instance == ADC_3) { __HAL_RCC_ADC3_CLK_ENABLE(); adc3_inited = 1; } #endif // Configure ADC - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - AdcHandle.Init.ClockPrescaler = ADC_CLOCKPRESCALER_PCLK_DIV4; - AdcHandle.Init.Resolution = ADC_RESOLUTION_12B; - AdcHandle.Init.ScanConvMode = DISABLE; - AdcHandle.Init.ContinuousConvMode = DISABLE; - AdcHandle.Init.DiscontinuousConvMode = DISABLE; - AdcHandle.Init.NbrOfDiscConversion = 0; - AdcHandle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - AdcHandle.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_CC1; - AdcHandle.Init.DataAlign = ADC_DATAALIGN_RIGHT; - AdcHandle.Init.NbrOfConversion = 1; - AdcHandle.Init.DMAContinuousRequests = DISABLE; - AdcHandle.Init.EOCSelection = DISABLE; - - if (HAL_ADC_Init(&AdcHandle) != HAL_OK) { + obj->handle.State = HAL_ADC_STATE_RESET; + obj->handle.Init.ClockPrescaler = ADC_CLOCKPRESCALER_PCLK_DIV4; + obj->handle.Init.Resolution = ADC_RESOLUTION_12B; + obj->handle.Init.ScanConvMode = DISABLE; + obj->handle.Init.ContinuousConvMode = DISABLE; + obj->handle.Init.DiscontinuousConvMode = DISABLE; + obj->handle.Init.NbrOfDiscConversion = 0; + obj->handle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + obj->handle.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_CC1; + obj->handle.Init.DataAlign = ADC_DATAALIGN_RIGHT; + obj->handle.Init.NbrOfConversion = 1; + obj->handle.Init.DMAContinuousRequests = DISABLE; + obj->handle.Init.EOCSelection = DISABLE; + + if (HAL_ADC_Init(&obj->handle) != HAL_OK) { error("Cannot initialize ADC"); } } @@ -125,8 +121,6 @@ static inline uint16_t adc_read(analogin_t *obj) { ADC_ChannelConfTypeDef sConfig = {0}; - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - // Configure ADC channel sConfig.Rank = 1; sConfig.SamplingTime = ADC_SAMPLETIME_15CYCLES; @@ -194,16 +188,16 @@ static inline uint16_t adc_read(analogin_t *obj) return 0; } - if (HAL_ADC_ConfigChannel(&AdcHandle, &sConfig) != HAL_OK) { + if (HAL_ADC_ConfigChannel(&obj->handle, &sConfig) != HAL_OK) { error("Cannot configure ADC channel"); } - HAL_ADC_Start(&AdcHandle); // Start conversion + HAL_ADC_Start(&obj->handle); // Start conversion // Wait end of conversion and get value - HAL_ADC_PollForConversion(&AdcHandle, 10); - if (HAL_ADC_GetState(&AdcHandle) & HAL_ADC_STATE_EOC_REG) { - return (HAL_ADC_GetValue(&AdcHandle)); + HAL_ADC_PollForConversion(&obj->handle, 10); + if (HAL_ADC_GetState(&obj->handle) & HAL_ADC_STATE_EOC_REG) { + return (HAL_ADC_GetValue(&obj->handle)); } else { return 0; } diff --git a/targets/TARGET_STM/TARGET_STM32F7/common_objects.h b/targets/TARGET_STM/TARGET_STM32F7/common_objects.h index cf5cad00288..ddcccb01af8 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/common_objects.h +++ b/targets/TARGET_STM/TARGET_STM32F7/common_objects.h @@ -111,6 +111,12 @@ struct i2c_s { #endif }; +struct analogin_s { + ADC_HandleTypeDef handle; + PinName pin; + uint8_t channel; +}; + #define GPIO_IP_WITHOUT_BRR #include "gpio_object.h" diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/objects.h b/targets/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/objects.h index 27c980be5d4..ece5f1679fa 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/objects.h +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - struct trng_s { RNG_HandleTypeDef handle; }; diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L072CZ_LRWAN1/objects.h b/targets/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L072CZ_LRWAN1/objects.h index 9728243d34c..e68c4eb6194 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L072CZ_LRWAN1/objects.h +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L072CZ_LRWAN1/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - struct trng_s { RNG_HandleTypeDef handle; }; diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L011K4/objects.h b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L011K4/objects.h index cc273c9206c..d0f3565f66d 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L011K4/objects.h +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L011K4/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - #include "common_objects.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/objects.h b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/objects.h index cc273c9206c..d0f3565f66d 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/objects.h +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - #include "common_objects.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/objects.h b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/objects.h index cc273c9206c..d0f3565f66d 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/objects.h +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - #include "common_objects.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/objects.h b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/objects.h index 27c980be5d4..ece5f1679fa 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/objects.h +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - struct trng_s { RNG_HandleTypeDef handle; }; diff --git a/targets/TARGET_STM/TARGET_STM32L0/analogin_api.c b/targets/TARGET_STM/TARGET_STM32L0/analogin_api.c index ac813ef1ea8..c53447efa39 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/analogin_api.c +++ b/targets/TARGET_STM/TARGET_STM32L0/analogin_api.c @@ -36,14 +36,12 @@ #include "mbed_error.h" #include "PeripheralPins.h" -ADC_HandleTypeDef AdcHandle; - int adc_inited = 0; void analogin_init(analogin_t *obj, PinName pin) { uint32_t function = (uint32_t)NC; - obj->adc = (ADCName)NC; + obj->handle.Instance = (ADC_TypeDef *)NC; // ADC Internal Channels "pins" (Temperature, Vref, Vbat, ...) // are described in PinNames.h and PeripheralPins.c @@ -51,18 +49,18 @@ void analogin_init(analogin_t *obj, PinName pin) if (pin < 0xF0) { // Normal channels // Get the peripheral name from the pin and assign it to the object - obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC); + obj->handle.Instance = (ADC_TypeDef *)pinmap_peripheral(pin, PinMap_ADC); // Get the functions (adc channel) from the pin and assign it to the object function = pinmap_function(pin, PinMap_ADC); // Configure GPIO pinmap_pinout(pin, PinMap_ADC); } else { // Internal channels - obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC_Internal); + obj->handle.Instance = (ADC_TypeDef *)pinmap_peripheral(pin, PinMap_ADC_Internal); function = pinmap_function(pin, PinMap_ADC_Internal); // No GPIO configuration for internal channels } - MBED_ASSERT(obj->adc != (ADCName)NC); + MBED_ASSERT(obj->handle.Instance != (ADC_TypeDef *)NC); MBED_ASSERT(function != (uint32_t)NC); obj->channel = STM_PIN_CHANNEL(function); @@ -74,37 +72,36 @@ void analogin_init(analogin_t *obj, PinName pin) if (adc_inited == 0) { adc_inited = 1; - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - + obj->handle.State = HAL_ADC_STATE_RESET; // Enable ADC clock __ADC1_CLK_ENABLE(); // Configure ADC - AdcHandle.Init.OversamplingMode = DISABLE; - AdcHandle.Init.ClockPrescaler = ADC_CLOCKPRESCALER_PCLK_DIV1; - AdcHandle.Init.Resolution = ADC_RESOLUTION12b; - AdcHandle.Init.SamplingTime = ADC_SAMPLETIME_239CYCLES_5; - AdcHandle.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD; - AdcHandle.Init.DataAlign = ADC_DATAALIGN_RIGHT; - AdcHandle.Init.ContinuousConvMode = DISABLE; - AdcHandle.Init.DiscontinuousConvMode = DISABLE; - AdcHandle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIG_EDGE_NONE; - AdcHandle.Init.ExternalTrigConv = ADC_EXTERNALTRIG0_T6_TRGO; // Not used here - AdcHandle.Init.DMAContinuousRequests = DISABLE; - AdcHandle.Init.EOCSelection = EOC_SINGLE_CONV; - AdcHandle.Init.Overrun = OVR_DATA_OVERWRITTEN; - AdcHandle.Init.LowPowerAutoWait = ENABLE; - AdcHandle.Init.LowPowerFrequencyMode = DISABLE; // To be enabled only if ADC clock < 2.8 MHz - AdcHandle.Init.LowPowerAutoPowerOff = DISABLE; - - if (HAL_ADC_Init(&AdcHandle) != HAL_OK) { + obj->handle.Init.OversamplingMode = DISABLE; + obj->handle.Init.ClockPrescaler = ADC_CLOCKPRESCALER_PCLK_DIV1; + obj->handle.Init.Resolution = ADC_RESOLUTION12b; + obj->handle.Init.SamplingTime = ADC_SAMPLETIME_239CYCLES_5; + obj->handle.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD; + obj->handle.Init.DataAlign = ADC_DATAALIGN_RIGHT; + obj->handle.Init.ContinuousConvMode = DISABLE; + obj->handle.Init.DiscontinuousConvMode = DISABLE; + obj->handle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIG_EDGE_NONE; + obj->handle.Init.ExternalTrigConv = ADC_EXTERNALTRIG0_T6_TRGO; // Not used here + obj->handle.Init.DMAContinuousRequests = DISABLE; + obj->handle.Init.EOCSelection = EOC_SINGLE_CONV; + obj->handle.Init.Overrun = OVR_DATA_OVERWRITTEN; + obj->handle.Init.LowPowerAutoWait = ENABLE; + obj->handle.Init.LowPowerFrequencyMode = DISABLE; // To be enabled only if ADC clock < 2.8 MHz + obj->handle.Init.LowPowerAutoPowerOff = DISABLE; + + if (HAL_ADC_Init(&obj->handle) != HAL_OK) { error("Cannot initialize ADC"); } // Calibration - HAL_ADCEx_Calibration_Start(&AdcHandle, ADC_SINGLE_ENDED); + HAL_ADCEx_Calibration_Start(&obj->handle, ADC_SINGLE_ENDED); - __HAL_ADC_ENABLE(&AdcHandle); + __HAL_ADC_ENABLE(&obj->handle); } } @@ -112,8 +109,6 @@ static inline uint16_t adc_read(analogin_t *obj) { ADC_ChannelConfTypeDef sConfig = {0}; - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - // Configure ADC channel sConfig.Rank = ADC_RANK_CHANNEL_NUMBER; switch (obj->channel) { @@ -181,13 +176,13 @@ static inline uint16_t adc_read(analogin_t *obj) } ADC1->CHSELR = 0; // [TODO] Workaround. To be removed after Cube driver is corrected. - HAL_ADC_ConfigChannel(&AdcHandle, &sConfig); + HAL_ADC_ConfigChannel(&obj->handle, &sConfig); - HAL_ADC_Start(&AdcHandle); // Start conversion + HAL_ADC_Start(&obj->handle); // Start conversion // Wait end of conversion and get value - if (HAL_ADC_PollForConversion(&AdcHandle, 10) == HAL_OK) { - return (HAL_ADC_GetValue(&AdcHandle)); + if (HAL_ADC_PollForConversion(&obj->handle, 10) == HAL_OK) { + return (HAL_ADC_GetValue(&obj->handle)); } else { return 0; } diff --git a/targets/TARGET_STM/TARGET_STM32L0/common_objects.h b/targets/TARGET_STM/TARGET_STM32L0/common_objects.h index 7233c0871ea..31306f48e4b 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/common_objects.h +++ b/targets/TARGET_STM/TARGET_STM32L0/common_objects.h @@ -116,6 +116,12 @@ struct flash_s { uint32_t dummy; }; +struct analogin_s { + ADC_HandleTypeDef handle; + PinName pin; + uint8_t channel; +}; + #include "gpio_object.h" #if DEVICE_ANALOGOUT diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/objects.h b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/objects.h index 69653d026a0..6751a6a3c23 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/objects.h +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - #define GPIO_IP_WITHOUT_BRR #include "common_objects.h" diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/objects.h b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/objects.h index 4ef06de6883..5ddc595468a 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/objects.h +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - #include "common_objects.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/objects.h b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/objects.h index 4ef06de6883..5ddc595468a 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/objects.h +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - #include "common_objects.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/objects.h b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/objects.h index 69653d026a0..6751a6a3c23 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/objects.h +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - #define GPIO_IP_WITHOUT_BRR #include "common_objects.h" diff --git a/targets/TARGET_STM/TARGET_STM32L1/analogin_api.c b/targets/TARGET_STM/TARGET_STM32L1/analogin_api.c index 9ae9b74d50b..c716ba8da5f 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/analogin_api.c +++ b/targets/TARGET_STM/TARGET_STM32L1/analogin_api.c @@ -36,8 +36,6 @@ #include "mbed_error.h" #include "PeripheralPins.h" -ADC_HandleTypeDef AdcHandle; - int adc_inited = 0; void analogin_init(analogin_t *obj, PinName pin) @@ -45,8 +43,8 @@ void analogin_init(analogin_t *obj, PinName pin) RCC_OscInitTypeDef RCC_OscInitStruct; // Get the peripheral name from the pin and assign it to the object - obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC); - MBED_ASSERT(obj->adc != (ADCName)NC); + obj->handle.Instance = (ADC_TypeDef *) pinmap_peripheral(pin, PinMap_ADC); + MBED_ASSERT(obj->handle.Instance != (ADC_TypeDef *)NC); // Get the pin function and assign the used channel to the object uint32_t function = pinmap_function(pin, PinMap_ADC); @@ -73,29 +71,28 @@ void analogin_init(analogin_t *obj, PinName pin) RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; HAL_RCC_OscConfig(&RCC_OscInitStruct); - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - + obj->handle.State = HAL_ADC_STATE_RESET; // Enable ADC clock __ADC1_CLK_ENABLE(); // Configure ADC - AdcHandle.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV4; - AdcHandle.Init.Resolution = ADC_RESOLUTION12b; - AdcHandle.Init.DataAlign = ADC_DATAALIGN_RIGHT; - AdcHandle.Init.ScanConvMode = DISABLE; // Sequencer disabled (ADC conversion on only 1 channel: channel set on rank 1) - AdcHandle.Init.EOCSelection = EOC_SINGLE_CONV; // On STM32L1xx ADC, overrun detection is enabled only if EOC selection is set to each conversion (or transfer by DMA enabled, this is not the case in this example). - AdcHandle.Init.LowPowerAutoWait = ADC_AUTOWAIT_UNTIL_DATA_READ; // Enable the dynamic low power Auto Delay: new conversion start only when the previous conversion (for regular group) or previous sequence (for injected group) has been treated by user software. - AdcHandle.Init.LowPowerAutoPowerOff = ADC_AUTOPOWEROFF_IDLE_PHASE; // Enable the auto-off mode: the ADC automatically powers-off after a conversion and automatically wakes-up when a new conversion is triggered (with startup time between trigger and start of sampling). - AdcHandle.Init.ChannelsBank = ADC_CHANNELS_BANK_A; - AdcHandle.Init.ContinuousConvMode = DISABLE; // Continuous mode disabled to have only 1 conversion at each conversion trig - AdcHandle.Init.NbrOfConversion = 1; // Parameter discarded because sequencer is disabled - AdcHandle.Init.DiscontinuousConvMode = DISABLE; // Parameter discarded because sequencer is disabled - AdcHandle.Init.NbrOfDiscConversion = 1; // Parameter discarded because sequencer is disabled - AdcHandle.Init.ExternalTrigConv = 0; // Not used - AdcHandle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - AdcHandle.Init.DMAContinuousRequests = DISABLE; - - if (HAL_ADC_Init(&AdcHandle) != HAL_OK) { + obj->handle.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV4; + obj->handle.Init.Resolution = ADC_RESOLUTION12b; + obj->handle.Init.DataAlign = ADC_DATAALIGN_RIGHT; + obj->handle.Init.ScanConvMode = DISABLE; // Sequencer disabled (ADC conversion on only 1 channel: channel set on rank 1) + obj->handle.Init.EOCSelection = EOC_SINGLE_CONV; // On STM32L1xx ADC, overrun detection is enabled only if EOC selection is set to each conversion (or transfer by DMA enabled, this is not the case in this example). + obj->handle.Init.LowPowerAutoWait = ADC_AUTOWAIT_UNTIL_DATA_READ; // Enable the dynamic low power Auto Delay: new conversion start only when the previous conversion (for regular group) or previous sequence (for injected group) has been treated by user software. + obj->handle.Init.LowPowerAutoPowerOff = ADC_AUTOPOWEROFF_IDLE_PHASE; // Enable the auto-off mode: the ADC automatically powers-off after a conversion and automatically wakes-up when a new conversion is triggered (with startup time between trigger and start of sampling). + obj->handle.Init.ChannelsBank = ADC_CHANNELS_BANK_A; + obj->handle.Init.ContinuousConvMode = DISABLE; // Continuous mode disabled to have only 1 conversion at each conversion trig + obj->handle.Init.NbrOfConversion = 1; // Parameter discarded because sequencer is disabled + obj->handle.Init.DiscontinuousConvMode = DISABLE; // Parameter discarded because sequencer is disabled + obj->handle.Init.NbrOfDiscConversion = 1; // Parameter discarded because sequencer is disabled + obj->handle.Init.ExternalTrigConv = 0; // Not used + obj->handle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + obj->handle.Init.DMAContinuousRequests = DISABLE; + + if (HAL_ADC_Init(&obj->handle) != HAL_OK) { error("Cannot initialize ADC"); } } @@ -105,8 +102,6 @@ static inline uint16_t adc_read(analogin_t *obj) { ADC_ChannelConfTypeDef sConfig = {0}; - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - // Configure ADC channel switch (obj->channel) { case 0: @@ -222,13 +217,13 @@ static inline uint16_t adc_read(analogin_t *obj) sConfig.Rank = ADC_REGULAR_RANK_1; sConfig.SamplingTime = ADC_SAMPLETIME_16CYCLES; - HAL_ADC_ConfigChannel(&AdcHandle, &sConfig); + HAL_ADC_ConfigChannel(&obj->handle, &sConfig); - HAL_ADC_Start(&AdcHandle); // Start conversion + HAL_ADC_Start(&obj->handle); // Start conversion // Wait end of conversion and get value - if (HAL_ADC_PollForConversion(&AdcHandle, 10) == HAL_OK) { - return (HAL_ADC_GetValue(&AdcHandle)); + if (HAL_ADC_PollForConversion(&obj->handle, 10) == HAL_OK) { + return (HAL_ADC_GetValue(&obj->handle)); } else { return 0; } diff --git a/targets/TARGET_STM/TARGET_STM32L1/common_objects.h b/targets/TARGET_STM/TARGET_STM32L1/common_objects.h index 844e0f5b25b..93a1dde240b 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/common_objects.h +++ b/targets/TARGET_STM/TARGET_STM32L1/common_objects.h @@ -122,6 +122,12 @@ struct dac_s { DAC_HandleTypeDef handle; }; +struct analogin_s { + ADC_HandleTypeDef handle; + PinName pin; + uint8_t channel; +}; + #include "gpio_object.h" #ifdef __cplusplus diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/objects.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/objects.h index 0b8ee2687a1..a7e928ec3a8 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/objects.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/objects.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/objects.h index 6f41dbeb745..a0dee029b45 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/objects.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/objects.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/objects.h index 0b8ee2687a1..a7e928ec3a8 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/objects.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/objects.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/objects.h index 0b8ee2687a1..a7e928ec3a8 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/objects.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/objects.h @@ -54,12 +54,6 @@ struct port_s { __IO uint32_t *reg_out; }; -struct analogin_s { - ADCName adc; - PinName pin; - uint32_t channel; -}; - struct can_s { CANName can; int index; diff --git a/targets/TARGET_STM/TARGET_STM32L4/analogin_api.c b/targets/TARGET_STM/TARGET_STM32L4/analogin_api.c index 94ccdb0f06f..064e21cc992 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/analogin_api.c +++ b/targets/TARGET_STM/TARGET_STM32L4/analogin_api.c @@ -36,14 +36,11 @@ #include "mbed_error.h" #include "PeripheralPins.h" -ADC_HandleTypeDef AdcHandle; - int adc_inited = 0; void analogin_init(analogin_t *obj, PinName pin) { uint32_t function = (uint32_t)NC; - obj->adc = (ADCName)NC; // ADC Internal Channels "pins" (Temperature, Vref, Vbat, ...) // are described in PinNames.h and PeripheralPins.c @@ -51,18 +48,18 @@ void analogin_init(analogin_t *obj, PinName pin) if ((pin < 0xF0) || (pin >= 0x100)) { // Normal channels // Get the peripheral name from the pin and assign it to the object - obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC); + obj->handle.Instance = (ADC_TypeDef *) pinmap_peripheral(pin, PinMap_ADC); // Get the functions (adc channel) from the pin and assign it to the object function = pinmap_function(pin, PinMap_ADC); // Configure GPIO pinmap_pinout(pin, PinMap_ADC); } else { // Internal channels - obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC_Internal); + obj->handle.Instance = (ADC_TypeDef *) pinmap_peripheral(pin, PinMap_ADC_Internal); function = pinmap_function(pin, PinMap_ADC_Internal); // No GPIO configuration for internal channels } - MBED_ASSERT(obj->adc != (ADCName)NC); + MBED_ASSERT(obj->handle.Instance != (ADC_TypeDef *)NC); MBED_ASSERT(function != (uint32_t)NC); obj->channel = STM_PIN_CHANNEL(function); @@ -78,26 +75,25 @@ void analogin_init(analogin_t *obj, PinName pin) __HAL_RCC_ADC_CLK_ENABLE(); __HAL_RCC_ADC_CONFIG(RCC_ADCCLKSOURCE_SYSCLK); - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - + obj->handle.State = HAL_ADC_STATE_RESET; // Configure ADC - AdcHandle.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV2; // Asynchronous clock mode, input ADC clock - AdcHandle.Init.Resolution = ADC_RESOLUTION_12B; - AdcHandle.Init.DataAlign = ADC_DATAALIGN_RIGHT; - AdcHandle.Init.ScanConvMode = DISABLE; // Sequencer disabled (ADC conversion on only 1 channel: channel set on rank 1) - AdcHandle.Init.EOCSelection = ADC_EOC_SINGLE_CONV; // On STM32L1xx ADC, overrun detection is enabled only if EOC selection is set to each conversion (or transfer by DMA enabled, this is not the case in this example). - AdcHandle.Init.LowPowerAutoWait = DISABLE; - AdcHandle.Init.ContinuousConvMode = DISABLE; // Continuous mode disabled to have only 1 conversion at each conversion trig - AdcHandle.Init.NbrOfConversion = 1; // Parameter discarded because sequencer is disabled - AdcHandle.Init.DiscontinuousConvMode = DISABLE; // Parameter discarded because sequencer is disabled - AdcHandle.Init.NbrOfDiscConversion = 1; // Parameter discarded because sequencer is disabled - AdcHandle.Init.ExternalTrigConv = ADC_SOFTWARE_START; // Software start to trig the 1st conversion manually, without external event - AdcHandle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - AdcHandle.Init.DMAContinuousRequests = DISABLE; - AdcHandle.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; // DR register is overwritten with the last conversion result in case of overrun - AdcHandle.Init.OversamplingMode = DISABLE; // No oversampling - - if (HAL_ADC_Init(&AdcHandle) != HAL_OK) { + obj->handle.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV2; // Asynchronous clock mode, input ADC clock + obj->handle.Init.Resolution = ADC_RESOLUTION_12B; + obj->handle.Init.DataAlign = ADC_DATAALIGN_RIGHT; + obj->handle.Init.ScanConvMode = DISABLE; // Sequencer disabled (ADC conversion on only 1 channel: channel set on rank 1) + obj->handle.Init.EOCSelection = ADC_EOC_SINGLE_CONV; // On STM32L1xx ADC, overrun detection is enabled only if EOC selection is set to each conversion (or transfer by DMA enabled, this is not the case in this example). + obj->handle.Init.LowPowerAutoWait = DISABLE; + obj->handle.Init.ContinuousConvMode = DISABLE; // Continuous mode disabled to have only 1 conversion at each conversion trig + obj->handle.Init.NbrOfConversion = 1; // Parameter discarded because sequencer is disabled + obj->handle.Init.DiscontinuousConvMode = DISABLE; // Parameter discarded because sequencer is disabled + obj->handle.Init.NbrOfDiscConversion = 1; // Parameter discarded because sequencer is disabled + obj->handle.Init.ExternalTrigConv = ADC_SOFTWARE_START; // Software start to trig the 1st conversion manually, without external event + obj->handle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + obj->handle.Init.DMAContinuousRequests = DISABLE; + obj->handle.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; // DR register is overwritten with the last conversion result in case of overrun + obj->handle.Init.OversamplingMode = DISABLE; // No oversampling + + if (HAL_ADC_Init(&obj->handle) != HAL_OK) { error("Cannot initialize ADC\n"); } } @@ -107,8 +103,6 @@ static inline uint16_t adc_read(analogin_t *obj) { ADC_ChannelConfTypeDef sConfig = {0}; - AdcHandle.Instance = (ADC_TypeDef *)(obj->adc); - // Configure ADC channel switch (obj->channel) { case 0: @@ -178,13 +172,13 @@ static inline uint16_t adc_read(analogin_t *obj) sConfig.OffsetNumber = ADC_OFFSET_NONE; sConfig.Offset = 0; - HAL_ADC_ConfigChannel(&AdcHandle, &sConfig); + HAL_ADC_ConfigChannel(&obj->handle, &sConfig); - HAL_ADC_Start(&AdcHandle); // Start conversion + HAL_ADC_Start(&obj->handle); // Start conversion // Wait end of conversion and get value - if (HAL_ADC_PollForConversion(&AdcHandle, 10) == HAL_OK) { - return (HAL_ADC_GetValue(&AdcHandle)); + if (HAL_ADC_PollForConversion(&obj->handle, 10) == HAL_OK) { + return (HAL_ADC_GetValue(&obj->handle)); } else { return 0; } diff --git a/targets/TARGET_STM/TARGET_STM32L4/common_objects.h b/targets/TARGET_STM/TARGET_STM32L4/common_objects.h index d5d9d2707b5..e9e10f30696 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/common_objects.h +++ b/targets/TARGET_STM/TARGET_STM32L4/common_objects.h @@ -116,6 +116,12 @@ struct flash_s { uint32_t dummy; }; +struct analogin_s { + ADC_HandleTypeDef handle; + PinName pin; + uint8_t channel; +}; + #include "gpio_object.h" struct dac_s { diff --git a/targets/targets.json b/targets/targets.json index bfb9455de3f..62ba7a266be 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -1022,9 +1022,10 @@ }, "detect_code": ["0826"], "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], - "device_has_add": ["CAN", "ERROR_RED", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG"], + "device_has_add": ["CAN", "ERROR_RED", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], "release_versions": ["2", "5"], - "device_name": "STM32F412ZG" + "device_name": "STM32F412ZG", + "bootloader_supported": true }, "DISCO_F413ZH": { "inherits": ["FAMILY_STM32"], @@ -1680,7 +1681,7 @@ "supported_form_factors": ["ARDUINO"], "core": "Cortex-M4F", "extra_labels_add": ["STM32F4", "STM32F439", "STM32F439ZI","STM32F439xx", "STM32F439xI"], - "macros": ["HSE_VALUE=24000000", "HSE_STARTUP_TIMEOUT=5000", "CB_INTERFACE_SDIO","CB_CHIP_WL18XX","SUPPORT_80211D_ALWAYS","WLAN_ENABLED","MBEDTLS_ARC4_C","MBEDTLS_DES_C","MBEDTLS_MD4_C","MBEDTLS_MD5_C","MBEDTLS_SHA1_C"], + "macros": ["MBEDTLS_CONFIG_HW_SUPPORT", "HSE_VALUE=24000000", "HSE_STARTUP_TIMEOUT=5000", "CB_INTERFACE_SDIO","CB_CHIP_WL18XX","SUPPORT_80211D_ALWAYS","WLAN_ENABLED","MBEDTLS_ARC4_C","MBEDTLS_DES_C","MBEDTLS_MD4_C","MBEDTLS_MD5_C","MBEDTLS_SHA1_C"], "device_has_add": ["CAN", "EMAC", "TRNG", "FLASH"], "device_has_remove": ["RTC", "SLEEP"], "features": ["LWIP"], @@ -1707,10 +1708,11 @@ } }, "macros_add": ["RTC_LSI=1", "HSE_VALUE=12000000", "GNSSBAUD=9600"], - "device_has_add": ["ANALOGOUT", "TRNG"], + "device_has_add": ["ANALOGOUT", "SERIAL_FC", "TRNG", "FLASH"], "features": ["LWIP"], "public": false, - "device_name": "STM32F437VG" + "device_name": "STM32F437VG", + "bootloader_supported": true }, "UBLOX_C030_U201": { "inherits": ["UBLOX_C030"], @@ -2304,10 +2306,11 @@ "MAX32630FTHR": { "inherits": ["Target"], "core": "Cortex-M4F", - "macros": ["__SYSTEM_HFX=96000000", "TARGET=MAX32630", "TARGET_REV=0x4132"], + "macros": ["__SYSTEM_HFX=96000000", "TARGET=MAX32630", "TARGET_REV=0x4132", "BLE_HCI_UART", "OPEN_DRAIN_LEDS"], "extra_labels": ["Maxim", "MAX32630"], "supported_toolchains": ["GCC_ARM", "IAR", "ARM"], "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"], + "features": ["BLE"], "release_versions": ["2", "5"] }, "EFM32": { @@ -3162,6 +3165,7 @@ "value": "0xFFFFFFFF" } }, + "OUTPUT_EXT": "hex", "post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"}, "macros": ["CM3", "CPU_NCS36510", "TARGET_NCS36510", "LOAD_ADDRESS=0x3000"], "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], diff --git a/tools/export/cdt/__init__.py b/tools/export/cdt/__init__.py index ff978b6fc7f..29b9fdd2de9 100644 --- a/tools/export/cdt/__init__.py +++ b/tools/export/cdt/__init__.py @@ -1,6 +1,6 @@ import re -from os.path import join, exists, realpath, relpath, basename +from os.path import join, exists from os import makedirs from tools.export.makefile import Makefile, GccArm, Armc5, IAR @@ -30,7 +30,9 @@ def generate(self): self.gen_file('cdt/pyocd_settings.tmpl', ctx, - join('eclipse-extras',self.target+'_pyocd_settings.launch')) + join('eclipse-extras', + '{target}_pyocd_{project}_settings.launch'.format(target=self.target, + project=self.project_name))) self.gen_file('cdt/necessary_software.tmpl', ctx, join('eclipse-extras','necessary_software.p2f')) diff --git a/tools/export/cdt/pyocd_settings.tmpl b/tools/export/cdt/pyocd_settings.tmpl index 9787cc4c124..67d0ed4fbac 100644 --- a/tools/export/cdt/pyocd_settings.tmpl +++ b/tools/export/cdt/pyocd_settings.tmpl @@ -49,7 +49,7 @@ - + diff --git a/tools/export/iar/iar_definitions.json b/tools/export/iar/iar_definitions.json index 742464e97a8..be9069d40a6 100644 --- a/tools/export/iar/iar_definitions.json +++ b/tools/export/iar/iar_definitions.json @@ -35,8 +35,41 @@ "STM32F070RB": { "OGChipSelectEditMenu": "STM32F070RB\tST STM32F070RB" }, + "MK22DN512xxx5": { + "OGChipSelectEditMenu": "MK22DN512xxx5\tNXP MK22DN512xxx5" + }, + "MK24FN1M0xxx12": { + "OGChipSelectEditMenu": "MK24FN1M0xxx12\tNXP MK24FN1M0xxx12" + }, "MK64FN1M0xxx12": { - "OGChipSelectEditMenu": "MK64FN1M0xxx12\tFreescale MK64FN1M0xxx12" + "OGChipSelectEditMenu": "MK64FN1M0xxx12\tNXP MK64FN1M0xxx12" + }, + "MK66FN2M0xxx18": { + "OGChipSelectEditMenu": "MK66FN2M0xxx18\tNXP MK66FN2M0xxx18" + }, + "MK82FN256xxx15": { + "OGChipSelectEditMenu": "MK82FN256xxx15\tNXP MK82FN256xxx15" + }, + "MKL27Z64xxx4": { + "OGChipSelectEditMenu": "MKL27Z64xxx4\tNXP MKL27Z64xxx4" + }, + "MKL43Z256xxx4": { + "OGChipSelectEditMenu": "MKL43Z256xxx4\tNXP MKL43Z256xxx4" + }, + "MKL82Z128xxx7": { + "OGChipSelectEditMenu": "MKL82Z128xxx7\tNXP MKL82Z128xxx7" + }, + "MKW24D512xxx5": { + "OGChipSelectEditMenu": "MKW24D512xxx5\tNXP MKW24D512xxx5" + }, + "MKW41Z512xxx4": { + "OGChipSelectEditMenu": "MKW41Z512xxx4\tNXP MKW41Z512xxx4" + }, + "LPC54114J256BD64": { + "OGChipSelectEditMenu": "LPC54114J256_M4\tNXP LPC54114J256_M4" + }, + "LPC54608J512ET180": { + "OGChipSelectEditMenu": "LPC54608J512\tNXP LPC54608J512" }, "STM32F072RB": { "OGChipSelectEditMenu": "STM32F072RB\tST STM32F072RB" diff --git a/tools/export/makefile/__init__.py b/tools/export/makefile/__init__.py index d3129143f31..d51450c76e5 100644 --- a/tools/export/makefile/__init__.py +++ b/tools/export/makefile/__init__.py @@ -200,7 +200,9 @@ class GccArm(Makefile): @staticmethod def prepare_lib(libname): - return "-l:" + libname + if "lib" == libname[:3]: + libname = libname[3:-2] + return "-l" + libname @staticmethod def prepare_sys_lib(libname): diff --git a/tools/export/makefile/make-gcc-arm.tmpl b/tools/export/makefile/make-gcc-arm.tmpl index 3b89b294ab3..5231c65b888 100644 --- a/tools/export/makefile/make-gcc-arm.tmpl +++ b/tools/export/makefile/make-gcc-arm.tmpl @@ -1,6 +1,6 @@ {% extends "makefile/Makefile.tmpl" %} -{%- block sys_libs -%} -Wl,--start-group {{ld_sys_libs|join(" ")}} -Wl,--end-group {%- endblock -%} +{%- block sys_libs -%} -Wl,--start-group {{ld_sys_libs|join(" ")}} {{libraries|join(" ")}} -Wl,--end-group {%- endblock -%} {% block elf2bin %} $(ELF2BIN) -O binary $< $@ diff --git a/tools/targets/NCS.py b/tools/targets/NCS.py index f884a118c5f..710e48c4669 100644 --- a/tools/targets/NCS.py +++ b/tools/targets/NCS.py @@ -18,9 +18,12 @@ from tools.config import Config FIB_BASE = 0x2000 +TRIM_BASE = 0x2800 FLASH_BASE = 0x3000 +FLASHA_SIZE = 0x52000 +FLASHB_BASE = 0x00102000 +FLASHB_SIZE = 0x52000 FW_REV = 0x01000100 -TRIM_BASE = 0x2800 def ranges(i): for _, b in itertools.groupby(enumerate(i), lambda x_y: x_y[1] - x_y[0]): @@ -29,17 +32,17 @@ def ranges(i): def add_fib_at_start(arginput): - input_file = arginput + ".bin" - file_name_hex = arginput + "_fib.hex" + input_file = arginput + ".hex" + file_name_hex = arginput + ".hex" file_name_bin = arginput + ".bin" # Read in hex file input_hex_file = intelhex.IntelHex() - input_hex_file.padding = 0x00 - input_hex_file.loadbin(input_file, offset=FLASH_BASE) - + input_hex_file.loadhex(input_file) + #set padding value to be returned when reading from unspecified address + input_hex_file.padding = 0xFF + # Create new hex file output_hex_file = intelhex.IntelHex() - output_hex_file.padding = 0x00 # Get the starting and ending address addresses = input_hex_file.addresses() @@ -48,17 +51,41 @@ def add_fib_at_start(arginput): regions = len(start_end_pairs) if regions == 1: + #single range indicating fits within first flash block (<320K) start, end = start_end_pairs[0] + print("Memory start 0x%08X, end 0x%08X" % (start, end)) + # Compute checksum over the range (don't include data at location of crc) + size = end - start + 1 + data = input_hex_file.tobinarray(start=start, size=size) + crc32 = binascii.crc32(data) & 0xFFFFFFFF else: - start = min(min(start_end_pairs)) - end = max(max(start_end_pairs)) + #multiple ranges indicating requires both flash blocks (>320K) + start, end = start_end_pairs[0] + start2, end2 = start_end_pairs[1] + print("Region 1: memory start 0x%08X, end 0x%08X" % (start, end)) + print("Region 2: memory start 0x%08X, end 0x%08X" % (start2, end2)) + # Compute checksum over the range (don't include data at location of crc) + # replace end with end of flash block A + end = FLASHA_SIZE - 1 + size = end - start + 1 + data = input_hex_file.tobinarray(start=start, size=size) + + # replace start2 with base of flash block B + start2 = FLASHB_BASE + size2 = end2 - start2 + 1 + data2 = input_hex_file.tobinarray(start=start2, size=size2) + + #concatenate data and data2 arrays together + data.extend(data2) + crc32 = binascii.crc32(data) & 0xFFFFFFFF + + #replace size with sum of two memory region sizes + size = size + size2 assert start >= FLASH_BASE, ("Error - start 0x%x less than begining of user\ flash area" %start) - # Compute checksum over the range (don't include data at location of crc) - size = end - start + 1 - data = input_hex_file.tobinarray(start=start, size=size) - crc32 = binascii.crc32(data) & 0xFFFFFFFF + + assert regions <= 2, ("Error - more than 2 memory regions found") fw_rev = FW_REV @@ -177,7 +204,7 @@ def add_fib_at_start(arginput): output_hex_file[trim_area_start + 1] = (mac_addr_low >> 8) & 0xFF output_hex_file[trim_area_start + 2] = (mac_addr_low >> 16) & 0xFF output_hex_file[trim_area_start + 3] = (mac_addr_low >> 24) & 0xFF - + output_hex_file[trim_area_start + 4] = mac_addr_high & 0xFF output_hex_file[trim_area_start + 5] = (mac_addr_high >> 8) & 0xFF output_hex_file[trim_area_start + 6] = (mac_addr_high >> 16) & 0xFF @@ -202,7 +229,7 @@ def add_fib_at_start(arginput): output_hex_file[trim_area_start + 21] = (txtune >> 8) & 0xFF output_hex_file[trim_area_start + 22] = (txtune >> 16) & 0xFF output_hex_file[trim_area_start + 23] = (txtune >> 24) & 0xFF - + # pad the rest of the area with 0xFF for i in range(trim_area_start + trim_size, user_code_start): output_hex_file[i] = 0xFF @@ -212,4 +239,3 @@ def add_fib_at_start(arginput): # Write out file(s) output_hex_file.tofile(file_name_hex, 'hex') - output_hex_file.tofile(file_name_bin, 'bin')