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audio_process.twx
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<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE twReport [
<!ELEMENT twReport (twHead?, (twWarn | twDebug | twInfo)*, twBody, twSum?,
twDebug*, twFoot?, twClientInfo?)>
<!ATTLIST twReport version CDATA "10,4">
<!ELEMENT twHead (twExecVer?, twCopyright, twCmdLine?, twDesign?, twPCF?, twDevInfo, twRptInfo, twEnvVar*)>
<!ELEMENT twExecVer (#PCDATA)>
<!ELEMENT twCopyright (#PCDATA)>
<!ELEMENT twCmdLine (#PCDATA)>
<!ELEMENT twDesign (#PCDATA)>
<!ELEMENT twPCF (#PCDATA)>
<!ELEMENT twDevInfo (twDevName, twSpeedGrade, twSpeedVer?)>
<!ELEMENT twDevName (#PCDATA)>
<!ATTLIST twDevInfo arch CDATA #IMPLIED pkg CDATA #IMPLIED>
<!ELEMENT twSpeedGrade (#PCDATA)>
<!ELEMENT twSpeedVer (#PCDATA)>
<!ELEMENT twRptInfo (twItemLimit?, (twUnconst, twUnconstLimit?)?)>
<!ATTLIST twRptInfo twRptLvl (twErr | twVerbose | twTerseErr | twSum | twTimeGrp) #REQUIRED>
<!ATTLIST twRptInfo twAdvRpt (TRUE | FALSE) "FALSE">
<!ATTLIST twRptInfo twTimeUnits (twPsec | twNsec | twUsec | twMsec | twSec) "twNsec">
<!ATTLIST twRptInfo twFreqUnits (twGHz | twMHz | twHz) "twMHz">
<!ATTLIST twRptInfo twReportMinPaths CDATA #IMPLIED>
<!ELEMENT twItemLimit (#PCDATA)>
<!ELEMENT twUnconst EMPTY>
<!ELEMENT twUnconstLimit (#PCDATA)>
<!ELEMENT twEnvVar EMPTY>
<!ATTLIST twEnvVar name CDATA #REQUIRED>
<!ATTLIST twEnvVar description CDATA #REQUIRED>
<!ELEMENT twWarn (#PCDATA)>
<!ELEMENT twInfo (#PCDATA)>
<!ELEMENT twDebug (#PCDATA)>
<!ELEMENT twBody (twDerating?, (twSumRpt | twVerboseRpt | twErrRpt | twTerseErrRpt | twTimeGrpRpt), twNonDedClks?)>
<!ATTLIST twBody twFastPaths CDATA #IMPLIED>
<!ELEMENT twDerating (twProc?, twTemp?, twVolt?)>
<!ELEMENT twProc (#PCDATA)>
<!ELEMENT twTemp (#PCDATA)>
<!ELEMENT twVolt (#PCDATA)>
<!ELEMENT twSumRpt (twConstRollupTable*, twConstList?, twConstSummaryTable?, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?)>
<!ELEMENT twErrRpt (twCycles?, (twConst | twTIG | twConstRollupTable)*, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?, twTimeGrp*)>
<!ELEMENT twTerseErrRpt (twConstList, twUnmetConstCnt?, twDataSheet?)>
<!ELEMENT twVerboseRpt (twCycles?, (twConst | twTIG | twConstRollupTable)*, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?, twTimeGrp*)>
<!ELEMENT twCycles (twSigConn+)>
<!ATTLIST twCycles twNum CDATA #REQUIRED>
<!ELEMENT twSigConn (twSig, twDriver, twLoad)>
<!ELEMENT twSig (#PCDATA)>
<!ELEMENT twDriver (#PCDATA)>
<!ELEMENT twLoad (#PCDATA)>
<!ELEMENT twConst (twConstHead, ((twPathRpt?,twRacePathRpt?, twPathRptBanner?)* | (twPathRpt*, twRacePathRpt?) | twNetRpt* | twClkSkewLimit*))>
<!ATTLIST twConst twConstType (NET |
NETDELAY |
NETSKEW |
PATH |
DEFPERIOD |
UNCONSTPATH |
DEFPATH |
PATH2SETUP |
UNCONSTPATH2SETUP |
PATHCLASS |
PATHDELAY |
PERIOD |
FREQUENCY |
PATHBLOCK |
OFFSET |
OFFSETIN |
OFFSETINCLOCK |
UNCONSTOFFSETINCLOCK |
OFFSETINDELAY |
OFFSETINMOD |
OFFSETOUT |
OFFSETOUTCLOCK |
UNCONSTOFFSETOUTCLOCK |
OFFSETOUTDELAY |
OFFSETOUTMOD| CLOCK_SKEW_LIMITS) #IMPLIED>
<!ELEMENT twConstHead (twConstName, twItemCnt, twErrCntSetup, twErrCntEndPt?, twErrCntHold,
twEndPtCnt?,
twPathErrCnt?, (twMinPer| twMaxDel| twMaxFreq| twMaxNetDel| twMaxNetSkew| twMinOff| twMaxOff)*)>
<!ELEMENT twConstName (#PCDATA)>
<!ATTLIST twConstName UCFConstName CDATA #IMPLIED>
<!ATTLIST twConstHead uID CDATA #IMPLIED>
<!ELEMENT twItemCnt (#PCDATA)>
<!ELEMENT twErrCnt (#PCDATA)>
<!ELEMENT twErrCntEndPt (#PCDATA)>
<!ELEMENT twErrCntSetup (#PCDATA)>
<!ELEMENT twErrCntHold (#PCDATA)>
<!ATTLIST twErrCntHold twRaceChecked (TRUE | FALSE) "FALSE">
<!ELEMENT twEndPtCnt (#PCDATA)>
<!ELEMENT twPathErrCnt (#PCDATA)>
<!ELEMENT twMinPer (#PCDATA) >
<!ELEMENT twFootnote EMPTY>
<!ATTLIST twFootnote number CDATA #REQUIRED>
<!ELEMENT twMaxDel (#PCDATA)>
<!ELEMENT twMaxFreq (#PCDATA)>
<!ELEMENT twMinOff (#PCDATA)>
<!ELEMENT twMaxOff (#PCDATA)>
<!ELEMENT twTIG (twTIGHead, (twPathRpt*,twRacePathRpt?))>
<!ELEMENT twTIGHead (twTIGName, twInstantiated, twBlocked)>
<!ELEMENT twTIGName (#PCDATA)>
<!ELEMENT twInstantiated (#PCDATA)>
<!ELEMENT twBlocked (#PCDATA)>
<!ELEMENT twRacePathRpt (twRacePath+)>
<!ELEMENT twPathRpt (twUnconstPath | twConstPath | twUnconstOffIn | twConstOffIn | twUnconstOffOut | twConstOffOut | twModOffOut)>
<!ELEMENT twUnconstPath (twTotDel, twSrc, twDest, (twDel, twSUTime)?, twTotPathDel?, twClkSkew?, tw2Phase?, twClkUncert?, twDetPath?)>
<!ATTLIST twUnconstPath twDataPathType CDATA #IMPLIED
twSimpleMinPath CDATA #IMPLIED>
<!ELEMENT twTotDel (#PCDATA)>
<!ELEMENT twSrc (#PCDATA)>
<!ATTLIST twSrc BELType CDATA #IMPLIED>
<!ELEMENT twDest (#PCDATA)>
<!ATTLIST twDest BELType CDATA #IMPLIED>
<!ELEMENT twDel (#PCDATA)>
<!ELEMENT twSUTime (#PCDATA)>
<!ELEMENT twTotPathDel (#PCDATA)>
<!ELEMENT twClkSkew (#PCDATA)>
<!ATTLIST twClkSkew dest CDATA #IMPLIED src CDATA #IMPLIED>
<!ELEMENT twConstPath (twSlack, twSrc, twDest, twTotPathDel?, twClkSkew?, twDelConst, tw2Phase?, twClkUncert?, twDetPath?)>
<!ATTLIST twConstPath twDataPathType CDATA "twDataPathMaxDelay">
<!ATTLIST twConstPath constType (period | fromto | unknown) "unknown">
<!ELEMENT twSlack (#PCDATA)>
<!ELEMENT twDelConst (#PCDATA)>
<!ELEMENT tw2Phase EMPTY>
<!ELEMENT twClkUncert (#PCDATA)>
<!ATTLIST twClkUncert fSysJit CDATA #IMPLIED fInputJit CDATA #IMPLIED
fDCMJit CDATA #IMPLIED
fPhaseErr CDATA #IMPLIED
sEqu CDATA #IMPLIED>
<!ELEMENT twRacePath (twSlack, twSrc, twDest, twClkSkew, twDelConst?, twClkUncert?, twDetPath)>
<!ELEMENT twPathRptBanner (#PCDATA)>
<!ATTLIST twPathRptBanner sType CDATA #IMPLIED iPaths CDATA #IMPLIED iCriticalPaths CDATA #IMPLIED>
<!ELEMENT twUnconstOffIn (twOff, twSrc, twDest, twGuaranteed?, twClkUncert?, (twDataPath, twClkPath)?)>
<!ATTLIST twUnconstOffIn twDataPathType CDATA #IMPLIED>
<!ELEMENT twOff (#PCDATA)>
<!ELEMENT twGuaranteed EMPTY>
<!ELEMENT twConstOffIn (twSlack, twSrc, twDest, ((twClkDel, twClkSrc, twClkDest) | twGuarInSetup), twOff, twOffSrc, twOffDest, twClkUncert?, (twDataPath, twClkPath)?)>
<!ATTLIST twConstOffIn twDataPathType CDATA "twDataPathMaxDelay">
<!ATTLIST twConstOffIn twDurationNotSpecified CDATA #IMPLIED>
<!ELEMENT twClkDel (#PCDATA)>
<!ELEMENT twClkSrc (#PCDATA)>
<!ELEMENT twClkDest (#PCDATA)>
<!ELEMENT twGuarInSetup (#PCDATA)>
<!ELEMENT twOffSrc (#PCDATA)>
<!ELEMENT twOffDest (#PCDATA)>
<!ELEMENT twUnconstOffOut (twOff, twSrc, twDest, twClkUncert?, (twClkPath, twDataPath)?)>
<!ATTLIST twUnconstOffOut twDataPathType CDATA #IMPLIED>
<!ELEMENT twConstOffOut (twSlack, twSrc, twDest, twClkDel, twClkSrc, twClkDest, twDataDel, twDataSrc, twDataDest, twOff, twOffSrc, twOffDest, twClkUncert?, (twClkPath, twDataPath)?)>
<!ATTLIST twConstOffOut twDataPathType CDATA "twDataPathMaxDelay">
<!ELEMENT twDataDel (#PCDATA)>
<!ELEMENT twDataSrc (#PCDATA)>
<!ELEMENT twDataDest (#PCDATA)>
<!ELEMENT twModOffOut (twSlack, twDest, twDataDel, twDataSrc, twDataDest, twClkUncert?, twDataPath?)>
<!ELEMENT twDetPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twDetPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twDataPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twDataPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twClkPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twClkPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twLogLvls (#PCDATA)>
<!ELEMENT twSrcSite (#PCDATA)>
<!ELEMENT twSrcClk (#PCDATA)>
<!ATTLIST twSrcClk twEdge (twRising | twFalling) "twRising">
<!ATTLIST twSrcClk twArriveTime CDATA #IMPLIED>
<!ATTLIST twSrcClk twClkRes CDATA #IMPLIED>
<!ELEMENT twPathDel (twSite, twDelType, twFanCnt?, twDelInfo?, twComp, twNet?, twBEL*)>
<!ATTLIST twPathDel twHoldTime (TRUE | FALSE) "FALSE">
<!ELEMENT twDelInfo (#PCDATA)>
<!ATTLIST twDelInfo twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ATTLIST twDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
<!ELEMENT twSite (#PCDATA)>
<!ELEMENT twDelType (#PCDATA)>
<!ELEMENT twFanCnt (#PCDATA)>
<!ELEMENT twComp (#PCDATA)>
<!ELEMENT twNet (#PCDATA)>
<!ELEMENT twBEL (#PCDATA)>
<!ELEMENT twLogDel (#PCDATA)>
<!ELEMENT twRouteDel (#PCDATA)>
<!ELEMENT twDestClk (#PCDATA)>
<!ATTLIST twDestClk twEdge (twRising | twFalling) "twRising">
<!ATTLIST twDestClk twArriveTime CDATA #IMPLIED>
<!ATTLIST twDestClk twClkRes CDATA #IMPLIED>
<!ELEMENT twPctLog (#PCDATA)>
<!ELEMENT twPctRoute (#PCDATA)>
<!ELEMENT twNetRpt (twDelNet | twSlackNet | twSkewNet)>
<!ELEMENT twDelNet (twDel, twNet, twDetNet?)>
<!ELEMENT twSlackNet (twSlack, twNet, twDel, twNotMet?, twTimeConst, twAbsSlack, twDetNet?)>
<!ELEMENT twTimeConst (#PCDATA)>
<!ELEMENT twAbsSlack (#PCDATA)>
<!ELEMENT twSkewNet (twSlack, twNet, twSkew, twNotMet?, twTimeConst, twAbsSlack, twDetSkewNet?)>
<!ELEMENT twSkew (#PCDATA)>
<!ELEMENT twDetNet (twNetDel*)>
<!ELEMENT twNetDel (twSrc, twDest, twNetDelInfo)>
<!ELEMENT twNetDelInfo (#PCDATA)>
<!ATTLIST twNetDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
<!ELEMENT twDetSkewNet (twNetSkew*)>
<!ELEMENT twNetSkew (twSrc, twDest, twNetDelInfo, twSkew)>
<!ELEMENT twClkSkewLimit EMPTY>
<!ATTLIST twClkSkewLimit slack CDATA #IMPLIED skew CDATA #IMPLIED arrv1name CDATA #IMPLIED arrv1 CDATA #IMPLIED
arrv2name CDATA #IMPLIED arrv2 CDATA #IMPLIED uncert CDATA #IMPLIED>
<!ELEMENT twConstRollupTable (twConstRollup*)>
<!ATTLIST twConstRollupTable uID CDATA #IMPLIED>
<!ELEMENT twConstRollup EMPTY>
<!ATTLIST twConstRollup name CDATA #IMPLIED fullName CDATA #IMPLIED type CDATA #IMPLIED requirement CDATA #IMPLIED prefType CDATA #IMPLIED actual CDATA #IMPLIED>
<!ATTLIST twConstRollup actualRollup CDATA #IMPLIED errors CDATA #IMPLIED errorRollup CDATA #IMPLIED items CDATA #IMPLIED itemsRollup CDATA #IMPLIED>
<!ELEMENT twConstList (twConstListItem)*>
<!ELEMENT twConstListItem (twConstName, twNotMet?, twReqVal?, twActVal?, twLogLvls?)>
<!ATTLIST twConstListItem twUnits (twTime | twFreq) "twTime">
<!ELEMENT twNotMet EMPTY>
<!ELEMENT twReqVal (#PCDATA)>
<!ELEMENT twActVal (#PCDATA)>
<!ELEMENT twConstSummaryTable (twConstStats|twConstSummary)*>
<!ATTLIST twConstSummaryTable twEmptyConstraints CDATA #IMPLIED>
<!ELEMENT twConstStats (twConstName)>
<!ATTLIST twConstStats twUnits (twTime | twFreq) "twTime">
<!ATTLIST twConstStats twRequired CDATA #IMPLIED>
<!ATTLIST twConstStats twActual CDATA #IMPLIED>
<!ATTLIST twConstStats twSlack CDATA #IMPLIED>
<!ATTLIST twConstStats twLogLvls CDATA #IMPLIED>
<!ATTLIST twConstStats twErrors CDATA #IMPLIED>
<!ATTLIST twConstStats twPCFIndex CDATA #IMPLIED>
<!ATTLIST twConstStats twAbsSlackIndex CDATA #IMPLIED>
<!ATTLIST twConstStats twTCType CDATA #IMPLIED>
<!ELEMENT twConstSummary (twConstName, twConstData?, twConstData*)>
<!ATTLIST twConstSummary PCFIndex CDATA #IMPLIED slackIndex CDATA #IMPLIED>
<!ELEMENT twConstData EMPTY>
<!ATTLIST twConstData type CDATA #IMPLIED units (MHz | ns) "ns" slack CDATA #IMPLIED
best CDATA #IMPLIED requested CDATA #IMPLIED
errors CDATA #IMPLIED
score CDATA #IMPLIED>
<!ELEMENT twTimeGrpRpt (twTimeGrp)*>
<!ELEMENT twTimeGrp (twTimeGrpName, twCompList?, twBELList?, twMacList?, twBlockList?, twSigList?, twPinList?)>
<!ELEMENT twTimeGrpName (#PCDATA)>
<!ELEMENT twCompList (twCompName+)>
<!ELEMENT twCompName (#PCDATA)>
<!ELEMENT twSigList (twSigName+)>
<!ELEMENT twSigName (#PCDATA)>
<!ELEMENT twBELList (twBELName+)>
<!ELEMENT twBELName (#PCDATA)>
<!ELEMENT twBlockList (twBlockName+)>
<!ELEMENT twBlockName (#PCDATA)>
<!ELEMENT twMacList (twMacName+)>
<!ELEMENT twMacName (#PCDATA)>
<!ELEMENT twPinList (twPinName+)>
<!ELEMENT twPinName (#PCDATA)>
<!ELEMENT twUnmetConstCnt (#PCDATA)>
<!ELEMENT twDataSheet (twSUH2ClkList*, (twClk2PadList|twClk2OutList)*, twClk2SUList*, twPad2PadList?, twOffsetTables?)>
<!ATTLIST twDataSheet twNameLen CDATA #REQUIRED>
<!ELEMENT twSUH2ClkList (twDest, twSUH2Clk+)>
<!ATTLIST twSUH2ClkList twDestWidth CDATA #IMPLIED>
<!ATTLIST twSUH2ClkList twPhaseWidth CDATA #IMPLIED>
<!ELEMENT twSUH2Clk (twSrc, twSUHTime, twSUHTime?)>
<!ELEMENT twSUHTime (twSU2ClkTime?,twH2ClkTime?)>
<!ATTLIST twSUHTime twInternalClk CDATA #IMPLIED>
<!ATTLIST twSUHTime twClkPhase CDATA #IMPLIED>
<!ELEMENT twSU2ClkTime (#PCDATA)>
<!ATTLIST twSU2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twH2ClkTime (#PCDATA)>
<!ATTLIST twH2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twClk2PadList (twSrc, twClk2Pad+)>
<!ELEMENT twClk2Pad (twDest, twTime)>
<!ELEMENT twTime (#PCDATA)>
<!ATTLIST twTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twClk2OutList (twSrc, twClk2Out+)>
<!ATTLIST twClk2OutList twDestWidth CDATA #REQUIRED>
<!ATTLIST twClk2OutList twPhaseWidth CDATA #REQUIRED>
<!ELEMENT twClk2Out EMPTY>
<!ATTLIST twClk2Out twOutPad CDATA #REQUIRED>
<!ATTLIST twClk2Out twMinTime CDATA #REQUIRED>
<!ATTLIST twClk2Out twMinEdge CDATA #REQUIRED>
<!ATTLIST twClk2Out twMaxTime CDATA #REQUIRED>
<!ATTLIST twClk2Out twMaxEdge CDATA #REQUIRED>
<!ATTLIST twClk2Out twInternalClk CDATA #REQUIRED>
<!ATTLIST twClk2Out twClkPhase CDATA #REQUIRED>
<!ELEMENT twClk2SUList (twDest, twClk2SU+)>
<!ATTLIST twClk2SUList twDestWidth CDATA #IMPLIED>
<!ELEMENT twClk2SU (twSrc, twRiseRise?, twFallRise?, twRiseFall?, twFallFall?)>
<!ELEMENT twRiseRise (#PCDATA)>
<!ELEMENT twFallRise (#PCDATA)>
<!ELEMENT twRiseFall (#PCDATA)>
<!ELEMENT twFallFall (#PCDATA)>
<!ELEMENT twPad2PadList (twPad2Pad+)>
<!ATTLIST twPad2PadList twSrcWidth CDATA #IMPLIED>
<!ATTLIST twPad2PadList twDestWidth CDATA #IMPLIED>
<!ELEMENT twPad2Pad (twSrc, twDest, twDel)>
<!ELEMENT twOffsetTables (twOffsetInTable*,twOffsetOutTable*)>
<!ELEMENT twOffsetInTable (twConstName, twOffInTblRow*)>
<!ATTLIST twOffsetInTable twDestWidth CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstWindow CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstSetup CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstHold CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstSetupSlack CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstHoldSlack CDATA #IMPLIED>
<!ELEMENT twOffsetOutTable (twConstName, twOffOutTblRow*)>
<!ATTLIST twOffsetOutTable twDestWidth CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twMinSlack CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twMaxSlack CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twRelSkew CDATA #IMPLIED>
<!ELEMENT twOffInTblRow (twSrc, twSUHSlackTime*)>
<!ELEMENT twSUHSlackTime (twSU2ClkTime?,twH2ClkTime?)>
<!ATTLIST twSUHSlackTime twSetupSlack CDATA #IMPLIED twHoldSlack CDATA #IMPLIED>
<!ELEMENT twOffOutTblRow EMPTY>
<!ATTLIST twOffOutTblRow twOutPad CDATA #IMPLIED>
<!ATTLIST twOffOutTblRow twSlack CDATA #IMPLIED>
<!ATTLIST twOffOutTblRow twRelSkew CDATA #IMPLIED>
<!ELEMENT twNonDedClks ((twWarn | twInfo), twNonDedClk+)>
<!ELEMENT twNonDedClk (#PCDATA)>
<!ELEMENT twSum ( twErrCnt, twScore, twConstCov, twStats)>
<!ELEMENT twScore (#PCDATA)>
<!ELEMENT twConstCov (twPathCnt, twNetCnt, twConnCnt, twPct?)>
<!ELEMENT twPathCnt (#PCDATA)>
<!ELEMENT twNetCnt (#PCDATA)>
<!ELEMENT twConnCnt (#PCDATA)>
<!ELEMENT twPct (#PCDATA)>
<!ELEMENT twStats ( twMinPer?, twFootnote?, twMaxFreq?, twMaxCombDel?, twMaxFromToDel?, twMaxNetDel?, twMaxNetSkew?, twMaxInAfterClk?, twMinInBeforeClk?, twMaxOutBeforeClk?, twMinOutAfterClk?, (twInfo | twWarn)*)>
<!ELEMENT twMaxCombDel (#PCDATA)>
<!ELEMENT twMaxFromToDel (#PCDATA)>
<!ELEMENT twMaxNetDel (#PCDATA)>
<!ELEMENT twMaxNetSkew (#PCDATA)>
<!ELEMENT twMaxInAfterClk (#PCDATA)>
<!ELEMENT twMinInBeforeClk (#PCDATA)>
<!ELEMENT twMaxOutBeforeClk (#PCDATA)>
<!ELEMENT twMinOutAfterClk (#PCDATA)>
<!ELEMENT twFoot (twFootnoteExplanation*, twTimestamp)>
<!ELEMENT twTimestamp (#PCDATA)>
<!ELEMENT twFootnoteExplanation EMPTY>
<!ATTLIST twFootnoteExplanation number CDATA #REQUIRED>
<!ATTLIST twFootnoteExplanation text CDATA #REQUIRED>
<!ELEMENT twClientInfo (twClientName, twAttrList?)>
<!ELEMENT twClientName (#PCDATA)>
<!ELEMENT twAttrList (twAttrListItem)*>
<!ELEMENT twAttrListItem (twName, twValue*)>
<!ELEMENT twName (#PCDATA)>
<!ELEMENT twValue (#PCDATA)>
]>
<twReport><twHead anchorID="1"><twExecVer>Release 14.7 Trace (nt64)</twExecVer><twCopyright>Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.</twCopyright><twCmdLine>G:\Xilinx\14.7\ISE_DS\ISE\bin\nt64\unwrapped\trce.exe -intstyle ise -v 3 -s 3
-n 3 -fastpaths -xml audio_process.twx audio_process.ncd -o audio_process.twr
audio_process.pcf -ucf ucf_file.ucf
</twCmdLine><twDesign>audio_process.ncd</twDesign><twDesignPath>audio_process.ncd</twDesignPath><twPCF>audio_process.pcf</twPCF><twPcfPath>audio_process.pcf</twPcfPath><twDevInfo arch="spartan6" pkg="csg324"><twDevName>xc6slx9</twDevName><twDevRange>C</twDevRange><twSpeedGrade>-3</twSpeedGrade><twSpeedVer>PRODUCTION 1.23 2013-10-13</twSpeedVer><twQuadDly>1</twQuadDly></twDevInfo><twRptInfo twRptLvl="twVerbose" twReportMinPaths="true" dlyHyperLnks="t" ><twEndptLimit>3</twEndptLimit></twRptInfo><twEnvVar name="NONE" description="No environment variables were set" /></twHead><twInfo anchorID="2">INFO:Timing:3412 - To improve timing, see the Timing Closure User Guide (UG612).</twInfo><twInfo anchorID="3">INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report.</twInfo><twInfo anchorID="4">INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model. For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet.</twInfo><twBody><twVerboseRpt><twConst anchorID="5" twConstType="PERIOD" ><twConstHead uID="1"><twConstName UCFConstName="PERIOD = 100MHZ |" ScopeName="">NET "clk_BUFGP/IBUFG" PERIOD = 10 ns HIGH 50%;</twConstName><twItemCnt>3903455</twItemCnt><twErrCntSetup>0</twErrCntSetup><twErrCntEndPt>0</twErrCntEndPt><twErrCntHold twRaceChecked="TRUE">0</twErrCntHold><twErrCntPinLimit>0</twErrCntPinLimit><twEndPtCnt>2848</twEndPtCnt><twPathErrCnt>0</twPathErrCnt><twMinPer>9.547</twMinPer></twConstHead><twPathRptBanner iPaths="112960" iCriticalPaths="0" sType="EndPoint">Paths for end point FREQ/max_reg_2 (SLICE_X7Y4.CE), 112960 paths
</twPathRptBanner><twPathRpt anchorID="6"><twConstPath anchorID="7" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>0.453</twSlack><twSrc BELType="FF">FFT/blk000001d1</twSrc><twDest BELType="FF">FREQ/max_reg_2</twDest><twTotPathDel>9.504</twTotPathDel><twClkSkew dest = "0.274" src = "0.282">0.008</twClkSkew><twDelConst>10.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="17" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>FFT/blk000001d1</twSrc><twDest BELType='FF'>FREQ/max_reg_2</twDest><twLogLvls>4</twLogLvls><twSrcSite>SLICE_X9Y3.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X9Y3.CMUX</twSite><twDelType>Tshcko</twDelType><twDelInfo twEdge="twRising">0.461</twDelInfo><twComp>fft_im<7></twComp><twBEL>FFT/blk000001d1</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y0.A4</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.762</twDelInfo><twComp>fft_im<4></twComp></twPathDel><twPathDel><twSite>DSP48_X0Y0.PCOUT9</twSite><twDelType>Tdspdo_A_PCOUT</twDelType><twDelInfo twEdge="twRising">3.359</twDelInfo><twComp>FREQ/Mmult_n0115</twComp><twBEL>FREQ/Mmult_n0115</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y1.PCIN9</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.002</twDelInfo><twComp>FREQ/Mmult_n0115_PCOUT_to_Maddsub_n0114_PCIN_9</twComp></twPathDel><twPathDel><twSite>DSP48_X0Y1.P16</twSite><twDelType>Tdspdo_PCIN_P</twDelType><twDelInfo twEdge="twRising">2.264</twDelInfo><twComp>FREQ/Maddsub_n0114</twComp><twBEL>FREQ/Maddsub_n0114</twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y6.A5</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">1.130</twDelInfo><twComp>FREQ/max_val<16></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y6.COUT</twSite><twDelType>Topcya</twDelType><twDelInfo twEdge="twRising">0.409</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp><twBEL>FREQ/Mcompar_n0016_lutdi8</twBEL><twBEL>FREQ/Mcompar_n0016_cy<11></twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y7.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.003</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y7.DMUX</twSite><twDelType>Tcind</twDelType><twDelInfo twEdge="twRising">0.235</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp><twBEL>FREQ/Mcompar_n0016_cy<15></twBEL></twPathDel><twPathDel><twSite>SLICE_X7Y4.CE</twSite><twDelType>net</twDelType><twFanCnt>9</twFanCnt><twDelInfo twEdge="twRising">0.539</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp></twPathDel><twPathDel><twSite>SLICE_X7Y4.CLK</twSite><twDelType>Tceck</twDelType><twDelInfo twEdge="twRising">0.340</twDelInfo><twComp>FREQ/max_reg<3></twComp><twBEL>FREQ/max_reg_2</twBEL></twPathDel><twLogDel>7.068</twLogDel><twRouteDel>2.436</twRouteDel><twTotDel>9.504</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="10.000">clk_BUFGP</twDestClk><twPctLog>74.4</twPctLog><twPctRoute>25.6</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="8"><twConstPath anchorID="9" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>0.453</twSlack><twSrc BELType="FF">FFT/blk000001cf</twSrc><twDest BELType="FF">FREQ/max_reg_2</twDest><twTotPathDel>9.504</twTotPathDel><twClkSkew dest = "0.274" src = "0.282">0.008</twClkSkew><twDelConst>10.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="17" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>FFT/blk000001cf</twSrc><twDest BELType='FF'>FREQ/max_reg_2</twDest><twLogLvls>4</twLogLvls><twSrcSite>SLICE_X9Y3.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X9Y3.DMUX</twSite><twDelType>Tshcko</twDelType><twDelInfo twEdge="twRising">0.461</twDelInfo><twComp>fft_im<7></twComp><twBEL>FFT/blk000001cf</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y0.A6</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.762</twDelInfo><twComp>fft_im<6></twComp></twPathDel><twPathDel><twSite>DSP48_X0Y0.PCOUT9</twSite><twDelType>Tdspdo_A_PCOUT</twDelType><twDelInfo twEdge="twRising">3.359</twDelInfo><twComp>FREQ/Mmult_n0115</twComp><twBEL>FREQ/Mmult_n0115</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y1.PCIN9</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.002</twDelInfo><twComp>FREQ/Mmult_n0115_PCOUT_to_Maddsub_n0114_PCIN_9</twComp></twPathDel><twPathDel><twSite>DSP48_X0Y1.P16</twSite><twDelType>Tdspdo_PCIN_P</twDelType><twDelInfo twEdge="twRising">2.264</twDelInfo><twComp>FREQ/Maddsub_n0114</twComp><twBEL>FREQ/Maddsub_n0114</twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y6.A5</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">1.130</twDelInfo><twComp>FREQ/max_val<16></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y6.COUT</twSite><twDelType>Topcya</twDelType><twDelInfo twEdge="twRising">0.409</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp><twBEL>FREQ/Mcompar_n0016_lutdi8</twBEL><twBEL>FREQ/Mcompar_n0016_cy<11></twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y7.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.003</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y7.DMUX</twSite><twDelType>Tcind</twDelType><twDelInfo twEdge="twRising">0.235</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp><twBEL>FREQ/Mcompar_n0016_cy<15></twBEL></twPathDel><twPathDel><twSite>SLICE_X7Y4.CE</twSite><twDelType>net</twDelType><twFanCnt>9</twFanCnt><twDelInfo twEdge="twRising">0.539</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp></twPathDel><twPathDel><twSite>SLICE_X7Y4.CLK</twSite><twDelType>Tceck</twDelType><twDelInfo twEdge="twRising">0.340</twDelInfo><twComp>FREQ/max_reg<3></twComp><twBEL>FREQ/max_reg_2</twBEL></twPathDel><twLogDel>7.068</twLogDel><twRouteDel>2.436</twRouteDel><twTotDel>9.504</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="10.000">clk_BUFGP</twDestClk><twPctLog>74.4</twPctLog><twPctRoute>25.6</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="10"><twConstPath anchorID="11" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>0.453</twSlack><twSrc BELType="FF">FFT/blk000001cf</twSrc><twDest BELType="FF">FREQ/max_reg_2</twDest><twTotPathDel>9.504</twTotPathDel><twClkSkew dest = "0.274" src = "0.282">0.008</twClkSkew><twDelConst>10.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="17" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>FFT/blk000001cf</twSrc><twDest BELType='FF'>FREQ/max_reg_2</twDest><twLogLvls>4</twLogLvls><twSrcSite>SLICE_X9Y3.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X9Y3.DMUX</twSite><twDelType>Tshcko</twDelType><twDelInfo twEdge="twRising">0.461</twDelInfo><twComp>fft_im<7></twComp><twBEL>FFT/blk000001cf</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y0.A6</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.762</twDelInfo><twComp>fft_im<6></twComp></twPathDel><twPathDel><twSite>DSP48_X0Y0.PCOUT0</twSite><twDelType>Tdspdo_A_PCOUT</twDelType><twDelInfo twEdge="twRising">3.359</twDelInfo><twComp>FREQ/Mmult_n0115</twComp><twBEL>FREQ/Mmult_n0115</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y1.PCIN0</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.002</twDelInfo><twComp>FREQ/Mmult_n0115_PCOUT_to_Maddsub_n0114_PCIN_0</twComp></twPathDel><twPathDel><twSite>DSP48_X0Y1.P16</twSite><twDelType>Tdspdo_PCIN_P</twDelType><twDelInfo twEdge="twRising">2.264</twDelInfo><twComp>FREQ/Maddsub_n0114</twComp><twBEL>FREQ/Maddsub_n0114</twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y6.A5</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">1.130</twDelInfo><twComp>FREQ/max_val<16></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y6.COUT</twSite><twDelType>Topcya</twDelType><twDelInfo twEdge="twRising">0.409</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp><twBEL>FREQ/Mcompar_n0016_lutdi8</twBEL><twBEL>FREQ/Mcompar_n0016_cy<11></twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y7.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.003</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y7.DMUX</twSite><twDelType>Tcind</twDelType><twDelInfo twEdge="twRising">0.235</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp><twBEL>FREQ/Mcompar_n0016_cy<15></twBEL></twPathDel><twPathDel><twSite>SLICE_X7Y4.CE</twSite><twDelType>net</twDelType><twFanCnt>9</twFanCnt><twDelInfo twEdge="twRising">0.539</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp></twPathDel><twPathDel><twSite>SLICE_X7Y4.CLK</twSite><twDelType>Tceck</twDelType><twDelInfo twEdge="twRising">0.340</twDelInfo><twComp>FREQ/max_reg<3></twComp><twBEL>FREQ/max_reg_2</twBEL></twPathDel><twLogDel>7.068</twLogDel><twRouteDel>2.436</twRouteDel><twTotDel>9.504</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="10.000">clk_BUFGP</twDestClk><twPctLog>74.4</twPctLog><twPctRoute>25.6</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="112960" iCriticalPaths="0" sType="EndPoint">Paths for end point FREQ/max_reg_1 (SLICE_X7Y4.CE), 112960 paths
</twPathRptBanner><twPathRpt anchorID="12"><twConstPath anchorID="13" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>0.469</twSlack><twSrc BELType="FF">FFT/blk000001d1</twSrc><twDest BELType="FF">FREQ/max_reg_1</twDest><twTotPathDel>9.488</twTotPathDel><twClkSkew dest = "0.274" src = "0.282">0.008</twClkSkew><twDelConst>10.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="17" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>FFT/blk000001d1</twSrc><twDest BELType='FF'>FREQ/max_reg_1</twDest><twLogLvls>4</twLogLvls><twSrcSite>SLICE_X9Y3.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X9Y3.CMUX</twSite><twDelType>Tshcko</twDelType><twDelInfo twEdge="twRising">0.461</twDelInfo><twComp>fft_im<7></twComp><twBEL>FFT/blk000001d1</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y0.A4</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.762</twDelInfo><twComp>fft_im<4></twComp></twPathDel><twPathDel><twSite>DSP48_X0Y0.PCOUT9</twSite><twDelType>Tdspdo_A_PCOUT</twDelType><twDelInfo twEdge="twRising">3.359</twDelInfo><twComp>FREQ/Mmult_n0115</twComp><twBEL>FREQ/Mmult_n0115</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y1.PCIN9</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.002</twDelInfo><twComp>FREQ/Mmult_n0115_PCOUT_to_Maddsub_n0114_PCIN_9</twComp></twPathDel><twPathDel><twSite>DSP48_X0Y1.P16</twSite><twDelType>Tdspdo_PCIN_P</twDelType><twDelInfo twEdge="twRising">2.264</twDelInfo><twComp>FREQ/Maddsub_n0114</twComp><twBEL>FREQ/Maddsub_n0114</twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y6.A5</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">1.130</twDelInfo><twComp>FREQ/max_val<16></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y6.COUT</twSite><twDelType>Topcya</twDelType><twDelInfo twEdge="twRising">0.409</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp><twBEL>FREQ/Mcompar_n0016_lutdi8</twBEL><twBEL>FREQ/Mcompar_n0016_cy<11></twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y7.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.003</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y7.DMUX</twSite><twDelType>Tcind</twDelType><twDelInfo twEdge="twRising">0.235</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp><twBEL>FREQ/Mcompar_n0016_cy<15></twBEL></twPathDel><twPathDel><twSite>SLICE_X7Y4.CE</twSite><twDelType>net</twDelType><twFanCnt>9</twFanCnt><twDelInfo twEdge="twRising">0.539</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp></twPathDel><twPathDel><twSite>SLICE_X7Y4.CLK</twSite><twDelType>Tceck</twDelType><twDelInfo twEdge="twRising">0.324</twDelInfo><twComp>FREQ/max_reg<3></twComp><twBEL>FREQ/max_reg_1</twBEL></twPathDel><twLogDel>7.052</twLogDel><twRouteDel>2.436</twRouteDel><twTotDel>9.488</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="10.000">clk_BUFGP</twDestClk><twPctLog>74.3</twPctLog><twPctRoute>25.7</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="14"><twConstPath anchorID="15" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>0.469</twSlack><twSrc BELType="FF">FFT/blk000001cf</twSrc><twDest BELType="FF">FREQ/max_reg_1</twDest><twTotPathDel>9.488</twTotPathDel><twClkSkew dest = "0.274" src = "0.282">0.008</twClkSkew><twDelConst>10.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="17" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>FFT/blk000001cf</twSrc><twDest BELType='FF'>FREQ/max_reg_1</twDest><twLogLvls>4</twLogLvls><twSrcSite>SLICE_X9Y3.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X9Y3.DMUX</twSite><twDelType>Tshcko</twDelType><twDelInfo twEdge="twRising">0.461</twDelInfo><twComp>fft_im<7></twComp><twBEL>FFT/blk000001cf</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y0.A6</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.762</twDelInfo><twComp>fft_im<6></twComp></twPathDel><twPathDel><twSite>DSP48_X0Y0.PCOUT9</twSite><twDelType>Tdspdo_A_PCOUT</twDelType><twDelInfo twEdge="twRising">3.359</twDelInfo><twComp>FREQ/Mmult_n0115</twComp><twBEL>FREQ/Mmult_n0115</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y1.PCIN9</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.002</twDelInfo><twComp>FREQ/Mmult_n0115_PCOUT_to_Maddsub_n0114_PCIN_9</twComp></twPathDel><twPathDel><twSite>DSP48_X0Y1.P16</twSite><twDelType>Tdspdo_PCIN_P</twDelType><twDelInfo twEdge="twRising">2.264</twDelInfo><twComp>FREQ/Maddsub_n0114</twComp><twBEL>FREQ/Maddsub_n0114</twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y6.A5</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">1.130</twDelInfo><twComp>FREQ/max_val<16></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y6.COUT</twSite><twDelType>Topcya</twDelType><twDelInfo twEdge="twRising">0.409</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp><twBEL>FREQ/Mcompar_n0016_lutdi8</twBEL><twBEL>FREQ/Mcompar_n0016_cy<11></twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y7.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.003</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y7.DMUX</twSite><twDelType>Tcind</twDelType><twDelInfo twEdge="twRising">0.235</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp><twBEL>FREQ/Mcompar_n0016_cy<15></twBEL></twPathDel><twPathDel><twSite>SLICE_X7Y4.CE</twSite><twDelType>net</twDelType><twFanCnt>9</twFanCnt><twDelInfo twEdge="twRising">0.539</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp></twPathDel><twPathDel><twSite>SLICE_X7Y4.CLK</twSite><twDelType>Tceck</twDelType><twDelInfo twEdge="twRising">0.324</twDelInfo><twComp>FREQ/max_reg<3></twComp><twBEL>FREQ/max_reg_1</twBEL></twPathDel><twLogDel>7.052</twLogDel><twRouteDel>2.436</twRouteDel><twTotDel>9.488</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="10.000">clk_BUFGP</twDestClk><twPctLog>74.3</twPctLog><twPctRoute>25.7</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="16"><twConstPath anchorID="17" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>0.469</twSlack><twSrc BELType="FF">FFT/blk000001cf</twSrc><twDest BELType="FF">FREQ/max_reg_1</twDest><twTotPathDel>9.488</twTotPathDel><twClkSkew dest = "0.274" src = "0.282">0.008</twClkSkew><twDelConst>10.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="17" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>FFT/blk000001cf</twSrc><twDest BELType='FF'>FREQ/max_reg_1</twDest><twLogLvls>4</twLogLvls><twSrcSite>SLICE_X9Y3.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X9Y3.DMUX</twSite><twDelType>Tshcko</twDelType><twDelInfo twEdge="twRising">0.461</twDelInfo><twComp>fft_im<7></twComp><twBEL>FFT/blk000001cf</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y0.A6</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.762</twDelInfo><twComp>fft_im<6></twComp></twPathDel><twPathDel><twSite>DSP48_X0Y0.PCOUT0</twSite><twDelType>Tdspdo_A_PCOUT</twDelType><twDelInfo twEdge="twRising">3.359</twDelInfo><twComp>FREQ/Mmult_n0115</twComp><twBEL>FREQ/Mmult_n0115</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y1.PCIN0</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.002</twDelInfo><twComp>FREQ/Mmult_n0115_PCOUT_to_Maddsub_n0114_PCIN_0</twComp></twPathDel><twPathDel><twSite>DSP48_X0Y1.P16</twSite><twDelType>Tdspdo_PCIN_P</twDelType><twDelInfo twEdge="twRising">2.264</twDelInfo><twComp>FREQ/Maddsub_n0114</twComp><twBEL>FREQ/Maddsub_n0114</twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y6.A5</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">1.130</twDelInfo><twComp>FREQ/max_val<16></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y6.COUT</twSite><twDelType>Topcya</twDelType><twDelInfo twEdge="twRising">0.409</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp><twBEL>FREQ/Mcompar_n0016_lutdi8</twBEL><twBEL>FREQ/Mcompar_n0016_cy<11></twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y7.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.003</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y7.DMUX</twSite><twDelType>Tcind</twDelType><twDelInfo twEdge="twRising">0.235</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp><twBEL>FREQ/Mcompar_n0016_cy<15></twBEL></twPathDel><twPathDel><twSite>SLICE_X7Y4.CE</twSite><twDelType>net</twDelType><twFanCnt>9</twFanCnt><twDelInfo twEdge="twRising">0.539</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp></twPathDel><twPathDel><twSite>SLICE_X7Y4.CLK</twSite><twDelType>Tceck</twDelType><twDelInfo twEdge="twRising">0.324</twDelInfo><twComp>FREQ/max_reg<3></twComp><twBEL>FREQ/max_reg_1</twBEL></twPathDel><twLogDel>7.052</twLogDel><twRouteDel>2.436</twRouteDel><twTotDel>9.488</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="10.000">clk_BUFGP</twDestClk><twPctLog>74.3</twPctLog><twPctRoute>25.7</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="112960" iCriticalPaths="0" sType="EndPoint">Paths for end point FREQ/Mmult_n01161 (DSP48_X0Y3.CEA), 112960 paths
</twPathRptBanner><twPathRpt anchorID="18"><twConstPath anchorID="19" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>0.473</twSlack><twSrc BELType="FF">FFT/blk000001d1</twSrc><twDest BELType="DSP">FREQ/Mmult_n01161</twDest><twTotPathDel>9.487</twTotPathDel><twClkSkew dest = "0.277" src = "0.282">0.005</twClkSkew><twDelConst>10.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="17" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>FFT/blk000001d1</twSrc><twDest BELType='DSP'>FREQ/Mmult_n01161</twDest><twLogLvls>4</twLogLvls><twSrcSite>SLICE_X9Y3.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X9Y3.CMUX</twSite><twDelType>Tshcko</twDelType><twDelInfo twEdge="twRising">0.461</twDelInfo><twComp>fft_im<7></twComp><twBEL>FFT/blk000001d1</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y0.A4</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.762</twDelInfo><twComp>fft_im<4></twComp></twPathDel><twPathDel><twSite>DSP48_X0Y0.PCOUT9</twSite><twDelType>Tdspdo_A_PCOUT</twDelType><twDelInfo twEdge="twRising">3.359</twDelInfo><twComp>FREQ/Mmult_n0115</twComp><twBEL>FREQ/Mmult_n0115</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y1.PCIN9</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.002</twDelInfo><twComp>FREQ/Mmult_n0115_PCOUT_to_Maddsub_n0114_PCIN_9</twComp></twPathDel><twPathDel><twSite>DSP48_X0Y1.P16</twSite><twDelType>Tdspdo_PCIN_P</twDelType><twDelInfo twEdge="twRising">2.264</twDelInfo><twComp>FREQ/Maddsub_n0114</twComp><twBEL>FREQ/Maddsub_n0114</twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y6.A5</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">1.130</twDelInfo><twComp>FREQ/max_val<16></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y6.COUT</twSite><twDelType>Topcya</twDelType><twDelInfo twEdge="twRising">0.409</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp><twBEL>FREQ/Mcompar_n0016_lutdi8</twBEL><twBEL>FREQ/Mcompar_n0016_cy<11></twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y7.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.003</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y7.DMUX</twSite><twDelType>Tcind</twDelType><twDelInfo twEdge="twRising">0.235</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp><twBEL>FREQ/Mcompar_n0016_cy<15></twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y3.CEA</twSite><twDelType>net</twDelType><twFanCnt>9</twFanCnt><twDelInfo twEdge="twRising">0.832</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp></twPathDel><twPathDel><twSite>DSP48_X0Y3.CLK</twSite><twDelType>Tdspdck_CEA_A1REG</twDelType><twDelInfo twEdge="twRising">0.030</twDelInfo><twComp>FREQ/Mmult_n01161</twComp><twBEL>FREQ/Mmult_n01161</twBEL></twPathDel><twLogDel>6.758</twLogDel><twRouteDel>2.729</twRouteDel><twTotDel>9.487</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="10.000">clk_BUFGP</twDestClk><twPctLog>71.2</twPctLog><twPctRoute>28.8</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="20"><twConstPath anchorID="21" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>0.473</twSlack><twSrc BELType="FF">FFT/blk000001cf</twSrc><twDest BELType="DSP">FREQ/Mmult_n01161</twDest><twTotPathDel>9.487</twTotPathDel><twClkSkew dest = "0.277" src = "0.282">0.005</twClkSkew><twDelConst>10.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="17" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>FFT/blk000001cf</twSrc><twDest BELType='DSP'>FREQ/Mmult_n01161</twDest><twLogLvls>4</twLogLvls><twSrcSite>SLICE_X9Y3.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X9Y3.DMUX</twSite><twDelType>Tshcko</twDelType><twDelInfo twEdge="twRising">0.461</twDelInfo><twComp>fft_im<7></twComp><twBEL>FFT/blk000001cf</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y0.A6</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.762</twDelInfo><twComp>fft_im<6></twComp></twPathDel><twPathDel><twSite>DSP48_X0Y0.PCOUT9</twSite><twDelType>Tdspdo_A_PCOUT</twDelType><twDelInfo twEdge="twRising">3.359</twDelInfo><twComp>FREQ/Mmult_n0115</twComp><twBEL>FREQ/Mmult_n0115</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y1.PCIN9</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.002</twDelInfo><twComp>FREQ/Mmult_n0115_PCOUT_to_Maddsub_n0114_PCIN_9</twComp></twPathDel><twPathDel><twSite>DSP48_X0Y1.P16</twSite><twDelType>Tdspdo_PCIN_P</twDelType><twDelInfo twEdge="twRising">2.264</twDelInfo><twComp>FREQ/Maddsub_n0114</twComp><twBEL>FREQ/Maddsub_n0114</twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y6.A5</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">1.130</twDelInfo><twComp>FREQ/max_val<16></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y6.COUT</twSite><twDelType>Topcya</twDelType><twDelInfo twEdge="twRising">0.409</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp><twBEL>FREQ/Mcompar_n0016_lutdi8</twBEL><twBEL>FREQ/Mcompar_n0016_cy<11></twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y7.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.003</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y7.DMUX</twSite><twDelType>Tcind</twDelType><twDelInfo twEdge="twRising">0.235</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp><twBEL>FREQ/Mcompar_n0016_cy<15></twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y3.CEA</twSite><twDelType>net</twDelType><twFanCnt>9</twFanCnt><twDelInfo twEdge="twRising">0.832</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp></twPathDel><twPathDel><twSite>DSP48_X0Y3.CLK</twSite><twDelType>Tdspdck_CEA_A1REG</twDelType><twDelInfo twEdge="twRising">0.030</twDelInfo><twComp>FREQ/Mmult_n01161</twComp><twBEL>FREQ/Mmult_n01161</twBEL></twPathDel><twLogDel>6.758</twLogDel><twRouteDel>2.729</twRouteDel><twTotDel>9.487</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="10.000">clk_BUFGP</twDestClk><twPctLog>71.2</twPctLog><twPctRoute>28.8</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="22"><twConstPath anchorID="23" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>0.473</twSlack><twSrc BELType="FF">FFT/blk000001cf</twSrc><twDest BELType="DSP">FREQ/Mmult_n01161</twDest><twTotPathDel>9.487</twTotPathDel><twClkSkew dest = "0.277" src = "0.282">0.005</twClkSkew><twDelConst>10.000</twDelConst><twClkUncert fSysJit="0.070" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE">0.035</twClkUncert><twDetPath maxSiteLen="17" twPathCritProcCorner=" at Slow Process Corner"><twSrc BELType='FF'>FFT/blk000001cf</twSrc><twDest BELType='DSP'>FREQ/Mmult_n01161</twDest><twLogLvls>4</twLogLvls><twSrcSite>SLICE_X9Y3.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X9Y3.DMUX</twSite><twDelType>Tshcko</twDelType><twDelInfo twEdge="twRising">0.461</twDelInfo><twComp>fft_im<7></twComp><twBEL>FFT/blk000001cf</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y0.A6</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.762</twDelInfo><twComp>fft_im<6></twComp></twPathDel><twPathDel><twSite>DSP48_X0Y0.PCOUT0</twSite><twDelType>Tdspdo_A_PCOUT</twDelType><twDelInfo twEdge="twRising">3.359</twDelInfo><twComp>FREQ/Mmult_n0115</twComp><twBEL>FREQ/Mmult_n0115</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y1.PCIN0</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.002</twDelInfo><twComp>FREQ/Mmult_n0115_PCOUT_to_Maddsub_n0114_PCIN_0</twComp></twPathDel><twPathDel><twSite>DSP48_X0Y1.P16</twSite><twDelType>Tdspdo_PCIN_P</twDelType><twDelInfo twEdge="twRising">2.264</twDelInfo><twComp>FREQ/Maddsub_n0114</twComp><twBEL>FREQ/Maddsub_n0114</twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y6.A5</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">1.130</twDelInfo><twComp>FREQ/max_val<16></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y6.COUT</twSite><twDelType>Topcya</twDelType><twDelInfo twEdge="twRising">0.409</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp><twBEL>FREQ/Mcompar_n0016_lutdi8</twBEL><twBEL>FREQ/Mcompar_n0016_cy<11></twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y7.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.003</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<11></twComp></twPathDel><twPathDel><twSite>SLICE_X6Y7.DMUX</twSite><twDelType>Tcind</twDelType><twDelInfo twEdge="twRising">0.235</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp><twBEL>FREQ/Mcompar_n0016_cy<15></twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y3.CEA</twSite><twDelType>net</twDelType><twFanCnt>9</twFanCnt><twDelInfo twEdge="twRising">0.832</twDelInfo><twComp>FREQ/Mcompar_n0016_cy<15></twComp></twPathDel><twPathDel><twSite>DSP48_X0Y3.CLK</twSite><twDelType>Tdspdck_CEA_A1REG</twDelType><twDelInfo twEdge="twRising">0.030</twDelInfo><twComp>FREQ/Mmult_n01161</twComp><twBEL>FREQ/Mmult_n01161</twBEL></twPathDel><twLogDel>6.758</twLogDel><twRouteDel>2.729</twRouteDel><twTotDel>9.487</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="10.000">clk_BUFGP</twDestClk><twPctLog>71.2</twPctLog><twPctRoute>28.8</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner sType="PathClass">Hold Paths: NET "clk_BUFGP/IBUFG" PERIOD = 10 ns HIGH 50%;
</twPathRptBanner><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point FREQ/Mmult_n01161 (DSP48_X0Y3.A0), 1 path
</twPathRptBanner><twPathRpt anchorID="24"><twConstPath anchorID="25" twDataPathType="twDataPathMinDelay" constType="period"><twSlack>0.297</twSlack><twSrc BELType="FF">FREQ/count_reg_17</twSrc><twDest BELType="DSP">FREQ/Mmult_n01161</twDest><twTotPathDel>0.299</twTotPathDel><twClkSkew dest = "0.112" src = "0.110">-0.002</twClkSkew><twDelConst>0.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="14" twPathCritProcCorner=" at Fast Process Corner"><twSrc BELType='FF'>FREQ/count_reg_17</twSrc><twDest BELType='DSP'>FREQ/Mmult_n01161</twDest><twLogLvls>0</twLogLvls><twSrcSite>SLICE_X6Y14.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="10.000">clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X6Y14.BQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twFalling">0.200</twDelInfo><twComp>FREQ/count_reg<19></twComp><twBEL>FREQ/count_reg_17</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y3.A0</twSite><twDelType>net</twDelType><twFanCnt>3</twFanCnt><twDelInfo twEdge="twFalling">0.136</twDelInfo><twComp>FREQ/count_reg<17></twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>DSP48_X0Y3.CLK</twSite><twDelType>Tdspckd_A_A1REG</twDelType><twDelInfo twEdge="twFalling">-0.037</twDelInfo><twComp>FREQ/Mmult_n01161</twComp><twBEL>FREQ/Mmult_n01161</twBEL></twPathDel><twLogDel>0.163</twLogDel><twRouteDel>0.136</twRouteDel><twTotDel>0.299</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="10.000">clk_BUFGP</twDestClk><twPctLog>54.5</twPctLog><twPctRoute>45.5</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point FREQ/Mmult_n01161 (DSP48_X0Y3.A5), 1 path
</twPathRptBanner><twPathRpt anchorID="26"><twConstPath anchorID="27" twDataPathType="twDataPathMinDelay" constType="period"><twSlack>0.297</twSlack><twSrc BELType="FF">FREQ/count_reg_22</twSrc><twDest BELType="DSP">FREQ/Mmult_n01161</twDest><twTotPathDel>0.299</twTotPathDel><twClkSkew dest = "0.112" src = "0.110">-0.002</twClkSkew><twDelConst>0.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="14" twPathCritProcCorner=" at Fast Process Corner"><twSrc BELType='FF'>FREQ/count_reg_22</twSrc><twDest BELType='DSP'>FREQ/Mmult_n01161</twDest><twLogLvls>0</twLogLvls><twSrcSite>SLICE_X6Y15.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="10.000">clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X6Y15.CQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twFalling">0.200</twDelInfo><twComp>FREQ/count_reg<23></twComp><twBEL>FREQ/count_reg_22</twBEL></twPathDel><twPathDel><twSite>DSP48_X0Y3.A5</twSite><twDelType>net</twDelType><twFanCnt>3</twFanCnt><twDelInfo twEdge="twFalling">0.136</twDelInfo><twComp>FREQ/count_reg<22></twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>DSP48_X0Y3.CLK</twSite><twDelType>Tdspckd_A_A1REG</twDelType><twDelInfo twEdge="twFalling">-0.037</twDelInfo><twComp>FREQ/Mmult_n01161</twComp><twBEL>FREQ/Mmult_n01161</twBEL></twPathDel><twLogDel>0.163</twLogDel><twRouteDel>0.136</twRouteDel><twTotDel>0.299</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="10.000">clk_BUFGP</twDestClk><twPctLog>54.5</twPctLog><twPctRoute>45.5</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point FFT/blk0000019d/blk000001b1 (RAMB16_X1Y10.DIA13), 1 path
</twPathRptBanner><twPathRpt anchorID="28"><twConstPath anchorID="29" twDataPathType="twDataPathMinDelay" constType="period"><twSlack>0.301</twSlack><twSrc BELType="FF">FFT/blk0000002d</twSrc><twDest BELType="RAM">FFT/blk0000019d/blk000001b1</twDest><twTotPathDel>0.302</twTotPathDel><twClkSkew dest = "0.070" src = "0.069">-0.001</twClkSkew><twDelConst>0.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="18" twPathCritProcCorner=" at Fast Process Corner"><twSrc BELType='FF'>FFT/blk0000002d</twSrc><twDest BELType='RAM'>FFT/blk0000019d/blk000001b1</twDest><twLogLvls>0</twLogLvls><twSrcSite>SLICE_X17Y20.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="10.000">clk_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X17Y20.DQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twFalling">0.198</twDelInfo><twComp>FFT/sig000000ab</twComp><twBEL>FFT/blk0000002d</twBEL></twPathDel><twPathDel><twSite>RAMB16_X1Y10.DIA13</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twFalling">0.157</twDelInfo><twComp>FFT/sig000000ab</twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>RAMB16_X1Y10.CLKA</twSite><twDelType>Trckd_DIA</twDelType><twDelInfo twEdge="twFalling">-0.053</twDelInfo><twComp>FFT/blk0000019d/blk000001b1</twComp><twBEL>FFT/blk0000019d/blk000001b1</twBEL></twPathDel><twLogDel>0.145</twLogDel><twRouteDel>0.157</twRouteDel><twTotDel>0.302</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="10.000">clk_BUFGP</twDestClk><twPctLog>48.0</twPctLog><twPctRoute>52.0</twPctRoute></twDetPath></twConstPath></twPathRpt><twPinLimitRpt anchorID="30"><twPinLimitBanner>Component Switching Limit Checks: NET "clk_BUFGP/IBUFG" PERIOD = 10 ns HIGH 50%;</twPinLimitBanner><twPinLimit anchorID="31" type="MINPERIOD" name="Trper_CLKA" slack="6.876" period="10.000" constraintValue="10.000" deviceLimit="3.124" freqLimit="320.102" physResource="FFT/blk000006c3/CLKAWRCLK" logResource="FFT/blk000006c3/CLKAWRCLK" locationPin="RAMB8_X1Y18.CLKAWRCLK" clockNet="clk_BUFGP"/><twPinLimit anchorID="32" type="MINPERIOD" name="Trper_CLKB" slack="6.876" period="10.000" constraintValue="10.000" deviceLimit="3.124" freqLimit="320.102" physResource="FFT/blk000006c3/CLKBRDCLK" logResource="FFT/blk000006c3/CLKBRDCLK" locationPin="RAMB8_X1Y18.CLKBRDCLK" clockNet="clk_BUFGP"/><twPinLimit anchorID="33" type="MINPERIOD" name="Trper_CLKA(Fmax)" slack="6.876" period="10.000" constraintValue="10.000" deviceLimit="3.124" freqLimit="320.102" physResource="FFT/blk0000019d/blk000001b1/CLKA" logResource="FFT/blk0000019d/blk000001b1/CLKA" locationPin="RAMB16_X1Y10.CLKA" clockNet="clk_BUFGP"/></twPinLimitRpt></twConst><twUnmetConstCnt anchorID="34">0</twUnmetConstCnt><twDataSheet anchorID="35" twNameLen="15"><twClk2SUList anchorID="36" twDestWidth="3"><twDest>clk</twDest><twClk2SU><twSrc>clk</twSrc><twRiseRise>9.547</twRiseRise></twClk2SU></twClk2SUList><twOffsetTables></twOffsetTables></twDataSheet></twVerboseRpt></twBody><twSum anchorID="37"><twErrCnt>0</twErrCnt><twScore>0</twScore><twSetupScore>0</twSetupScore><twHoldScore>0</twHoldScore><twConstCov><twPathCnt>3903455</twPathCnt><twNetCnt>0</twNetCnt><twConnCnt>2701</twConnCnt></twConstCov><twStats anchorID="38"><twMinPer>9.547</twMinPer><twFootnote number="1" /><twMaxFreq>104.745</twMaxFreq></twStats></twSum><twFoot><twFootnoteExplanation number="1" text="The minimum period statistic assumes all single cycle delays."></twFootnoteExplanation><twTimestamp>Sat Mar 12 12:46:13 2016 </twTimestamp></twFoot><twClientInfo anchorID="39"><twClientName>Trace</twClientName><twAttrList><twAttrListItem><twName>Trace Settings</twName><twValue>
Peak Memory Usage: 258 MB
</twValue></twAttrListItem></twAttrList></twClientInfo></twReport>