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cargo fmt --all
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elliott10 committed Mar 10, 2024
1 parent d462556 commit 1c22b01
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Showing 6 changed files with 28 additions and 13 deletions.
11 changes: 7 additions & 4 deletions crates/of/src/kernel_nodes.rs
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
use fdt::standard_nodes::MemoryRegion;
use crate::parsing::BigEndianU32;
use fdt::standard_nodes::MemoryRegion;

#[derive(Clone, Copy)]
pub struct Memory {
Expand All @@ -8,7 +8,7 @@ pub struct Memory {

impl Memory {
/// Returns an iterator over all of the available memory regions
pub fn regions(self) -> impl Iterator<Item = MemoryRegion> +'static {
pub fn regions(self) -> impl Iterator<Item = MemoryRegion> + 'static {
self.node.reg().unwrap()
}
}
Expand All @@ -29,7 +29,11 @@ impl Pcsi {
self.node
.properties()
.find(|p| p.name == "method")
.and_then(|p| core::str::from_utf8(p.value).map(|s| s.trim_end_matches('\0')).ok())
.and_then(|p| {
core::str::from_utf8(p.value)
.map(|s| s.trim_end_matches('\0'))
.ok()
})
.unwrap()
}
/// Optional`cpu_suspend` property
Expand Down Expand Up @@ -64,4 +68,3 @@ impl Pcsi {
.map(|p| BigEndianU32::from_bytes(p.value).unwrap().get())
}
}

5 changes: 3 additions & 2 deletions crates/of/src/parsing.rs
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,8 @@ impl BigEndianU32 {
}

pub(crate) fn from_bytes(bytes: &[u8]) -> Option<Self> {
Some(BigEndianU32(u32::from_be_bytes(bytes.get(..4)?.try_into().unwrap())))
Some(BigEndianU32(u32::from_be_bytes(
bytes.get(..4)?.try_into().unwrap(),
)))
}
}

5 changes: 2 additions & 3 deletions crates/of/tests/of.rs
Original file line number Diff line number Diff line change
@@ -1,4 +1,3 @@

static BST_DTB_DATA: &[u8] = include_bytes!("./bsta1000b-fada-bus.dtb");

fn setup() {
Expand Down Expand Up @@ -26,9 +25,9 @@ fn test_find_compatible() {
#[test]
fn test_pcsi() {
setup();
let of_pcsi= of::pcsi();
let of_pcsi = of::pcsi();
assert!(of_pcsi.is_some());
let of_pcsi= of_pcsi.unwrap();
let of_pcsi = of_pcsi.unwrap();
assert_eq!(of_pcsi.method(), "smc");
assert_eq!(of_pcsi.cpu_on().unwrap(), 0xC4000003);
assert_eq!(of_pcsi.cpu_off().unwrap(), 0x84000002);
Expand Down
10 changes: 8 additions & 2 deletions modules/axhal/src/platform/aarch64_common/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -23,14 +23,20 @@ pub mod time {
#[cfg(platform_family = "aarch64-bsta1000b")]
mod dw_apb_uart;

#[cfg(any(platform_family = "aarch64-raspi", platform_family = "aarch64-qemu-virt"))]
#[cfg(any(
platform_family = "aarch64-raspi",
platform_family = "aarch64-qemu-virt"
))]
mod pl011;

pub mod console {
#[cfg(platform_family = "aarch64-bsta1000b")]
pub use super::dw_apb_uart::*;

#[cfg(any(platform_family = "aarch64-raspi", platform_family = "aarch64-qemu-virt"))]
#[cfg(any(
platform_family = "aarch64-raspi",
platform_family = "aarch64-qemu-virt"
))]
pub use super::pl011::*;
}

Expand Down
6 changes: 5 additions & 1 deletion modules/axhal/src/platform/aarch64_common/mp.rs
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,11 @@ pub fn start_secondary_cpu(cpu_id: usize, stack_top: PhysAddr) {
extern "C" {
fn _start_secondary();
}
let real_cpu_id = of::cpus().nth(cpu_id).expect("not correct cpu_id").ids().first();
let real_cpu_id = of::cpus()
.nth(cpu_id)
.expect("not correct cpu_id")
.ids()
.first();
let entry = virt_to_phys(VirtAddr::from(_start_secondary as usize));
crate::platform::aarch64_common::psci::cpu_on(
real_cpu_id,
Expand Down
4 changes: 3 additions & 1 deletion modules/axhal/src/platform/aarch64_common/pl011.rs
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,9 @@ pub fn getchar() -> Option<u8> {

/// Initialize the UART
pub fn init_early() {
unsafe {crate::platform::aarch64_common::mem::idmap_device(UART_BASE.as_usize());}
unsafe {
crate::platform::aarch64_common::mem::idmap_device(UART_BASE.as_usize());
}
UART.lock().init();
}

Expand Down

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