From 978035eed04cd2e5119c95927c6645af76eb8230 Mon Sep 17 00:00:00 2001
From: guoweikang <guoweikang.kernel@gmail.com>
Date: Wed, 27 Mar 2024 14:25:32 +0800
Subject: [PATCH] clippy: fix clippy warning

--------

Signed-off-by: guoweikang <guoweikang.kernel@gmail.com>
---
 crates/arm_gic/src/gic_v3.rs                     | 6 +++---
 crates/arm_gic/src/sysregs.rs                    | 4 ++--
 modules/axhal/src/platform/aarch64_common/gic.rs | 5 +----
 3 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/crates/arm_gic/src/gic_v3.rs b/crates/arm_gic/src/gic_v3.rs
index d0a1312fa4..fdd5332072 100644
--- a/crates/arm_gic/src/gic_v3.rs
+++ b/crates/arm_gic/src/gic_v3.rs
@@ -117,7 +117,7 @@ impl GicDistributor {
     fn validate_dist_version(&self) {
         let pidr2 = self.regs().PIDR2.get() & Self::GIC_PIDR2_ARCH_MASK; 
         match pidr2 {
-            Self::GIC_PIDR2_ARCH_GICV3 | Self::GIC_PIDR2_ARCH_GICV4 => return,
+            Self::GIC_PIDR2_ARCH_GICV3 | Self::GIC_PIDR2_ARCH_GICV4 => (),
             _ => panic!("unvalid gic pidr2")
         }
     }
@@ -434,7 +434,7 @@ impl GenericArmGic for GicV3 {
 
     /// Enables the interrupt with the given ID.
     fn enable_interrupt(&mut self, intid: IntId) {
-        let index = (intid.0 / 32) as usize;
+        let index = intid.0 / 32;
         let bit = 1 << (intid.0 % 32);
 
         if intid.is_private() {
@@ -445,7 +445,7 @@ impl GenericArmGic for GicV3 {
     }
 
     fn disable_interrupt(&mut self, intid: IntId) {
-        let index = (intid.0 / 32) as usize;
+        let index = intid.0 / 32;
         let bit = 1 << (intid.0 % 32);
 
         if intid.is_private() {
diff --git a/crates/arm_gic/src/sysregs.rs b/crates/arm_gic/src/sysregs.rs
index 0868c07408..79539393f4 100644
--- a/crates/arm_gic/src/sysregs.rs
+++ b/crates/arm_gic/src/sysregs.rs
@@ -3,7 +3,7 @@ macro_rules! read_sysreg {
         {
             let mut value: u64;
             ::core::arch::asm!(
-                concat!("mrs {value:x}, ", ::core::stringify!($name)),
+                concat!("mrs {value}, ", ::core::stringify!($name)),
                 value = out(reg) value,
                 options(nomem, nostack),
             );
@@ -19,7 +19,7 @@ macro_rules! write_sysreg {
         {
             let v: u64 = $value;
             ::core::arch::asm!(
-                concat!("msr ", ::core::stringify!($name), ", {value:x}"),
+                concat!("msr ", ::core::stringify!($name), ", {value}"),
                 value = in(reg) v,
                 options(nomem, nostack),
             )
diff --git a/modules/axhal/src/platform/aarch64_common/gic.rs b/modules/axhal/src/platform/aarch64_common/gic.rs
index 57f8815e9d..6bb4655810 100644
--- a/modules/axhal/src/platform/aarch64_common/gic.rs
+++ b/modules/axhal/src/platform/aarch64_common/gic.rs
@@ -60,12 +60,9 @@ pub fn register_handler(irq_num: usize, handler: IrqHandler) -> bool {
 pub fn dispatch_irq(_unused: usize) {
     // actually no need to lock
     let intid = unsafe {GIC.get_mut().get_and_acknowledge_interrupt()};
-    match intid {
-        Some(id) => {
+    if let Some(id) = intid {
             crate::irq::dispatch_irq_common(id.into());
             unsafe {GIC.get_mut().end_interrupt(id);}
-        }
-        None => (),
     }
 }