diff --git a/libraries/AP_HAL_ChibiOS/hwdef/scripts/chibios_hwdef.py b/libraries/AP_HAL_ChibiOS/hwdef/scripts/chibios_hwdef.py index 9b3884f229d7a..fedc7f84c0f52 100644 --- a/libraries/AP_HAL_ChibiOS/hwdef/scripts/chibios_hwdef.py +++ b/libraries/AP_HAL_ChibiOS/hwdef/scripts/chibios_hwdef.py @@ -189,9 +189,9 @@ def get_alt_function(self, mcu, pin, function): return 0 return None - if function and function.endswith("_RTS") and ( + if function and (function.endswith("_RTS") or function.endswith("_CTS_GPIO")) and ( function.startswith('USART') or function.startswith('UART')): - # we do software RTS + # we do software RTS and can do either software CTS or hardware CTS return None for label in self.af_labels: @@ -1891,6 +1891,8 @@ def write_UART_config(self, f): rts_line_name = dev + '_RTS' rts_line = self.make_line(rts_line_name) cts_line = self.make_line(dev + '_CTS') + if cts_line == "0": + cts_line = self.make_line(dev + '_CTS_GPIO') if rts_line != "0": have_rts_cts = True f.write('#define HAL_HAVE_RTSCTS_SERIAL%u\n' % num) @@ -2927,12 +2929,12 @@ def valid_type(self, ptype, label): if ptype == 'OUTPUT' and re.match(r'US?ART\d+_(TXINV|RXINV)', label): return True m1 = re.match(r'USART(\d+)', ptype) - m2 = re.match(r'USART(\d+)_(RX|TX|CTS|RTS)', label) + m2 = re.match(r'USART(\d+)_(RX|TX|CTS|RTS|CTS_GPIO)', label) if (m1 and not m2) or (m2 and not m1) or (m1 and m1.group(1) != m2.group(1)): '''usart numbers need to match''' return False m1 = re.match(r'UART(\d+)', ptype) - m2 = re.match(r'UART(\d+)_(RX|TX|CTS|RTS)', label) + m2 = re.match(r'UART(\d+)_(RX|TX|CTS|RTS|CTS_GPIO)', label) if (m1 and not m2) or (m2 and not m1) or (m1 and m1.group(1) != m2.group(1)): '''uart numbers need to match''' return False