diff --git a/proxyclient/experiments/cpu_pstate_latencies.py b/proxyclient/experiments/cpu_pstate_latencies.py index 490c09d9e..893c0dd89 100755 --- a/proxyclient/experiments/cpu_pstate_latencies.py +++ b/proxyclient/experiments/cpu_pstate_latencies.py @@ -88,7 +88,7 @@ p.ic_ivau(code, len(util.data)) def bench_cpu(idx, loops=10000000): - if idx == 0: + if u.adt["cpus"][idx].state == "running": elapsed = p.call(util.bench, loops) / tfreq else: elapsed = p.smp_call_sync(idx, util.bench, loops) / tfreq diff --git a/proxyclient/m1n1/hv/__init__.py b/proxyclient/m1n1/hv/__init__.py index 1f223d97b..24577c49e 100644 --- a/proxyclient/m1n1/hv/__init__.py +++ b/proxyclient/m1n1/hv/__init__.py @@ -1562,7 +1562,7 @@ def cpustart_wh(base, off, data, width): chip_id = self.u.adt["/chosen"].chip_id if chip_id in (0x8103, 0x6000, 0x6001, 0x6002): cpu_start = 0x54000 + die * 0x20_0000_0000 - elif chip_id in (0x8112, 0x8122): + elif chip_id in (0x8112, 0x8122, 0x6030): cpu_start = 0x34000 + die * 0x20_0000_0000 elif chip_id in (0x6020, 0x6021, 0x6022): cpu_start = 0x28000 + die * 0x20_0000_0000 @@ -1612,6 +1612,7 @@ def setup_adt(self): "/arm-io/dart-apciec%d", "/arm-io/apciec%d-piodma", "/arm-io/i2c0/hpmBusManager/hpm%d", + "/arm-io/nub-spmi-a0/hpm%d", "/arm-io/atc%d-dpxbar", "/arm-io/atc%d-dpphy", "/arm-io/atc%d-dpin0", diff --git a/src/chickens.c b/src/chickens.c index da132b7fc..4e9525cc8 100644 --- a/src/chickens.c +++ b/src/chickens.c @@ -39,6 +39,8 @@ #define MIDR_PART_T6020_AVALANCHE 0x35 #define MIDR_PART_T6021_BLIZZARD 0x38 #define MIDR_PART_T6021_AVALANCHE 0x39 +#define MIDR_PART_T6030_SAWTOOTH 0x44 +#define MIDR_PART_T6030_EVEREST 0x45 #define MIDR_PART_T6031_EVEREST 0x49 #define MIDR_PART_T6031_SAWTOOTH 0x48 @@ -66,6 +68,8 @@ void init_t6020_blizzard(void); void init_t6020_avalanche(int rev); void init_t6021_blizzard(void); void init_t6021_avalanche(int rev); +void init_t6030_sawtooth(void); +void init_t6030_everest(int rev); void init_t6031_sawtooth(void); void init_t6031_everest(int rev); @@ -204,6 +208,16 @@ const char *init_cpu(void) init_t6021_blizzard(); break; + case MIDR_PART_T6030_EVEREST: + cpu = "M3 Pro Everest"; + init_t6030_everest(rev); + break; + + case MIDR_PART_T6030_SAWTOOTH: + cpu = "M3 Pro Sawtooth"; + init_t6030_sawtooth(); + break; + case MIDR_PART_T6031_EVEREST: cpu = "M3 Max Everest"; init_t6031_everest(rev); diff --git a/src/chickens_everest.c b/src/chickens_everest.c index cab8faea1..4c4fd7101 100644 --- a/src/chickens_everest.c +++ b/src/chickens_everest.c @@ -36,6 +36,48 @@ static void init_common_everest(void) reg_clr(s3_0_c15_c2_4, BIT(0) | BIT(1) | BIT(16) | BIT(17) | BIT(18) | BIT(22)); } +void init_t6030_everest(int rev) +{ + UNUSED(rev); + + reg_set(SYS_IMP_APL_HID16, BIT(54)); + reg_set(SYS_IMP_APL_HID3, HID3_DEV_PCIE_THROTTLE_ENABLE); + reg_mask(SYS_IMP_APL_HID3, HID3_DEV_PCIE_THROTTLE_LIMIT_MASK, HID3_DEV_PCIE_THROTTLE_LIMIT(60)); + reg_clr(SYS_IMP_APL_HID3, BIT(4)); + reg_set(SYS_IMP_APL_HID9, BIT(17)); + reg_mask(SYS_IMP_APL_HID13, + HID13_POST_OFF_CYCLES_MASK | HID13_POST_ON_CYCLES_MASK | HID13_PRE_CYCLES_MASK | + HID13_GROUP0_FF0_DELAY_MASK | HID13_GROUP0_FF1_DELAY_MASK | + HID13_GROUP0_FF2_DELAY_MASK | HID13_GROUP0_FF3_DELAY_MASK | + HID13_GROUP0_FF4_DELAY_MASK | HID13_GROUP0_FF5_DELAY_MASK | + HID13_GROUP0_FF6_DELAY_MASK | HID13_GROUP0_FF7_DELAY_MASK | + HID13_RESET_CYCLES_MASK, + HID13_POST_OFF_CYCLES(4) | HID13_POST_ON_CYCLES(5) | HID13_PRE_CYCLES(1) | + HID13_GROUP0_FF0_DELAY(0) | HID13_GROUP0_FF1_DELAY(4) | HID13_GROUP0_FF2_DELAY(4) | + HID13_GROUP0_FF3_DELAY(4) | HID13_GROUP0_FF4_DELAY(4) | HID13_GROUP0_FF5_DELAY(4) | + HID13_GROUP0_FF6_DELAY(4) | HID13_GROUP0_FF7_DELAY(4) | HID13_RESET_CYCLES(0)); + + msr(SYS_IMP_APL_HID26, + HID26_GROUP1_OFFSET(0x16 | (0x2 << 8) | (0x2 << 12) | (0x2 << 16) | (0x2 << 20) | + (0x2 << 24) | (0x2 << 28) | (0x2uL << 32)) | + HID26_GROUP2_OFFSET(0x23 | (0x1 << 8) | (0x1 << 12) | (0x1 << 16) | (0x1 << 20) | + (0x1 << 24))); + reg_mask(SYS_IMP_APL_HID27, + GENMASK(43, 40) | GENMASK(39, 36) | GENMASK(35, 32) | GENMASK(31, 28) | + GENMASK(27, 24) | GENMASK(23, 20) | GENMASK(19, 16) | GENMASK(15, 8) | + GENMASK(7, 4) | GENMASK(3, 0), + BIT(40) | BIT(36) | BIT(32) | BIT(28) | BIT(24) | BIT(20) | BIT(16) | 0x2b00uL | + BIT(4) | BIT(0)); + + reg_set(SYS_IMP_APL_HID18, + BIT(61) | HID18_GENTER_SPECULATION_DISABLE | HID18_GEXIT_EL_SPECULATION_DISABLE); + + reg_set(s3_0_c15_c2_3, BIT(3)); + reg_clr(s3_0_c15_c2_4, BIT(0) | BIT(1) | BIT(16) | BIT(17) | BIT(18) | BIT(22)); + + reg_set(SYS_IMP_APL_HID4, HID4_ENABLE_LFSR_STALL_LOAD_PIPE2_ISSUE); +} + void init_t6031_everest(int rev) { UNUSED(rev); diff --git a/src/chickens_sawtooth.c b/src/chickens_sawtooth.c index 8e9fe317e..2fe7e85d8 100644 --- a/src/chickens_sawtooth.c +++ b/src/chickens_sawtooth.c @@ -8,6 +8,17 @@ static void init_common_sawtooth(void) reg_set(SYS_IMP_APL_EHID0, EHID0_BLI_UNK32); } +void init_t6030_sawtooth(void) +{ + init_common_sawtooth(); + reg_mask(SYS_IMP_APL_EHID9, EHID9_DEV_2_THROTTLE_LIMIT_MASK, EHID9_DEV_2_THROTTLE_LIMIT(62)); + reg_set(SYS_IMP_APL_EHID9, EHID9_DEV_2_THROTTLE_ENABLE); + + reg_set(SYS_IMP_APL_EHID18, EHID18_BLZ_UNK34); + + reg_mask(SYS_IMP_APL_HID5, HID5_BLZ_UNK_19_18_MASK, HID5_BLZ_UNK19); +} + void init_t6031_sawtooth(void) { init_common_sawtooth(); diff --git a/src/cpu_regs.h b/src/cpu_regs.h index 9fe3b9cdf..ef941b366 100644 --- a/src/cpu_regs.h +++ b/src/cpu_regs.h @@ -339,6 +339,8 @@ #define HID13_POST_ON_CYCLES_MASK GENMASK(13, 7) #define HID13_PRE_CYCLES(x) ((ULONG(x)) << 14) #define HID13_PRE_CYCLES_MASK GENMASK(17, 14) +#define HID13_GROUP0_FF0_DELAY(x) ((ULONG(x)) << 18) +#define HID13_GROUP0_FF0_DELAY_MASK GENMASK(25, 18) #define HID13_GROUP0_FF1_DELAY(x) ((ULONG(x)) << 26) #define HID13_GROUP0_FF1_DELAY_MASK GENMASK(29, 26) #define HID13_GROUP0_FF2_DELAY(x) ((ULONG(x)) << 30) diff --git a/src/cpufreq.c b/src/cpufreq.c index 7dd33b2e2..9625488c7 100644 --- a/src/cpufreq.c +++ b/src/cpufreq.c @@ -200,6 +200,13 @@ static const struct cluster_t t6031_clusters[] = { {"PCPU1", 0x212e00000, true, 1, 6}, {}, }; + +static const struct cluster_t t6030_clusters[] = { + {"ECPU0", 0x210e00000, false, 1, 5}, + {"PCPU0", 0x211e00000, true, 1, 6}, + {}, +}; + const struct cluster_t *cpufreq_get_clusters(void) { switch (chip_id) { @@ -217,6 +224,8 @@ const struct cluster_t *cpufreq_get_clusters(void) return t6020_clusters; case T6022: return t6022_clusters; + case T6030: + return t6030_clusters; case T6031: return t6031_clusters; default: @@ -268,6 +277,17 @@ static const struct feat_t t6031_features[] = { {}, }; +static const struct feat_t t6030_features[] = { + {"cpu-apsc", CLUSTER_PSTATE, CLUSTER_PSTATE_M2_APSC_DIS, 0, CLUSTER_PSTATE_APSC_BUSY, false}, + {"ppt-thrtl", 0x48400, 0, BIT(63), 0, false}, + {"ppt-thrtl", 0x48408, 0, BIT(63), 0, false}, + {"llc-thrtl", 0x40270, 0, BIT(63), 0, false}, + {"amx-thrtl", 0x40250, 0, BIT(63), 0, false}, + {"cpu-fixed-freq-pll-relock", CLUSTER_PSTATE, 0, CLUSTER_PSTATE_FIXED_FREQ_PLL_RECLOCK, 0, + false}, + {}, +}; + const struct feat_t *cpufreq_get_features(void) { switch (chip_id) { @@ -280,6 +300,8 @@ const struct feat_t *cpufreq_get_features(void) case T6021: case T6022: return t6020_features; + case T6030: + return t6030_features; case T6031: return t6031_features; default: diff --git a/src/smp.c b/src/smp.c index 15ccc0e40..2324f4a67 100644 --- a/src/smp.c +++ b/src/smp.c @@ -279,6 +279,9 @@ void smp_start_secondaries(void) case T6022: cpu_start_off = CPU_START_OFF_T6020; break; + case T6030: + cpu_start_off = CPU_START_OFF_T8112; + break; case T6031: case T6034: cpu_start_off = CPU_START_OFF_T6031; diff --git a/src/soc.h b/src/soc.h index b6632ad2d..dfd9d894f 100644 --- a/src/soc.h +++ b/src/soc.h @@ -25,6 +25,7 @@ #define T6020 0x6020 #define T6021 0x6021 #define T6022 0x6022 +#define T6030 0x6030 #define T6031 0x6031 #define T6034 0x6034 @@ -41,6 +42,8 @@ #define EARLY_UART_BASE 0x391200000 #elif TARGET == T8015 #define EARLY_UART_BASE 0x22e600000 +#elif TARGET == T6030 +#define EARLY_UART_BASE 0x289200000 #elif TARGET == T7000 || TARGET == T7001 || TARGET == S8000 || TARGET == S8001 || \ TARGET == S8003 || TARGET == T8010 || TARGET == T8011 #if TARGET == T7000 && defined(TARGET_BOARD) && TARGET_BOARD == 0x34 // Apple TV HD