How to debug python HDL?

[lrobot]

Hi Electronic Guru.
Thank you for create this greate project for create electronic thing by reuseable software mean.
It really intereting and useful.

I am current learn it. I am try create a pcb by recreate raspiberry pico, by reference: https://proto-pic.co.uk/content/RPI-PICO-R3-PUBLIC-SCHEMATIC.pdf
I face a difficult on below construct.

self.usb = self.Block(UsbCReceptacle())
self.reg = self.Block(VoltageRegulator(3.3*Volt(tol=0.05)))
self.v3v3 = self.connect(self.reg.pwr_out)
self.vsys_c1 = self.Block(DecouplingCapacitor(47*uFarad(tol=0.1))).connected(self.gnd, self.v3v3)

after build I find capacitor is not single one, but a group of 4.7uF. I known that this system can try use multiple capacitor union for create capacitor match the requreiment. But I notice 47uF is will known one. And also can be found in JLC pcb csv file. but build out pcb not choice the single one capacitor, but use almose ten 4.7uF capacitor.
I want to know there is any method to debug the HDL python app & library code(can set break point and run step by step).
I try do debug but only block create login can setbreak. some library code can not setbreak.
because of App Top design created and rpc by ScalaCompilerInterface to new java process. and Java Process create new python HDL_server for more compile work. This python-java-python struct make it difficult for debug by breakpoint.

It's possible have a option for select from run pure python build& python-java-python build so to easy debug PYTHON HDL?

Thanks

[ducky64]

Thanks for trying it out - good to hear it's useful so far! A few answers to your questions:

Capacitor

For the capacitor, there is a Capacitor.single_nominal_capacitance parameter that limits how big a single capacitor can be. It's set by default at 22uF, but you can disable the limit through a refinement and it should give you a single 47uF device:

  def refinements(self) -> Refinements:
    return super().refinements() + Refinements(
      class_values=[
        ...
        (Capacitor, ['single_nominal_capacitance'], Range(0.0, float('inf'))),
      ],
      ...
    )

The 22uF is kind of arbitrary, I think it was a rough rule of thumb as an good choice when doing power converters that needed bulk capacitance and good ESR to deal with high ripple currents. Perhaps it's worth getting rid of entirely?

Even with the 22uF single-device-limit, an expectation might have been something more reasonable like 3x 22uF or even 5x 10uF. The tolerances are kind of strict here - no combination other than 10x 4.7uF gives 47uF +/-10%. In the power converter libraries, the capacitance is generally expressed as a lower bound only (using `Range.from_lower(...)``), with the upper bound implicitly constrained by sorting by cost and size.

In terms of the specific circuit you're looking at, C1 and C2 should both be part of the VoltageRegulator - they're the input and output filtering capacitors for the buck converter.

Debugging

For debugging: the short answer is that there isn't a simple answer, precisely because of the Python-Java-Python structure. There's short term workarounds and a long term solution.

Short term workarounds:

• print() in Python code works, including in library components - you can instrument code runs this way. Understandably, not as powerful as a debugger.
• Stack traces also work as expected, including in library components.
• Most component definitions are not that deep. If you're using the IDE, you can navigate to the post-refinement class definition and go through there. That being said, the capacitor (and in general parts-table-based passives) are more complex.

The longer term solution, where the Python is top (compiling from command line Python instead of using the IDE build-design function), could be having Java re-use the original Python instance instead of spinning up a new instance. There's a few reasons this refactor might happen sooner (weeks?) rather than later, but it will take some time.

Other

The RP2040 reference circuit, including the flash chip and supporting passives, is also part of the base library. While he RT6150 buck converter isn't part of the library, the AP3418 is a buck converter that does the same thing. For applications with lower power draw, you might also consider a linear regulator like an LD1117.

[lrobot]

wo. thank you for super detail describe,

• For 22uF vs 47uF capacitor I think both can work. Just want to find the cause why 47uF can not work. now I got the answers.
• Yes i notice that print() is useful than debug by breakpoint, especially when the process data is mass
• And also happy to known that, already have plan to imporve rpc struct.
• Thank your advise on the voltageRegular part. I will check more on it.
• As as freshman on electronic, I learn many from these code base. Thank your

[ducky64]

Update - debugging (with breakpoints and everything) now supported in #372, which re-uses the top-level Python process! (only when running as a Python script, the IDE's compile-design-top feature does not support debugging).

[lrobot]

great features. Thanks. I will find time ti try it. Thank you