diff --git a/devel/objects.inv b/devel/objects.inv index 3fae71560..4a3148f5d 100644 Binary files a/devel/objects.inv and b/devel/objects.inv differ diff --git a/release/_sources/app-minimal.rst.txt b/release/_sources/app-minimal.rst.txt index 4341bb536..d3c8fd79b 100644 --- a/release/_sources/app-minimal.rst.txt +++ b/release/_sources/app-minimal.rst.txt @@ -44,11 +44,11 @@ The NDK-based Minimal application also contains :ref:`Memory Tester Mem_logger statistics: ---------------------- - write requests 33554431 - write words 134217724 - read requests 33554431 - requested words 134217724 - received words 134217724 + write requests 33554431 + write words 134217724 + read requests 33554431 + requested words 134217724 + received words 134217724 Flow: write 160.78 [Gb/s] read 161.68 [Gb/s] @@ -62,23 +62,23 @@ The NDK-based Minimal application also contains :ref:`Memory Tester max 555.00 [ns] avg 131.56 [ns] histogram [ns]: - 93.4 - 117.5 ... 12613618 - 117.5 - 141.6 ... 13893635 - 141.6 - 165.7 ... 6618217 - 503.0 - 527.1 ... 74899 - 527.1 - 551.2 ... 265549 - 551.2 - 575.3 ... 88513 + 93.4 - 117.5 ... 12613618 + 117.5 - 141.6 ... 13893635 + 141.6 - 165.7 ... 6618217 + 503.0 - 527.1 ... 74899 + 527.1 - 551.2 ... 265549 + 551.2 - 575.3 ... 88513 Errors: - zero burst count 0 - simultaneous r+w 0 + zero burst count 0 + simultaneous r+w 0 Paralel reads count: - min 0 - max 13 - avg 10.83 - 0.0 - 4.0 ... 4 - 4.0 - 8.0 ... 27238 - 8.0 - 12.0 ... 4294967295 - 12.0 - 16.0 ... 13345442 + min 0 + max 13 + avg 10.83 + 0.0 - 4.0 ... 4 + 4.0 - 8.0 ... 27238 + 8.0 - 12.0 ... 4294967295 + 12.0 - 16.0 ... 13345442 .. note:: diff --git a/release/_sources/index.rst.txt b/release/_sources/index.rst.txt index 92ff8b9e8..7ed52d61e 100644 --- a/release/_sources/index.rst.txt +++ b/release/_sources/index.rst.txt @@ -1,4 +1,4 @@ -Documentation of Minimal NDK Application +Documentation of Minimal NDK Application **************************************** **Welcome to documentation of Minimal NDK Application!** diff --git a/release/_sources/ndk_cards/prodesign/pd-falcon/readme.rst.txt b/release/_sources/ndk_cards/prodesign/pd-falcon/readme.rst.txt index fa833dc4e..ae073296d 100644 --- a/release/_sources/ndk_cards/prodesign/pd-falcon/readme.rst.txt +++ b/release/_sources/ndk_cards/prodesign/pd-falcon/readme.rst.txt @@ -3,7 +3,7 @@ PRO DESIGN Falcon --------------------------- - Card Information: - - Vendor: PRO DESIGN + - Vendor: PRO DESIGN - Name: PRO DESIGN Falcon (PD-FALCON-1SM21BEU2F55E2VG-DS-AP-PCIE-150) - Ethernet Ports: 4x QSFP-DD - PCIe Connectors: 1x diff --git a/release/_sources/ndk_core/comp/eth/network_mod/comp/network_mod_core/doc/f-tile_multirate_ip.rst.txt b/release/_sources/ndk_core/comp/eth/network_mod/comp/network_mod_core/doc/f-tile_multirate_ip.rst.txt index 166c8873a..742c962ba 100644 --- a/release/_sources/ndk_core/comp/eth/network_mod/comp/network_mod_core/doc/f-tile_multirate_ip.rst.txt +++ b/release/_sources/ndk_core/comp/eth/network_mod/comp/network_mod_core/doc/f-tile_multirate_ip.rst.txt @@ -1,9 +1,9 @@ .. _ndk_f-tile_multirate: -F-Tile Multirate IP +F-Tile Multirate IP =================== -Implemented IP cores +Implemented IP cores -------------------- Right now, you can use two designs with Multirate IP. These designs have optimized parameters, so you do not need to change anything. @@ -13,7 +13,7 @@ If you want to make a build with Multirate IP, check the ``Makefile`` file for a Build tips ---------- -The first step is to make a build. If an error during the build occurs, here are a few tips to help you to fix them. +The first step is to make a build. If an error during the build occurs, here are a few tips to help you to fix them. If you have a problem during the build with Timing analysis and it seems that it could be because of asynchronous clk signals, look into the ``timing.sdc`` file. There is the declaration of asynchronous clocks for both Multirate IP cores. If you have a problem with the Profile ID setup for Dynamic Reconfiguration, look into ``multirate.qsf``. There is the declaration of profiles for both types of IP cores (100G and 25G) and it is set by its setup (the order of profiles when the IP was generated). These assignments allow you to set the order of all profiles (from 0 to ...) for all IP cores. If you have other problems, look into Intel's documentation: :ref:`Intel F-Tile Ethernet Multirate Intel FPGA IP User Guide ` and :ref:`Intel F-Tile Dynamic Reconfiguration Suite Intel FPGA IP User Guide `. diff --git a/release/_sources/ndk_core/comp/eth/network_mod/readme.rst.txt b/release/_sources/ndk_core/comp/eth/network_mod/readme.rst.txt index 83d29a5f0..b84c1050d 100644 --- a/release/_sources/ndk_core/comp/eth/network_mod/readme.rst.txt +++ b/release/_sources/ndk_core/comp/eth/network_mod/readme.rst.txt @@ -80,4 +80,4 @@ It is necessary to test all supported Ethernet IP architectures (E-Tile, CMAC,.. Entity Docs ^^^^^^^^^^^ -.. vhdl:autoentity:: NETWORK_MOD \ No newline at end of file +.. vhdl:autoentity:: NETWORK_MOD diff --git a/release/_sources/ndk_core/doc/app.rst.txt b/release/_sources/ndk_core/doc/app.rst.txt index 87b6f71d6..7ccb964ae 100644 --- a/release/_sources/ndk_core/doc/app.rst.txt +++ b/release/_sources/ndk_core/doc/app.rst.txt @@ -69,7 +69,7 @@ The application sends packets to the DMA module over two buses, MVB and MFB (``D - ``MVB_CHANNEL`` - the DMA channel number - ``MVB_DISCARD`` - A discard flag (the packet is discarded on the DMA input when you set this flag to 1) -The MFB bus transfers the packet data, which may contain a user header before the payload data (e.g., an Ethernet packet). +The MFB bus transfers the packet data, which may contain a user header before the payload data (e.g., an Ethernet packet). You can determine the presence of the user header and its length from the metadata in the ``DMA_RX_MVB_HDR_META`` signal (see the previous section). The minimum allowed length of the packet data is 60B, if necessary, the application must add padding to the packet. diff --git a/release/_sources/ndk_core/doc/configuration.rst.txt b/release/_sources/ndk_core/doc/configuration.rst.txt index 44c47a774..e1b579ab8 100644 --- a/release/_sources/ndk_core/doc/configuration.rst.txt +++ b/release/_sources/ndk_core/doc/configuration.rst.txt @@ -306,7 +306,7 @@ are visible in the `*.inc.tcl` files and can be added to the array. Adding constants to the VHDL package ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ It is recommended to add card-specific constants to the ``combo_user_const`` VHDL -package in `card_const.tcl` file. The way of adding these constants was described in +package in `card_const.tcl` file. The way of adding these constants was described in the :ref:`core_config_vhdl_pkg_const` section in the documentation of NDK-CORE configuration. diff --git a/release/_sources/ndk_core/doc/eth.rst.txt b/release/_sources/ndk_core/doc/eth.rst.txt index 2f559c48a..8ded3ed88 100644 --- a/release/_sources/ndk_core/doc/eth.rst.txt +++ b/release/_sources/ndk_core/doc/eth.rst.txt @@ -396,4 +396,4 @@ Notation: NUMBER_OF_CHANNELS x SPEED - `Intel E-tile Ethernet Hard IP User Guide `_ - `Intel E-Tile Transceiver PHY User Guide `_ - `Xilinx Ultrascale+ CMAC Ethernet Hard IP User Guide `_ -- `Xilinx LBUS documentation `_ \ No newline at end of file +- `Xilinx LBUS documentation `_ diff --git a/release/_sources/ndk_core/doc/how_to_start.rst.txt b/release/_sources/ndk_core/doc/how_to_start.rst.txt index 837d0c9fd..0d30d3670 100644 --- a/release/_sources/ndk_core/doc/how_to_start.rst.txt +++ b/release/_sources/ndk_core/doc/how_to_start.rst.txt @@ -62,7 +62,7 @@ The NDK platform uses the `nfb-info tool `_ and an `API for generating read/write memory requests `_. These requests are transferred via the :ref:`MI bus ` in the NDK firmware. This memory-oriented bus is wired throughout the NDK firmware and each part has an allocated address space. The components accessible over the MI bus and their specific address spaces are described in the NDK using a :ref:`DeviceTree `. +The NDK provides the `nfb-bus tool `_ and an `API for generating read/write memory requests `_. These requests are transferred via the :ref:`MI bus ` in the NDK firmware. This memory-oriented bus is wired throughout the NDK firmware and each part has an allocated address space. The components accessible over the MI bus and their specific address spaces are described in the NDK using a :ref:`DeviceTree `. The MI bus interconnection allows easy access to implemented Control/Status Registers (CSR). Communication via the :ref:`MI bus ` is always initiated by the software via direct memory access to the PCIe device (FPGA card) memory space. The software sends a read or write PCIe transaction, which is then processed by the :ref:`MTC module ` implemented in the FPGA. The MTC module acts as a Master point on the MI bus. It translates requests from the PCIe bus to the MI bus and handles their execution. diff --git a/release/_sources/ndk_core/doc/testing.rst.txt b/release/_sources/ndk_core/doc/testing.rst.txt index 4c7d883d4..bec556a66 100644 --- a/release/_sources/ndk_core/doc/testing.rst.txt +++ b/release/_sources/ndk_core/doc/testing.rst.txt @@ -42,7 +42,7 @@ The GLS module also comes with a Python script (``/n .. code-block:: - $ python3 gls_mod.py + $ python3 gls_mod.py gls_mod.py mode [port_list] Example: gls_mod.py 1 "0,1" diff --git a/release/objects.inv b/release/objects.inv index 98be0f83c..00481da52 100644 Binary files a/release/objects.inv and b/release/objects.inv differ