NDK: [MAINTENANCE] Update NDK submodules

CESNET · Aug 7, 2024 · 27e618d · 27e618d
1 parent 2947ded
commit 27e618d
Show file tree

Hide file tree

Showing 4 changed files with 4 additions and 4 deletions.
diff --git a/ndk/cards b/ndk/cards
diff --git a/ndk/cards_private/nfb-200g2ql b/ndk/cards_private/nfb-200g2ql
diff --git a/ndk/core b/ndk/core
diff --git a/ndk/ofm b/ndk/ofm
+49 −0		amd/alveo-u55c/constr/pcie_half.xdc
+10 −1		amd/alveo-u55c/src/Modules.tcl
+6 −1		amd/alveo-u55c/src/Vivado.inc.tcl
+1,804 −0		amd/alveo-u55c/src/ip/pcie_gen3_x8ll/pcie4_uscale_plus.xci
+9 −28		bittware/ia-420f/src/Modules.tcl
+9 −28		reflexces/agi-fh400g/src/Modules.tcl
+8 −20		silicom/fb2cghh/src/Modules.tcl
+1 −1		silicom/fb2cghh/src/ip/ddr4_axi/ddr4_axi.ip.tcl
+11 −23		silicom/fb4cgg3/src/Modules.tcl
+9 −28		silicom/n6010/src/Modules.tcl
+15 −3		intel/src/application_ent.vhd
+7 −3		intel/src/comp/network_mod/comp/network_mod_core/Modules.tcl
+4 −1		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_1x400g8.vhd
+4 −1		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_2x100g4.vhd
+4 −1		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_2x200g4.vhd
+4 −1		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_2x40g4.vhd
+4 −1		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_4x100g2.vhd
+4 −1		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_8x10g1.vhd
+4 −1		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_8x25g1.vhd
+4 −1		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_8x50g1.vhd
+12 −3		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_multirate_eth_2x100g4.vhd
+4 −1		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_multirate_eth_8x25g1_8x10g1.vhd
+33 −22		intel/src/comp/network_mod/uvm/Modules.tcl
+12 −13		intel/src/comp/network_mod/uvm/signals_sig.fdo
+40 −74		intel/src/comp/network_mod/uvm/tbench/base/dut.sv
+11 −33		intel/src/comp/network_mod/uvm/tbench/base/env/env.sv
+19 −14		intel/src/comp/network_mod/uvm/tbench/base/env/model.sv
+0 −0		intel/src/comp/network_mod/uvm/tbench/base/env/pkg.sv
+0 −0		intel/src/comp/network_mod/uvm/tbench/base/env/reg_sequence.sv
+0 −0		intel/src/comp/network_mod/uvm/tbench/base/env/registers.sv
+0 −0		intel/src/comp/network_mod/uvm/tbench/base/env/regmodel.sv
+4 −4		intel/src/comp/network_mod/uvm/tbench/base/env/scoreboard.sv
+0 −0		intel/src/comp/network_mod/uvm/tbench/base/env/scoreboard_cmp.sv
+263 −0		intel/src/comp/network_mod/uvm/tbench/base/env/sequence.sv
+0 −0		intel/src/comp/network_mod/uvm/tbench/base/env/sequence_eth.sv
+1 −5		intel/src/comp/network_mod/uvm/tbench/base/env/sequencer.sv
+115 −0		intel/src/comp/network_mod/uvm/tbench/base/property.sv
+159 −0		intel/src/comp/network_mod/uvm/tbench/e-tile/dut.sv
+128 −0		intel/src/comp/network_mod/uvm/tbench/e-tile/env/env.sv
+21 −0		intel/src/comp/network_mod/uvm/tbench/e-tile/env/pkg.sv
+103 −174		intel/src/comp/network_mod/uvm/tbench/e-tile/env/sequence.sv
+18 −0		intel/src/comp/network_mod/uvm/tbench/e-tile/env/sequencer_port.sv
+36 −26		intel/src/comp/network_mod/uvm/tbench/e-tile/testbench.sv
+37 −0		intel/src/comp/network_mod/uvm/tbench/f-tile/convertor_rx.vhd
+217 −0		intel/src/comp/network_mod/uvm/tbench/f-tile/dut.sv
+137 −0		intel/src/comp/network_mod/uvm/tbench/f-tile/env/env.sv
+25 −0		intel/src/comp/network_mod/uvm/tbench/f-tile/env/model.sv
+32 −0		intel/src/comp/network_mod/uvm/tbench/f-tile/env/pkg.sv
+524 −0		intel/src/comp/network_mod/uvm/tbench/f-tile/env/sequence.sv
+33 −0		intel/src/comp/network_mod/uvm/tbench/f-tile/env/sequencer_port.sv
+34 −0		intel/src/comp/network_mod/uvm/tbench/f-tile/env/tx_error_trimmer.sv
+248 −0		intel/src/comp/network_mod/uvm/tbench/f-tile/testbench.sv
+5 −4		intel/src/comp/network_mod/uvm/tbench/fix_bind.sv
+0 −70		intel/src/comp/network_mod/uvm/tbench/property.sv
+6 −6		intel/src/comp/network_mod/uvm/tbench/tests/base.sv
+31 −22		intel/src/comp/network_mod/uvm/tbench/tests/speed.sv
+14 −19		intel/src/comp/network_mod/uvm/top_level.fdo
+3 −3		intel/src/comp/pcie/uvm/tbench/testbench_intel.sv
+21 −3		intel/src/fpga_common.vhd
+85 −1		intel/src/ip/common.tcl