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devel/_sources/comp/mvb_tools/flow/item_collision_resolver/readme.rst.txt
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| MVB Item Collision Resolver | ||
| --------------------------- | ||
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| .. vhdl:autoentity:: MVB_ITEM_COLLISION_RESOLVER |
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| <section id="mvb-item-collision-resolver"> | ||
| <span id="id1"></span><h1>MVB Item Collision Resolver<a class="headerlink" href="#mvb-item-collision-resolver" title="Link to this heading"></a></h1> | ||
| <dl class="vhdl autoentity"> | ||
| <dt class="sig sig-object vhdl" id="vhdl-entity-mvb_item_collision_resolver"> | ||
| <span class="k"><span class="pre">ENTITY</span> </span><span class="sig-name descname"><span class="pre">MVB_ITEM_COLLISION_RESOLVER</span></span><span class="k"> <span class="pre">IS</span></span><a class="headerlink" href="#vhdl-entity-mvb_item_collision_resolver" title="Link to this definition"></a></dt> | ||
| <dd><p>The component MVB_ITEM_COLLISION_RESOLVER ensures that only Items with different data are valid at the output in each clock cycle. | ||
| When the data at the output are the same, they are invalidated (all but one).</p> | ||
| <p>The data are stored in a FIFO and await to be read. | ||
| After each read (TX_DST_RDY=’1’), the logic analyzes the output data anew and recalculates the valid signal (TX_VALID). | ||
| This mechanism nullifies Item collisions at the cost of lowering the throughput in such cases.</p> | ||
| <span class="sig-name descname">Generics</span><table class="docutils align-default"> | ||
| <thead> | ||
| <tr class="row-odd"><th class="head"><p>Generic</p></th> | ||
| <th class="head"><p>Type</p></th> | ||
| <th class="head"><p>Default</p></th> | ||
| <th class="head"><p>Description</p></th> | ||
| </tr> | ||
| </thead> | ||
| <tbody> | ||
| <tr class="row-even" id="vhdl-gengeneric-mvb_item_collision_resolver-item_width"><td><p>ITEM_WIDTH</p></td> | ||
| <td><p>natural</p></td> | ||
| <td><p>10</p></td> | ||
| <td></td> | ||
| </tr> | ||
| <tr class="row-odd" id="vhdl-gengeneric-mvb_item_collision_resolver-meta_width"><td><p>META_WIDTH</p></td> | ||
| <td><p>natural</p></td> | ||
| <td><p>10</p></td> | ||
| <td></td> | ||
| </tr> | ||
| <tr class="row-even" id="vhdl-gengeneric-mvb_item_collision_resolver-items"><td><p>ITEMS</p></td> | ||
| <td><p>natural</p></td> | ||
| <td><p>4</p></td> | ||
| <td></td> | ||
| </tr> | ||
| <tr class="row-odd" id="vhdl-gengeneric-mvb_item_collision_resolver-device"><td><p>DEVICE</p></td> | ||
| <td><p>string</p></td> | ||
| <td><p>“AGILEX”</p></td> | ||
| <td></td> | ||
| </tr> | ||
| </tbody> | ||
| </table> | ||
| <span class="sig-name descname">Ports</span><table class="docutils align-default"> | ||
| <thead> | ||
| <tr class="row-odd"><th class="head"><p>Port</p></th> | ||
| <th class="head"><p>Type</p></th> | ||
| <th class="head"><p>Mode</p></th> | ||
| <th class="head"><p>Description</p></th> | ||
| </tr> | ||
| </thead> | ||
| <tbody> | ||
| <tr class="row-even" id="vhdl-portsignal-mvb_item_collision_resolver-clk"><td><p>CLK</p></td> | ||
| <td><p>std_logic</p></td> | ||
| <td><p>in</p></td> | ||
| <td></td> | ||
| </tr> | ||
| <tr class="row-odd" id="vhdl-portsignal-mvb_item_collision_resolver-reset"><td><p>RESET</p></td> | ||
| <td><p>std_logic</p></td> | ||
| <td><p>in</p></td> | ||
| <td></td> | ||
| </tr> | ||
| <tr class="row-even" id="vhdl-portsignal-mvb_item_collision_resolver-rx_data"><td><p>RX_DATA</p></td> | ||
| <td><p>slv_array_t (ITEMS-1 downto 0)(ITEM_WIDTH-1 downto 0)</p></td> | ||
| <td><p>in</p></td> | ||
| <td></td> | ||
| </tr> | ||
| <tr class="row-odd" id="vhdl-portsignal-mvb_item_collision_resolver-rx_meta"><td><p>RX_META</p></td> | ||
| <td><p>slv_array_t (ITEMS-1 downto 0)(META_WIDTH-1 downto 0)</p></td> | ||
| <td><p>in</p></td> | ||
| <td></td> | ||
| </tr> | ||
| <tr class="row-even" id="vhdl-portsignal-mvb_item_collision_resolver-rx_valid"><td><p>RX_VALID</p></td> | ||
| <td><p>std_logic_vector(ITEMS-1 downto 0)</p></td> | ||
| <td><p>in</p></td> | ||
| <td></td> | ||
| </tr> | ||
| <tr class="row-odd" id="vhdl-portsignal-mvb_item_collision_resolver-rx_src_rdy"><td><p>RX_SRC_RDY</p></td> | ||
| <td><p>std_logic</p></td> | ||
| <td><p>in</p></td> | ||
| <td></td> | ||
| </tr> | ||
| <tr class="row-even" id="vhdl-portsignal-mvb_item_collision_resolver-rx_dst_rdy"><td><p>RX_DST_RDY</p></td> | ||
| <td><p>std_logic</p></td> | ||
| <td><p>out</p></td> | ||
| <td></td> | ||
| </tr> | ||
| <tr class="row-odd" id="vhdl-portsignal-mvb_item_collision_resolver-tx_data"><td><p>TX_DATA</p></td> | ||
| <td><p>slv_array_t (ITEMS-1 downto 0)(ITEM_WIDTH-1 downto 0)</p></td> | ||
| <td><p>out</p></td> | ||
| <td></td> | ||
| </tr> | ||
| <tr class="row-even" id="vhdl-portsignal-mvb_item_collision_resolver-tx_meta"><td><p>TX_META</p></td> | ||
| <td><p>slv_array_t (ITEMS-1 downto 0)(META_WIDTH-1 downto 0)</p></td> | ||
| <td><p>out</p></td> | ||
| <td></td> | ||
| </tr> | ||
| <tr class="row-odd" id="vhdl-portsignal-mvb_item_collision_resolver-tx_valid"><td><p>TX_VALID</p></td> | ||
| <td><p>std_logic_vector(ITEMS-1 downto 0)</p></td> | ||
| <td><p>out</p></td> | ||
| <td></td> | ||
| </tr> | ||
| <tr class="row-even" id="vhdl-portsignal-mvb_item_collision_resolver-tx_src_rdy"><td><p>TX_SRC_RDY</p></td> | ||
| <td><p>std_logic</p></td> | ||
| <td><p>out</p></td> | ||
| <td></td> | ||
| </tr> | ||
| <tr class="row-odd" id="vhdl-portsignal-mvb_item_collision_resolver-tx_dst_rdy"><td><p>TX_DST_RDY</p></td> | ||
| <td><p>std_logic</p></td> | ||
| <td><p>in</p></td> | ||
| <td></td> | ||
| </tr> | ||
| </tbody> | ||
| </table> | ||
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