From 62cc6fb19a675b3c6c223bef167b8efd2e14750f Mon Sep 17 00:00:00 2001
From: Martin Spinler <spinler@cesnet.cz>
Date: Thu, 13 Jun 2024 12:48:12 +0200
Subject: [PATCH] cocotb: [TEST] add issue1

Unexpected transaction are generated after pcie reset on DMA DOWN MVB/MFB
---
 tests/cocotb/Makefile         |  6 +++
 tests/cocotb/issues/issue1.py | 91 +++++++++++++++++++++++++++++++++++
 tests/cocotb/prepare.sh       |  1 +
 3 files changed, 98 insertions(+)
 create mode 100644 tests/cocotb/issues/issue1.py

diff --git a/tests/cocotb/Makefile b/tests/cocotb/Makefile
index d1f394ef6..708d978bb 100644
--- a/tests/cocotb/Makefile
+++ b/tests/cocotb/Makefile
@@ -14,3 +14,9 @@ ROOT_DIR:=$(shell dirname $(realpath $(firstword $(MAKEFILE_LIST))))
 
 all:
 	make TARGET=$(SIM) -C $(CARD_DIR) PYTHONPATH=$$PYTHONPATH:$(ROOT_DIR) TOP_LEVEL_ENT=fpga
+
+issues:
+	make COCOTB_MODULE=$(COCOTB_MODULE) TARGET=$(SIM) -C $(CARD_DIR) PYTHONPATH=$$PYTHONPATH:$(ROOT_DIR) TOP_LEVEL_ENT=fpga
+
+issue1:
+	make issues COCOTB_MODULE=issues.$@ CARD=n6010
diff --git a/tests/cocotb/issues/issue1.py b/tests/cocotb/issues/issue1.py
new file mode 100644
index 000000000..c470b133c
--- /dev/null
+++ b/tests/cocotb/issues/issue1.py
@@ -0,0 +1,91 @@
+import sys
+import logging
+
+import cocotb
+import cocotb.utils
+from cocotb.triggers import Timer, RisingEdge, Combine, Join, First, with_timeout
+
+import cocotbext.ofm.utils.sim.modelsim as ms
+import cocotbext.ofm.utils.sim.modelsim as ms
+
+from cocotbext.ofm.utils.sim.bus import *
+from cocotbext.ofm.utils.scapy import simple_tcp_bytes
+
+from ndk_core import NFBDevice
+
+print = ms.print
+
+e = cocotb.external
+st = cocotb.utils.get_sim_time
+
+core = NFBDevice.core_instance_from_top(cocotb.top)
+
+
+async def get_dev_init(dut):
+    dev = NFBDevice(dut)
+    await dev.init()
+    return dev, dev.nfb
+
+
+async def _rx_pkts(dev, nfb):
+    for eth in nfb.eth:
+        await e(eth.rxmac.enable)()
+
+    await e(nfb.ndp.rx[0].start)()
+    await dev.dma.rx[0]._push_desc()
+
+    await Timer(2, units='us')
+
+    pkt = simple_tcp_bytes()
+
+    for i in range(10):
+        await dev._eth_rx_driver[0].write_packet(list(pkt))
+
+@cocotb.test()
+async def reset_pci_inside_pkt_rx(dut):
+    dev, nfb = await get_dev_init(dut)
+
+    for eth in nfb.eth:
+        await e(eth.rxmac.enable)()
+
+    await _rx_pkts(dev, nfb)
+    await dev._reset()
+    await _rx_pkts(dev, nfb)
+
+
+pci_core = core.pcie_i.pcie_core_i
+ms.cmd(f"log -recursive {ms.cocotb2path(core)}/*")
+
+ms.add_wave(core.global_reset)
+ms.add_wave(pci_core.PCIE_USER_RESET)
+ms.add_wave(pci_core.PCIE_USER_CLK)
+
+ms.add_wave(core.pcie_i.MI_CLK)
+ms.add_wave(core.pcie_i.MI_RESET)
+
+#ms.add_wave(core.dma_i.MI_CLK)
+#ms.add_wave(core.dma_i.MI_RESET)
+
+ms.add_wave(core.dma_i.DMA_CLK)
+ms.add_wave(core.dma_i.DMA_RESET)
+
+ms.add_wave(core.dma_i.USR_CLK)
+ms.add_wave(core.dma_i.USR_RESET)
+
+#ms.add_wave(core.dma_i.CROX_CLK)
+#ms.add_wave(core.dma_i.CROX_RESET)
+
+
+MfbBus(core.dma_i, 'RX_USR_MFB', 0, label='DMA RX_MFB').add_wave()
+#MfbBus(core.dma_i, 'TX_USR_MFB', 0).add_wave()
+
+#DmaUpMvbBus(core.dma_i, 'PCIE_RQ_MVB', 0).add_wave()
+#MfbBus(core.dma_i, 'PCIE_RQ_MFB', 0).add_wave()
+
+DmaDownMvbBus(core.dma_i, 'PCIE_RC_MVB', 0).add_wave()
+MfbBus(core.dma_i, 'PCIE_RC_MFB', 0).add_wave()
+
+#MfbBus(pci_core, 'RC_MFB', 0).add_wave()
+#MfbBus(pci_core, 'RQ_MFB', 0).add_wave()
+#MfbBus(pci_core, 'CC_MFB', 0).add_wave()
+#MfbBus(pci_core, 'CQ_MFB', 0).add_wave()
diff --git a/tests/cocotb/prepare.sh b/tests/cocotb/prepare.sh
index 06238717e..5e3ed1e72 100755
--- a/tests/cocotb/prepare.sh
+++ b/tests/cocotb/prepare.sh
@@ -15,6 +15,7 @@ source venv-cocotb/bin/activate
 
 python -m pip install cython wheel setuptools
 python -m pip install pylibfdt fdt
+python -m pip install scapy
 python -m pip install $PKG_PYNFB 
 python -m pip install $PKG_LIBNFBEXT_PYTHON 
 python -m pip install $PKG_COCOTBEXT_OFM