NDK: [MAINTENANCE] Update NDK submodules

CESNET · Mar 8, 2024 · b8c2e11 · b8c2e11
1 parent 67a010f
commit b8c2e11
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Showing 4 changed files with 4 additions and 4 deletions.
diff --git a/ndk/cards b/ndk/cards
diff --git a/ndk/core b/ndk/core
diff --git a/ndk/modules/ndk-mod-dma-medusa b/ndk/modules/ndk-mod-dma-medusa
diff --git a/ndk/ofm b/ndk/ofm
+8 −0		intel/dk-dev-agi027res/config/card_const.tcl
+141 −6		intel/dk-dev-agi027res/constr/timing.sdc
+1 −7		intel/dk-dev-agi027res/src/Modules.tcl
+4,954 −874		intel/dk-dev-agi027res/src/ip/ftile_eth_2x40g.ip
+3,040 −373		intel/dk-dev-agi027res/src/ip/ftile_eth_8x10g.ip
+3,040 −373		intel/dk-dev-agi027res/src/ip/ftile_eth_8x25g.ip
+1 −1		intel/dk-dev-agi027res/src/ip/ftile_pll.ip
+0 −613		intel/dk-dev-agi027res/src/ip/ftile_pll_1x400g.ip
+0 −613		intel/dk-dev-agi027res/src/ip/ftile_pll_2x200g.ip
+0 −613		intel/dk-dev-agi027res/src/ip/ftile_pll_2x40g.ip
+0 −613		intel/dk-dev-agi027res/src/ip/ftile_pll_4x100g.ip
+0 −613		intel/dk-dev-agi027res/src/ip/ftile_pll_8x10g.ip
+0 −613		intel/dk-dev-agi027res/src/ip/ftile_pll_8x25g.ip
+0 −613		intel/dk-dev-agi027res/src/ip/ftile_pll_8x50g.ip
+4 −10		reflexces/agi-fh400g/config/card_const.tcl
+2 −0		reflexces/agi-fh400g/constr/general.qsf
+32 −26		reflexces/agi-fh400g/constr/multirate.qsf
+182 −35		reflexces/agi-fh400g/constr/timing.sdc
+13 −20		reflexces/agi-fh400g/src/Modules.tcl
+4,954 −874		reflexces/agi-fh400g/src/ip/ftile_eth_2x40g.ip
+3,040 −373		reflexces/agi-fh400g/src/ip/ftile_eth_8x10g.ip
+2 −2		reflexces/agi-fh400g/src/ip/ftile_multirate_eth_1x100g.ip
+6 −6		reflexces/agi-fh400g/src/ip/ftile_pll.ip
+0 −613		reflexces/agi-fh400g/src/ip/ftile_pll_1x400g.ip
+0 −613		reflexces/agi-fh400g/src/ip/ftile_pll_2x200g.ip
+0 −613		reflexces/agi-fh400g/src/ip/ftile_pll_2x40g.ip
+0 −613		reflexces/agi-fh400g/src/ip/ftile_pll_8x10g.ip
+0 −613		reflexces/agi-fh400g/src/ip/ftile_pll_8x50g.ip
+2 −0		silicom/fb4cgg3/config/card_const.tcl
+11 −0		silicom/fb4cgg3/constr/gty_10ge_ll.xdc
+4 −0		silicom/fb4cgg3/constr/qsfp.xdc
+5 −4		silicom/fb4cgg3/src/Modules.tcl
+1 −0		silicom/fb4cgg3/src/Vivado.inc.tcl
+7 −0		intel/config/core_conf.tcl
+4 −1		intel/config/core_const.tcl
+25 −20		intel/doc/eth.rst
+4 −1,801		intel/doc/img/etile_network_module_core.svg
+0 −4		intel/doc/img/ftile_multirate_network_module_core .svg
+4 −0		intel/doc/img/ftile_multirate_submodule_nmc.svg
+3 −1,978		intel/doc/img/ftile_network_module_core.svg
+4 −0		intel/doc/img/ftile_submodule_nmc.svg
+11 −1		intel/src/DevTree.tcl
+6 −0		intel/src/comp/dma/DevTree.tcl
+1 −0		intel/src/comp/dma/dma_ent.vhd
+1 −1		intel/src/comp/dma/dma_full_arch.vhd
+1 −1		intel/src/comp/dma/wrapper/dma_medusa_wrapper_arch.vhd
+24 −1		intel/src/comp/network_mod/comp/network_mod_core/Modules.tcl
+82 −0		intel/src/comp/network_mod/comp/network_mod_core/comps/bridge_drp/bridge_drp.vhd
+22 −0		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/Modules.tcl
+749 −0		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_1x400g8.vhd
+682 −0		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_2x100g4.vhd
+679 −0		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_2x200g4.vhd
+680 −0		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_2x40g4.vhd
+645 −0		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_4x100g2.vhd
+624 −0		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_8x10g1.vhd
+626 −0		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_8x25g1.vhd
+628 −0		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_8x50g1.vhd
+983 −0		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_multirate_eth_2x100g4.vhd
+708 −0		intel/src/comp/network_mod/comp/network_mod_core/comps/ftile/ftile_multirate_eth_8x25g1_8x10g1.vhd
+577 −3,416		intel/src/comp/network_mod/comp/network_mod_core/network_mod_core_ftile.vhd
+2 −0		intel/src/comp/network_mod/network_mod.vhd
+1 −1		intel/src/comp/network_mod/uvm/tbench/env/sequence.sv
+54 −0		intel/src/comp/network_mod/uvm/ver_settings.py
+5 −3		intel/src/comp/pcie/Modules.tcl
+28 −0		intel/src/comp/pcie/comp/pcie_core/DevTree.tcl
+16 −6		intel/src/comp/pcie/comp/pcie_core/Modules.tcl
+17 −1		intel/src/comp/pcie/comp/pcie_core/pcie_core_ent.vhd
+484 −6		intel/src/comp/pcie/comp/pcie_core/pcie_core_ptile.vhd
+459 −5		intel/src/comp/pcie/comp/pcie_core/pcie_core_usp.vhd
+18 −0		intel/src/comp/pcie/comp/pcie_ctrl/DevTree.tcl
+7 −0		intel/src/comp/pcie/comp/pcie_ctrl/Modules.tcl
+191 −1		intel/src/comp/pcie/comp/pcie_ctrl/pcie_ctrl.vhd
+102 −8		intel/src/comp/pcie/pcie_top.vhd
+14 −6		intel/src/fpga_common.vhd
+2 −2		intel/src/mi_addr_space_pkg.vhd
+1 −1		build/Modelsim.inc.fdo
+1 −1		build/Quartus.inc.tcl
+1 −1		build/Vivado_non_prj.inc.tcl
+1 −1		build/common.mk
+1 −1		build/scripts/cocotb/cocotb.fdo
+13 −0		comp/base/misc/event_counter/DevTree.tcl
+1 −0		comp/base/misc/event_counter/Modules.tcl
+1 −0		comp/base/misc/event_counter/readme.rst
+1 −0		comp/debug/streaming_debug/DevTree.tcl
+13 −0		comp/mfb_tools/storage/fifox/cocotb/Makefile
+69 −0		comp/mfb_tools/storage/fifox/cocotb/cocotb_test.py
+12 −0		comp/mfb_tools/storage/fifox/cocotb/cocotb_test_sig.fdo
+30 −11		comp/mi_tools/ver/sw_access/nfb/nfb/nfb.h
+17 −4		comp/mi_tools/ver/sw_access/nfb/src/nfb.c
+0 −2		comp/mi_tools/ver/sw_access/nfb/src/nfb.h
+1 −1		comp/nic/eth_phy/40ge/comp/pcs/scrambler_gen.vhd
+87 −0		python/cocotbext/cocotbext/ofm/lii/drivers.py
+63 −0		python/cocotbext/cocotbext/ofm/lii/monitors.py
+166 −0		python/cocotbext/cocotbext/ofm/mfb/drivers.py
+106 −0		python/cocotbext/cocotbext/ofm/mfb/monitors.py
+50 −0		python/cocotbext/cocotbext/ofm/mfb/utils.py
+27 −0		python/cocotbext/cocotbext/ofm/ver/generators.py