Skip to content

Commit

Permalink
[CHANGELOG] Update Changelog
Browse files Browse the repository at this point in the history
  • Loading branch information
mp-17 committed Mar 1, 2023
1 parent 77eb9b6 commit 5d8ac80
Showing 1 changed file with 2 additions and 0 deletions.
2 changes: 2 additions & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -131,6 +131,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.
- Add VCD dumping features to `imatmul`
- `core_id_i` added to the interface of the system
- Clock-gate the system bank macros when not used (VRF, D$, I$)
- Spill register on `sldu` input signals to better isolate the unit

### Changed

Expand Down Expand Up @@ -178,6 +179,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.
- Optimize `dwt` kernel
- Optimize `dotproduct` kernel
- Optimize `fft` kernel
- Simplify the reduction engine for both `valu` and `vmfpu`, to avoid spurious valid signals to the `sldu`

## 2.2.0 - 2021-11-02

Expand Down

0 comments on commit 5d8ac80

Please sign in to comment.