forked from openhwgroup/cva6
-
Notifications
You must be signed in to change notification settings - Fork 0
/
Bender.yml
271 lines (247 loc) · 10.6 KB
/
Bender.yml
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
package:
name: ariane
authors:
- "Florian Zaruba <[email protected]>"
- "Michael Schaffner <[email protected]>"
- "Andreas Kuster <[email protected]>"
# WT_DCACHE
dependencies:
axi: { git: "https://github.com/pulp-platform/axi.git", version: 0.31.0 }
common_cells:
{ git: "https://github.com/pulp-platform/common_cells", version: 1.23.0 }
fpnew: { git: "https://github.com/openhwgroup/cvfpu.git", version: 0.7.0 }
tech_cells_generic:
{
git: "https://github.com/pulp-platform/tech_cells_generic.git",
rev: b2a68114302af1d8191ddf34ea0e07b471911866,
}
frozen: true
sources:
- files:
- target: cv64a6_imafdcv_sv39
files:
- core/include/cv64a6_imafdcv_sv39_config_pkg.sv
- core/include/riscv_pkg.sv
- core/include/ariane_dm_pkg.sv
- core/include/ariane_pkg.sv
- core/mmu_sv39/tlb.sv
- core/mmu_sv39/mmu.sv
- core/mmu_sv39/ptw.sv
- corev_apu/tb/common/mock_uart.sv
- target: cv64a6_imafdc_sv39
files:
- core/include/cv64a6_imafdc_sv39_config_pkg.sv
- core/include/riscv_pkg.sv
- core/include/ariane_dm_pkg.sv
- core/include/ariane_pkg.sv
- core/mmu_sv39/tlb.sv
- core/mmu_sv39/mmu.sv
- core/mmu_sv39/ptw.sv
- core/cva6_accel_first_pass_decoder_stub.sv
- target: cv32a6_imac_sv0
files:
- core/include/cv32a6_imac_sv0_config_pkg.sv
- core/include/riscv_pkg.sv
- core/include/ariane_dm_pkg.sv
- core/include/ariane_pkg.sv
- core/mmu_sv32/cva6_tlb_sv32.sv
- core/mmu_sv32/cva6_mmu_sv32.sv
- core/mmu_sv32/cva6_ptw_sv32.sv
- core/cva6_accel_first_pass_decoder_stub.sv
- target: cv32a6_imac_sv32
files:
- core/include/cv32a6_imac_sv32_config_pkg.sv
- core/include/riscv_pkg.sv
- core/include/ariane_dm_pkg.sv
- core/include/ariane_pkg.sv
- core/mmu_sv32/cva6_tlb_sv32.sv
- core/mmu_sv32/cva6_mmu_sv32.sv
- core/mmu_sv32/cva6_ptw_sv32.sv
- core/cva6_accel_first_pass_decoder_stub.sv
- target: cv32a6_imafc_sv32
files:
- core/include/cv32a6_imafc_sv32_config_pkg.sv
- core/include/riscv_pkg.sv
- core/include/ariane_dm_pkg.sv
- core/include/ariane_pkg.sv
- core/mmu_sv32/cva6_tlb_sv32.sv
- core/mmu_sv32/cva6_mmu_sv32.sv
- core/mmu_sv32/cva6_ptw_sv32.sv
- core/cva6_accel_first_pass_decoder_stub.sv
# included via target core/include/${TARGET_CFG}_config_pkg.sv
# ariane_axi_pkg is dependent on this.
# - vendor/pulp-platform/axi/src/axi_pkg.sv
# Packages
- core/include/wt_cache_pkg.sv
- core/include/std_cache_pkg.sv
- core/include/acc_pkg.sv
# for all the below files use Flist.cva6 as baseline and also look at Makefile pd/synth
# FPGA support keep vendoring here because too old
- vendor/pulp-platform/fpga-support/rtl/SyncDpRam.sv
- vendor/pulp-platform/fpga-support/rtl/AsyncDpRam.sv
- vendor/pulp-platform/fpga-support/rtl/AsyncThreePortRam.sv
# CVXIF
- core/include/instr_tracer_pkg.sv
- core/include/cvxif_pkg.sv
- core/cvxif_example/include/cvxif_instr_pkg.sv
- core/cvxif_fu.sv
- core/cvxif_example/cvxif_example_coprocessor.sv
- core/cvxif_example/instr_decoder.sv
# vendored deps
# - include_dirs: [vendor/pulp-platform/common_cells/include/, vendor/pulp-platform/common_cells/src/]
# files:
# - vendor/pulp-platform/common_cells/src/cf_math_pkg.sv
# - vendor/pulp-platform/common_cells/src/fifo_v3.sv
# - vendor/pulp-platform/common_cells/src/lfsr.sv
# - vendor/pulp-platform/common_cells/src/lzc.sv
# - vendor/pulp-platform/common_cells/src/rr_arb_tree.sv
# - vendor/pulp-platform/common_cells/src/shift_reg.sv
# - vendor/pulp-platform/common_cells/src/unread.sv
# - vendor/pulp-platform/common_cells/src/popcount.sv
# - vendor/pulp-platform/common_cells/src/exp_backoff.sv
# # Common Cells for example coprocessor
# - vendor/pulp-platform/common_cells/src/counter.sv
# - vendor/pulp-platform/common_cells/src/delta_counter.sv
# Floating point unit
# - vendor/openhwgroup/cvfpu/src/fpnew_pkg.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_cast_multi.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_classifier.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_divsqrt_multi.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_fma_multi.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_fma.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_noncomp.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_opgroup_block.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_opgroup_fmt_slice.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_opgroup_multifmt_slice.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_rounding.sv
# - vendor/openhwgroup/cvfpu/src/fpnew_top.sv
# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/defs_div_sqrt_mvp.sv
# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/control_mvp.sv
# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/div_sqrt_top_mvp.sv
# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/iteration_div_sqrt_mvp.sv
# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/norm_div_sqrt_mvp.sv
# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/nrbd_nrsc_mvp.sv
# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/preprocess_mvp.sv
# Top-level source files (not necessarily instantiated at the top of the cva6).
- corev_apu/src/ariane.sv
- core/cva6.sv
- core/alu.sv
# Note: depends on fpnew_pkg, above
- core/fpu_wrap.sv
- core/branch_unit.sv
- core/compressed_decoder.sv
- core/controller.sv
- core/csr_buffer.sv
- core/csr_regfile.sv
- core/decoder.sv
- core/ex_stage.sv
- core/instr_realign.sv
- core/id_stage.sv
- core/issue_read_operands.sv
- core/acc_dispatcher.sv
- core/issue_stage.sv
- core/load_unit.sv
- core/load_store_unit.sv
- core/lsu_bypass.sv
- core/mult.sv
- core/multiplier.sv
- core/serdiv.sv
- core/perf_counters.sv
- core/ariane_regfile_ff.sv
- core/ariane_regfile_fpga.sv
- core/re_name.sv
# NOTE: scoreboard.sv modified for DSIM (unchanged for other simulators)
- core/scoreboard.sv
- core/store_buffer.sv
- core/amo_buffer.sv
- core/store_unit.sv
- core/commit_stage.sv
- core/axi_shim.sv
# What is "frontend"?
- core/frontend/btb.sv
- core/frontend/bht.sv
- core/frontend/ras.sv
- core/frontend/instr_scan.sv
- core/frontend/instr_queue.sv
- core/frontend/frontend.sv
# Cache subsystem
- core/cache_subsystem/wt_dcache_ctrl.sv
- core/cache_subsystem/wt_dcache_mem.sv
- core/cache_subsystem/wt_dcache_missunit.sv
- core/cache_subsystem/wt_dcache_wbuffer.sv
- core/cache_subsystem/wt_dcache.sv
- core/cache_subsystem/cva6_icache.sv
- core/cache_subsystem/wt_cache_subsystem.sv
- core/cache_subsystem/wt_axi_adapter.sv
# Physical Memory Protection
# NOTE: pmp.sv modified for DSIM (unchanged for other simulators)
- core/pmp/src/pmp.sv
- core/pmp/src/pmp_entry.sv
- include_dirs:
- common/local/util
files:
- common/local/util/sram.sv
- target: not(all(fpga, xilinx))
include_dirs:
- common/local/util
files:
- common/local/util/tc_sram_wrapper.sv
# - vendor/pulp-platform/tech_cells_generic/src/rtl/tc_sram.sv
- target: all(fpga, xilinx)
include_dirs:
- common/local/util
files:
- common/local/util/tc_sram_fpga_wrapper.sv
- target: not(synthesis)
include_dirs:
- core/include
files:
# Tracer (behavioral code, not RTL)
- common/local/util/instr_tracer.sv
- common/local/util/instr_tracer_if.sv
- common/local/util/instr_trace_item.svh
- common/local/util/ex_trace_item.svh
# TODO target define FPGA target + verification etc
# - target: test
# files:
# - corev_apu/riscv-dbg/src/dm_pkg.sv
# - corev_apu/tb/ariane_soc_pkg.sv
# - corev_apu/tb/ariane_axi_soc_pkg.sv
# - corev_apu/tb/ariane_testharness.sv
# - corev_apu/tb/ariane_peripherals.sv
# - corev_apu/tb/common/uart.sv
# - corev_apu/tb/common/SimDTM.sv
# - corev_apu/tb/common/SimJTAG.sv
# - target: all(fpga, xilinx)
# files:
# - corev_apu/fpga/src/ariane_peripherals_xilinx.sv
# - corev_apu/fpga/src/ariane_xilinx.sv
# - corev_apu/fpga/src/fan_ctrl.sv
# - corev_apu/fpga/src/bootrom/bootrom.sv
# - corev_apu/fpga/src/ariane-ethernet/ssio_ddr_in.sv
# - corev_apu/fpga/src/ariane-ethernet/rgmii_soc.sv
# - corev_apu/fpga/src/ariane-ethernet/axis_gmii_rx.sv
# - corev_apu/fpga/src/ariane-ethernet/oddr.sv
# - corev_apu/fpga/src/ariane-ethernet/axis_gmii_tx.sv
# - corev_apu/fpga/src/ariane-ethernet/dualmem_widen8.sv
# - corev_apu/fpga/src/ariane-ethernet/rgmii_phy_if.sv
# - corev_apu/fpga/src/ariane-ethernet/dualmem_widen.sv
# - corev_apu/fpga/src/ariane-ethernet/rgmii_lfsr.sv
# - corev_apu/fpga/src/ariane-ethernet/rgmii_core.sv
# - corev_apu/fpga/src/ariane-ethernet/eth_mac_1g.sv
# - corev_apu/fpga/src/ariane-ethernet/eth_mac_1g_rgmii.sv
# - corev_apu/fpga/src/ariane-ethernet/eth_mac_1g_rgmii_fifo.sv
# - corev_apu/fpga/src/ariane-ethernet/iddr.sv
# - corev_apu/fpga/src/ariane-ethernet/framing_top.sv
# - corev_apu/fpga/src/apb_uart/src/apb_uart.vhd
# - corev_apu/fpga/src/apb_uart/src/uart_transmitter.vhd
# - corev_apu/fpga/src/apb_uart/src/uart_interrupt.vhd
# - corev_apu/fpga/src/apb_uart/src/slib_mv_filter.vhd
# - corev_apu/fpga/src/apb_uart/src/slib_input_filter.vhd
# - corev_apu/fpga/src/apb_uart/src/slib_counter.vhd
# - corev_apu/fpga/src/apb_uart/src/uart_receiver.vhd
# - corev_apu/fpga/src/apb_uart/src/slib_input_sync.vhd
# - corev_apu/fpga/src/apb_uart/src/slib_edge_detect.vhd
# - corev_apu/fpga/src/apb_uart/src/slib_clock_div.vhd
# - corev_apu/fpga/src/apb_uart/src/slib_fifo.vhd
# - corev_apu/fpga/src/apb_uart/src/uart_baudgen.vhd