From a101a4cdb2dc95e17790708008c37a828168fced Mon Sep 17 00:00:00 2001 From: Lucien Zhao Date: Tue, 24 Dec 2024 14:38:24 +0800 Subject: [PATCH] soc: nxp: imxrt: imxrt118x: Remove cm7 core condition for CPU_HAS_ICACHE Although I/DCACHE aren't included under cm33 architecture, NXP design and integrate Code Cache/Sys Cache for cm33 to speed up the core execution efficiency. For the convenience of developers, we believe that software developers can directly use Code/Sys Cache as arm's I/D Cache. Signed-off-by: Lucien Zhao --- soc/nxp/imxrt/imxrt118x/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/soc/nxp/imxrt/imxrt118x/Kconfig b/soc/nxp/imxrt/imxrt118x/Kconfig index b2aa59090af7..02ba54e0754a 100644 --- a/soc/nxp/imxrt/imxrt118x/Kconfig +++ b/soc/nxp/imxrt/imxrt118x/Kconfig @@ -17,8 +17,8 @@ config SOC_SERIES_IMXRT118X select ARM_MPU if SOC_MIMXRT1189_CM33 select INIT_ARM_PLL select ARM_TRUSTZONE_M if SOC_MIMXRT1189_CM33 - select CPU_HAS_ICACHE if SOC_MIMXRT1189_CM7 - select CPU_HAS_DCACHE if SOC_MIMXRT1189_CM7 + select CPU_HAS_ICACHE + select CPU_HAS_DCACHE select CPU_HAS_FPU select CPU_HAS_FPU_DOUBLE_PRECISION if SOC_MIMXRT1189_CM7 select HAS_MCUX_IOMUXC