From fe6f43f3015fe200cb39d377b1f43d6394187277 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Erick=20Andr=C3=A9s=20Obreg=C3=B3n=20Fonseca?=
 <erickobregonf@gmail.com>
Date: Mon, 22 Jul 2024 19:56:52 -0600
Subject: [PATCH] Adding mapping technology params for the ADC

---
 modules/adc/include/adc.hpp          |  2 +-
 modules/adc/include/seq_item_adc.hpp | 20 +++++++++++++++-----
 modules/adc/src/tb_adc.cpp           |  8 +++++---
 3 files changed, 21 insertions(+), 9 deletions(-)

diff --git a/modules/adc/include/adc.hpp b/modules/adc/include/adc.hpp
index ccfe06d..92d15f0 100644
--- a/modules/adc/include/adc.hpp
+++ b/modules/adc/include/adc.hpp
@@ -37,7 +37,7 @@ SCA_TDF_MODULE(adc)
    */
   SCA_CTOR(adc) : in("in"), out("out") {
     // Propagation time from input to output
-    set_timestep(sca_core::sca_time(0.1, sc_core::SC_US));
+    set_timestep(sca_core::sca_time(13, sc_core::SC_NS));
   }
 
   /**
diff --git a/modules/adc/include/seq_item_adc.hpp b/modules/adc/include/seq_item_adc.hpp
index 78065e6..090950b 100644
--- a/modules/adc/include/seq_item_adc.hpp
+++ b/modules/adc/include/seq_item_adc.hpp
@@ -7,23 +7,33 @@
 /**
  * @brief This class is used to generate the analog signal for the test
  * 
- * @tparam N 
+ * @tparam N - the number of output bits of the digital code
+ * @tparam VMIN - lowest voltage value
+ * @tparam VMAX - highest voltage value
+ * @tparam VU - voltage unit based on VUnit
  */
-template <unsigned int N>
+template <unsigned int N = 8, int VMIN = 0, int VMAX = 5, VUnit VU = VUnit::v>
 SCA_TDF_MODULE(seq_item_adc)
 {
+protected:
+  // Min voltage value based on the voltage units
+  const double V_MIN = static_cast<double>(VMIN) / static_cast<double>(VU);
+  // Max voltage value based on the voltage units
+  const double V_MAX = static_cast<double>(VMAX) / static_cast<double>(VU);
+  // Max digital output code
+  const int MAX_CODE = (1 << N);
 public:
   sca_tdf::sca_out<double> o_ana;
-  const int MAX_CODE = (1 << N);
 
   SCA_CTOR(seq_item_adc)
   {
-    set_timestep(sca_core::sca_time(0.1, sc_core::SC_US));
+    set_timestep(sca_core::sca_time(13, sc_core::SC_NS));
   }
 
   void processing()
   {
-    this->o_ana.write(static_cast<double>(rand() % MAX_CODE) / MAX_CODE);
+    const double NORM_ANA = static_cast<double>(rand() % MAX_CODE) / MAX_CODE;
+    this->o_ana.write((V_MAX + V_MIN) * NORM_ANA + V_MIN);
   }
 };
 
diff --git a/modules/adc/src/tb_adc.cpp b/modules/adc/src/tb_adc.cpp
index c87862d..7c27af5 100644
--- a/modules/adc/src/tb_adc.cpp
+++ b/modules/adc/src/tb_adc.cpp
@@ -3,6 +3,8 @@
 #include "seq_item_adc.hpp"
 
 #define N 8
+#define VOLTAGE_MIN 0
+#define VOLTAGE_MAX 3300
 
 
 int sc_main(int, char*[])
@@ -15,12 +17,12 @@ int sc_main(int, char*[])
   sca_tdf::sca_signal<sc_dt::sc_uint<N> > s_dig_out;
 
   // DUT
-  adc<N> ips_adc("ips_adc");
+  adc<N, VOLTAGE_MIN, VOLTAGE_MAX, VUnit::mv> ips_adc("ips_adc");
   ips_adc.in(s_ana);
   ips_adc.out(s_dig_out);
 
   // Sequence item generator for ADC
-  seq_item_adc<N> ips_seq_item_adc("ips_seq_item_adc");
+  seq_item_adc<N, VOLTAGE_MIN, VOLTAGE_MAX, VUnit::mv> ips_seq_item_adc("ips_seq_item_adc");
   ips_seq_item_adc.o_ana(s_ana);
 
   // Dump waveform
@@ -32,7 +34,7 @@ int sc_main(int, char*[])
   std::cout << "@" << sc_time_stamp() << std::endl;
 
   // Run test
-  sc_start(MAX_SEQ_ITEMS * 0.1, SC_US);
+  sc_start(MAX_SEQ_ITEMS * 13, SC_NS);
 
   // End time
   std::cout << "@" << sc_time_stamp() << std::endl;