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If you compile a compute shader with [numthreads(64,1,1)] the top of the ISA output says "wave_size(64)". However it's apparent from the generated asm that the code generated was designed for wave32.
Evidence for this is manipulation of only exec_lo (exec_hi is never touched) and the fact that DX12 Wave Intrinsics such as "WaveActiveSum" generate code that only sums across 32 lanes.
If GFX1010 uses Wave32 now as its native wave size for Compute then the "wave_size(64)" at the top of the ISA output should read "wave_size(32)" instead.
The text was updated successfully, but these errors were encountered:
If you compile a compute shader with [numthreads(64,1,1)] the top of the ISA output says "wave_size(64)". However it's apparent from the generated asm that the code generated was designed for wave32.
Evidence for this is manipulation of only exec_lo (exec_hi is never touched) and the fact that DX12 Wave Intrinsics such as "WaveActiveSum" generate code that only sums across 32 lanes.
If GFX1010 uses Wave32 now as its native wave size for Compute then the "wave_size(64)" at the top of the ISA output should read "wave_size(32)" instead.
The text was updated successfully, but these errors were encountered: