From 4f69b36e88ecb82fec9f472cde56b43bef13404f Mon Sep 17 00:00:00 2001 From: HOS Date: Wed, 4 Sep 2024 09:12:12 +0200 Subject: [PATCH] Proposed change to get correct number of output levels, and handle non-symmetric limits. Closes #4459 --- .../Sampler/Utilities/Internal/Quantization.mo | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/Modelica/Clocked/RealSignals/Sampler/Utilities/Internal/Quantization.mo b/Modelica/Clocked/RealSignals/Sampler/Utilities/Internal/Quantization.mo index 13ac12cb59..ff6aebad90 100644 --- a/Modelica/Clocked/RealSignals/Sampler/Utilities/Internal/Quantization.mo +++ b/Modelica/Clocked/RealSignals/Sampler/Utilities/Internal/Quantization.mo @@ -9,12 +9,11 @@ extends Clocked.RealSignals.Interfaces.PartialClockedSISO; parameter Integer bits(min=1)=8 "Number of bits of quantization (if quantized = true)"; protected - parameter Real resolution = if quantized then ((yMax - yMin)/2^bits) else 0; + parameter Real resolution = if quantized then ((yMax - yMin)/(2^bits-1)) else 0; equation if quantized then - y = resolution*floor(abs(u/resolution) + 0.5)* - (if u >= 0 then +1 else -1); + y = resolution*floor(((u-yMin)/resolution) + 0.5)+yMin; else y = u; end if; @@ -22,6 +21,10 @@ equation

The clocked Real input signal is value discretized (the discretization is defined by parameter bits). + +This is a mid-riser quantization, which for a symmetric interval imply that it will not output zero.

+", revisions=" +

2024-09-04: Corrected off-by-one error in number of output levels, and handle non-symmetric limits.

")); end Quantization;