fix: add missing portmap

IObundle · Oct 20, 2023 · 43aaef5 · 43aaef5
1 parent fd7873a
commit 43aaef5
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/iob_cache.py b/iob_cache.py
@@ -85,6 +85,7 @@ def _create_submodules_list(cls):
         super()._create_submodules_list(
             [
                 {"interface": "iob_s_port"},
+                {"interface": "iob_s_portmap"},
                 {"interface": "axi_m_port"},
                 {"interface": "axi_m_m_portmap"},
                 {"interface": "axi_m_write_port"},