We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
The output from sudo lshw shows that there are two CPUs with 24 cores each, in total 48 physical cores (full link to the output]:
sudo lshw
*-cpu:0 description: CPU product: Intel(R) Xeon(R) Platinum 8175M CPU @ 2.50GHz vendor: Intel Corp. physical id: 4 bus info: cpu@0 version: Intel(R) Xeon(R) Platinum 8175M CPU @ 2.50GHz slot: CPU 0 size: 2500MHz capacity: 3500MHz width: 64 bits clock: 100MHz capabilities: x86-64 fpu fpu_exception wp vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ss ht syscall nx pdpe1gb rdtscp constant_tsc arch_perfmon rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq monitor ssse3 fma cx16 pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm 3dnowprefetch invpcid_single kaiser fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm mpx avx512f rdseed adx smap clflushopt clwb avx512cd xsaveopt xsavec xgetbv1 ida arat configuration: cores=24 enabledcores=24 threads=48 *-cpu:1 description: CPU product: Intel(R) Xeon(R) Platinum 8175M CPU @ 2.50GHz vendor: Intel Corp. physical id: 5 bus info: cpu@1 version: Intel(R) Xeon(R) Platinum 8175M CPU @ 2.50GHz slot: CPU 1 size: 2500MHz capacity: 3500MHz width: 64 bits clock: 100MHz capabilities: x86-64 fpu fpu_exception wp vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ss ht syscall nx pdpe1gb rdtscp constant_tsc arch_perfmon rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq monitor ssse3 fma cx16 pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm 3dnowprefetch invpcid_single kaiser fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm mpx avx512f rdseed adx smap clflushopt clwb avx512cd xsaveopt xsavec xgetbv1 ida arat configuration: cores=24 enabledcores=24 threads=48
But in Oracle® Java Mission Control 5.5.2 (M5.5.2-3, 174165) I can see 32 cores
Link to the JFR recording: https://drive.google.com/open?id=1-RPSymnJeHBgApdUL6Xrr_e-9OATfXK9
The text was updated successfully, but these errors were encountered:
Hi there! This should be reported on OpenJDK hotspot/jfr!
Sorry, something went wrong.
Dropdown Lane Filter for toggling thread lane activity (JDKMissionCon…
139cb26
…trol#10) * remove the passing of a filter listener to the time filter * initial lane filter implementation
No branches or pull requests
The output from
sudo lshw
shows that there are two CPUs with 24 cores each, in total 48 physical cores (full link to the output]:But in Oracle® Java Mission Control 5.5.2 (M5.5.2-3, 174165) I can see 32 cores
Link to the JFR recording: https://drive.google.com/open?id=1-RPSymnJeHBgApdUL6Xrr_e-9OATfXK9
The text was updated successfully, but these errors were encountered: