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Issues list

Add DO_PNR support for tools that support it enhancement New feature or request good first issue Good for newcomers
#272 opened Nov 16, 2024 by JulianKemmerer
Aesthetic VHDL and C code gen fixes enhancement New feature or request good first issue Good for newcomers
#246 opened Nov 16, 2024 by JulianKemmerer
Built in RAMs render uint0_t address for 1-element arrays bug Something isn't working good first issue Good for newcomers
#197 opened Jun 10, 2024 by JulianKemmerer
FEEDBACK wires need a default assignment in code bug Something isn't working
#192 opened Mar 17, 2024 by JulianKemmerer
Change output directory structure enhancement New feature or request
#183 opened Nov 28, 2023 by JulianKemmerer
Support full C syntax for invoking derived FSMs enhancement New feature or request
#180 opened Sep 17, 2023 by JulianKemmerer
Upgrade sim to generate clocks in HDL enhancement New feature or request
#174 opened Aug 26, 2023 by JulianKemmerer
Enums with shared literal names can cause VHDL syntax errors bug Something isn't working
#168 opened May 27, 2023 by JulianKemmerer
Only 'cpp' for C preprocessing is supported now enhancement New feature or request
#166 opened Feb 15, 2023 by JulianKemmerer
Union support enhancement New feature or request
#162 opened Feb 6, 2023 by JulianKemmerer
Static local variables cannot be declared inside IFs bug Something isn't working
#146 opened Nov 5, 2022 by JulianKemmerer
Loop iterators must be declared outside of the loop bug Something isn't working
#139 opened Oct 28, 2022 by JulianKemmerer
ProTip! What’s not been updated in a month: updated:<2024-10-26.