Merge commit 'b4dd424d96f09f9bafb88e47f37df65dc4529143'

* commit 'b4dd424d96f09f9bafb88e47f37df65dc4529143':
  Remove all SPARC architecture optimizations

Conflicts:
	Makefile
	configure
	libavcodec/sparc/dsputil_vis.c
	libavcodec/sparc/dsputil_vis.h
	libavcodec/sparc/hpeldsp_vis.c
	libavcodec/sparc/simple_idct_vis.c
	libavcodec/sparc/vis.h
	libswscale/sparc/yuv2rgb_vis.c
	libswscale/swscale_internal.h

If someone wants to maintain these (or other) SPARC optimizations, please
contact me or ffmpeg-devel.
I am happy to revert this removial if theres someone considering to
maintain this code.

Merged-by: Michael Niedermayer <[email protected]>

Makefile

@@ -73,8 +73,7 @@ config.h: .config
 SUBDIR_VARS := CLEANFILES EXAMPLES FFLIBS HOSTPROGS TESTPROGS TOOLS      \
                HEADERS ARCH_HEADERS BUILT_HEADERS SKIPHEADERS            \
                ARMV5TE-OBJS ARMV6-OBJS VFP-OBJS NEON-OBJS                \
-               ALTIVEC-OBJS VIS-OBJS                                     \
-               MMX-OBJS YASM-OBJS                                        \
+               ALTIVEC-OBJS MMX-OBJS YASM-OBJS                           \
                MIPSFPU-OBJS MIPSDSPR2-OBJS MIPSDSPR1-OBJS MIPS32R2-OBJS  \
                OBJS SLIBOBJS HOSTOBJS TESTOBJS
 

arch.mak

@@ -10,7 +10,5 @@ OBJS-$(HAVE_MIPSDSPR2) += $(MIPSDSPR2-OBJS)  $(MIPSDSPR2-OBJS-yes)
 
 OBJS-$(HAVE_ALTIVEC) += $(ALTIVEC-OBJS) $(ALTIVEC-OBJS-yes)
 
-OBJS-$(HAVE_VIS)     += $(VIS-OBJS)     $(VIS-OBJS-yes)
-
 OBJS-$(HAVE_MMX)     += $(MMX-OBJS)     $(MMX-OBJS-yes)
 OBJS-$(HAVE_YASM)    += $(YASM-OBJS)    $(YASM-OBJS-yes)

configure

@@ -337,7 +337,6 @@ Optimization options (experts only):
   --disable-armv6t2        disable armv6t2 optimizations
   --disable-vfp            disable VFP optimizations
   --disable-neon           disable NEON optimizations
-  --disable-vis            disable VIS optimizations
   --disable-inline-asm     disable use of inline assembler
   --disable-yasm           disable use of yasm assembler
   --disable-mips32r2       disable MIPS32R2 optimizations
@@ -1498,7 +1497,6 @@ ARCH_EXT_LIST="
     $ARCH_EXT_LIST_X86
     altivec
     ppc4xx
-    vis
     mipsfpu
     mips32r2
     mipsdspr1
@@ -1837,8 +1835,6 @@ mipsdspr2_deps="mips"
 altivec_deps="ppc"
 ppc4xx_deps="ppc"
 
-vis_deps="sparc"
-
 cpunop_deps="i686"
 x86_64_select="i686"
 x86_64_suggest="fast_cmov"
@@ -3599,7 +3595,6 @@ elif enabled sparc; then
     case $cpu in
         cypress|f93[04]|tsc701|sparcl*|supersparc|hypersparc|niagara|v[789])
             cpuflags="-mcpu=$cpu"
-            disable vis
         ;;
         ultrasparc*|niagara[234])
             cpuflags="-mcpu=$cpu"
@@ -4239,10 +4234,6 @@ EOF
         enabled altivec || warn "Altivec disabled, possibly missing --cpu flag"
     fi
 
-elif enabled sparc; then
-
-    enabled vis && check_inline_asm vis '"pdist %f0, %f0, %f0"'
-
 elif enabled x86; then
 
     check_builtin rdtsc    intrin.h   "__rdtsc()"
@@ -5013,9 +5004,6 @@ if enabled ppc; then
     echo "PPC 4xx optimizations     ${ppc4xx-no}"
     echo "dcbzl available           ${dcbzl-no}"
 fi
-if enabled sparc; then
-    echo "VIS enabled               ${vis-no}"
-fi
 echo "debug symbols             ${debug-no}"
 echo "strip symbols             ${stripping-no}"
 echo "optimize for size         ${small-no}"

doc/optimization.txt

@@ -268,17 +268,6 @@ CELL/SPU:
 http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/30B3520C93F437AB87257060006FFE5E/$file/Language_Extensions_for_CBEA_2.4.pdf
 http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/9F820A5FFA3ECE8C8725716A0062585F/$file/CBE_Handbook_v1.1_24APR2007_pub.pdf
 
-SPARC-specific:
----------------
-SPARC Joint Programming Specification (JPS1): Commonality
-http://www.fujitsu.com/downloads/PRMPWR/JPS1-R1.0.4-Common-pub.pdf
-
-UltraSPARC III Processor User's Manual (contains instruction timings)
-http://www.sun.com/processors/manuals/USIIIv2.pdf
-
-VIS Whitepaper (contains optimization guidelines)
-http://www.sun.com/processors/vis/download/vis/vis_whitepaper.pdf
-
 GCC asm links:
 --------------
 official doc but quite ugly

libavcodec/avcodec.h

@@ -2629,7 +2629,9 @@ typedef struct AVCodecContext {
 #define FF_IDCT_XVIDMMX       14
 #define FF_IDCT_SIMPLEARMV5TE 16
 #define FF_IDCT_SIMPLEARMV6   17
+#if FF_API_ARCH_SPARC
 #define FF_IDCT_SIMPLEVIS     18
+#endif
 #define FF_IDCT_FAAN          20
 #define FF_IDCT_SIMPLENEON    22
 #if FF_API_ARCH_ALPHA

libavcodec/dsputil.c

@@ -2830,8 +2830,6 @@ av_cold void ff_dsputil_init(DSPContext* c, AVCodecContext *avctx)
         ff_dsputil_init_bfin(c, avctx);
     if (ARCH_PPC)
         ff_dsputil_init_ppc(c, avctx);
-    if (HAVE_VIS)
-        ff_dsputil_init_vis(c, avctx);
     if (ARCH_X86)
         ff_dsputil_init_x86(c, avctx);
 

libavcodec/dsputil.h

@@ -306,7 +306,6 @@ void ff_dsputil_init_alpha(DSPContext* c, AVCodecContext *avctx);
 void ff_dsputil_init_arm(DSPContext* c, AVCodecContext *avctx);
 void ff_dsputil_init_bfin(DSPContext* c, AVCodecContext *avctx);
 void ff_dsputil_init_ppc(DSPContext* c, AVCodecContext *avctx);
-void ff_dsputil_init_vis(DSPContext* c, AVCodecContext *avctx);
 void ff_dsputil_init_x86(DSPContext* c, AVCodecContext *avctx);
 
 void ff_dsputil_init_dwt(DSPContext *c);

libavcodec/hpeldsp.c

@@ -64,8 +64,6 @@ av_cold void ff_hpeldsp_init(HpelDSPContext *c, int flags)
         ff_hpeldsp_init_bfin(c, flags);
     if (ARCH_PPC)
         ff_hpeldsp_init_ppc(c, flags);
-    if (HAVE_VIS)
-        ff_hpeldsp_init_vis(c, flags);
     if (ARCH_X86)
         ff_hpeldsp_init_x86(c, flags);
 }

libavcodec/hpeldsp.h

@@ -99,7 +99,6 @@ void ff_hpeldsp_init_alpha(HpelDSPContext *c, int flags);
 void ff_hpeldsp_init_arm(HpelDSPContext *c, int flags);
 void ff_hpeldsp_init_bfin(HpelDSPContext *c, int flags);
 void ff_hpeldsp_init_ppc(HpelDSPContext *c, int flags);
-void ff_hpeldsp_init_vis(HpelDSPContext *c, int flags);
 void ff_hpeldsp_init_x86(HpelDSPContext *c, int flags);
 
 #endif /* AVCODEC_HPELDSP_H */