From b6f24afed09803c7566da055643f125fff084f09 Mon Sep 17 00:00:00 2001
From: Gerard Marull-Paretas <gerard@teslabs.com>
Date: Mon, 26 Feb 2024 21:07:47 +0100
Subject: [PATCH] [nrf fromlist] boards: nrf54h20pdk_nrf54h20: add
 cpuapp/cpuppr shared memory

Add shared memory for APP<->PPR, used for IPC.

Upstream PR: https://github.com/zephyrproject-rtos/zephyr/pull/69487

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
(cherry picked from commit 40655660b22ce0a7f8e7c67a1c4c31798505731a)
---
 .../nrf54h20pdk_nrf54h20-memory_map.dtsi                  | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/boards/arm/nrf54h20pdk_nrf54h20/nrf54h20pdk_nrf54h20-memory_map.dtsi b/boards/arm/nrf54h20pdk_nrf54h20/nrf54h20pdk_nrf54h20-memory_map.dtsi
index cb5a4fe0b0c..ac524936e4a 100644
--- a/boards/arm/nrf54h20pdk_nrf54h20/nrf54h20pdk_nrf54h20-memory_map.dtsi
+++ b/boards/arm/nrf54h20pdk_nrf54h20/nrf54h20pdk_nrf54h20-memory_map.dtsi
@@ -25,6 +25,14 @@
 			#size-cells = <1>;
 			ranges = <0x0 0x2fc07000 0x1000>;
 
+			cpuapp_cpuppr_ipc_shm: memory@0 {
+				reg = <0x0 0x340>;
+			};
+
+			cpuppr_cpuapp_ipc_shm: memory@340 {
+				reg = <0x340 0x340>;
+			};
+
 			cpuapp_dma_region: memory@680 {
 				compatible = "zephyr,memory-region";
 				reg = <0x680 DT_SIZE_K(2)>;