SX1301 GPIO output configuration

The lora_gateway HAL software configures the GPIO_SELECT_OUTPUT register to 2, meaning that the complete control of GPIOs is given to the AGC firmware of the SX1301.

This is mandatory for reference design v1.5 (SX1301AP2, with FPGA) to control the TX digital filter. The AGC firmware controls the GPIOs as follow :

• GPIO[0] -> N/A
• GPIO[1] -> N/A
• GPIO[2] -> N/A
• GPIO[3] -> TX digital filter ON
• GPIO[4] -> TX ON

But it is not mandatory for reference design v1.0 (with no FPGA), and one may want to configure it differently to know, for example, when a RX packet is received or if a TX packet is being transmitted.

This can be done by changing the following lines in the lgw_start() function of the libloragw/src/loragw_hal.c file:

Replace:

/* gives AGC control of GPIOs to enable Tx external digital filter */ lgw_reg_w(LGW_GPIO_MODE,31); /* Set all GPIOs as output */ lgw_reg_w(LGW_GPIO_SELECT_OUTPUT,2);

with:

/* Rx and Tx packets signalling through GPIOs */ lgw_reg_w(LGW_GPIO_MODE,31); /* Set all GPIOs as output */ lgw_reg_w(LGW_GPIO_SELECT_OUTPUT,0);

GPIOs table will be then as follow (refer to Table 7 of SX1301 DS, SELECT_OUTPUT mode = 0):

• GPIO[0] -> TX_ON (Tx packet is sent)
• GPIO[1] -> FSK_PKT (Rx packet received on IF9 FSK channel)
• GPIO[2] -> BH_PKT (Rx packet received on IF8 backhaul LoRa channel)
• GPIO[3] -> SENSOR_PKT (Rx packet received on any IF0 to IF7 LoRa channel)
• GPIO[4] -> RX_BUFFER_NOT_EMPTY (Rx packet received from any LoRa/FSK channel and present in the Rx buffer FIFO)

For more details on available GPIO output configuration, please contact Semtech's support.