allow initial adjustment of SDRAM config #802

src/vhdl/sdram_controller.vhdl

@@ -553,13 +553,19 @@ begin
                   sdram_init_phase <= 0;
                   sdram_do_init <= '1';
                   write_latched <= '0';
-                  sdram_100us_countdown <= 16_200; 
-                  -- @IO:GS $C000000 SDRAM:RESET Reset SDRAM controller and select clock polarity.
-                  sdram_clk_0_int <= wdata_latched(0);
-                  sdram_clk_1_int <= wdata_latched(1);
-                  latch_on_falling_edge_int <= wdata_latched(2);
-                  extra_latency_int <= wdata_latched(3);
-                  clock_invert_on_write_int <= wdata_latched(4);
+                  sdram_100us_countdown <= 16_200;
+                  if wdata_latched /= x"de" then
+                    -- @IO:GS $C000000 SDRAM:RESET Reset SDRAM controller and select clock polarity.
+                    sdram_clk_0_int <= wdata_latched(0);
+                    sdram_clk_1_int <= wdata_latched(1);
+                    latch_on_falling_edge_int <= wdata_latched(2);
+                    extra_latency_int <= wdata_latched(3);
+                    clock_invert_on_write_int <= wdata_latched(4);
+                  else
+                    -- Write $DE to $Cxxxxxx to disable further setting of
+                    -- SDRAM parameters
+                    debug_register_enabled <= false;
+                  end if;
                 else
                   -- Read non-RAM address
                   sdram_state <= NON_RAM_READ;