From cad151acd692b174c6957e318166461967bade0f Mon Sep 17 00:00:00 2001 From: Paul Gardner-Stephen Date: Sat, 18 May 2024 17:20:17 +0930 Subject: [PATCH] allow initial adjustment of SDRAM config #802 --- src/vhdl/sdram_controller.vhdl | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/src/vhdl/sdram_controller.vhdl b/src/vhdl/sdram_controller.vhdl index 85e8dbb62..ff5487076 100644 --- a/src/vhdl/sdram_controller.vhdl +++ b/src/vhdl/sdram_controller.vhdl @@ -553,13 +553,19 @@ begin sdram_init_phase <= 0; sdram_do_init <= '1'; write_latched <= '0'; - sdram_100us_countdown <= 16_200; - -- @IO:GS $C000000 SDRAM:RESET Reset SDRAM controller and select clock polarity. - sdram_clk_0_int <= wdata_latched(0); - sdram_clk_1_int <= wdata_latched(1); - latch_on_falling_edge_int <= wdata_latched(2); - extra_latency_int <= wdata_latched(3); - clock_invert_on_write_int <= wdata_latched(4); + sdram_100us_countdown <= 16_200; + if wdata_latched /= x"de" then + -- @IO:GS $C000000 SDRAM:RESET Reset SDRAM controller and select clock polarity. + sdram_clk_0_int <= wdata_latched(0); + sdram_clk_1_int <= wdata_latched(1); + latch_on_falling_edge_int <= wdata_latched(2); + extra_latency_int <= wdata_latched(3); + clock_invert_on_write_int <= wdata_latched(4); + else + -- Write $DE to $Cxxxxxx to disable further setting of + -- SDRAM parameters + debug_register_enabled <= false; + end if; else -- Read non-RAM address sdram_state <= NON_RAM_READ;