OPL implementation does not init some "incorrectly used" registers properly

[M3wP]

Test Environment (required)
You can use MEGA65INFO to retrieve this.

• Platform: any
• Core Commit: current
• ROM Release: not related

Describe the bug
The OPL implementation is something of a "down-sized" OPL3 masquerading as an OPL2. Currently, the registers $C0-$C8 need to be initialised to $F0 in order for any sound to be produced. Any other value put in those registers causes no sound to be produced. These registers aren't meant to be used for an OPL2.

To Reproduce
Try to use the OPL... You need to init the registers as above and not change them.

Expected behavior
The values should be correctly initialised by the hardware and not allowed to change.

Screenshots

Additional context