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cache_set
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#! /c/Source/iverilog-install/bin/vvp
:ivl_version "12.0 (devel)" "(s20150603-1110-g18392a46)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0;
:vpi_module "C:\iverilog\lib\ivl\system.vpi";
:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi";
:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi";
:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi";
:vpi_module "C:\iverilog\lib\ivl\va_math.vpi";
:vpi_module "C:\iverilog\lib\ivl\v2009.vpi";
S_000002137ec1c040 .scope package, "$unit" "$unit" 2 1;
.timescale 0 0;
enum000002137ebf2600 .enum2/s (32)
"READ" 0,
"WRITE" 1
;
S_000002137ec1bba0 .scope module, "cache_controller" "cache_controller" 3 232;
.timescale 0 0;
.port_info 0 /INPUT 1 "clk";
o000002137ed30088 .functor BUFZ 1, C4<z>; HiZ drive
v000002137ec1fe70_0 .net "clk", 0 0, o000002137ed30088; 0 drivers
S_000002137ec2ebf0 .scope module, "tb" "tb" 3 30;
.timescale 0 0;
v000002137ec54790_0 .var "activate", 0 0;
v000002137ec548d0_0 .var "address", 15 0;
v000002137ec54970_0 .net "address_f_cache", 15 0, v000002137ec53b10_0; 1 drivers
v000002137ec54b50_0 .net "block_f_cache", 31 0, v000002137ec53c50_0; 1 drivers
v000002137ec53250_0 .net "cache_output_rdy", 0 0, L_000002137ec56bc0; 1 drivers
v000002137ec54e70_0 .var "clk", 0 0;
v000002137ec57840_0 .var "data", 15 0;
v000002137ec569e0_0 .net "data_f_dut", 15 0, v000002137ec539d0_0; 1 drivers
v000002137ec572a0_0 .var/2s "instr_type", 31 0;
v000002137ec57a20_0 .net "mem_data", 31 0, v000002137ec54290_0; 1 drivers
v000002137ec57fc0_0 .net "mem_load_req_f_cache", 0 0, v000002137ec54a10_0; 1 drivers
v000002137ec568a0_0 .net "mem_load_req_rdy", 0 0, v000002137ec54330_0; 1 drivers
v000002137ec582e0_0 .net "mem_store_ack", 0 0, v000002137ec53110_0; 1 drivers
v000002137ec57c00_0 .net "mem_store_completed", 0 0, v000002137ec54650_0; 1 drivers
v000002137ec57980_0 .net "mem_store_req_f_cache", 0 0, v000002137ec54c90_0; 1 drivers
v000002137ec56e40_0 .var "rst_n", 0 0;
S_000002137ebe92c0 .scope module, "dut" "cache" 3 62, 3 238 0, S_000002137ec2ebf0;
.timescale 0 0;
.port_info 0 /INPUT 1 "clk";
.port_info 1 /INPUT 1 "rst_n";
.port_info 2 /INPUT 16 "address_in";
.port_info 3 /INPUT 16 "data_in";
.port_info 4 /OUTPUT 16 "data_out";
.port_info 5 /INPUT 32 "instr_type";
.port_info 6 /OUTPUT 32 "data_to_mem";
.port_info 7 /INPUT 32 "data_f_mem";
.port_info 8 /OUTPUT 1 "mem_load_req";
.port_info 9 /OUTPUT 1 "mem_store_req";
.port_info 10 /OUTPUT 1 "mem_store_ack";
.port_info 11 /INPUT 1 "mem_store_completed";
.port_info 12 /INPUT 1 "mem_load_req_rdy";
.port_info 13 /OUTPUT 16 "address_to_mem";
.port_info 14 /OUTPUT 1 "cache_output_rdy";
P_000002137ebff4f0 .param/l "BL_NUM_BYTES" 0 3 271, +C4<00000000000000000000000000000100>;
P_000002137ebff528 .param/l "CACHE_NUM_ROW" 0 3 239, +C4<00000000000000000000000000001000>;
P_000002137ebff560 .param/l "CACHE_NUM_SET" 0 3 240, +C4<00000000000000000000000000000100>;
P_000002137ebff598 .param/l "LRU_BPS" 0 3 241, +C4<00000000000000000000000000000100>;
P_000002137ebff5d0 .param/l "LRU_BPS_SQRD" 0 3 242, +C4<00000000000000000000000000000000000000000000000000000000000001111>;
v000002137ec53070 .array "LRU", 31 0, 3 0;
v000002137ec537f0_0 .var "activate", 0 0;
v000002137ec53430_0 .net "address_in", 15 0, v000002137ec548d0_0; 1 drivers
v000002137ec53b10_0 .var "address_to_mem", 15 0;
v000002137ec53750_0 .var "block_address", 15 0;
v000002137ec53bb0_0 .var "block_num", 15 0;
v000002137ec53890_0 .var "busy", 0 0;
v000002137ec534d0 .array "cache_data", 31 0, 31 0;
v000002137ec53930_0 .net "cache_output_rdy", 0 0, L_000002137ec56bc0; alias, 1 drivers
v000002137ec53390_0 .net "clk", 0 0, v000002137ec54e70_0; 1 drivers
v000002137ec53ed0_0 .net "data_f_mem", 31 0, v000002137ec54290_0; alias, 1 drivers
v000002137ec54d30_0 .net "data_in", 15 0, v000002137ec57840_0; 1 drivers
v000002137ec539d0_0 .var "data_out", 15 0;
v000002137ec53c50_0 .var "data_to_mem", 31 0;
v000002137ec53cf0_0 .net/2s "instr_type", 31 0, v000002137ec572a0_0; 1 drivers
v000002137ec54a10_0 .var "mem_load_req", 0 0;
v000002137ec54510_0 .net "mem_load_req_rdy", 0 0, v000002137ec54330_0; alias, 1 drivers
v000002137ec53110_0 .var "mem_store_ack", 0 0;
v000002137ec54830_0 .net "mem_store_completed", 0 0, v000002137ec54650_0; alias, 1 drivers
v000002137ec54c90_0 .var "mem_store_req", 0 0;
v000002137ec541f0_0 .var "offset", 1 0;
v000002137ec53d90_0 .var "read_success", 0 0;
v000002137ec531b0_0 .net "rst_n", 0 0, v000002137ec56e40_0; 1 drivers
v000002137ec532f0 .array "tag_number_set", 31 0, 10 0;
v000002137ec546f0 .array "vld_set", 31 0, 0 0;
E_000002137ec11080 .event anyedge, v000002137ec53cf0_0, v000002137ec54d30_0, v000002137ec53430_0, v000002137ec537f0_0;
E_000002137ec11940/0 .event negedge, v000002137ec531b0_0;
E_000002137ec11940/1 .event posedge, v000002137ec53390_0;
E_000002137ec11940 .event/or E_000002137ec11940/0, E_000002137ec11940/1;
L_000002137ec56bc0 .reduce/nor v000002137ec53890_0;
S_000002137ebe9550 .scope begin, "$ivl_for_loop5" "$ivl_for_loop5" 3 408, 3 408 0, S_000002137ebe92c0;
.timescale 0 0;
v000002137ec20690_0 .var/2s "i", 31 0;
S_000002137ebb7c00 .scope begin, "$ivl_for_loop6" "$ivl_for_loop6" 3 409, 3 409 0, S_000002137ebe9550;
.timescale 0 0;
v000002137ec1fab0_0 .var/2s "j", 31 0;
S_000002137ebb7d90 .scope begin, "$unm_blk_40" "$unm_blk_40" 3 441, 3 441 0, S_000002137ebe92c0;
.timescale 0 0;
v000002137ec20730_0 .var "set_match_stm", 0 0;
v000002137ec207d0_0 .var "set_num_fsis", 1 0;
v000002137ec20870_0 .var "set_num_stm", 1 0;
v000002137ec1fb50_0 .var "space_found_fsis", 0 0;
E_000002137ec11600 .event anyedge, v000002137ec54510_0;
S_000002137ebb7f20 .scope begin, "$unm_blk_49" "$unm_blk_49" 3 496, 3 496 0, S_000002137ebe92c0;
.timescale 0 0;
v000002137ec20370_0 .var "set_num_st", 1 0;
v000002137ec1fa10_0 .var "space_found_st", 0 0;
S_000002137ebb80b0 .scope autotask, "find_oldest_set_col" "find_oldest_set_col" 3 362, 3 362 0, S_000002137ebe92c0;
.timescale 0 0;
v000002137ec1fbf0_0 .var "highest_index", 1 0;
v000002137ec1ff10_0 .var "highest_val", 3 0;
v000002137ec20550_0 .var "oldest_set_col", 1 0;
v000002137ec1fc90_0 .var/2s "row", 7 0;
TD_tb.dut.find_oldest_set_col ;
%pushi/vec4 0, 0, 2;
%store/vec4 v000002137ec1fbf0_0, 0, 2;
%load/vec4 v000002137ec1fc90_0;
%pad/s 11;
%pad/s 13;
%muli 4, 0, 13;
%ix/vec4/s 4;
%load/vec4a v000002137ec53070, 4;
%store/vec4 v000002137ec1ff10_0, 0, 4;
%pushi/vec4 0, 0, 2;
%store/vec4 v000002137ec1fbf0_0, 0, 2;
%fork t_1, S_000002137ebb8240;
%jmp t_0;
.scope S_000002137ebb8240;
t_1 ;
%pushi/vec4 1, 0, 32;
%store/vec4 v000002137ec1f970_0, 0, 32;
T_0.0 ;
%load/vec4 v000002137ec1f970_0;
%cmpi/s 4, 0, 32;
%jmp/0xz T_0.1, 5;
%load/vec4 v000002137ec1ff10_0;
%load/vec4 v000002137ec1fc90_0;
%pad/s 11;
%pad/s 13;
%muli 4, 0, 13;
%pad/s 14;
%load/vec4 v000002137ec1f970_0;
%pad/s 14;
%add;
%ix/vec4/s 4;
%load/vec4a v000002137ec53070, 4;
%cmp/u;
%jmp/0xz T_0.2, 5;
%load/vec4 v000002137ec1fc90_0;
%pad/s 11;
%pad/s 13;
%muli 4, 0, 13;
%pad/s 14;
%load/vec4 v000002137ec1f970_0;
%pad/s 14;
%add;
%ix/vec4/s 4;
%load/vec4a v000002137ec53070, 4;
%store/vec4 v000002137ec1ff10_0, 0, 4;
%load/vec4 v000002137ec1f970_0;
%pad/s 2;
%store/vec4 v000002137ec1fbf0_0, 0, 2;
T_0.2 ;
; show_stmt_assign_vector: Get l-value for compressed += operand
%load/vec4 v000002137ec1f970_0;
%pushi/vec4 1, 0, 32;
%add;
%cast2;
%store/vec4 v000002137ec1f970_0, 0, 32;
%jmp T_0.0;
T_0.1 ;
%end;
.scope S_000002137ebb80b0;
t_0 %join;
%load/vec4 v000002137ec1fbf0_0;
%store/vec4 v000002137ec20550_0, 0, 2;
%end;
S_000002137ebb8240 .scope autobegin, "$ivl_for_loop2" "$ivl_for_loop2" 3 373, 3 373 0, S_000002137ebb80b0;
.timescale 0 0;
v000002137ec1f970_0 .var/2s "i", 31 0;
S_000002137ebb83d0 .scope autotask, "find_space_in_set" "find_space_in_set" 3 331, 3 331 0, S_000002137ebe92c0;
.timescale 0 0;
v000002137ec20410_0 .var/2s "row", 7 0;
v000002137ec1fd30_0 .var "set_num", 1 0;
v000002137ec20050_0 .var "space_found", 0 0;
v000002137ec1fdd0_0 .var "state", 0 0;
v000002137ec200f0_0 .var "tag", 10 0;
TD_tb.dut.find_space_in_set ;
%pushi/vec4 0, 0, 1;
%store/vec4 v000002137ec1fdd0_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v000002137ec20050_0, 0, 1;
%fork t_3, S_000002137ed610a0;
%jmp t_2;
.scope S_000002137ed610a0;
t_3 ;
%pushi/vec4 0, 0, 32;
%store/vec4 v000002137ec1ffb0_0, 0, 32;
T_1.4 ;
%load/vec4 v000002137ec1ffb0_0;
%cmpi/s 4, 0, 32;
%jmp/0xz T_1.5, 5;
%load/vec4 v000002137ec20410_0;
%pad/s 11;
%pad/s 13;
%muli 4, 0, 13;
%pad/s 14;
%load/vec4 v000002137ec1ffb0_0;
%pad/s 14;
%add;
%ix/vec4/s 4;
%load/vec4a v000002137ec546f0, 4;
%pad/u 32;
%pushi/vec4 0, 0, 32;
%cmp/e;
%flag_get/vec4 4;
%load/vec4 v000002137ec1fdd0_0;
%pad/u 32;
%pushi/vec4 0, 0, 32;
%cmp/e;
%flag_get/vec4 4;
%and;
%flag_set/vec4 8;
%load/vec4 v000002137ec20410_0;
%pad/s 11;
%pad/s 13;
%muli 4, 0, 13;
%pad/s 14;
%load/vec4 v000002137ec1ffb0_0;
%pad/s 14;
%add;
%ix/vec4/s 4;
%load/vec4a v000002137ec546f0, 4;
%pad/u 32;
%pushi/vec4 1, 0, 32;
%cmp/e;
%flag_get/vec4 4;
%load/vec4 v000002137ec200f0_0;
%load/vec4 v000002137ec20410_0;
%pad/s 11;
%pad/s 13;
%muli 4, 0, 13;
%pad/s 14;
%load/vec4 v000002137ec1ffb0_0;
%pad/s 14;
%add;
%ix/vec4/s 4;
%load/vec4a v000002137ec532f0, 4;
%cmp/e;
%flag_get/vec4 4;
%and;
%load/vec4 v000002137ec1fdd0_0;
%pad/u 32;
%pushi/vec4 0, 0, 32;
%cmp/e;
%flag_get/vec4 4;
%and;
%flag_set/vec4 9;
%flag_or 9, 8;
%jmp/0xz T_1.6, 9;
%pushi/vec4 1, 0, 1;
%store/vec4 v000002137ec20050_0, 0, 1;
%load/vec4 v000002137ec1ffb0_0;
%pad/s 2;
%store/vec4 v000002137ec1fd30_0, 0, 2;
%pushi/vec4 1, 0, 1;
%store/vec4 v000002137ec1fdd0_0, 0, 1;
%vpi_call/w 3 352 "$display", "find_space_in_set - space at vld_set[%d][%d]", v000002137ec20410_0, v000002137ec1ffb0_0 {0 0 0};
T_1.6 ;
; show_stmt_assign_vector: Get l-value for compressed += operand
%load/vec4 v000002137ec1ffb0_0;
%pushi/vec4 1, 0, 32;
%add;
%cast2;
%store/vec4 v000002137ec1ffb0_0, 0, 32;
%jmp T_1.4;
T_1.5 ;
%end;
.scope S_000002137ebb83d0;
t_2 %join;
%load/vec4 v000002137ec20050_0;
%flag_set/vec4 8;
%jmp/0xz T_1.8, 8;
%vpi_call/w 3 356 "$display", "find_space_in_set - space_found at col %d, block_num is %d", v000002137ec1fd30_0, v000002137ec20410_0 {0 0 0};
T_1.8 ;
%end;
S_000002137ed610a0 .scope autobegin, "$ivl_for_loop1" "$ivl_for_loop1" 3 341, 3 341 0, S_000002137ebb83d0;
.timescale 0 0;
v000002137ec1ffb0_0 .var/2s "i", 31 0;
S_000002137ed61230 .scope task, "send_to_mem" "send_to_mem" 3 280, 3 280 0, S_000002137ebe92c0;
.timescale 0 0;
v000002137ec20190_0 .var/2s "row", 7 0;
v000002137ec205f0_0 .var "set_col", 1 0;
E_000002137ec11980 .event anyedge, v000002137ec54830_0;
TD_tb.dut.send_to_mem ;
%load/vec4 v000002137ec20190_0;
%pad/s 11;
%pad/s 13;
%muli 4, 0, 13;
%pad/s 14;
%load/vec4 v000002137ec205f0_0;
%pad/u 4;
%pad/u 14;
%add;
%ix/vec4 4;
%load/vec4a v000002137ec534d0, 4;
%store/vec4 v000002137ec53c50_0, 0, 32;
%vpi_call/w 3 286 "$display", "Send to mem, set column is %d", v000002137ec205f0_0 {0 0 0};
%load/vec4 v000002137ec20190_0;
%pad/s 11;
%pad/s 13;
%muli 4, 0, 13;
%pad/s 14;
%load/vec4 v000002137ec205f0_0;
%pad/u 4;
%pad/u 14;
%add;
%ix/vec4 4;
%load/vec4a v000002137ec534d0, 4;
%vpi_call/w 3 287 "$display", "Send to mem, data[%d][%d] is %h", v000002137ec20190_0, v000002137ec205f0_0, S<0,vec4,u32> {1 0 0};
%pushi/vec4 1, 0, 1;
%store/vec4 v000002137ec54c90_0, 0, 1;
%load/vec4 v000002137ec53430_0;
%store/vec4 v000002137ec53b10_0, 0, 16;
%vpi_call/w 3 290 "$display", "%0t", $time {0 0 0};
T_2.10 ;
%load/vec4 v000002137ec54830_0;
%pad/u 32;
%pushi/vec4 1, 0, 32;
%cmp/e;
%flag_get/vec4 4;
%cmpi/ne 1, 0, 1;
%jmp/0xz T_2.11, 6;
%wait E_000002137ec11980;
%jmp T_2.10;
T_2.11 ;
%vpi_call/w 3 292 "$display", "Memory store has been processed - from cache" {0 0 0};
%vpi_call/w 3 293 "$display", "%0t", $time {0 0 0};
%pushi/vec4 0, 0, 1;
%store/vec4 v000002137ec54c90_0, 0, 1;
T_2.12 ;
%load/vec4 v000002137ec54830_0;
%pad/u 32;
%pushi/vec4 0, 0, 32;
%cmp/e;
%flag_get/vec4 4;
%cmpi/ne 1, 0, 1;
%jmp/0xz T_2.13, 6;
%wait E_000002137ec11980;
%jmp T_2.12;
T_2.13 ;
%vpi_call/w 3 298 "$display", "Memory store has fully completed - from cache" {0 0 0};
%vpi_call/w 3 299 "$display", "%0t", $time {0 0 0};
%end;
S_000002137ed613c0 .scope autotask, "set_tag_match" "set_tag_match" 3 307, 3 307 0, S_000002137ebe92c0;
.timescale 0 0;
v000002137ec202d0_0 .var/2s "row", 7 0;
v000002137ec204b0_0 .var "set_num", 1 0;
v000002137ec53610_0 .var "state", 0 0;
v000002137ec54010_0 .var "tag", 10 0;
v000002137ec53a70_0 .var "vld_bool", 0 0;
TD_tb.dut.set_tag_match ;
%fork t_5, S_000002137ed61550;
%jmp t_4;
.scope S_000002137ed61550;
t_5 ;
%pushi/vec4 0, 0, 1;
%store/vec4 v000002137ec53610_0, 0, 1;
%pushi/vec4 0, 0, 32;
%store/vec4 v000002137ec20230_0, 0, 32;
T_3.14 ;
%load/vec4 v000002137ec20230_0;
%cmpi/s 4, 0, 32;
%jmp/0xz T_3.15, 5;
%load/vec4 v000002137ec53bb0_0;
%pad/u 19;
%pad/u 21;
%muli 4, 0, 21;
%pad/u 22;
%load/vec4 v000002137ec20230_0;
%pad/s 22;
%add;
%ix/vec4 4;
%load/vec4a v000002137ec546f0, 4;
%pad/u 32;
%pushi/vec4 1, 0, 32;
%cmp/e;
%flag_get/vec4 4;
%load/vec4 v000002137ec202d0_0;
%pad/s 11;
%pad/s 13;
%muli 4, 0, 13;
%pad/s 14;
%load/vec4 v000002137ec20230_0;
%pad/s 14;
%add;
%ix/vec4/s 4;
%load/vec4a v000002137ec532f0, 4;
%load/vec4 v000002137ec54010_0;
%cmp/e;
%flag_get/vec4 4;
%and;
%load/vec4 v000002137ec53610_0;
%pad/u 32;
%pushi/vec4 0, 0, 32;
%cmp/e;
%flag_get/vec4 4;
%and;
%flag_set/vec4 8;
%jmp/0xz T_3.16, 8;
%pushi/vec4 1, 0, 1;
%store/vec4 v000002137ec53a70_0, 0, 1;
%load/vec4 v000002137ec20230_0;
%pad/s 2;
%store/vec4 v000002137ec204b0_0, 0, 2;
%pushi/vec4 1, 0, 1;
%store/vec4 v000002137ec53610_0, 0, 1;
T_3.16 ;
; show_stmt_assign_vector: Get l-value for compressed += operand
%load/vec4 v000002137ec20230_0;
%pushi/vec4 1, 0, 32;
%add;
%cast2;
%store/vec4 v000002137ec20230_0, 0, 32;
%jmp T_3.14;
T_3.15 ;
%end;
.scope S_000002137ed613c0;
t_4 %join;
%end;
S_000002137ed61550 .scope autobegin, "$ivl_for_loop0" "$ivl_for_loop0" 3 314, 3 314 0, S_000002137ed613c0;
.timescale 0 0;
v000002137ec20230_0 .var/2s "i", 31 0;
S_000002137ed616e0 .scope autotask, "update_lru" "update_lru" 3 385, 3 385 0, S_000002137ebe92c0;
.timescale 0 0;
v000002137ec540b0_0 .var/2s "row", 7 0;
v000002137ec536b0_0 .var "set_num", 1 0;
TD_tb.dut.update_lru ;
%fork t_7, S_000002137ec55080;
%jmp t_6;
.scope S_000002137ec55080;
t_7 ;
%pushi/vec4 0, 0, 32;
%store/vec4 v000002137ec54dd0_0, 0, 32;
T_4.18 ;
%load/vec4 v000002137ec54dd0_0;
%cmpi/s 8, 0, 32;
%jmp/0xz T_4.19, 5;
%fork t_9, S_000002137ec559e0;
%jmp t_8;
.scope S_000002137ec559e0;
t_9 ;
%pushi/vec4 0, 0, 32;
%store/vec4 v000002137ec54f10_0, 0, 32;
T_4.20 ;
%load/vec4 v000002137ec54f10_0;
%cmpi/s 4, 0, 32;
%jmp/0xz T_4.21, 5;
%load/vec4 v000002137ec54dd0_0;
%pad/s 35;
%pad/s 37;
%muli 4, 0, 37;
%pad/s 38;
%load/vec4 v000002137ec54f10_0;
%pad/s 38;
%add;
%ix/vec4/s 4;
%load/vec4a v000002137ec53070, 4;
%pad/u 65;
%cmpi/ne 15, 0, 65;
%jmp/0xz T_4.22, 4;
%load/vec4 v000002137ec54dd0_0;
%pad/s 35;
%pad/s 37;
%muli 4, 0, 37;
%pad/s 38;
%load/vec4 v000002137ec54f10_0;
%pad/s 38;
%add;
%ix/vec4/s 4;
%load/vec4a v000002137ec53070, 4;
%addi 1, 0, 4;
%load/vec4 v000002137ec54dd0_0;
%pad/s 35;
%pad/s 37;
%muli 4, 0, 37;
%pad/s 38;
%load/vec4 v000002137ec54f10_0;
%pad/s 38;
%add;
%ix/vec4/s 4;
%store/vec4a v000002137ec53070, 4, 0;
T_4.22 ;
; show_stmt_assign_vector: Get l-value for compressed += operand
%load/vec4 v000002137ec54f10_0;
%pushi/vec4 1, 0, 32;
%add;
%cast2;
%store/vec4 v000002137ec54f10_0, 0, 32;
%jmp T_4.20;
T_4.21 ;
%end;
.scope S_000002137ec55080;
t_8 %join;
; show_stmt_assign_vector: Get l-value for compressed += operand
%load/vec4 v000002137ec54dd0_0;
%pushi/vec4 1, 0, 32;
%add;
%cast2;
%store/vec4 v000002137ec54dd0_0, 0, 32;
%jmp T_4.18;
T_4.19 ;
%end;
.scope S_000002137ed616e0;
t_6 %join;
%pushi/vec4 0, 0, 4;
%load/vec4 v000002137ec540b0_0;
%pad/s 11;
%pad/s 13;
%muli 4, 0, 13;
%pad/s 14;
%load/vec4 v000002137ec536b0_0;
%pad/u 4;
%pad/u 14;
%add;
%ix/vec4 4;
%store/vec4a v000002137ec53070, 4, 0;
%end;
S_000002137ec55080 .scope autobegin, "$ivl_for_loop3" "$ivl_for_loop3" 3 391, 3 391 0, S_000002137ed616e0;
.timescale 0 0;
v000002137ec54dd0_0 .var/2s "i", 31 0;
S_000002137ec559e0 .scope autobegin, "$ivl_for_loop4" "$ivl_for_loop4" 3 392, 3 392 0, S_000002137ec55080;
.timescale 0 0;
v000002137ec54f10_0 .var/2s "j", 31 0;
S_000002137ec553a0 .scope module, "simple_ram" "RAM" 3 81, 3 537 0, S_000002137ec2ebf0;
.timescale 0 0;
.port_info 0 /INPUT 1 "clk";
.port_info 1 /INPUT 16 "address_in";
.port_info 2 /INPUT 32 "data_in";
.port_info 3 /OUTPUT 32 "data_out";
.port_info 4 /INPUT 1 "wren";
.port_info 5 /OUTPUT 1 "load_completed";
.port_info 6 /OUTPUT 1 "store_completed";
.port_info 7 /INPUT 1 "store_ack";
.port_info 8 /INPUT 1 "mem_load_req";
.port_info 9 /OUTPUT 1 "load_toggle";
P_000002137e8f95c0 .param/l "D_WIDTH" 0 3 538, +C4<00000000000000000000000000100000>;
P_000002137e8f95f8 .param/l "WIDTH_AD" 0 3 539, +C4<00000000000000000000000000010000>;
v000002137ec53e30_0 .net "address_in", 15 0, v000002137ec53b10_0; alias, 1 drivers
v000002137ec54150_0 .net "clk", 0 0, v000002137ec54e70_0; alias, 1 drivers
v000002137ec53570_0 .net "data_in", 31 0, v000002137ec53c50_0; alias, 1 drivers
v000002137ec54290_0 .var "data_out", 31 0;
v000002137ec54330_0 .var "load_completed", 0 0;
v000002137ec54ab0_0 .var "load_toggle", 0 0;
v000002137ec543d0 .array "mem", 65535 0, 31 0;
v000002137ec54470_0 .net "mem_load_req", 0 0, v000002137ec54a10_0; alias, 1 drivers
v000002137ec545b0_0 .net "store_ack", 0 0, v000002137ec53110_0; alias, 1 drivers
v000002137ec54650_0 .var "store_completed", 0 0;
v000002137ec54bf0_0 .net "wren", 0 0, v000002137ec54c90_0; alias, 1 drivers
E_000002137ec10d80 .event posedge, v000002137ec53390_0;
S_000002137ec55e90 .scope begin, "$ivl_for_loop7" "$ivl_for_loop7" 3 558, 3 558 0, S_000002137ec553a0;
.timescale 0 0;
v000002137ec53f70_0 .var/2s "i", 31 0;
.scope S_000002137ebe92c0;
T_5 ;
%pushi/vec4 0, 0, 1;
%store/vec4 v000002137ec53d90_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v000002137ec537f0_0, 0, 1;
%end;
.thread T_5, $init;
.scope S_000002137ebe92c0;
T_6 ;
%wait E_000002137ec11940;
%load/vec4 v000002137ec531b0_0;
%pad/u 32;
%cmpi/e 0, 0, 32;
%jmp/0xz T_6.0, 4;
%pushi/vec4 0, 0, 1;
%assign/vec4 v000002137ec53890_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v000002137ec537f0_0, 0;
%fork t_11, S_000002137ebe9550;
%jmp t_10;
.scope S_000002137ebe9550;
t_11 ;
%pushi/vec4 0, 0, 32;
%store/vec4 v000002137ec20690_0, 0, 32;
T_6.2 ;
%load/vec4 v000002137ec20690_0;
%cmpi/s 8, 0, 32;
%jmp/0xz T_6.3, 5;
%fork t_13, S_000002137ebb7c00;
%jmp t_12;
.scope S_000002137ebb7c00;
t_13 ;
%pushi/vec4 0, 0, 32;
%store/vec4 v000002137ec1fab0_0, 0, 32;
T_6.4 ;
%load/vec4 v000002137ec1fab0_0;
%cmpi/s 4, 0, 32;
%jmp/0xz T_6.5, 5;
%pushi/vec4 0, 0, 1;
%load/vec4 v000002137ec20690_0;
%pad/s 35;
%pad/s 37;
%muli 4, 0, 37;
%pad/s 38;
%load/vec4 v000002137ec1fab0_0;
%pad/s 38;
%add;
%ix/vec4/s 3;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v000002137ec546f0, 0, 4;
%load/vec4 v000002137ec1fab0_0;
%addi 1, 0, 32;
%cast2;
%store/vec4 v000002137ec1fab0_0, 0, 32;
%jmp T_6.4;
T_6.5 ;
%end;
.scope S_000002137ebe9550;
t_12 %join;
%load/vec4 v000002137ec20690_0;
%addi 1, 0, 32;
%cast2;
%store/vec4 v000002137ec20690_0, 0, 32;
%jmp T_6.2;
T_6.3 ;
%end;
.scope S_000002137ebe92c0;
t_10 %join;
%jmp T_6.1;
T_6.0 ;
%load/vec4 v000002137ec531b0_0;
%flag_set/vec4 8;
%jmp/0xz T_6.6, 8;
%pushi/vec4 1, 0, 1;
%assign/vec4 v000002137ec537f0_0, 0;
T_6.6 ;
T_6.1 ;
%jmp T_6;
.thread T_6;
.scope S_000002137ebb7d90;
T_7 ;
%pushi/vec4 0, 0, 1;
%store/vec4 v000002137ec20730_0, 0, 1;
%pushi/vec4 0, 0, 2;
%store/vec4 v000002137ec20870_0, 0, 2;
%pushi/vec4 0, 0, 1;
%store/vec4 v000002137ec1fb50_0, 0, 1;
%pushi/vec4 0, 0, 2;
%store/vec4 v000002137ec207d0_0, 0, 2;
%end;
.thread T_7, $init;
.scope S_000002137ebb7f20;
T_8 ;
%pushi/vec4 0, 0, 1;
%store/vec4 v000002137ec1fa10_0, 0, 1;
%pushi/vec4 0, 0, 2;
%store/vec4 v000002137ec20370_0, 0, 2;
%end;
.thread T_8, $init;
.scope S_000002137ebe92c0;
T_9 ;
%wait E_000002137ec11080;
%load/vec4 v000002137ec537f0_0;
%flag_set/vec4 8;
%jmp/0xz T_9.0, 8;
%pushi/vec4 1, 0, 1;
%store/vec4 v000002137ec53890_0, 0, 1;
%vpi_call/w 3 424 "$display", "instr type is %d, time is: %0t", v000002137ec53cf0_0, $time {0 0 0};
%load/vec4 v000002137ec53430_0;
%pad/u 32;
%pushi/vec4 2, 0, 32;
%mod;
%cmpi/ne 0, 0, 32;
%jmp/0xz T_9.2, 4;
%vpi_call/w 3 426 "$display", "Address needs to be word aligned (divisible by 2) for now" {0 0 0};
%vpi_call/w 3 427 "$display", "This most likely means to load a byte. If address 0x03, we should actually load word at 0x02. Then only return the upper 8 bits" {0 0 0};
%vpi_call/w 3 428 "$finish" {0 0 0};
T_9.2 ;
%load/vec4 v000002137ec53430_0;
%pad/u 32;
%pushi/vec4 4, 0, 32;
%div;
%pad/u 16;
%store/vec4 v000002137ec53750_0, 0, 16;
%load/vec4 v000002137ec53750_0;
%pad/u 32;
%pushi/vec4 8, 0, 32;
%mod;
%pad/u 16;
%store/vec4 v000002137ec53bb0_0, 0, 16;
%load/vec4 v000002137ec53430_0;
%parti/s 2, 0, 2;
%store/vec4 v000002137ec541f0_0, 0, 2;
%vpi_call/w 3 434 "$display", "address is %h", v000002137ec53430_0 {0 0 0};
%vpi_call/w 3 435 "$display", "block_address is %d", v000002137ec53750_0 {0 0 0};
%vpi_call/w 3 436 "$display", "block_num is %d", v000002137ec53bb0_0 {0 0 0};
%vpi_call/w 3 437 "$display", "tag is %d", &PV<v000002137ec53430_0, 5, 11> {0 0 0};
%vpi_call/w 3 438 "$display", "offset is %d", &PV<v000002137ec53430_0, 0, 2> {0 0 0};
%load/vec4 v000002137ec53cf0_0;
%cmpi/e 0, 0, 32;
%jmp/0xz T_9.4, 4;
%fork t_15, S_000002137ebb7d90;
%jmp t_14;
.scope S_000002137ebb7d90;
t_15 ;
%vpi_call/w 3 450 "$display", "Got a read instruction" {0 0 0};
%alloc S_000002137ed613c0;
%load/vec4 v000002137ec53bb0_0;
%cast2;
%pad/u 8;
%store/vec4 v000002137ec202d0_0, 0, 8;
%load/vec4 v000002137ec53430_0;
%parti/s 11, 5, 4;
%store/vec4 v000002137ec54010_0, 0, 11;
%fork TD_tb.dut.set_tag_match, S_000002137ed613c0;
%join;
%load/vec4 v000002137ec53a70_0;
%store/vec4 v000002137ec20730_0, 0, 1;
%load/vec4 v000002137ec204b0_0;
%store/vec4 v000002137ec20870_0, 0, 2;
%free S_000002137ed613c0;
%load/vec4 v000002137ec20730_0;
%flag_set/vec4 8;
%jmp/0xz T_9.6, 8;
%vpi_call/w 3 453 "$display", "vld[block_num] passed" {0 0 0};
%pushi/vec4 1, 0, 1;
%store/vec4 v000002137ec53d90_0, 0, 1;
%load/vec4 v000002137ec541f0_0;
%pad/u 32;
%cmpi/e 0, 0, 32;
%jmp/0xz T_9.8, 4;
%load/vec4 v000002137ec53bb0_0;
%pad/u 19;
%pad/u 21;
%muli 4, 0, 21;
%pad/u 22;
%load/vec4 v000002137ec20870_0;
%pad/u 4;
%pad/u 22;
%add;
%ix/vec4 4;
%load/vec4a v000002137ec534d0, 4;
%parti/s 16, 0, 2;
%store/vec4 v000002137ec539d0_0, 0, 16;
%jmp T_9.9;
T_9.8 ;
%load/vec4 v000002137ec541f0_0;
%pad/u 32;
%cmpi/e 2, 0, 32;
%jmp/0xz T_9.10, 4;
%load/vec4 v000002137ec53bb0_0;
%pad/u 19;
%pad/u 21;
%muli 4, 0, 21;
%pad/u 22;
%load/vec4 v000002137ec20870_0;
%pad/u 4;
%pad/u 22;
%add;
%ix/vec4 4;
%load/vec4a v000002137ec534d0, 4;
%parti/s 16, 16, 6;
%store/vec4 v000002137ec539d0_0, 0, 16;
T_9.10 ;
T_9.9 ;
%alloc S_000002137ed616e0;
%load/vec4 v000002137ec53bb0_0;
%cast2;
%pad/u 8;
%store/vec4 v000002137ec540b0_0, 0, 8;
%load/vec4 v000002137ec20870_0;
%store/vec4 v000002137ec536b0_0, 0, 2;
%fork TD_tb.dut.update_lru, S_000002137ed616e0;
%join;
%free S_000002137ed616e0;
T_9.6 ;
%load/vec4 v000002137ec53d90_0;
%pad/u 32;
%cmpi/e 0, 0, 32;
%jmp/0xz T_9.12, 4;
%vpi_call/w 3 466 "$display", "The tag did not match the address, going to memory" {0 0 0};
%pushi/vec4 1, 0, 1;
%store/vec4 v000002137ec54a10_0, 0, 1;
%load/vec4 v000002137ec53430_0;
%store/vec4 v000002137ec53b10_0, 0, 16;
%alloc S_000002137ebb83d0;
%load/vec4 v000002137ec53bb0_0;
%cast2;
%pad/u 8;
%store/vec4 v000002137ec20410_0, 0, 8;
%load/vec4 v000002137ec53430_0;
%parti/s 11, 5, 4;
%store/vec4 v000002137ec200f0_0, 0, 11;
%fork TD_tb.dut.find_space_in_set, S_000002137ebb83d0;
%join;
%load/vec4 v000002137ec20050_0;
%store/vec4 v000002137ec1fb50_0, 0, 1;
%load/vec4 v000002137ec1fd30_0;
%store/vec4 v000002137ec207d0_0, 0, 2;
%free S_000002137ebb83d0;
%load/vec4 v000002137ec1fb50_0;
%flag_set/vec4 8;
%jmp/0xz T_9.14, 8;
T_9.16 ;
%load/vec4 v000002137ec54510_0;
%pad/u 32;
%pushi/vec4 1, 0, 32;
%cmp/e;
%flag_get/vec4 4;
%cmpi/ne 1, 0, 1;
%jmp/0xz T_9.17, 6;
%wait E_000002137ec11600;
%jmp T_9.16;
T_9.17 ;
%load/vec4 v000002137ec53ed0_0;
%load/vec4 v000002137ec53bb0_0;
%pad/u 19;
%pad/u 21;
%muli 4, 0, 21;
%pad/u 22;
%load/vec4 v000002137ec207d0_0;
%pad/u 4;
%pad/u 22;
%add;
%ix/vec4 4;
%store/vec4a v000002137ec534d0, 4, 0;
%vpi_call/w 3 476 "$display", "inside read, data_f_mem is %h", v000002137ec53ed0_0 {0 0 0};
%load/vec4 v000002137ec541f0_0;
%pad/u 32;
%cmpi/e 0, 0, 32;
%jmp/0xz T_9.18, 4;
%load/vec4 v000002137ec53bb0_0;
%pad/u 19;
%pad/u 21;
%muli 4, 0, 21;
%pad/u 22;
%load/vec4 v000002137ec207d0_0;
%pad/u 4;
%pad/u 22;
%add;
%ix/vec4 4;
%load/vec4a v000002137ec534d0, 4;
%parti/s 16, 0, 2;
%store/vec4 v000002137ec539d0_0, 0, 16;
%jmp T_9.19;
T_9.18 ;
%load/vec4 v000002137ec541f0_0;
%pad/u 32;
%cmpi/e 2, 0, 32;
%jmp/0xz T_9.20, 4;
%load/vec4 v000002137ec53bb0_0;
%pad/u 19;
%pad/u 21;
%muli 4, 0, 21;
%pad/u 22;
%load/vec4 v000002137ec207d0_0;
%pad/u 4;
%pad/u 22;
%add;
%ix/vec4 4;
%load/vec4a v000002137ec534d0, 4;
%parti/s 16, 16, 6;
%store/vec4 v000002137ec539d0_0, 0, 16;
T_9.20 ;
T_9.19 ;
%pushi/vec4 1, 0, 1;
%load/vec4 v000002137ec53bb0_0;
%pad/u 19;
%pad/u 21;
%muli 4, 0, 21;
%pad/u 22;
%load/vec4 v000002137ec207d0_0;
%pad/u 4;
%pad/u 22;
%add;
%ix/vec4 4;
%store/vec4a v000002137ec546f0, 4, 0;
%load/vec4 v000002137ec53430_0;
%parti/s 11, 5, 4;
%load/vec4 v000002137ec53bb0_0;
%pad/u 19;
%pad/u 21;
%muli 4, 0, 21;
%pad/u 22;
%load/vec4 v000002137ec207d0_0;
%pad/u 4;
%pad/u 22;
%add;
%ix/vec4 4;
%store/vec4a v000002137ec532f0, 4, 0;
%alloc S_000002137ed616e0;
%load/vec4 v000002137ec53bb0_0;
%cast2;
%pad/u 8;
%store/vec4 v000002137ec540b0_0, 0, 8;
%load/vec4 v000002137ec207d0_0;
%store/vec4 v000002137ec536b0_0, 0, 2;
%fork TD_tb.dut.update_lru, S_000002137ed616e0;
%join;
%free S_000002137ed616e0;
T_9.14 ;
T_9.12 ;
%vpi_call/w 3 492 "$display", "Read data from cache, data_out from cache is %h", v000002137ec539d0_0 {0 0 0};
%end;
.scope S_000002137ebe92c0;
t_14 %join;
%jmp T_9.5;
T_9.4 ;
%load/vec4 v000002137ec53cf0_0;
%cmpi/e 1, 0, 32;
%jmp/0xz T_9.22, 4;
%fork t_17, S_000002137ebb7f20;
%jmp t_16;
.scope S_000002137ebb7f20;
t_17 ;
%vpi_call/w 3 500 "$display", "Got a write instruction, data to write is %h", v000002137ec54d30_0 {0 0 0};
%alloc S_000002137ebb83d0;
%load/vec4 v000002137ec53bb0_0;
%cast2;
%pad/u 8;
%store/vec4 v000002137ec20410_0, 0, 8;
%load/vec4 v000002137ec53430_0;
%parti/s 11, 5, 4;
%store/vec4 v000002137ec200f0_0, 0, 11;
%fork TD_tb.dut.find_space_in_set, S_000002137ebb83d0;
%join;
%load/vec4 v000002137ec20050_0;
%store/vec4 v000002137ec1fa10_0, 0, 1;
%load/vec4 v000002137ec1fd30_0;
%store/vec4 v000002137ec20370_0, 0, 2;
%free S_000002137ebb83d0;
%load/vec4 v000002137ec1fa10_0;
%flag_set/vec4 8;
%jmp/0xz T_9.24, 8;
%pushi/vec4 1, 0, 1;
%load/vec4 v000002137ec53bb0_0;
%pad/u 19;
%pad/u 21;
%muli 4, 0, 21;
%pad/u 22;
%load/vec4 v000002137ec20370_0;
%pad/u 4;
%pad/u 22;
%add;
%ix/vec4 4;
%store/vec4a v000002137ec546f0, 4, 0;
%load/vec4 v000002137ec53bb0_0;
%pad/u 19;
%pad/u 21;
%muli 4, 0, 21;
%pad/u 22;
%load/vec4 v000002137ec20370_0;
%pad/u 4;
%pad/u 22;
%add;
%ix/vec4 4;
%load/vec4a v000002137ec546f0, 4;
%vpi_call/w 3 505 "$display", "vld_set[%d][%d] is %d", v000002137ec53bb0_0, v000002137ec20370_0, S<0,vec4,u1> {1 0 0};
%jmp T_9.25;
T_9.24 ;
%load/vec4 v000002137ec1fa10_0;
%pad/u 32;
%cmpi/e 0, 0, 32;
%jmp/0xz T_9.26, 4;
%vpi_call/w 3 511 "$display", "cache block is full, sending old set column to memory" {0 0 0};
%alloc S_000002137ebb80b0;
%load/vec4 v000002137ec53bb0_0;
%cast2;
%pad/u 8;
%store/vec4 v000002137ec1fc90_0, 0, 8;
%fork TD_tb.dut.find_oldest_set_col, S_000002137ebb80b0;
%join;
%load/vec4 v000002137ec20550_0;
%store/vec4 v000002137ec20370_0, 0, 2;
%free S_000002137ebb80b0;
%load/vec4 v000002137ec53bb0_0;
%cast2;
%pad/u 8;
%store/vec4 v000002137ec20190_0, 0, 8;
%load/vec4 v000002137ec20370_0;
%store/vec4 v000002137ec205f0_0, 0, 2;
%fork TD_tb.dut.send_to_mem, S_000002137ed61230;
%join;
T_9.26 ;
T_9.25 ;
%load/vec4 v000002137ec541f0_0;
%pad/u 32;
%cmpi/e 0, 0, 32;
%jmp/0xz T_9.28, 4;
%load/vec4 v000002137ec54d30_0;
%load/vec4 v000002137ec53bb0_0;
%pad/u 19;
%pad/u 21;
%muli 4, 0, 21;
%pad/u 22;