From 8d5a990c225936d8f5e3704055d39f9637e0c8f9 Mon Sep 17 00:00:00 2001
From: Aakash <aakash.gupta@microchip.com>
Date: Wed, 28 Feb 2024 09:03:07 +0000
Subject: [PATCH] Squashed 'driver-examples/CoreTimer/' changes from
 5a62e66..b62f8f5

b62f8f5 Add support for external interrupt in Legacy design

git-subtree-dir: driver-examples/CoreTimer
git-subtree-split: b62f8f57414be6c41268e8409d01698a7795a5d7
---
 miv-rv32-coretimer-timer_interrupt/.cproject  | 147 +++++++++++++++-
 miv-rv32-coretimer-timer_interrupt/.gitignore |   2 +-
 miv-rv32-coretimer-timer_interrupt/README.md  |  17 +-
 ...coretimer-timer_interrupt hw attach.launch |   2 +-
 ...-coretimer-timer_interrupt hw debug.launch | 122 +++++++-------
 .../src/application/main.c                    |  42 ++++-
 .../fpga_design_config/fpga_design_config.h   | 159 ++++++++++++++++++
 .../fpga_design_config/fpga_design_config.h   |   0
 8 files changed, 412 insertions(+), 79 deletions(-)
 create mode 100644 miv-rv32-coretimer-timer_interrupt/src/boards/polarfire-eval-kit/legacy-rv32-design/fpga_design_config/fpga_design_config.h
 rename miv-rv32-coretimer-timer_interrupt/src/boards/polarfire-eval-kit/{ => miv-rv32-design}/fpga_design_config/fpga_design_config.h (100%)

diff --git a/miv-rv32-coretimer-timer_interrupt/.cproject b/miv-rv32-coretimer-timer_interrupt/.cproject
index 193fd80..a70368c 100644
--- a/miv-rv32-coretimer-timer_interrupt/.cproject
+++ b/miv-rv32-coretimer-timer_interrupt/.cproject
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+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/src/boards/polarfire-eval-kit/miv-rv32-design}&quot;"/>
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+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/src/boards/polarfire-eval-kit/miv-rv32-design}&quot;"/>
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+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/src/boards/polarfire-eval-kit/miv-rv32-design}&quot;"/>
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+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/src/platform}&quot;"/>
+								</option>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.verbose.1063715341" name="Verbose (-v)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.verbose" useByScannerDiscovery="false" value="false" valueType="boolean"/>
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+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.defs.1272122012" name="Defined symbols (-D)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.defs" useByScannerDiscovery="true" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="MIV_LEGACY_RV32"/>
+								</option>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.other.1511164733" name="Other compiler flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.other" useByScannerDiscovery="true" value="--specs=nano.specs" valueType="string"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.warning.strictprototypes.791935292" name="Warn if a function has no arg type (-Wstrict-prototypes)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.warning.strictprototypes" useByScannerDiscovery="true" value="true" valueType="boolean"/>
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+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler.560462671" name="GNU RISC-V Cross C++ Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler"/>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.499231285" name="GNU RISC-V Cross C Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections.1471565869" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections" useByScannerDiscovery="false" value="true" valueType="boolean"/>
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+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/src/platform/platform_config_reference/linker/miv-rv32-ram.ld}&quot;"/>
+								</option>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart.1380361178" name="Do not use standard start files (-nostartfiles)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart" useByScannerDiscovery="false" value="true" valueType="boolean"/>
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+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.otherobjs.465056731" name="Other objects" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.otherobjs" useByScannerDiscovery="false" valueType="userObjs"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.flags.2019671570" name="Linker flags (-Xlinker [option])" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.flags" useByScannerDiscovery="false" valueType="stringList"/>
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+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker.1491815103" name="GNU RISC-V Cross C++ Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections.1027991505" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections" value="true" valueType="boolean"/>
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+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/src/boards/polarfire-eval-kit/platform_config/linker/miv-rv32-ram-imc.ld}&quot;"/>
+								</option>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.nostart.631120314" name="Do not use standard start files (-nostartfiles)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.nostart" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.usenewlibnano.673932398" name="Use newlib-nano (--specs=nano.specs)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.usenewlibnano" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.usenewlibnosys.2008189211" name="Do not use syscalls (--specs=nosys.specs)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.usenewlibnosys" value="true" valueType="boolean"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.otherobjs.1954913361" name="Other objects" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.otherobjs" valueType="userObjs">
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/src/middleware/cal/pf-soc-user-crypto-lib.a}&quot;"/>
+								</option>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.1208179148" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver"/>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.1893733721" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.other.207888221" name="Other flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.other" useByScannerDiscovery="false" value="--change-section-lma *-0x80000000" valueType="string"/>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.351659355" name="GNU RISC-V Cross Create Listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source.1465841782" name="Display source (--source|-S)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders.1231025821" name="Display all headers (--all-headers|-x)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle.2100110852" name="Demangle names (--demangle|-C)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers.1492070853" name="Display line numbers (--line-numbers|-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide.208384740" name="Wide lines (--wide|-w)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+							</tool>
+							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize.776097822" name="GNU RISC-V Cross Print Size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize">
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format.183446467" name="Size format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format.sysv" valueType="enumerated"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.other.729281955" name="Other flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.other" useByScannerDiscovery="false" value="--radix=16" valueType="string"/>
+								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.totals.2006113998" name="Show totals" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.totals" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+							</tool>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry excluding="src/platform/drivers/fpga_ip/CoreSPI|src/platform/drivers/fpga_ip/Core10GBaseKR_PHY|src/platform/drivers/fpga_ip/miv_watchdog|src/platform/drivers/fpga_ip/miv_timer|src/platform/drivers/fpga_ip/miv_plic|src/platform/drivers/fpga_ip/miv_i2c|src/platform/drivers/fpga_ip/CoreSysServices_PF|src/application/main_back.c|src/platform/drivers/fpga_ip/miv_udma|src/platform/drivers/fpga_ip/CoreI2C" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+			<storageModule moduleId="ilg.gnumcueclipse.managedbuild.packs"/>
+		</cconfiguration>
 	</storageModule>
 	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
 		<project id="miv-rv32-corespi-flash.ilg.gnumcueclipse.managedbuild.cross.riscv.target.elf.52797342" name="Executable" projectType="ilg.gnumcueclipse.managedbuild.cross.riscv.target.elf"/>
diff --git a/miv-rv32-coretimer-timer_interrupt/.gitignore b/miv-rv32-coretimer-timer_interrupt/.gitignore
index cff2797..909857d 100644
--- a/miv-rv32-coretimer-timer_interrupt/.gitignore
+++ b/miv-rv32-coretimer-timer_interrupt/.gitignore
@@ -1,4 +1,4 @@
-
+/*debug*/
 /.settings/
 /*miv-rv32-imc-debug*/
 /*miv-rv32-imc-release*/
diff --git a/miv-rv32-coretimer-timer_interrupt/README.md b/miv-rv32-coretimer-timer_interrupt/README.md
index 2f18260..61a297a 100644
--- a/miv-rv32-coretimer-timer_interrupt/README.md
+++ b/miv-rv32-coretimer-timer_interrupt/README.md
@@ -4,12 +4,13 @@
 This example program demonstrates the use of the CoreTimer driver used in
 continuous interrupt mode. It toggles a LED on and off every second.
 
-There are two different build configurations provided with this project.
+There are three different build configurations provided with this project.
 which configure this SoftConsole project for RISC-V IMC instruction extension.
 The Following configurations are provided with the example.
 
 - miv-rv32-imc-debug
 - miv-rv32-imc-release
+- legacy-rv32-debug
 
 ## How to use this example
 
@@ -34,9 +35,17 @@ definition of MSCC_STDIO_UART_BASE_ADDR if you want a CoreUARTapb mapped to STDI
 
 ## Target hardware
 
-This example can be targeted at the latest Mi-V Soft Processor MIV_RV32. Choose the build
-configurations per the target processor in your design and the supported ISA extensions
-that you want to use.
+This example can be targeted at the latest Mi-V Soft Processor MIV_RV32. It can also 
+be used to target the legacy MiV_RV32IMA_L1_AHB designs. Choose the build configurations 
+per the target processor in your design and the supported ISA extensions that you 
+want to use.
+
+This application serves as an example for how to enable external interrups using the 
+PLIC in legacy RV32 designs using the MiV_RV32IMA_L1_AHB design. In this case,
+the PLIC interrups are enabled and the External Interrupt handler is invoked.
+For the project to work as expected, a build configuration named 'legacy-rv32-debug' 
+is provided. This build configuration enables the MIV_LEGACY_RV32 macro and includes
+the fpga_design_config.h header required for the legacy desing.
 
 All the design specific definitions such as peripheral base addresses, system clock frequency
 etc. are included in fpga_design_config.h(hw_config.h).
diff --git a/miv-rv32-coretimer-timer_interrupt/miv-rv32-coretimer-timer_interrupt hw attach.launch b/miv-rv32-coretimer-timer_interrupt/miv-rv32-coretimer-timer_interrupt hw attach.launch
index 43649fb..1877a4a 100644
--- a/miv-rv32-coretimer-timer_interrupt/miv-rv32-coretimer-timer_interrupt hw attach.launch	
+++ b/miv-rv32-coretimer-timer_interrupt/miv-rv32-coretimer-timer_interrupt hw attach.launch	
@@ -56,6 +56,6 @@
     <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
         <listEntry value="4"/>
     </listAttribute>
-    <stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#13;&#10;"/>
+    <stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#10;"/>
     <stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
 </launchConfiguration>
diff --git a/miv-rv32-coretimer-timer_interrupt/miv-rv32-coretimer-timer_interrupt hw debug.launch b/miv-rv32-coretimer-timer_interrupt/miv-rv32-coretimer-timer_interrupt hw debug.launch
index c8d475c..1877a4a 100644
--- a/miv-rv32-coretimer-timer_interrupt/miv-rv32-coretimer-timer_interrupt hw debug.launch	
+++ b/miv-rv32-coretimer-timer_interrupt/miv-rv32-coretimer-timer_interrupt hw debug.launch	
@@ -1,61 +1,61 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
-    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/>
-    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
-    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="true"/>
-    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
-    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
-    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="false"/>
-    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true"/>
-    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
-    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="false"/>
-    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
-    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set $target_riscv = 1&#13;&#10;set mem inaccessible-by-default off&#13;&#10;set arch riscv:rv32&#13;&#10;set remotetimeout 7"/>
-    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
-    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
-    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${openocd_path}/${openocd_executable}"/>
-    <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
-    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
-    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="--file board/microsemi-riscv.cfg"/>
-    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTclPortNumber" value="6666"/>
-    <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
-    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
-    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
-    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="halt"/>
-    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value=""/>
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-    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU OpenOCD"/>
-    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
-    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
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-    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
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-    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
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-    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
-    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
-    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
-    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
-    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
-    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
-    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
-    <stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cross_prefix}gdb${cross_suffix}"/>
-    <booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
-    <intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
-    <stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
-    <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${config_name:miv-rv32-coretimer-timer_interrupt}/miv-rv32-coretimer-timer_interrupt.elf"/>
-    <stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="miv-rv32-coretimer-timer_interrupt"/>
-    <booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
-    <stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
-    <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
-        <listEntry value="/miv-rv32-coretimer-timer_interrupt"/>
-    </listAttribute>
-    <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
-        <listEntry value="4"/>
-    </listAttribute>
-    <stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#13;&#10;"/>
-    <stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
-</launchConfiguration>
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="true"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="false"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="false"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set $target_riscv = 1&#13;&#10;set mem inaccessible-by-default off&#13;&#10;set arch riscv:rv32&#13;&#10;set remotetimeout 7"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${openocd_path}/${openocd_executable}"/>
+    <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="--file board/microsemi-riscv.cfg"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTclPortNumber" value="6666"/>
+    <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="halt"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value=""/>
+    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU OpenOCD"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+    <intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+    <stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cross_prefix}gdb${cross_suffix}"/>
+    <booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+    <intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+    <stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+    <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${config_name:miv-rv32-coretimer-timer_interrupt}/miv-rv32-coretimer-timer_interrupt.elf"/>
+    <stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="miv-rv32-coretimer-timer_interrupt"/>
+    <booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
+    <stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
+    <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+        <listEntry value="/miv-rv32-coretimer-timer_interrupt"/>
+    </listAttribute>
+    <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+        <listEntry value="4"/>
+    </listAttribute>
+    <stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#10;"/>
+    <stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
+</launchConfiguration>
diff --git a/miv-rv32-coretimer-timer_interrupt/src/application/main.c b/miv-rv32-coretimer-timer_interrupt/src/application/main.c
index 3493a25..870ca10 100644
--- a/miv-rv32-coretimer-timer_interrupt/src/application/main.c
+++ b/miv-rv32-coretimer-timer_interrupt/src/application/main.c
@@ -28,7 +28,7 @@ uint8_t g_message[] =
  * This value is calculated to result in the timer timing out after after 1 second with a system
  * clock of 83MHz and the timer prescaler set to divide by 1024.
  */
-#define TIMER_LOAD_VALUE 81050
+#define TIMER_LOAD_VALUE 500000
 
 /*--------------------------------------------------------------------------------------------------
  * GPIO instance
@@ -41,10 +41,22 @@ gpio_instance_t g_gpio;
 timer_instance_t g_core_timer_0;
 
 /*--------------------------------------------------------------------------------------------------
- * Interrupt handler for the MIV_RV32 MSYS_EI interrupt connected to CoreTimer 0
+ * In the MIV_RV32 processor design, The CoreTimer interrupt is connected to the
+ * MSYS_EI0 pin. There is no PLIC inside the MIV_RV32 processor. The CoreTimer 
+ * interrupt is treated as local interrupt and the interrupt handler function, 
+ * MSYS_EI0_IRQHandler(void), is invoked directly by the HAL. 
+ * 
+ * In the designs with legacy processor such as MiV_RV32IMA_L1_AHB, The CoreTimer 
+ * interrupt is connected to External Interrupt pin 30 of the RV32IMA processor. 
+ * It then gets rounted to the PLIC in-build in the RV32IMA processor. 
+ * The interrupt handler function External_30_IRQHandler(void) is called by the 
+ * PLIC/External interrupt handler in the HAL.
  */
-uint8_t
-MSYS_EI0_IRQHandler(void)
+#ifndef MIV_LEGACY_RV32
+uint8_t MSYS_EI0_IRQHandler(void)
+#else
+uint8_t External_30_IRQHandler(void)
+#endif
 {
     /* WARNING!
      * In case of modifying this example project, be aware of the time it takes for the interrupt
@@ -59,6 +71,7 @@ MSYS_EI0_IRQHandler(void)
      * Invert the state of GPIO pins 0 - 3 every time the interrupt is triggered
      */
     gpio_pins_state = gpio_pins_state ^ (GPIO_0_MASK | GPIO_1_MASK | GPIO_2_MASK | GPIO_3_MASK);
+    UART_polled_tx_string(&g_core_uart_0, "\rTMR\n");
 
     GPIO_set_outputs(&g_gpio, gpio_pins_state);
 
@@ -67,17 +80,32 @@ MSYS_EI0_IRQHandler(void)
     return (EXT_IRQ_KEEP_ENABLED);
 }
 
-int
-main(void)
+int main(void)
 {
     /* Initialise the UART and print the greeting message*/
     UART_init(&g_core_uart_0, COREUARTAPB0_BASE_ADDR, BAUD_VALUE_115200, DATA_8_BITS | NO_PARITY);
 
     UART_polled_tx_string(&g_core_uart_0, g_message);
 
+#ifndef MIV_LEGACY_RV32
     /* Enable local interrupt for the MSYS_EI interrupt pin */
     MRV_enable_local_irq(MRV32_MSYS_EIE0_IRQn);
 
+    /*
+     * The legacy RV32IMA design uses External Interrupts and an in-built PLIC for interrupt handling.
+     * To use this project with the Legacy RV32IMA designs, the following initializations
+     * need to be used.
+     *
+     * First we need to enable the PLIC and then we can enable specific interrups which can be enabled
+     * as per the requirement of the applicaiton. In this case, the CoreTimer0 is connected to external
+     * interrupt 30, and has been enabled below.
+    */
+#else
+    MRV_PLIC_init();
+    MRV_PLIC_enable_irq(External_30_IRQn);
+#endif
+
+
     /* Initialise the GPIO */
     GPIO_init(&g_gpio, COREGPIO_OUT_BASE_ADDR, GPIO_APB_32_BITS_BUS);
 
@@ -88,7 +116,7 @@ main(void)
     TMR_init(&g_core_timer_0,
              CORETIMER0_BASE_ADDR,
              TMR_CONTINUOUS_MODE,
-             PRESCALER_DIV_1024,
+             PRESCALER_DIV_256,
              TIMER_LOAD_VALUE);
 
     /* Enable interrupts in general.*/
diff --git a/miv-rv32-coretimer-timer_interrupt/src/boards/polarfire-eval-kit/legacy-rv32-design/fpga_design_config/fpga_design_config.h b/miv-rv32-coretimer-timer_interrupt/src/boards/polarfire-eval-kit/legacy-rv32-design/fpga_design_config/fpga_design_config.h
new file mode 100644
index 0000000..dbde87f
--- /dev/null
+++ b/miv-rv32-coretimer-timer_interrupt/src/boards/polarfire-eval-kit/legacy-rv32-design/fpga_design_config/fpga_design_config.h
@@ -0,0 +1,159 @@
+/*******************************************************************************
+ * Copyright 2021 Microchip FPGA Embedded Systems Solutions.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * @file sample_fpga_design_config.h
+ * @author Microchip FPGA Embedded Systems Solutions
+ * @brief Sample design configuration settings
+ *
+ */
+ /*========================================================================*//**
+  @mainpage
+    Example file detailing how the fpga_design_config.h should be constructed
+    for the SoftConsole project targeted for Mi-V processors.
+
+    @section intro_sec Introduction
+    The SoftConsole project targeted for Mi-V processors now have an improved
+    folder structure. Detailed description of the folder structure is available
+    at https://github.com/Mi-V-Soft-RISC-V/miv-rv32-documentation.
+
+    The fpga_design_config.h must be stored as shown below
+    <project-root>/boards/<board-name>/fpga_design_config.h
+
+    Currently this file must be hand crafted when using the Mi-V Soft Processor.
+    In future, all the design and soft IP configurations will be automatically
+    generated from the Libero design description data.
+    
+    You can use this sample file as an example.
+    Rename this file from sample_fpga_design_config.h to fpga_design_config.h
+    and then customize it per your hardware design.
+
+    @section Project configuration Instructions
+    1. Change SYS_CLK_FREQ define to frequency of Mi-V Soft processor clock
+    2  Add all the soft IP core BASE addresses
+    3. Add the peripheral Core Interrupts to Mi-V Soft processor IRQ number
+       mappings
+    4. Define MSCC_STDIO_UART_BASE_ADDR if you want a CoreUARTapb mapped to
+       STDIO
+
+    **NOTE**
+    In the legacy folder structures, the file hw_config.h as was used at the
+    root of the project folder. This file is now depricated.
+
+*//*=========================================================================*/
+
+#ifndef FPGA_DESIGN_CONFIG_H_
+#define FPGA_DESIGN_CONFIG_H_
+
+/***************************************************************************//**
+ * Soft-processor clock definition
+ * This is the only clock brought over from the Mi-V Libero design.
+ */
+#ifndef SYS_CLK_FREQ
+#define SYS_CLK_FREQ                    50000000UL
+#endif
+
+/***************************************************************************//**
+ * Peripheral base addresses.
+ * Format of define is:
+ * <corename>_<instance>_BASE_ADDR
+ * The <instance> field is optional if there is only one instance of the core
+ * in the design
+ */
+#define COREUARTAPB0_BASE_ADDR          0x70001000UL
+#define COREGPIO_IN_BASE_ADDR           0x70002000UL
+#define CORETIMER0_BASE_ADDR            0x70003000UL
+#define CORETIMER1_BASE_ADDR            0x70004000UL
+#define COREGPIO_OUT_BASE_ADDR          0x70005000UL
+#define FLASH_CORE_SPI_BASE             0x70006000UL
+#define CORE16550_BASE_ADDR             0x70007000UL
+
+/***************************************************************************//**
+ * Peripheral Interrupts are mapped to the corresponding Mi-V Soft processor
+ * interrupt in the Libero design.
+ *
+ * On the legacy RV32 cores, there can be up to 31 external interrupts (IRQ[30:0]
+ * pins). The legacy RV32 Soft processor external interrupts are defined in the
+   miv_rv32_plic.h
+ * 
+ * These are of the form
+ * typedef enum
+{
+    NoInterrupt_IRQn = 0,
+    External_1_IRQn  = 1,
+    External_2_IRQn  = 2,
+    .
+    .
+    .
+    External_31_IRQn = 31
+} IRQn_Type;
+ 
+ On the legacy RV32 processors, the PLIC identifies the interrupt and passes it
+ on to the processor core. The interrupt 0 is not used. The pin IRQ[0] should
+ map to External_1_IRQn likewise IRQ[30] should map to External_31_IRQn
+
+e.g
+
+#define TIMER0_IRQn                     External_30_IRQn
+#define TIMER1_IRQn                     External_31_IRQn
+
+ The MIV_RV32 soft processor has up to six optional system interrupts, MSYS_EI[n] 
+ in addition to one EXT_IRQ.
+ The MIV_RV32 does not have an inbuilt PLIC and all the interrupts are directly
+ delivered to the processor core, hence unlike legacy RV32 cores, no interrupt
+ number mapping is necessary on MIV_RV32 core.
+ */
+
+
+#define MRV32_MSYS_EIE0_IRQn                     External_30_IRQn
+#define TIMER1_IRQn                              External_31_IRQn
+
+/****************************************************************************
+ * Baud value to achieve a 115200 baud rate with system clock defined by
+ * SYS_CLK_FREQ.
+ * This value is calculated using the following equation:
+ *      BAUD_VALUE = (CLOCK / (16 * BAUD_RATE)) - 1
+ *****************************************************************************/
+#define BAUD_VALUE_115200               ((SYS_CLK_FREQ / (16 * 115200)) - 1)
+
+/******************************************************************************
+ * Baud value to achieve a 57600 baud rate with system clock defined by
+ * SYS_CLK_FREQ.
+ * This value is calculated using the following equation:
+ *      BAUD_VALUE = (CLOCK / (16 * BAUD_RATE)) - 1
+ *****************************************************************************/
+ #define BAUD_VALUE_57600                ((SYS_CLK_FREQ / (16 * 57600)) - 1)
+
+/***************************************************************************//**
+ * Define MSCC_STDIO_THRU_CORE_UART_APB in the project settings if you want the
+ * standard IOs to be redirected to a terminal via UART.
+ */
+#ifdef MSCC_STDIO_THRU_CORE_UART_APB
+/*
+ * A base address mapping for the STDIO printf/scanf mapping to CortUARTapb
+ * must be provided if it is being used
+ *
+ * e.g. #define MSCC_STDIO_UART_BASE_ADDR COREUARTAPB1_BASE_ADDR
+ */
+#define MSCC_STDIO_UART_BASE_ADDR COREUARTAPB0_BASE_ADDR
+
+#ifndef MSCC_STDIO_UART_BASE_ADDR
+#error MSCC_STDIO_UART_BASE_ADDR not defined- e.g. #define MSCC_STDIO_UART_BASE_ADDR COREUARTAPB1_BASE_ADDR
+#endif
+
+#ifndef MSCC_STDIO_BAUD_VALUE
+/*
+ * The MSCC_STDIO_BAUD_VALUE define should be set in your project's settings to
+ * specify the baud value used by the standard output CoreUARTapb instance for
+ * generating the UART's baud rate if you want a different baud rate from the
+ * default of 115200 baud
+ */
+#define MSCC_STDIO_BAUD_VALUE           115200
+#endif  /*MSCC_STDIO_BAUD_VALUE*/
+
+#endif  /* end of MSCC_STDIO_THRU_CORE_UART_APB */
+/*******************************************************************************
+ * End of user edit section
+ */
+#endif /* FPGA_DESIGN_CONFIG_H_ */
diff --git a/miv-rv32-coretimer-timer_interrupt/src/boards/polarfire-eval-kit/fpga_design_config/fpga_design_config.h b/miv-rv32-coretimer-timer_interrupt/src/boards/polarfire-eval-kit/miv-rv32-design/fpga_design_config/fpga_design_config.h
similarity index 100%
rename from miv-rv32-coretimer-timer_interrupt/src/boards/polarfire-eval-kit/fpga_design_config/fpga_design_config.h
rename to miv-rv32-coretimer-timer_interrupt/src/boards/polarfire-eval-kit/miv-rv32-design/fpga_design_config/fpga_design_config.h