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https://github.com/Mi-V-Soft-RISC-V/miv-rv32-bare-metal-examples/blob/main/driver-examples/miv-plic/miv-rv32-plic/src/platform/drivers/fpga_ip/miv_plic/miv_plic.h#L303
Specificlally this loop will write at offset +0 for a 32bit value. Then when INC=1, it will write at offset +1 for a 32bit value
But this is no aligned so you get an alignement fault. So how does this work? Confused..
Also - why is this code calculating an address But other places have/use a structure that overlays the MIV_PLIC?
The text was updated successfully, but these errors were encountered:
Also - why does the loop use (N + 32) / 32 - should this not use (N+31)/32 instead?
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https://github.com/Mi-V-Soft-RISC-V/miv-rv32-bare-metal-examples/blob/main/driver-examples/miv-plic/miv-rv32-plic/src/platform/drivers/fpga_ip/miv_plic/miv_plic.h#L303
Specificlally this loop will write at offset +0 for a 32bit value.
Then when INC=1, it will write at offset +1 for a 32bit value
But this is no aligned so you get an alignement fault.
So how does this work? Confused..
Also - why is this code calculating an address
But other places have/use a structure that overlays the MIV_PLIC?
The text was updated successfully, but these errors were encountered: