We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Hi,
I found it very interesting to analyse a design directly from within the chip using https://github.com/colognechip/gatemate_ila.
Is the USB port to program the FPGA after that usable as the USB port to recieve the analyse data?
Thanks, Lothar
The text was updated successfully, but these errors were encountered:
Hi Lothar and Olimex,
Thanks to the commit colognechip/gatemate_ila@c0ec582 you can now follow the configuration steps described here: https://github.com/colognechip/gatemate_ila?tab=readme-ov-file#use-with-the-olimex-gatematea1-EVB to configure the GateMate ILA on the FPGA and transfer signals from your design at runtime via the RP2040 on the Olimex GateMateA1-EVB. Since Lothar later opened an issue in the GateMate ILA Git repo: colognechip/gatemate_ila#2 which has been closed for quite some time, I think this issue can be closed now as well.
Thanks, Dave
Sorry, something went wrong.
No branches or pull requests
Hi,
I found it very interesting to analyse a design directly from within the chip using https://github.com/colognechip/gatemate_ila.
Is the USB port to program the FPGA after that usable as the USB port to recieve the analyse data?
Thanks, Lothar
The text was updated successfully, but these errors were encountered: