Issues in the Handling of Critical CSR Fields in mstatus

[fly-1011]

Bug Description:

When executing the instruction csrwi mstatus, 0 on the NutShell processor, the mstatus register's SXL and UXL fields are incorrectly cleared to 0. According to the RISC-V Privileged ISA specification, these fields should retain their legal values (specifically, SXL = 10 and UXL = 10 for 64-bit systems) and should not be zeroed by a csrwi instruction. This issue is not present in Spike, the reference model, which preserves the values of these fields as expected.

Expected Behavior (RISC-V Specification):

SXL and UXL are WARL fields (Write Any, Read Legal), and their values should be preserved unless explicitly set to a new legal value.
In RV64 systems, SXL should be set to 10 to indicate a 64-bit S-mode, and UXL should be set to 10 to indicate a 64-bit U-mode.

Screenshots

Environment
Nutshell version = commit fa8de48