info.yaml

# Tiny Tapeout project information
project:
  title:        "PiMAC"                                                               # Project title
  author:       "Steffen Reith"                                                       # Your name
  discord:      "steffenreith"                                                        # Your discord username, for communication and automatically assigning you a Tapeout role (optional)
  description:  "A simple pipelined multiply and accumulate unit to compute a*b+c"    # One line description of what your project does
  language:     "Verilog"                                                             # other examples include SystemVerilog, Amaranth, VHDL, etc
  clock_hz:     0                                                                     # Clock frequency in Hz (or 0 if not applicable)

  # How many tiles your design occupies? A single tile is about 167x108 uM.
  tiles: "1x1"          # Valid values: 1x1, 1x2, 2x2, 3x2, 4x2, 6x2 or 8x2

  # Your top module name must start with "tt_um_". Make it unique by including your github username:
  top_module:  "tt_um_SteffenReith_PiMACTop"
  
  # List your project's source files here. Source files must be in ./src and you must list each source file separately, one per line:
  source_files:        
    - "PiMAC.v"
    - "SteffenReith_PiMACTop.v"

# The pinout of your project. Leave unused pins blank. DO NOT delete or add any pins.
pinout:
  # Inputs
  ui[0]: "a[0]"
  ui[1]: "a[1]"
  ui[2]: "a[2]"
  ui[3]: "a[3]"
  ui[4]: "b[0]"
  ui[5]: "b[1]"
  ui[6]: "b[2]"
  ui[7]: "b[3]"

  # Outputs
  uo[0]: "result[0]"
  uo[1]: "result[1]"
  uo[2]: "result[2]"
  uo[3]: "result[3]"
  uo[4]: "result[4]"
  uo[5]: "result[5]"
  uo[6]: "result[6]"
  uo[7]: "result[7]"

  # Bidirectional pins
  uio[0]: "c[0]"
  uio[1]: "c[1]"
  uio[2]: "c[2]"
  uio[3]: "c[3]"
  uio[4]: ""
  uio[5]: ""
  uio[6]: ""
  uio[7]: ""

# Do not change!
yaml_version: 6