From f1cd875c8840030abedd3298726a9c9dacc4ad8f Mon Sep 17 00:00:00 2001 From: Redherring32 <47650594+Redherring32@users.noreply.github.com> Date: Mon, 25 May 2020 00:21:50 -0500 Subject: [PATCH] +Added plated layer to edge for RF shield +Improved silkscreen to list unused parts, and fixed overlapping labels +Moved OSHW logo to accommodate the new plated area +Added thermal reliefs to make soldering to power/ground pins easier +Removed redundant files --- Board Files/BOM.html | 18 - Board Files/Motherboard.kicad_pcb | 4003 +++++++++------ Board Files/Motherboard.pdf | Bin 251741 -> 0 bytes Board Files/Motherboard.sch | 7754 ++++++++++++++--------------- 4 files changed, 6455 insertions(+), 5320 deletions(-) delete mode 100644 Board Files/BOM.html delete mode 100644 Board Files/Motherboard.pdf diff --git a/Board Files/BOM.html b/Board Files/BOM.html deleted file mode 100644 index 1a9f103..0000000 --- a/Board Files/BOM.html +++ /dev/null @@ -1,18 +0,0 @@ - - - - - - - -

H:\NES-RE1\Board Files\Motherboard.sch

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1/13/2020 11:21:14 PM

-

Eeschema (5.1.2)-2

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Component Count:87

- - -
RefQntyValuePartDatasheetDescriptionVendor
BC1, BC22103-25Device:C_Small~Unpolarized capacitor, small symbol
C11100uFDevice:CP_Small~Polarized capacitor, small symbol
C2, C3, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C22, C24, C26, C32, C38, C39, C401910nFDevice:C_Small~Unpolarized capacitor, small symbol
C41220pFDevice:C_Small~Unpolarized capacitor, small symbol
C51330pFDevice:C~Unpolarized capacitor
C8, C462100nFDevice:C_Small~Unpolarized capacitor, small symbol
C912.2uFDevice:CP_Small~Polarized capacitor, small symbol
C20151pFDevice:C_Small~Unpolarized capacitor, small symbol
C211220pFDevice:C_Small~Unpolarized capacitor, small symbol
C2311uFDevice:CP_Small~Polarized capacitor, small symbol
C27, C28, C29, C30, C31, C33, C34, C35, C36, C3710330pFDevice:C_Small~Unpolarized capacitor, small symbol
C41118pFDevice:C_Small~Unpolarized capacitor, small symbol
C42115pFDevice:C_Small~Unpolarized capacitor, small symbol
C43, C45251pFDevice:C_Small~Unpolarized capacitor, small symbol
C441220pFDevice:C_Small~Unpolarized capacitor, small symbol
D1, D22Zener DiodeDevice:D~Diode
DA1, DA32DAN601Schematic:Diode_Array_7pin_(Cathode-Common)
DA2, DA42UPA64HSchematic:Diode_Array_7pin_(Anode-Common)
FC1139uMotherboard-rescue:Ferrite_Core-Schematic
FC21Ferrite_CoilDevice:L_Core_Ferrite~Inductor with ferrite core
P4, P52Controller InputConnector:Conn_01x07_Female~Generic connector, single row, 01x07, script generated (kicad-library-utils/schlib/autogen/connector/)
Q112SA937Device:Q_PNP_ECB~PNP transistor, emitter/collector/base
Q2, Q322SC2021Device:Q_NPN_ECB~NPN transistor, emitter/collector/base
R111MDevice:R~Resistor
R2, R122510Device:R~Resistor
R3, R42100Device:R~Resistor
R51220Device:R~Resistor
R6147KDevice:R~Resistor
R7, R9220KDevice:R~Resistor
R8112KDevice:R~Resistor
R101220KDevice:R~Resistor
R11, R1321.2KDevice:R~Resistor
R151100KDevice:R~Resistor
R1712.2KDevice:R~Resistor
R18, R1921KDevice:R~Resistor
RA1112 x 10KDevice:R_Network12http://www.vishay.com/docs/31509/csc.pdf12 resistor network, star topology, bussed resistors, small symbol
RA214 x 6.8KDevice:R_Network04http://www.vishay.com/docs/31509/csc.pdf4 resistor network, star topology, bussed resistors, small symbol
TC1130pFDevice:C_Variable~Variable capacitor
U116116 (WRAM)NES-CPU-11:2KB_SRAMhttps://www.cl.cam.ac.uk/teaching//2003/Hardware/datasheets/ht6116.pdfDIP-24 2Kx8 (16Kbit) SRAM
U2174HC373NES-CPU-11:74HC373https://www.cl.cam.ac.uk/teaching//2003/Hardware/datasheets/ht6116.pdfDIP-24 2Kx8 (16Kbit) SRAM
U3174HC13974xx:74LS139http://www.ti.com/lit/gpn/sn74LS139Dual Decoder 1 of 4, Active low outputs
U416116 (VRAM)NES-CPU-11:2KB_SRAMhttps://www.cl.cam.ac.uk/teaching//2003/Hardware/datasheets/ht6116.pdfDIP-24 2Kx8 (16Kbit) SRAM
U7140H368 (CI)NES-CPU-11:74HC368https://www.cl.cam.ac.uk/teaching//2003/Hardware/datasheets/ht6116.pdfDIP-24 2Kx8 (16Kbit) SRAM
U8140H368 (CII)NES-CPU-11:74HC368https://www.cl.cam.ac.uk/teaching//2003/Hardware/datasheets/ht6116.pdfDIP-24 2Kx8 (16Kbit) SRAM
U9174LS0474xx:74LS04http://www.ti.com/lit/gpn/sn74LS04Hex Inverter
X1121.47727 MHzDevice:Crystal_Small~Two pin crystal, small symbol
X214MHzDevice:Crystal_GND2~Three pin crystal, GND on pin 2
- - - diff --git a/Board Files/Motherboard.kicad_pcb b/Board Files/Motherboard.kicad_pcb index 6b2b3d3..ae3dcda 100644 --- a/Board Files/Motherboard.kicad_pcb +++ b/Board Files/Motherboard.kicad_pcb @@ -2,8 +2,8 @@ (general (thickness 1.6) - (drawings 154) - (tracks 3251) + (drawings 155) + (tracks 3264) (zones 0) (modules 105) (nets 129) @@ -34,7 +34,7 @@ ) (setup - (last_trace_width 1.5) + (last_trace_width 0.25) (user_trace_width 0.45) (user_trace_width 0.5) (user_trace_width 1.25) @@ -361,8 +361,124 @@ (add_net "Net-(U8-Pad7)") ) + (module Package_DIP:DIP-40_W15.24mm (layer F.Cu) (tedit 5A02E8C5) (tstamp 5D972626) + (at 18.475 -42.2 90) + (descr "40-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils)") + (tags "THT DIP DIL PDIP 2.54mm 15.24mm 600mil") + (path /5D911B13) + (fp_text reference U6 (at 7.62 -2.33 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value "RP2A03 CPU" (at 7.62 50.59 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 7.62 24.13 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 16.3 -1.55) (end -1.05 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 16.3 49.8) (end 16.3 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 49.8) (end 16.3 49.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.55) (end -1.05 49.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 14.08 -1.33) (end 8.62 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 14.08 49.59) (end 14.08 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 49.59) (end 14.08 49.59) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 -1.33) (end 1.16 49.59) (layer F.SilkS) (width 0.12)) + (fp_line (start 6.62 -1.33) (end 1.16 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.255 -0.27) (end 1.255 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 0.255 49.53) (end 0.255 -0.27) (layer F.Fab) (width 0.1)) + (fp_line (start 14.985 49.53) (end 0.255 49.53) (layer F.Fab) (width 0.1)) + (fp_line (start 14.985 -1.27) (end 14.985 49.53) (layer F.Fab) (width 0.1)) + (fp_line (start 1.255 -1.27) (end 14.985 -1.27) (layer F.Fab) (width 0.1)) + (fp_arc (start 7.62 -1.33) (end 6.62 -1.33) (angle -180) (layer F.SilkS) (width 0.12)) + (pad 40 thru_hole oval (at 15.24 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 3 /VCC)) + (pad 20 thru_hole oval (at 0 48.26 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 /GND)) + (pad 39 thru_hole oval (at 15.24 2.54 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 128 /OUT-0)) + (pad 19 thru_hole oval (at 0 45.72 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 86 /CPU-A15)) + (pad 38 thru_hole oval (at 15.24 5.08 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 103 /OUT-1)) + (pad 18 thru_hole oval (at 0 43.18 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 89 /CPU-A14)) + (pad 37 thru_hole oval (at 15.24 7.62 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 104 /OUT-2)) + (pad 17 thru_hole oval (at 0 40.64 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 90 /CPU-A13)) + (pad 36 thru_hole oval (at 15.24 10.16 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 23 /~OE1)) + (pad 16 thru_hole oval (at 0 38.1 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 105 /CPU-A12)) + (pad 35 thru_hole oval (at 15.24 12.7 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 127 /~OE2)) + (pad 15 thru_hole oval (at 0 35.56 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 106 /CPU-A11)) + (pad 34 thru_hole oval (at 15.24 15.24 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 53 /CPU-R~W)) + (pad 14 thru_hole oval (at 0 33.02 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 56 /CPU-A10)) + (pad 33 thru_hole oval (at 15.24 17.78 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 40 /~NMI)) + (pad 13 thru_hole oval (at 0 30.48 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 51 /CPU-A9)) + (pad 32 thru_hole oval (at 15.24 20.32 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 45 /~IRQ)) + (pad 12 thru_hole oval (at 0 27.94 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 49 /CPU-A8)) + (pad 31 thru_hole oval (at 15.24 22.86 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 /M2)) + (pad 11 thru_hole oval (at 0 25.4 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 69 /CPU-A7)) + (pad 30 thru_hole oval (at 15.24 25.4 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 /GND)) + (pad 10 thru_hole oval (at 0 22.86 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 67 /CPU-A6)) + (pad 29 thru_hole oval (at 15.24 27.94 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 30 /CPU-CLK)) + (pad 9 thru_hole oval (at 0 20.32 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 65 /CPU-A5)) + (pad 28 thru_hole oval (at 15.24 30.48 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 54 /CPU-D0)) + (pad 8 thru_hole oval (at 0 17.78 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 63 /CPU-A4)) + (pad 27 thru_hole oval (at 15.24 33.02 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 52 /CPU-D1)) + (pad 7 thru_hole oval (at 0 15.24 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 61 /CPU-A3)) + (pad 26 thru_hole oval (at 15.24 35.56 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 50 /CPU-D2)) + (pad 6 thru_hole oval (at 0 12.7 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 59 /CPU-A2)) + (pad 25 thru_hole oval (at 15.24 38.1 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 68 /CPU-D3)) + (pad 5 thru_hole oval (at 0 10.16 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 57 /CPU-A1)) + (pad 24 thru_hole oval (at 15.24 40.64 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 66 /CPU-D4)) + (pad 4 thru_hole oval (at 0 7.62 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 55 /CPU-A0)) + (pad 23 thru_hole oval (at 15.24 43.18 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 64 /CPU-D5)) + (pad 3 thru_hole oval (at 0 5.08 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 101 /~RST)) + (pad 22 thru_hole oval (at 15.24 45.72 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 62 /CPU-D6)) + (pad 2 thru_hole oval (at 0 2.54 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 36 /SOUND-2)) + (pad 21 thru_hole oval (at 15.24 48.26 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 60 /CPU-D7)) + (pad 1 thru_hole rect (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 37 /SOUND-1)) + (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-40_W15.24mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + (module Symbol:OSHW-Symbol_13.4x12mm_SilkScreen (layer F.Cu) (tedit 0) (tstamp 5DC962A7) - (at 10.75 -17.05) + (at 80.6 -68.65) (descr "Open Source Hardware Symbol") (tags "Logo Symbol OSHW") (attr virtual) @@ -732,7 +848,7 @@ (fp_text user K (at 0 -1.8 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text user K (at 11.875 0 90) (layer F.SilkS) + (fp_text user " " (at 11.875 0 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole rect (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) @@ -788,7 +904,7 @@ (module NESRE:NES_Edge_Connector (layer F.Cu) (tedit 5DAD00C1) (tstamp 5D999EE5) (at 20.075 -11.725) (path /5D838060) - (fp_text reference P1 (at 13.2 0.025) (layer F.SilkS) + (fp_text reference P1 (at 13.525 -0.025) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value "72-Pin Connector" (at 13.725 -0.825) (layer F.Fab) @@ -948,7 +1064,7 @@ (fp_text reference C44 (at 4.875 -0.05) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 220pF (at 5.96 0.07) (layer F.SilkS) + (fp_text value 220pF (at 0.95 -2) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 1.25 0) (layer F.Fab) @@ -1057,7 +1173,7 @@ (fp_text user K (at 11.9 -0.075 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text user K (at 0 -1.8 90) (layer F.SilkS) + (fp_text user " " (at 0 -1.8 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 thru_hole rect (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) @@ -1387,7 +1503,7 @@ (fp_text reference C13 (at 2.5279 0.044) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 10nF (at 8.0779 -0.381) (layer F.Fab) + (fp_text value 10nF (at -3.7021 0.024) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 2.5 0) (layer F.Fab) @@ -2304,7 +2420,7 @@ (fp_text reference C37 (at 1.075 2.175 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value "330pF x5" (at 1.025 -15.725 180) (layer F.SilkS) + (fp_text value "330pF x5" (at 1.025 -15.25 180) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 1.25 0 90) (layer F.Fab) @@ -2606,7 +2722,7 @@ (fp_text reference C7 (at -2.525 1.45 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 220pF (at -3.45 -0.05 90) (layer F.SilkS) + (fp_text value Unused (at -4.1 -0.1 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 1.25 0 90) (layer F.Fab) @@ -2684,7 +2800,7 @@ (fp_text reference C6 (at -3.275 2.8 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 220pF (at -3.175 4.275 90) (layer F.SilkS) + (fp_text value Unused (at -3.175 4.275 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 1.25 0 90) (layer F.Fab) @@ -2986,7 +3102,7 @@ (fp_text reference BC2 (at 2.55 0.05 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 103-25 (at -4.8 0 90) (layer F.SilkS) + (fp_text value 103-25 (at 2.35 -2.15 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 2.5 0 90) (layer F.Fab) @@ -3859,7 +3975,7 @@ (fp_text reference R14 (at 5.05 0 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 5.6K (at -3.425 0.05 90) (layer F.SilkS) + (fp_text value Unused (at 5.075 -2.15 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 1.93 -1.25) (end 1.93 1.25) (layer F.Fab) (width 0.1)) @@ -3982,7 +4098,7 @@ (fp_text reference C30 (at 4.87272 -0.07682) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value "330pF x5" (at 1.54772 5.54818) (layer F.SilkS) + (fp_text value "330pF x5" (at 1.49772 4.89818) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 3.55 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05)) @@ -4272,122 +4388,6 @@ ) ) - (module Package_DIP:DIP-40_W15.24mm (layer F.Cu) (tedit 5A02E8C5) (tstamp 5D972626) - (at 18.475 -42.2 90) - (descr "40-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils)") - (tags "THT DIP DIL PDIP 2.54mm 15.24mm 600mil") - (path /5D911B13) - (fp_text reference U6 (at 7.62 -2.33 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value "RP2A03 CPU" (at 7.62 50.59 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text user %R (at 7.62 24.13 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 16.3 -1.55) (end -1.05 -1.55) (layer F.CrtYd) (width 0.05)) - (fp_line (start 16.3 49.8) (end 16.3 -1.55) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.05 49.8) (end 16.3 49.8) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.05 -1.55) (end -1.05 49.8) (layer F.CrtYd) (width 0.05)) - (fp_line (start 14.08 -1.33) (end 8.62 -1.33) (layer F.SilkS) (width 0.12)) - (fp_line (start 14.08 49.59) (end 14.08 -1.33) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.16 49.59) (end 14.08 49.59) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.16 -1.33) (end 1.16 49.59) (layer F.SilkS) (width 0.12)) - (fp_line (start 6.62 -1.33) (end 1.16 -1.33) (layer F.SilkS) (width 0.12)) - (fp_line (start 0.255 -0.27) (end 1.255 -1.27) (layer F.Fab) (width 0.1)) - (fp_line (start 0.255 49.53) (end 0.255 -0.27) (layer F.Fab) (width 0.1)) - (fp_line (start 14.985 49.53) (end 0.255 49.53) (layer F.Fab) (width 0.1)) - (fp_line (start 14.985 -1.27) (end 14.985 49.53) (layer F.Fab) (width 0.1)) - (fp_line (start 1.255 -1.27) (end 14.985 -1.27) (layer F.Fab) (width 0.1)) - (fp_arc (start 7.62 -1.33) (end 6.62 -1.33) (angle -180) (layer F.SilkS) (width 0.12)) - (pad 40 thru_hole oval (at 15.24 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 3 /VCC)) - (pad 20 thru_hole oval (at 0 48.26 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 1 /GND)) - (pad 39 thru_hole oval (at 15.24 2.54 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 128 /OUT-0)) - (pad 19 thru_hole oval (at 0 45.72 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 86 /CPU-A15)) - (pad 38 thru_hole oval (at 15.24 5.08 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 103 /OUT-1)) - (pad 18 thru_hole oval (at 0 43.18 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 89 /CPU-A14)) - (pad 37 thru_hole oval (at 15.24 7.62 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 104 /OUT-2)) - (pad 17 thru_hole oval (at 0 40.64 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 90 /CPU-A13)) - (pad 36 thru_hole oval (at 15.24 10.16 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 23 /~OE1)) - (pad 16 thru_hole oval (at 0 38.1 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 105 /CPU-A12)) - (pad 35 thru_hole oval (at 15.24 12.7 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 127 /~OE2)) - (pad 15 thru_hole oval (at 0 35.56 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 106 /CPU-A11)) - (pad 34 thru_hole oval (at 15.24 15.24 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 53 /CPU-R~W)) - (pad 14 thru_hole oval (at 0 33.02 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 56 /CPU-A10)) - (pad 33 thru_hole oval (at 15.24 17.78 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 40 /~NMI)) - (pad 13 thru_hole oval (at 0 30.48 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 51 /CPU-A9)) - (pad 32 thru_hole oval (at 15.24 20.32 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 45 /~IRQ)) - (pad 12 thru_hole oval (at 0 27.94 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 49 /CPU-A8)) - (pad 31 thru_hole oval (at 15.24 22.86 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 2 /M2)) - (pad 11 thru_hole oval (at 0 25.4 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 69 /CPU-A7)) - (pad 30 thru_hole oval (at 15.24 25.4 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 1 /GND)) - (pad 10 thru_hole oval (at 0 22.86 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 67 /CPU-A6)) - (pad 29 thru_hole oval (at 15.24 27.94 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 30 /CPU-CLK)) - (pad 9 thru_hole oval (at 0 20.32 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 65 /CPU-A5)) - (pad 28 thru_hole oval (at 15.24 30.48 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 54 /CPU-D0)) - (pad 8 thru_hole oval (at 0 17.78 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 63 /CPU-A4)) - (pad 27 thru_hole oval (at 15.24 33.02 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 52 /CPU-D1)) - (pad 7 thru_hole oval (at 0 15.24 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 61 /CPU-A3)) - (pad 26 thru_hole oval (at 15.24 35.56 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 50 /CPU-D2)) - (pad 6 thru_hole oval (at 0 12.7 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 59 /CPU-A2)) - (pad 25 thru_hole oval (at 15.24 38.1 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 68 /CPU-D3)) - (pad 5 thru_hole oval (at 0 10.16 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 57 /CPU-A1)) - (pad 24 thru_hole oval (at 15.24 40.64 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 66 /CPU-D4)) - (pad 4 thru_hole oval (at 0 7.62 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 55 /CPU-A0)) - (pad 23 thru_hole oval (at 15.24 43.18 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 64 /CPU-D5)) - (pad 3 thru_hole oval (at 0 5.08 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 101 /~RST)) - (pad 22 thru_hole oval (at 15.24 45.72 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 62 /CPU-D6)) - (pad 2 thru_hole oval (at 0 2.54 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 36 /SOUND-2)) - (pad 21 thru_hole oval (at 15.24 48.26 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 60 /CPU-D7)) - (pad 1 thru_hole rect (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) - (net 37 /SOUND-1)) - (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-40_W15.24mm.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - (module Capacitor_THT:CP_Radial_D5.0mm_P2.50mm (layer F.Cu) (tedit 5AE50EF0) (tstamp 5D972022) (at 151.5 -64.75 180) (descr "CP, Radial series, Radial, pin pitch=2.50mm, , diameter=5mm, Electrolytic Capacitor") @@ -4605,7 +4605,7 @@ (fp_text reference R16 (at 5.08 0.029) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 10K (at 5.10884 -2.496) (layer F.SilkS) + (fp_text value Unused (at 5.10884 -2.496) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 5.08 0) (layer F.Fab) @@ -4791,10 +4791,10 @@ (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") (path /5E15619D) - (fp_text reference R11 (at 5.08 -2.37 90) (layer F.SilkS) + (fp_text reference R11 (at 5.1 0 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 1.2K (at 1.475 -2.35 90) (layer F.SilkS) + (fp_text value 1.2K (at 5.1 -2.15 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text user %R (at 5.08 0 90) (layer F.Fab) @@ -4957,10 +4957,10 @@ (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") (path /5E28B65B) - (fp_text reference R10 (at 5.08 -2.37 90) (layer F.SilkS) + (fp_text reference R10 (at 5.175 0.05 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 220K (at 8.61 -2.475 90) (layer F.SilkS) + (fp_text value 220K (at 5.075 -2.3 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 1.93 -1.25) (end 1.93 1.25) (layer F.Fab) (width 0.1)) @@ -5569,10 +5569,10 @@ (module NESRE:Mod_RF (layer F.Cu) (tedit 5E431874) (tstamp 5D9722BC) (at 166.146 -20.956) (path /619A2E89) - (fp_text reference P3 (at 1.09214 0.76986) (layer F.SilkS) + (fp_text reference P3 (at 0.314 5.086) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value MOD-RF (at 0 -0.5) (layer F.Fab) + (fp_text value MOD-RF (at 6.224 -1.314) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (pad 9 thru_hole oval (at 22.344 -2.275 90) (size 4.25 9.25) (drill oval 1.16 5.62) (layers *.Cu *.Mask) @@ -5595,6 +5595,9 @@ (net 10 /VIDEO)) ) + (gr_text Unused (at 24.15 -64.2) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) (gr_line (start 159.025 -32.475) (end 158.925 -32.525) (layer F.SilkS) (width 0.12)) (gr_line (start 158.925 -32.425) (end 159.025 -32.475) (layer F.SilkS) (width 0.12)) (gr_line (start 158.775 -32.55) (end 158.925 -32.425) (layer F.SilkS) (width 0.12)) @@ -5606,7 +5609,7 @@ (gr_text ONES-CPU-01 (at 106.35 -50.65) (layer F.SilkS) (effects (font (size 1.5 3) (thickness 0.2))) ) - (gr_text "If no CIC:\nPull low to trigger reset" (at 139.575 -47.175) (layer F.SilkS) + (gr_text "RST test point" (at 139.2 -47.175) (layer F.SilkS) (effects (font (size 0.5 0.5) (thickness 0.125))) ) (gr_text "U5 PPU" (at 113.6 -52.825) (layer F.SilkS) @@ -5615,13 +5618,13 @@ (gr_text "U4 SRAM (VRAM)\n" (at 109.1 -17.375) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (gr_text "OSHW\nOpen-Source Hardware" (at 10.825 -8.875) (layer F.SilkS) + (gr_text "OSHW\nOpen-Source Hardware" (at 80.55 -61.35) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text "SRAM (VRAM)\n" (at 108.45 -23.25) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (gr_text 2019 (at 10.8 -5.875) (layer F.SilkS) + (gr_text 2019 (at 80.65 -58.9) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text "U6 CPU" (at 40.175 -60) (layer F.SilkS) @@ -5648,10 +5651,10 @@ (gr_text 24 (at 113.55 -77.425) (layer B.SilkS) (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) - (gr_text MOD-RF (at 164.95 -21.85) (layer F.SilkS) + (gr_text MOD-RF (at 172.31 -22.55) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (gr_text Cartridge-Connector (at 32.45 -13.5) (layer F.SilkS) + (gr_text Cartridge-Connector (at 33.15 -13.5) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text "E C B" (at 26.55 -96.475) (layer F.SilkS) @@ -5663,7 +5666,7 @@ (gr_text "21.477272 MHz" (at 66.95 -104.44) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (gr_text 5 (at 183.925 -20.475) (layer F.SilkS) + (gr_text 5 (at 181.75 -21.33) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text 1 (at 191.325 -82.175) (layer F.SilkS) @@ -5672,7 +5675,7 @@ (gr_text 1 (at 188.8 -49.3) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (gr_text 1 (at 162.9 -20.475) (layer F.SilkS) + (gr_text 1 (at 164.74 -21.31) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text 48 (at 51.075 -87.725) (layer F.SilkS) @@ -5696,10 +5699,10 @@ (gr_text 36 (at 127.575 -10.975) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (gr_text 74HC139 (at 26.67 -72.39) (layer F.SilkS) + (gr_text 74HC139 (at 27.25 -72.1) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (gr_text 74LS04 (at 160.02 -55.88) (layer F.SilkS) + (gr_text 74HCU04 (at 160.02 -55.88) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (gr_text 25 (at 113.5 -87.175) (layer B.SilkS) @@ -5885,7 +5888,6 @@ (segment (start 127.65 -20.25) (end 126.850001 -21.049999) (width 1.5) (layer B.Cu) (net 1)) (segment (start 157.99 -73.022792) (end 158.892208 -73.925) (width 1.5) (layer F.Cu) (net 1)) (segment (start 157.99 -71.75) (end 157.99 -73.022792) (width 1.5) (layer F.Cu) (net 1)) - (segment (start 162.252081 -37.5) (end 164.3 -35.452081) (width 1.5) (layer B.Cu) (net 1)) (segment (start 161.05 -37.5) (end 162.252081 -37.5) (width 1.5) (layer B.Cu) (net 1)) (segment (start 152.200001 -54.525001) (end 150.6 -52.925) (width 0.25) (layer F.Cu) (net 1)) (segment (start 151.225 -56.45) (end 151.225 -61.45) (width 0.25) (layer F.Cu) (net 1)) @@ -6057,6 +6059,11 @@ (via (at 141.6 -13.775) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 1)) (via (at 137.1 -47.925) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 1)) (via (at 54.075 -52.35) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 1)) + (segment (start 157.05 -32.75) (end 162.75 -32.75) (width 0.45) (layer B.Cu) (net 1)) + (segment (start 163.5 -33.5) (end 163.5 -36.1) (width 0.25) (layer B.Cu) (net 1)) + (segment (start 162.252081 -37.5) (end 163.5 -36.1) (width 1.5) (layer B.Cu) (net 1)) + (segment (start 162.75 -32.75) (end 163.5 -33.5) (width 0.25) (layer B.Cu) (net 1)) + (segment (start 163.5 -36.1) (end 164.3 -35.452081) (width 1.5) (layer B.Cu) (net 1)) (segment (start 30 -40.525) (end 30 -42.690002) (width 0.25) (layer F.Cu) (net 2)) (segment (start 35.698002 -44.65) (end 38.861501 -47.813499) (width 0.25) (layer F.Cu) (net 2)) (segment (start 25.425 -35.95) (end 30 -40.525) (width 0.25) (layer F.Cu) (net 2)) @@ -6151,7 +6158,6 @@ (segment (start 131.4 -41.65) (end 133.2 -39.85) (width 1.25) (layer B.Cu) (net 3)) (segment (start 123.925 -42) (end 124.275 -41.65) (width 1.25) (layer B.Cu) (net 3)) (segment (start 162.82 -95.17) (end 164.3 -96.65) (width 1.25) (layer F.Cu) (net 3)) - (segment (start 172.926 -20.45732) (end 175.4005 -22.93182) (width 0.5) (layer F.Cu) (net 3)) (segment (start 123.87 -42.12) (end 123.75 -42) (width 1.25) (layer B.Cu) (net 3)) (segment (start 165.95 -111.725) (end 166.1 -111.875) (width 1.5) (layer B.Cu) (net 3)) (segment (start 125.625 -66.95) (end 125.625 -69.2) (width 0.25) (layer F.Cu) (net 3)) @@ -6224,6 +6230,14 @@ (via (at 172.65 -81.15) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 3)) (via (at 156.675 -96.625) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 3)) (via (at 127.625 -16.55) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 3)) + (segment (start 174.146 -21.596) (end 174.5 -21.95) (width 0.45) (layer F.Cu) (net 3)) + (segment (start 174.146 -18.8) (end 174.146 -21.596) (width 0.45) (layer F.Cu) (net 3)) + (segment (start 172.926 -20.45732) (end 174.5 -21.95) (width 0.5) (layer F.Cu) (net 3)) + (segment (start 175.645999 -21.554001) (end 175 -22.2) (width 0.45) (layer F.Cu) (net 3)) + (segment (start 174.146 -18.8) (end 175.645999 -20.299999) (width 0.45) (layer F.Cu) (net 3)) + (segment (start 175.645999 -20.299999) (end 175.645999 -21.554001) (width 0.45) (layer F.Cu) (net 3)) + (segment (start 174.5 -21.95) (end 175 -22.2) (width 0.5) (layer F.Cu) (net 3)) + (segment (start 175 -22.2) (end 175.4005 -22.93182) (width 0.5) (layer F.Cu) (net 3)) (via (at 119.225 -66.325) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 8)) (segment (start 120.39999 -65.15001) (end 119.225 -66.325) (width 0.25) (layer F.Cu) (net 8)) (segment (start 120.39999 -60.0636) (end 120.39999 -65.15001) (width 0.25) (layer F.Cu) (net 8)) @@ -6335,6 +6349,9 @@ (segment (start 180.65786 -22.25086) (end 180.65786 -40.29214) (width 1.5) (layer F.Cu) (net 15)) (segment (start 171.14 -74.25) (end 169.8 -72.91) (width 1.25) (layer F.Cu) (net 16)) (segment (start 186.3 -74.25) (end 171.14 -74.25) (width 1.25) (layer F.Cu) (net 16)) + (segment (start 183.96863 -74.25) (end 186.3 -74.25) (width 0.25) (layer F.Cu) (net 16)) + (segment (start 182.6 -71.75) (end 182.6 -72.88137) (width 0.25) (layer F.Cu) (net 16)) + (segment (start 182.6 -72.88137) (end 183.96863 -74.25) (width 0.25) (layer F.Cu) (net 16)) (segment (start 143.793507 -75.05001) (end 145.6 -73.243517) (width 0.25) (layer B.Cu) (net 17)) (segment (start 145.6 -71.75) (end 148.025 -69.325) (width 0.25) (layer B.Cu) (net 17)) (segment (start 108.57499 -77.07501) (end 130.418507 -77.07501) (width 0.25) (layer B.Cu) (net 17)) @@ -6681,14 +6698,13 @@ (segment (start 29.08 -97.377208) (end 29.582208 -96.875) (width 1.5) (layer F.Cu) (net 27)) (segment (start 29.08 -98.65) (end 29.08 -97.377208) (width 1.5) (layer F.Cu) (net 27)) (segment (start 30.975 -96.875) (end 32.75 -98.65) (width 1.5) (layer F.Cu) (net 27)) - (segment (start 37.35 -83.015) (end 37.013 -83.015) (width 1.25) (layer B.Cu) (net 29)) (segment (start 26.54 -98.65) (end 26.54 -93.16) (width 1.5) (layer F.Cu) (net 29)) (segment (start 26.7 -93) (end 34.09 -93) (width 1.5) (layer F.Cu) (net 29)) (segment (start 33.5 -79.502) (end 33.502 -79.502) (width 1.25) (layer B.Cu) (net 29)) (segment (start 26.54 -93.16) (end 26.7 -93) (width 1.5) (layer F.Cu) (net 29)) - (segment (start 33.502 -79.502) (end 37 -83) (width 1.25) (layer B.Cu) (net 29)) - (segment (start 37.013 -83.015) (end 33.5 -79.502) (width 1.25) (layer B.Cu) (net 29)) (segment (start 34.09 -93) (end 34.25 -93.16) (width 1.5) (layer F.Cu) (net 29)) + (segment (start 37.013 -83.015) (end 37.35 -83.015) (width 1.25) (layer B.Cu) (net 29)) + (segment (start 33.5 -79.502) (end 37.013 -83.015) (width 1.25) (layer B.Cu) (net 29)) (via (at 46.3 -74.625) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 30)) (via (at 30.475 -79.025) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 30)) (segment (start 25.424 -83.1) (end 19.25 -83.1) (width 0.25) (layer F.Cu) (net 30)) @@ -9111,8 +9127,8 @@ ) ) ) - (zone (net 1) (net_name /GND) (layer B.Cu) (tstamp 5E125937) (hatch edge 0.508) - (connect_pads yes (clearance 0.5)) + (zone (net 1) (net_name /GND) (layer B.Cu) (tstamp 5E98CE5F) (hatch edge 0.508) + (connect_pads (clearance 0.5)) (min_thickness 0.254) (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508)) (polygon @@ -9283,249 +9299,704 @@ (xy 194.991978 -47.848) (xy 195.624886 -47.848) (xy 195.62341 -45.502) (xy 193.307022 -45.502) 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END -$Descr A3 16535 11693 -encoding utf-8 -Sheet 1 1 -Title "NES-CPU-11" -Date "" -Rev "11" -Comp "Nintendo Co., LTD" -Comment1 "Clean-Up by =Lockster=" -Comment2 "KiCad Schematic by Redherring32" -Comment3 "Reverse Engineered by Krzysiobal" -Comment4 "Nintendo Entertainment System (NES) Motherboard" -$EndDescr -$Comp -L Motherboard:RP2C02_PPU U5 -U 1 1 5D7FE1C0 -P 9900 6700 -F 0 "U5" H 9550 7800 50 0000 C CNN -F 1 "RP2C02 PPU" H 9750 5600 50 0000 C CNN -F 2 "Package_DIP:DIP-40_W15.24mm" H 9900 7900 50 0001 C CNN -F 3 "" H 9550 7750 50 0001 C CNN - 1 9900 6700 - 1 0 0 -1 -$EndComp -$Comp -L Device:R R2 -U 1 1 5D802682 -P 10650 7950 -F 0 "R2" H 10720 7996 50 0000 L CNN -F 1 "510" H 10720 7905 50 0000 L CNN -F 2 "Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" V 10580 7950 50 0001 C CNN -F 3 "~" H 10650 7950 50 0001 C CNN - 1 10650 7950 - 1 0 0 -1 -$EndComp -$Comp -L Device:Q_PNP_ECB Q1 -U 1 1 5D809E07 -P 10550 8500 -F 0 "Q1" H 10741 8454 50 0000 L CNN -F 1 "2SA937" H 10741 8545 50 0000 L CNN -F 2 "Package_TO_SOT_THT:TO-126-3_Vertical" H 10750 8600 50 0001 C CNN -F 3 "~" H 10550 8500 50 0001 C CNN - 1 10550 8500 - 1 0 0 1 -$EndComp -$Comp -L Device:L_Core_Ferrite FC2 -U 1 1 5D802DEF -P 11250 8200 -F 0 "FC2" V 11475 8200 50 0000 C CNN -F 1 "Ferrite_Coil" V 11384 8200 50 0000 C CNN -F 2 "Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" H 11250 8200 50 0001 C CNN -F 3 "~" H 11250 8200 50 0001 C CNN - 1 11250 8200 - 0 -1 -1 0 -$EndComp -Wire Wire Line - 10650 8100 10650 8200 -Wire Wire Line - 11400 8200 11550 8200 -Wire Wire Line - 11550 8200 11550 8300 -Wire Wire Line - 11100 8200 10650 8200 -Connection ~ 10650 8200 -Wire Wire Line - 10650 8200 10650 8300 -Text Label 10650 8200 0 50 ~ 0 -EXP-VIDEO -Text Label 11850 8200 2 50 ~ 0 -VIDEO -Text Label 10650 7800 1 50 ~ 0 -VCC -Text Label 10650 8700 3 50 ~ 0 -GND -Text Label 11550 8700 3 50 ~ 0 -GND -$Comp -L Device:C C5 -U 1 1 5D8053EB -P 11550 8450 -F 0 "C5" H 11665 8496 50 0000 L CNN -F 1 "330pF" H 11665 8405 50 0000 L CNN -F 2 "Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm" H 11588 8300 50 0001 C CNN -F 3 "~" H 11550 8450 50 0001 C CNN - 1 11550 8450 - 1 0 0 -1 -$EndComp -Wire Wire Line - 11550 8600 11550 8700 -Wire Wire Line - 11550 8200 11850 8200 -Connection ~ 11550 8200 -Wire Wire Line - 10350 7650 10350 8500 -Text Label 10750 5750 2 50 ~ 0 -VCC -Text Label 10750 5850 2 50 ~ 0 -ALE -Text Label 10750 5950 2 50 ~ 0 -PPU-D0 -Text Label 10750 6050 2 50 ~ 0 -PPU-D1 -Text Label 10750 6150 2 50 ~ 0 -PPU-D2 -Text Label 10750 6250 2 50 ~ 0 -PPU-D3 -Text Label 10750 6350 2 50 ~ 0 -PPU-D4 -Text Label 10750 6450 2 50 ~ 0 -PPU-D5 -Text Label 10750 6550 2 50 ~ 0 -PPU-D6 -Text Label 10750 6650 2 50 ~ 0 -PPU-D7 -Text Label 10750 6750 2 50 ~ 0 -PPU-A8 -Text Label 10750 6850 2 50 ~ 0 -PPU-A9 -Text Label 10750 6950 2 50 ~ 0 -PPU-A10 -Text Label 10750 7050 2 50 ~ 0 -PPU-A11 -Text Label 10750 7150 2 50 ~ 0 -PPU-A12 -Text Label 10750 7250 2 50 ~ 0 -PPU-A13 -Text Label 10750 7350 2 50 ~ 0 -PPU-~RD -Text Label 10750 7450 2 50 ~ 0 -PPU-~WE -Text Label 10750 7550 2 50 ~ 0 -~RST -Wire Wire Line - 10350 5750 10750 5750 -Wire Wire Line - 10350 5850 10750 5850 -Wire Wire Line - 10350 5950 10750 5950 -Wire Wire Line - 10350 6050 10750 6050 -Wire Wire Line - 10350 6150 10750 6150 -Wire Wire Line - 10350 6250 10750 6250 -Wire Wire Line - 10350 6350 10750 6350 -Wire Wire Line - 10350 6450 10750 6450 -Wire Wire Line - 10350 6550 10750 6550 -Wire Wire Line - 10350 6650 10750 6650 -Wire Wire Line - 10350 6950 10750 6950 -Wire Wire Line - 10350 7050 10750 7050 -Wire Wire Line - 10350 7150 10750 7150 -Wire Wire Line - 10350 7250 10750 7250 -Wire Wire Line - 10350 7350 10750 7350 -Wire Wire Line - 10350 7450 10750 7450 -Wire Wire Line - 10350 7550 10750 7550 -Text Label 10050 8350 2 50 ~ 0 -PPU-~A13 -Wire Wire Line - 9650 8350 10050 8350 -Text Label 9000 5750 0 50 ~ 0 -CPU-R~W -Text Label 9000 5850 0 50 ~ 0 -CPU-D0 -Text Label 9000 5950 0 50 ~ 0 -CPU-D1 -Text Label 9000 6050 0 50 ~ 0 -CPU-D2 -Text Label 9000 6150 0 50 ~ 0 -CPU-D3 -Text Label 9000 6250 0 50 ~ 0 -CPU-D4 -Text Label 9000 6350 0 50 ~ 0 -CPU-D5 -Text Label 9000 6450 0 50 ~ 0 -CPU-D6 -Text Label 9000 6550 0 50 ~ 0 -CPU-D7 -Wire Wire Line - 9000 6550 9400 6550 -Wire Wire Line - 9000 6450 9400 6450 -Wire Wire Line - 9000 6350 9400 6350 -Wire Wire Line - 9000 6250 9400 6250 -Wire Wire Line - 9000 6150 9400 6150 -Wire Wire Line - 9000 6050 9400 6050 -Wire Wire Line - 9000 5950 9400 5950 -Wire Wire Line - 9000 5850 9400 5850 -Wire Wire Line - 9000 5750 9400 5750 -Text Label 9000 6650 0 50 ~ 0 -CPU-A2 -Text Label 9000 6750 0 50 ~ 0 -CPU-A1 -Text Label 9000 6850 0 50 ~ 0 -CPU-A0 -Text Label 9000 6950 0 50 ~ 0 -PPU-~CE -Wire Wire Line - 9000 6950 9400 6950 -Wire Wire Line - 9000 6850 9400 6850 -Wire Wire Line - 9000 6750 9400 6750 -Wire Wire Line - 9000 6650 9400 6650 -Text Label 9000 7650 0 50 ~ 0 -GND -Text Label 9000 7550 0 50 ~ 0 -~NMI -Text Label 9000 7450 0 50 ~ 0 -PPU-CLK -Text Label 9000 7050 0 50 ~ 0 -GND -Text Label 9000 7150 0 50 ~ 0 -GND -Text Label 9000 7250 0 50 ~ 0 -GND -Text Label 9000 7350 0 50 ~ 0 -GND -Wire Wire Line - 9000 7050 9400 7050 -Wire Wire Line - 9000 7150 9400 7150 -Wire Wire Line - 9000 7250 9400 7250 -Wire Wire Line - 9000 7350 9400 7350 -Wire Wire Line - 9000 7450 9400 7450 -Wire Wire Line - 9000 7550 9400 7550 -Wire Wire Line - 9000 7650 9400 7650 -Text Label 11000 7450 0 50 ~ 0 -PPU-D1 -Text Label 11000 7550 0 50 ~ 0 -PPU-D2 -Text Label 11000 7650 0 50 ~ 0 -GND -Wire Wire Line - 12250 7650 12700 7650 -Wire Wire Line - 12250 7550 12700 7550 -Text Label 12700 7650 2 50 ~ 0 -PPU-D3 -Text Label 12700 7550 2 50 ~ 0 -PPU-D4 -Text Label 12700 7450 2 50 ~ 0 -PPU-D5 -Wire Wire Line - 12250 7450 12700 7450 -Wire Wire Line - 11000 7650 11450 7650 -Wire Wire Line - 11000 7550 11450 7550 -Wire Wire Line - 11000 7450 11450 7450 -$Comp -L Motherboard:2KB_SRAM U4 -U 1 1 5D8358FE -P 11850 7100 -F 0 "U4" H 11600 7800 50 0000 C CNN -F 1 "6116 (VRAM)" H 11800 6400 50 0000 C CNN -F 2 "Package_DIP:DIP-24_W7.62mm" H 11850 7900 50 0001 C CNN -F 3 "https://www.cl.cam.ac.uk/teaching//2003/Hardware/datasheets/ht6116.pdf" H 11600 7800 50 0001 C CNN - 1 11850 7100 - 1 0 0 -1 -$EndComp -Text Label 12700 6550 2 50 ~ 0 -VCC -Text Label 12700 6650 2 50 ~ 0 -PPU-A8 -Text Label 12700 6750 2 50 ~ 0 -PPU-A9 -Text Label 12700 6850 2 50 ~ 0 -PPU-~WE -Text Label 12700 6950 2 50 ~ 0 -PPU-~RD -Text Label 12700 7050 2 50 ~ 0 -VRAM-A10 -Text Label 12700 7150 2 50 ~ 0 -VRAM-~CE -Text Label 12700 7250 2 50 ~ 0 -PPU-D7 -Text Label 12700 7350 2 50 ~ 0 -PPU-D6 -Wire Wire Line - 12250 6550 12700 6550 -Wire Wire Line - 12250 6650 12700 6650 -Wire Wire Line - 12250 6750 12700 6750 -Wire Wire Line - 12250 6950 12700 6950 -Wire Wire Line - 12250 7050 12700 7050 -Wire Wire Line - 12250 7150 12700 7150 -Wire Wire Line - 12250 7250 12700 7250 -Wire Wire Line - 12250 7350 12700 7350 -Wire Wire Line - 12250 6850 12700 6850 -$Comp -L Motherboard:74HC373 U2 -U 1 1 5D8739AE -P 11850 5700 -F 0 "U2" H 11600 6300 50 0000 C CNN -F 1 "74HC373" H 11700 5100 50 0000 C CNN -F 2 "Package_DIP:DIP-20_W7.62mm" H 11850 6400 50 0001 C CNN -F 3 "https://www.cl.cam.ac.uk/teaching//2003/Hardware/datasheets/ht6116.pdf" H 11600 6300 50 0001 C CNN - 1 11850 5700 - 1 0 0 -1 -$EndComp -Text Label 12700 6150 2 50 ~ 0 -ALE -Wire Wire Line - 12250 6150 12700 6150 -Text Label 12700 6050 2 50 ~ 0 -PPU-A1 -Text Label 12700 5950 2 50 ~ 0 -PPU-D1 -Text Label 12700 5850 2 50 ~ 0 -PPU-D3 -Text Label 12700 5750 2 50 ~ 0 -PPU-A3 -Text Label 12700 5650 2 50 ~ 0 -PPU-A5 -Text Label 12700 5550 2 50 ~ 0 -PPU-D5 -Text Label 12700 5450 2 50 ~ 0 -PPU-D7 -Text Label 12700 5350 2 50 ~ 0 -PPU-A7 -Text Label 12700 5250 2 50 ~ 0 -VCC -Wire Wire Line - 12700 5250 12250 5250 -Wire Wire Line - 12250 5350 12700 5350 -Wire Wire Line - 12250 5450 12700 5450 -Wire Wire Line - 12250 5550 12700 5550 -Wire Wire Line - 12250 5650 12700 5650 -Wire Wire Line - 12250 5750 12700 5750 -Wire Wire Line - 12250 5850 12700 5850 -Wire Wire Line - 12250 5950 12700 5950 -Wire Wire Line - 12250 6050 12700 6050 -Wire Wire Line - 11000 6050 11450 6050 -Wire Wire Line - 11000 5950 11450 5950 -Wire Wire Line - 11000 5850 11450 5850 -Wire Wire Line - 11000 5750 11450 5750 -Wire Wire Line - 11000 5650 11450 5650 -Wire Wire Line - 11000 5550 11450 5550 -Wire Wire Line - 11000 5450 11450 5450 -Wire Wire Line - 11000 5350 11450 5350 -Text Label 11000 6050 0 50 ~ 0 -PPU-A0 -Text Label 11000 5950 0 50 ~ 0 -PPU-D0 -Text Label 11000 5850 0 50 ~ 0 -PPU-D2 -Text Label 11000 5750 0 50 ~ 0 -PPU-A2 -Text Label 11000 5650 0 50 ~ 0 -PPU-A4 -Text Label 11000 5550 0 50 ~ 0 -PPU-D4 -Text Label 11000 5450 0 50 ~ 0 -PPU-D6 -Text Label 11000 5350 0 50 ~ 0 -PPU-A6 -Wire Wire Line - 11000 5250 11450 5250 -Text Label 11000 5250 0 50 ~ 0 -GND -Wire Wire Line - 11000 6150 11450 6150 -Text Label 11000 6150 0 50 ~ 0 -GND -Wire Wire Line - 11000 7350 11450 7350 -Wire Wire Line - 11000 7250 11450 7250 -Wire Wire Line - 11000 7150 11450 7150 -Wire Wire Line - 11000 7050 11450 7050 -Wire Wire Line - 11000 6950 11450 6950 -Wire Wire Line - 11000 6850 11450 6850 -Wire Wire Line - 11000 6750 11450 6750 -Wire Wire Line - 11000 6650 11450 6650 -Wire Wire Line - 11000 6550 11450 6550 -Text Label 11000 7350 0 50 ~ 0 -PPU-D0 -Text Label 11000 7250 0 50 ~ 0 -PPU-A0 -Text Label 11000 7150 0 50 ~ 0 -PPU-A1 -Text Label 11000 7050 0 50 ~ 0 -PPU-A2 -Text Label 11000 6950 0 50 ~ 0 -PPU-A3 -Text Label 11000 6850 0 50 ~ 0 -PPU-A4 -Text Label 11000 6750 0 50 ~ 0 -PPU-A5 -Text Label 11000 6650 0 50 ~ 0 -PPU-A6 -Text Label 11000 6550 0 50 ~ 0 -PPU-A7 -Text Notes 10650 5350 2 50 ~ 10 -PICTURE PROCESSING UNIT & VIDEO RAM -$Comp -L 74xx:74LS04 U9 -U 3 1 5D7FF4F3 -P 9350 8350 -F 0 "U9" H 9350 8667 50 0000 C CNN -F 1 "74LS04" H 9350 8576 50 0000 C CNN -F 2 "Package_DIP:DIP-14_W7.62mm" H 9350 8350 50 0001 C CNN -F 3 "http://www.ti.com/lit/gpn/sn74LS04" H 9350 8350 50 0001 C CNN - 3 9350 8350 - 1 0 0 -1 -$EndComp -$Comp -L Motherboard:RP2A03_CPU U6 -U 1 1 5D911B13 -P 9550 2050 -F 0 "U6" H 9200 3150 50 0000 C CNN -F 1 "RP2A03 CPU" H 9400 950 50 0000 C CNN -F 2 "Package_DIP:DIP-40_W15.24mm" H 9550 3250 50 0001 C CNN -F 3 "" H 9150 3150 50 0001 C CNN - 1 9550 2050 - 1 0 0 -1 -$EndComp -Text Label 8600 1100 0 50 ~ 0 -SOUND-1 -Text Label 8600 1200 0 50 ~ 0 -SOUND-2 -Text Label 8600 1300 0 50 ~ 0 -~RST -Text Label 8600 1400 0 50 ~ 0 -CPU-A0 -Text Label 8600 1500 0 50 ~ 0 -CPU-A1 -Text Label 8600 1600 0 50 ~ 0 -CPU-A2 -Text Label 8600 1700 0 50 ~ 0 -CPU-A3 -Text Label 8600 1800 0 50 ~ 0 -CPU-A4 -Text Label 8600 1900 0 50 ~ 0 -CPU-A5 -Text Label 8600 2000 0 50 ~ 0 -CPU-A6 -Text Label 8600 2100 0 50 ~ 0 -CPU-A7 -Text Label 8600 2300 0 50 ~ 0 -CPU-A9 -Text Label 8600 2200 0 50 ~ 0 -CPU-A8 -Text Label 8600 2400 0 50 ~ 0 -CPU-A10 -Text Label 8600 2500 0 50 ~ 0 -CPU-A11 -Text Label 8600 2600 0 50 ~ 0 -CPU-A12 -Text Label 8600 2700 0 50 ~ 0 -CPU-A13 -Text Label 8600 2800 0 50 ~ 0 -CPU-A14 -Text Label 8600 2900 0 50 ~ 0 -CPU-A15 -Text Label 8600 3000 0 50 ~ 0 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5D7FE1C0 +P 9900 6700 +F 0 "U5" H 9550 7800 50 0000 C CNN +F 1 "RP2C02 PPU" H 9750 5600 50 0000 C CNN +F 2 "Package_DIP:DIP-40_W15.24mm" H 9900 7900 50 0001 C CNN +F 3 "" H 9550 7750 50 0001 C CNN + 1 9900 6700 + 1 0 0 -1 +$EndComp +$Comp +L Device:R R2 +U 1 1 5D802682 +P 10650 7950 +F 0 "R2" H 10720 7996 50 0000 L CNN +F 1 "510" H 10720 7905 50 0000 L CNN +F 2 "Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" V 10580 7950 50 0001 C CNN +F 3 "~" H 10650 7950 50 0001 C CNN + 1 10650 7950 + 1 0 0 -1 +$EndComp +$Comp +L Device:Q_PNP_ECB Q1 +U 1 1 5D809E07 +P 10550 8500 +F 0 "Q1" H 10741 8454 50 0000 L CNN +F 1 "2SA937" H 10741 8545 50 0000 L CNN +F 2 "Package_TO_SOT_THT:TO-126-3_Vertical" H 10750 8600 50 0001 C CNN +F 3 "~" H 10550 8500 50 0001 C CNN + 1 10550 8500 + 1 0 0 1 +$EndComp +$Comp +L Device:L_Core_Ferrite FC2 +U 1 1 5D802DEF +P 11250 8200 +F 0 "FC2" V 11475 8200 50 0000 C CNN +F 1 "Ferrite_Coil" V 11384 8200 50 0000 C CNN +F 2 "Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" H 11250 8200 50 0001 C CNN +F 3 "~" H 11250 8200 50 0001 C CNN + 1 11250 8200 + 0 -1 -1 0 +$EndComp +Wire Wire Line + 10650 8100 10650 8200 +Wire Wire Line + 11400 8200 11550 8200 +Wire Wire Line + 11550 8200 11550 8300 +Wire Wire Line + 11100 8200 10650 8200 +Connection ~ 10650 8200 +Wire Wire Line + 10650 8200 10650 8300 +Text Label 10650 8200 0 50 ~ 0 +EXP-VIDEO +Text Label 11850 8200 2 50 ~ 0 +VIDEO +Text Label 10650 7800 1 50 ~ 0 +VCC +Text Label 10650 8700 3 50 ~ 0 +GND +Text Label 11550 8700 3 50 ~ 0 +GND +$Comp +L Device:C C5 +U 1 1 5D8053EB +P 11550 8450 +F 0 "C5" H 11665 8496 50 0000 L CNN +F 1 "330pF" H 11665 8405 50 0000 L CNN +F 2 "Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm" H 11588 8300 50 0001 C CNN +F 3 "~" H 11550 8450 50 0001 C CNN + 1 11550 8450 + 1 0 0 -1 +$EndComp +Wire Wire Line + 11550 8600 11550 8700 +Wire Wire Line + 11550 8200 11850 8200 +Connection ~ 11550 8200 +Wire Wire Line + 10350 7650 10350 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Label 12700 6850 2 50 ~ 0 +PPU-~WE +Text Label 12700 6950 2 50 ~ 0 +PPU-~RD +Text Label 12700 7050 2 50 ~ 0 +VRAM-A10 +Text Label 12700 7150 2 50 ~ 0 +VRAM-~CE +Text Label 12700 7250 2 50 ~ 0 +PPU-D7 +Text Label 12700 7350 2 50 ~ 0 +PPU-D6 +Wire Wire Line + 12250 6550 12700 6550 +Wire Wire Line + 12250 6650 12700 6650 +Wire Wire Line + 12250 6750 12700 6750 +Wire Wire Line + 12250 6950 12700 6950 +Wire Wire Line + 12250 7050 12700 7050 +Wire Wire Line + 12250 7150 12700 7150 +Wire Wire Line + 12250 7250 12700 7250 +Wire Wire Line + 12250 7350 12700 7350 +Wire Wire Line + 12250 6850 12700 6850 +$Comp +L NES-CPU-11:74HC373 U2 +U 1 1 5D8739AE +P 11850 5700 +F 0 "U2" H 11600 6300 50 0000 C CNN +F 1 "74HC373" H 11700 5100 50 0000 C CNN +F 2 "Package_DIP:DIP-20_W7.62mm" H 11850 6400 50 0001 C CNN +F 3 "https://www.cl.cam.ac.uk/teaching//2003/Hardware/datasheets/ht6116.pdf" H 11600 6300 50 0001 C CNN + 1 11850 5700 + 1 0 0 -1 +$EndComp +Text Label 12700 6150 2 50 ~ 0 +ALE +Wire Wire Line + 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1900 2 50 ~ 0 +~IRQ +Text Label 10500 2000 2 50 ~ 0 +M2 +Text Label 10500 2100 2 50 ~ 0 +GND +Text Label 10500 2200 2 50 ~ 0 +CPU-CLK +Text Label 10500 2300 2 50 ~ 0 +CPU-D0 +Text Label 10500 2400 2 50 ~ 0 +CPU-D1 +Text Label 10500 2500 2 50 ~ 0 +CPU-D2 +Text Label 10500 2600 2 50 ~ 0 +CPU-D3 +Text Label 10500 2700 2 50 ~ 0 +CPU-D4 +Text Label 10500 2800 2 50 ~ 0 +CPU-D5 +Text Label 10500 2900 2 50 ~ 0 +CPU-D6 +Text Label 10500 3000 2 50 ~ 0 +CPU-D7 +Wire Wire Line + 10500 1700 10000 1700 +Wire Wire Line + 10000 1800 10500 1800 +Wire Wire Line + 10500 1900 10000 1900 +Wire Wire Line + 10500 2000 10000 2000 +Wire Wire Line + 10500 2100 10000 2100 +Wire Wire Line + 10500 2200 10000 2200 +Wire Wire Line + 10000 2300 10500 2300 +Wire Wire Line + 10500 2400 10000 2400 +Wire Wire Line + 10500 2500 10000 2500 +Wire Wire Line + 10500 2600 10000 2600 +Wire Wire Line + 10500 2700 10000 2700 +Wire Wire Line + 10500 2800 10000 2800 +Wire Wire Line + 10500 2900 10000 2900 +Wire Wire Line + 10500 3000 10000 3000 +$Comp +L 74xx:74LS139 U3 +U 1 1 5DA47091 +P 11650 2750 +F 0 "U3" H 11650 3150 50 0000 C CNN +F 1 "74HC139" H 11650 3026 50 0000 C CNN +F 2 "Package_DIP:DIP-16_W7.62mm" H 11650 2750 50 0001 C CNN +F 3 "http://www.ti.com/lit/gpn/sn74LS139" H 11650 2750 50 0001 C CNN + 1 11650 2750 + 1 0 0 -1 +$EndComp +$Comp +L 74xx:74LS139 U3 +U 2 1 5DA4790A +P 11650 1950 +F 0 "U3" H 11650 2317 50 0000 C CNN +F 1 "74HC139" H 11650 2226 50 0000 C CNN +F 2 "Package_DIP:DIP-16_W7.62mm" H 11650 1950 50 0001 C CNN +F 3 "http://www.ti.com/lit/gpn/sn74LS139" H 11650 1950 50 0001 C CNN + 2 11650 1950 + 1 0 0 -1 +$EndComp +$Comp +L 74xx:74LS139 U3 +U 3 1 5DA489B2 +P 11650 1300 +F 0 "U3" V 12017 1300 50 0000 C CNN +F 1 "74HC139" V 11926 1300 50 0000 C CNN +F 2 "Package_DIP:DIP-16_W7.62mm" H 11650 1300 50 0001 C CNN +F 3 "http://www.ti.com/lit/gpn/sn74LS139" H 11650 1300 50 0001 C CNN + 3 11650 1300 + 0 -1 -1 0 +$EndComp +Text Label 12550 2150 2 50 ~ 0 +~ROMSEL +Wire Wire Line + 12550 2150 12150 2150 +Text Label 10750 2150 0 50 ~ 0 +GND +Text Label 10750 1850 0 50 ~ 0 +CPU-A15 +Text Label 10750 1950 0 50 ~ 0 +M2 +Wire Wire Line + 10750 1850 11150 1850 +Wire Wire Line + 10750 1950 11150 1950 +Wire Wire Line + 10750 2150 11150 2150 +Text Label 10750 1300 0 50 ~ 0 +VCC +Text Label 12550 1300 2 50 ~ 0 +GND +Wire Wire Line + 12150 1300 12550 1300 +Wire Wire Line + 10750 1300 11150 1300 +NoConn ~ 12150 1850 +NoConn ~ 12150 2050 +Text Label 10750 2650 0 50 ~ 0 +CPU-A14 +Text Label 10750 2750 0 50 ~ 0 +CPU-A13 +Wire Wire Line + 10750 2650 11150 2650 +Wire Wire Line + 10750 2750 11150 2750 +Wire Wire Line + 11150 2950 10700 2950 +Wire Wire Line + 10700 2950 10700 2400 +Wire Wire Line + 10700 2400 12600 2400 +Wire Wire Line + 12600 2400 12600 1950 +Wire Wire Line + 12600 1950 12150 1950 +NoConn ~ 12150 2850 +NoConn ~ 12150 2950 +Text Label 12550 2650 2 50 ~ 0 +WRAM-~CE +Text Label 12550 2750 2 50 ~ 0 +PPU-~CE +Wire Wire Line + 12550 2650 12150 2650 +Wire Wire Line + 12550 2750 12150 2750 +$Comp +L NES-CPU-11:2KB_SRAM U1 +U 1 1 5DB49A97 +P 10600 3900 +F 0 "U1" H 10350 4600 50 0000 C CNN +F 1 "6116 (WRAM)" H 10550 3200 50 0000 C CNN +F 2 "Package_DIP:DIP-24_W7.62mm" H 10600 4700 50 0001 C CNN +F 3 "https://www.cl.cam.ac.uk/teaching//2003/Hardware/datasheets/ht6116.pdf" H 10350 4600 50 0001 C CNN + 1 10600 3900 + 1 0 0 -1 +$EndComp +Text Label 11450 3350 2 50 ~ 0 +VCC +Text Label 11450 3450 2 50 ~ 0 +CPU-A8 +Text Label 11450 3550 2 50 ~ 0 +CPU-A9 +Text Label 11450 3650 2 50 ~ 0 +CPU-R~W +Text Label 11450 3750 2 50 ~ 0 +GND +Text Label 11450 3850 2 50 ~ 0 +CPU-A10 +Text Label 11450 3950 2 50 ~ 0 +WRAM-~CE +Text Label 11450 4050 2 50 ~ 0 +CPU-D7 +Text Label 11450 4150 2 50 ~ 0 +CPU-D6 +Text Label 11450 4250 2 50 ~ 0 +CPU-D5 +Text Label 11450 4350 2 50 ~ 0 +CPU-D4 +Text Label 11450 4450 2 50 ~ 0 +CPU-D3 +Wire Wire Line + 11450 3350 11000 3350 +Wire Wire Line + 11450 3450 11000 3450 +Wire Wire Line + 11450 3550 11000 3550 +Wire Wire Line + 11450 3650 11000 3650 +Wire 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+Wire Wire Line + 2600 5300 2700 5300 +Connection ~ 2700 5300 +Wire Wire Line + 3000 4950 2700 4950 +Connection ~ 2700 4950 +Wire Wire Line + 2700 4950 2700 5300 +Wire Wire Line + 2700 4750 2950 4750 +Wire Wire Line + 3250 4750 3500 4750 +Wire Wire Line + 3500 4950 3500 4750 +$Comp +L Device:C_Small C21 +U 1 1 60C01E8C +P 2700 5750 +F 0 "C21" H 2900 5700 50 0000 C CNN +F 1 "220pF" H 2900 5800 50 0000 C CNN +F 2 "Capacitor_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm" H 2700 5750 50 0001 C CNN +F 3 "~" H 2700 5750 50 0001 C CNN + 1 2700 5750 + -1 0 0 1 +$EndComp +Text Label 2700 6200 1 50 ~ 0 +GND +Wire Wire Line + 2700 5850 2700 6200 +$Comp +L 74xx:74LS04 U9 +U 5 1 604B1E95 +P 3100 5300 +F 0 "U9" H 2850 5500 50 0000 C CNN +F 1 "74LS04" H 3250 5500 50 0000 C CNN +F 2 "Package_DIP:DIP-14_W7.62mm" H 3100 5300 50 0001 C CNN +F 3 "http://www.ti.com/lit/gpn/sn74LS04" H 3100 5300 50 0001 C CNN + 5 3100 5300 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2700 5300 2700 5650 +Wire Wire Line + 3200 4950 3500 4950 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5600 9300 5600 9650 +Text Label 5600 10200 1 50 ~ 0 +GND +Text Label 5600 9300 3 50 ~ 0 +VCC +$Comp +L Device:C_Small C40 +U 1 1 64A97A46 +P 6000 9750 +F 0 "C40" H 6150 9700 50 0000 C CNN +F 1 "10nF" H 6200 9800 50 0000 C CNN +F 2 "Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm" H 6000 9750 50 0001 C CNN +F 3 "~" H 6000 9750 50 0001 C CNN + 1 6000 9750 + -1 0 0 1 +$EndComp +Wire Wire Line + 6000 9850 6000 10200 +Wire Wire Line + 6000 9300 6000 9650 +Text Label 6000 10200 1 50 ~ 0 +GND +Text Label 6000 9300 3 50 ~ 0 +VCC +$Comp +L Device:C_Small C25 +U 1 1 64B3BA85 +P 6400 9750 +F 0 "C25" H 6550 9700 50 0000 C CNN +F 1 "(Unused)" H 6600 9800 50 0000 C CNN +F 2 "Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm" H 6400 9750 50 0001 C CNN +F 3 "~" H 6400 9750 50 0001 C CNN + 1 6400 9750 + -1 0 0 1 +$EndComp +Wire Wire Line + 6400 9850 6400 10200 +Wire Wire Line + 6400 9300 6400 9650 +Text Label 6400 10200 1 50 ~ 0 +GND +Text Label 6400 9300 3 50 ~ 0 +VCC +$Comp +L Device:C_Small C13 +U 1 1 64BE03AA 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