Try Heaters out with simple TE and TM MZI circuits

[boy4429856821]

No description provided.

[boy4429856821]

only concern that I think is a problem is having multiple ports labels on the heaters (for example, elec_TEMZIa_G and elec_TEMZIb_G). Is this okay? I want to take repeatability measurements and this is the only way I could think of.... Let me know your thoughts

[mustafacc]

@JymBone5

[JymBone5]

That should be okay, but each electrical pad is associated to the corresponding device by the name you give it, it must be the same as the device name in order for it to be linked, you can label multiple electrical pads but must provide the correct associated device, if you label multiple you can name them using the last field so G and G_1 for instance

[boy4429856821]

yup, I believe I have that correct in this design.

[boy4429856821]

Also, I'm sort of confused about the creating the .yaml file for this design. Where can I find the .exe file that allows me to create the TestParameters yaml file?

[lukasc-ubc]

Good timing. We just updated the instructions and the Yaml creator:

Details on the Yaml SiEPIC test creator GUI

[lukasc-ubc]

Could you please create the Yaml file and upload together with the layout?

[boy4429856821]

Good timing. We just updated the instructions and the Yaml creator:

Details on the Yaml SiEPIC test creator GUI

Hi @lukasc-ubc , I tried the yaml_testcreator but it's having issues extracting electrical coordinates, even for the example in the GITHUB repo. Can you check to see if this is reproduced on your end? Also is there a feature request page for this tool? For example, a clear output log button would be nice :)

[lukasc-ubc]

To make feature requests / bugs, can you please use this? https://github.com/SiEPIC/SiEPIC_testcreator/issues

I reported it: SiEPIC/SiEPIC_testcreator#9

[PetervandenDoel]

@boy4429856821 Can you try labelling your electrical pad names without the _G at the end?

[boy4429856821]

unsure what the errors are.... Was able to make properly make a YAML file thanks to Peter :)

[lukasc-ubc]

You only have one opt_in label, but two separate optical circuits. Only one of them will be measured (the top one). Please add.

[boy4429856821]

Hi @lukasc-ubc , I think my files are passing DRC and layout verification but there are some other files that were submitted but other users that are causing errors? Please let me know.

[lukasc-ubc]

Great!