Validator doesn't properly ensure alignment of memory accesses

[bchurchill]

There are a bunch of rules in section 14.9 of the Intel manual I never paid attention to, and so sometime I need to fix this.

[bchurchill]

This will never possibly get fixed unless we have a way of fuzz testing this against the hardware... but that will basically require testing the hardware to see if it segfaults and catching the signals. Ugh.

[sharmar]

Does not the spreadsheet have alignment restrictions?

[bchurchill]

Nope. The actual situation is pretty complicated. There's a section in the manual that addresses this, but it's not what we've implemented. I think even the sandbox has a bug or two here, perhaps over-reporting segfaults (whereas the validator under-reports). This is something I should be able to fix, but it's not relevant for the current paper since we aren't doing anything with xmm/ymm registers (nothing needs to be aligned, I think).

[bchurchill]

Note this only applies to SSE/AVX instructions.