IEEE SSCS Open-Source Ecosystem “Code-a-Chip” Travel Grant Awards at ISSCC'23
List of Accepted Notebooks:
| Name | Affiliation | Notebook Title |
|---|---|---|
| Yihai Zhang | Tsinghua-Berkeley Shenzhen Institute, Tsinghua University China | GreenRio 2: A Linux-compatible RISC-V Processor Developed with A Fully Open-Source EDA Flow |
| Anawin Opasatian | University of Tokyo (Japan) | Bernstein-Yang Modular Inversion with XLS/OpenLane |
| Mauricio Montanares | University of Concepción (Chile) | Sonar On Chip Project |
| Nealson Li | Georgia Institute of Technology (USA) | Coordinate Rotation Digital Computer (CORDIC) with OpenLane |
| HyungJoo Park | Hanyang University (South Korea) | Scan Register layout generation using laygo2 |
| Ali Hammoud | University of Michigan (USA) | OpenFASoC: Digital LDO Generator |
| Nimish Shah | KU Leuven (Belgium) | DPU: DAG Processing Unit for probabilistic ML and sparse matrix algebra |
Note: Many thanks everyone for your participation! We recommend to resubmit your Notebooks to the next code-a-chip Notebook competition with revisions. Stay tuned!
The International Solid-State Circuits Conference (ISSCC) 2023 Code-a-Chip Travel Grant Award is created to:
- Promote reproducible chip design using open-source tools and notebook-driven design flows and
- Enable up-and-coming talents as well as seasoned open-source enthusiasts to travel to the Conference and interact with the leading-edge chip design community.
This program is made possible by a donation from the CHIPS Alliance, a non-profit organization hosted by The Linux Foundation.