From 6eb45c73c9adabab22099fb555c3083c24a18097 Mon Sep 17 00:00:00 2001 From: Daniel Tremblay Date: Sat, 19 Feb 2022 10:37:10 +0100 Subject: [PATCH] Release 0.5.6.0 --------------- Added the MIDI to VGM Converter form. Fixed an issue with the Tile Editor that margins were not taken into account. Fixed the mouse sensing code: we need to record the state of each mouse button and pass the state to the mouse interrupt. --- Main/Basic/MultimediaTimer.cs | 4 - Main/UI/AssetLoader.cs | 2 +- Main/UI/MainWindow.cs | 43 +- Main/UI/TileEditor.cs | 2 +- bin/Release/FoenixIDE.exe | Bin 468480 -> 468992 bytes bin/Release/roms/kernel.hex | 2991 +++-- bin/Release/roms/kernel.lst | 20857 ++++++++++++++++---------------- 7 files changed, 11938 insertions(+), 11961 deletions(-) diff --git a/Main/Basic/MultimediaTimer.cs b/Main/Basic/MultimediaTimer.cs index 7d8edfa..4067f14 100644 --- a/Main/Basic/MultimediaTimer.cs +++ b/Main/Basic/MultimediaTimer.cs @@ -1,8 +1,4 @@ using System; -using System.Collections.Generic; -using System.Linq; -using System.Text; -using System.Threading.Tasks; using System.Runtime.InteropServices; using System.Diagnostics; diff --git a/Main/UI/AssetLoader.cs b/Main/UI/AssetLoader.cs index a033e9c..85c20cf 100644 --- a/Main/UI/AssetLoader.cs +++ b/Main/UI/AssetLoader.cs @@ -89,7 +89,7 @@ private void BrowseFileButton_Click(object sender, EventArgs e) { Title = "Load Bitmap", DefaultExt = ".bin", - Filter = "Asset Files (*.bmp *.png *.bin *.data *.pal *.aseprite)|*.bmp;*.png;*.bin;*.data;*.pal;*.aseprite|Binary Files|*.bin|Palette Files|*.pal|Bitmap Files|*.bmp;*.png|Data Files|*.data|Any File|*.*" + Filter = "Asset Files (*.bmp *.png *.bin *.data *.pal *.tls *.aseprite)|*.bmp;*.png;*.bin;*.data;*.pal;*.tls;*.aseprite|Binary Files|*.bin|Palette Files|*.pal|Bitmap Files|*.bmp;*.png|Data Files|*.data|Tilemap Files|*.tls|Any File|*.*" }; // Load content of file in a TextBlock diff --git a/Main/UI/MainWindow.cs b/Main/UI/MainWindow.cs index dbd5e8c..978acca 100644 --- a/Main/UI/MainWindow.cs +++ b/Main/UI/MainWindow.cs @@ -752,9 +752,12 @@ private void Gpu_MouseMove(object sender, MouseEventArgs e) Point size = gpu.GetScreenSize(); double ratioW = gpu.Width / (double)size.X; double ratioH = gpu.Height / (double)size.Y; + bool borderEnabled = kernel.MemMgr.ReadByte(MemoryLocations.MemoryMap.BORDER_CTRL_REG) == 1; + double borderWidth = borderEnabled ? kernel.MemMgr.ReadByte(MemoryLocations.MemoryMap.BORDER_X_SIZE) : 0; + double borderHeight = borderEnabled ? kernel.MemMgr.ReadByte(MemoryLocations.MemoryMap.BORDER_Y_SIZE) : 0; if (gpu.TileEditorMode) { - if ((e.X / ratioW > 32 && e.X / ratioW < size.X -32) && (e.Y / ratioH > 32 && e.Y / ratioH < size.Y -32)) + if ((e.X / ratioW > borderWidth && e.X / ratioW < size.X - borderWidth) && (e.Y / ratioH > borderHeight && e.Y / ratioH < size.Y - borderHeight)) { this.Cursor = Cursors.Hand; if (e.Button == MouseButtons.Left) @@ -778,6 +781,18 @@ private void Gpu_MouseDown(object sender, MouseEventArgs e) Point size = gpu.GetScreenSize(); double ratioW = gpu.Width / (double)size.X; double ratioH = gpu.Height / (double)size.Y; + switch (e.Button) + { + case MouseButtons.Left: + left = true; + break; + case MouseButtons.Right: + right = true; + break; + case MouseButtons.Middle: + middle = true; + break; + } if (gpu.TileEditorMode && gpu.Cursor != Cursors.No) { TileClicked?.Invoke(new Point((int)(e.X / ratioW / 16), (int)(e.Y / ratioH / 16))); @@ -791,9 +806,26 @@ private void Gpu_MouseDown(object sender, MouseEventArgs e) private void Gpu_MouseUp(object sender, MouseEventArgs e) { + switch (e.Button) + { + case MouseButtons.Left: + left = false; + break; + case MouseButtons.Right: + right = false; + break; + case MouseButtons.Middle: + middle = false; + break; + } GenerateMouseInterrupt(e); } + // Remember the state of the mouse buttons + bool left = false; + bool right = false; + bool middle = false; + private void GenerateMouseInterrupt(MouseEventArgs e) { Point size = gpu.GetScreenSize(); @@ -801,12 +833,12 @@ private void GenerateMouseInterrupt(MouseEventArgs e) double ratioH = gpu.Height / (double)size.Y; int X = (int)(e.X / ratioW); int Y = (int)(e.Y / ratioH); - bool middle = e.Button == MouseButtons.Middle; - bool left = e.Button == MouseButtons.Left; - bool right = e.Button == MouseButtons.Right; + + byte buttons = (byte)((left ? 1 : 0) + (right ? 2 : 0) + (middle ? 4 : 0)); kernel.MemMgr.VICKY.WriteWord(0x702, X); kernel.MemMgr.VICKY.WriteWord(0x704, Y); + kernel.MemMgr.VICKY.WriteByte(0x706, buttons); // Generate three interrupts - to emulate how the PS/2 controller works byte mask = kernel.MemMgr.ReadByte(MemoryLocations.MemoryMap.INT_MASK_REG0); @@ -819,6 +851,9 @@ private void GenerateMouseInterrupt(MouseEventArgs e) private void Gpu_MouseLeave(object sender, EventArgs e) { + left = false; + right = false; + middle = false; if (gpu.IsMousePointerVisible() || gpu.TileEditorMode) { Cursor.Show(); diff --git a/Main/UI/TileEditor.cs b/Main/UI/TileEditor.cs index b0ebab1..097947e 100644 --- a/Main/UI/TileEditor.cs +++ b/Main/UI/TileEditor.cs @@ -229,7 +229,7 @@ private void SaveTilemapButton_Click(object sender, EventArgs e) Resource resource = new Resource() { Name = "Tile Editor Map", - Length = width * height, + Length = width * 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zI-y;hx~3{=qV##|)DS7bY`y;$X=65DRMlG{t*(mOBi&uKe~)ykHGi-4^v%Z7jia+e z%m0|L|2MXnm$Hr>Z}q+|Ew@coRnaVx?RGhobL_fg character translation tables (B:X points to the new tables) +.381130 1130 5c 2b 56 39 jmp $39562b F_COPY JML IF_COPY ; Copy a file +.381134 1134 5c 75 55 39 jmp $395575 F_ALLOCFD JML IF_ALLOCFD ; Allocate a file descriptor +.381138 1138 5c c9 55 39 jmp $3955c9 F_FREEFD JML IF_FREEFD ; Free a file descriptor +.38113c 113c 5c 06 77 39 jmp $397706 TESTBREAK JML KBD_TEST_BREAK ; Check if BREAK was pressed recently by the user (C is set if true, clear if false) +.381140 1140 5c 46 79 39 jmp $397946 SETTABLE JML KBD_SETTABLE ; Set the keyboard scan code -> character translation tables (B:X points to the new tables) .381144 1144 5c 58 0b 39 jmp $390b58 READVRAM JML IREADVRAM ; Read a byte from video RAM at B:X .381148 1148 5c 6c 17 38 jmp $38176c SETHANDLER JML ISETHANDLER ; Set the handler for the interrupt # in A to the FAR routine at Y:X .38114c 114c 5c f4 0f 39 jmp $390ff4 DELAY JML IDELAY ; Wait at least Y:X ticks of the system clock. =$001700 VEC_INT_START = * ; Label for the start of the IRQ vectors -.381700 1700 5c ae 65 39 jmp $3965ae VEC_INT00_SOF JML FDC_TIME_HANDLE ; IRQ 0, 0 --- Start Of Frame interrupt +.381700 1700 5c 44 65 39 jmp $396544 VEC_INT00_SOF JML FDC_TIME_HANDLE ; IRQ 0, 0 --- Start Of Frame interrupt .381704 1704 5c c8 10 39 jmp $3910c8 VEC_INT01_SOL JML IRQHANDLESTUB ; IRQ 0, 1 --- Start Of Line interrupt .381708 1708 5c c8 10 39 jmp $3910c8 VEC_INT02_TMR0 JML IRQHANDLESTUB ; IRQ 0, 2 --- Timer 0 interrupt .38170c 170c 5c c8 10 39 jmp $3910c8 VEC_INT03_TMR1 JML IRQHANDLESTUB ; IRQ 0, 3 --- Timer 1 interrupt @@ -627,7 +616,7 @@ .381714 1714 5c c8 10 39 jmp $3910c8 VEC_INT05_RTC JML IRQHANDLESTUB ; IRQ 0, 5 --- Real Time Clock interrupt .381718 1718 5c c8 10 39 jmp $3910c8 VEC_INT06_FDC JML IRQHANDLESTUB ; IRQ 0, 6 --- Floppy Drive Controller interrupt .38171c 171c 5c 28 80 39 jmp $398028 VEC_INT07_MOUSE JML MOUSE_INTERRUPT ; IRQ 0, 7 --- Mouse interrupt -.381720 1720 5c bd 75 39 jmp $3975bd VEC_INT10_KBD JML KBD_PROCESS_BYTE ; IRQ 1, 0 --- Keyboard interrupt +.381720 1720 5c 53 75 39 jmp $397553 VEC_INT10_KBD JML KBD_PROCESS_BYTE ; IRQ 1, 0 --- Keyboard interrupt .381724 1724 5c c8 10 39 jmp $3910c8 VEC_INT11_COL0 JML IRQHANDLESTUB ; IRQ 1, 1 --- VICKY_II (INT2) Sprite Collision .381728 1728 5c c8 10 39 jmp $3910c8 VEC_INT12_COL1 JML IRQHANDLESTUB ; IRQ 1, 2 --- VICKY_II (INT3) Bitmap Collision .38172c 172c 5c c8 10 39 jmp $3910c8 VEC_INT13_COM2 JML IRQHANDLESTUB ; IRQ 1, 3 --- Serial port #2 interrupt @@ -1077,87 +1066,104 @@ ;****** Processing file: src\Defines/super_io_def.asm -=$af1100 PME_STS_REG = $AF1100 -=$af1102 PME_EN_REG = $AF1102 -=$af1104 PME_STS1_REG = $AF1104 -=$af1105 PME_STS2_REG = $AF1105 -=$af1106 PME_STS3_REG = $AF1106 -=$af1107 PME_STS4_REG = $AF1107 -=$af1108 PME_STS5_REG = $AF1108 -=$af110a PME_EN1_REG = $AF110A -=$af110b PME_EN2_REG = $AF110B -=$af110c PME_EN3_REG = $AF110C -=$af110d PME_EN4_REG = $AF110D -=$af110e PME_EN5_REG = $AF110E -=$af1110 SMI_STS1_REG = $AF1110 -=$af1111 SMI_STS2_REG = $AF1111 -=$af1112 SMI_STS3_REG = $AF1112 -=$af1113 SMI_STS4_REG = $AF1113 -=$af1114 SMI_STS5_REG = $AF1114 -=$af1116 SMI_EN1_REG = $AF1116 -=$af1117 SMI_EN2_REG = $AF1117 -=$af1118 SMI_EN3_REG = $AF1118 -=$af1119 SMI_EN4_REG = $AF1119 -=$af111a SMI_EN5_REG = $AF111A -=$af111c MSC_ST_REG = $AF111C +=$af1060 SIO_KB = $AF1060 +=$af1100 PME_STS_REG = $AF1100 +=$af1102 PME_EN_REG = $AF1102 +=$af1104 PME_STS1_REG = $AF1104 +=$af1105 PME_STS2_REG = $AF1105 +=$af1106 PME_STS3_REG = $AF1106 +=$af1107 PME_STS4_REG = $AF1107 +=$af1108 PME_STS5_REG = $AF1108 +=$af110a PME_EN1_REG = $AF110A +=$af110b PME_EN2_REG = $AF110B +=$af110c PME_EN3_REG = $AF110C +=$af110d PME_EN4_REG = $AF110D +=$af110e PME_EN5_REG = $AF110E +=$af1110 SMI_STS1_REG = $AF1110 +=$af1111 SMI_STS2_REG = $AF1111 +=$af1112 SMI_STS3_REG = $AF1112 +=$af1113 SMI_STS4_REG = $AF1113 +=$af1114 SMI_STS5_REG = $AF1114 +=$af1116 SMI_EN1_REG = $AF1116 +=$af1117 SMI_EN2_REG = $AF1117 +=$af1118 SMI_EN3_REG = $AF1118 +=$af1119 SMI_EN4_REG = $AF1119 +=$af111a SMI_EN5_REG = $AF111A +=$af111c MSC_ST_REG = $AF111C =$af111e FORCE_DISK_CHANGE = $AF111E =$af111f FLOPPY_DATA_RATE = $AF111F =$af1120 UART1_FIFO_CTRL_SHDW = $AF1120 =$af1121 UART2_FIFO_CTRL_SHDW = $AF1121 =$af1122 DEV_DISABLE_REG = $AF1122 -=$af1123 GP10_REG = $AF1123 -=$af1124 GP11_REG = $AF1124 -=$af1125 GP12_REG = $AF1125 -=$af1126 GP13_REG = $AF1126 -=$af1127 GP14_REG = $AF1127 -=$af1128 GP15_REG = $AF1128 -=$af1129 GP16_REG = $AF1129 -=$af112a GP17_REG = $AF112A -=$af112b GP20_REG = $AF112B -=$af112c GP21_REG = $AF112C -=$af112d GP22_REG = $AF112D -=$af112f GP24_REG = $AF112F -=$af1130 GP25_REG = $AF1130 -=$af1131 GP26_REG = $AF1131 -=$af1132 GP27_REG = $AF1132 -=$af1133 GP30_REG = $AF1133 -=$af1134 GP31_REG = $AF1134 -=$af1135 GP32_REG = $AF1135 -=$af1136 GP33_REG = $AF1136 -=$af1137 GP34_REG = $AF1137 -=$af1138 GP35_REG = $AF1138 -=$af1139 GP36_REG = $AF1139 -=$af113a GP37_REG = $AF113A -=$af113b GP40_REG = $AF113B -=$af113c GP41_REG = $AF113C -=$af113d GP42_REG = $AF113D -=$af113e GP43_REG = $AF113E -=$af113f GP50_REG = $AF113F -=$af1140 GP51_REG = $AF1140 -=$af1141 GP52_REG = $AF1141 -=$af1142 GP53_REG = $AF1142 -=$af1143 GP54_REG = $AF1143 -=$af1144 GP55_REG = $AF1144 -=$af1145 GP56_REG = $AF1145 -=$af1146 GP57_REG = $AF1146 -=$af1147 GP60_REG = $AF1147 -=$af1148 GP61_REG = $AF1148 -=$af114b GP1_REG = $AF114B -=$af114c GP2_REG = $AF114C -=$af114d GP3_REG = $AF114D -=$af114e GP4_REG = $AF114E -=$af114f GP5_REG = $AF114F -=$af1150 GP6_REG = $AF1150 +=$af1123 GP10_REG = $AF1123 +=$af1124 GP11_REG = $AF1124 +=$af1125 GP12_REG = $AF1125 +=$af1126 GP13_REG = $AF1126 +=$af1127 GP14_REG = $AF1127 +=$af1128 GP15_REG = $AF1128 +=$af1129 GP16_REG = $AF1129 +=$af112a GP17_REG = $AF112A +=$af112b GP20_REG = $AF112B +=$af112c GP21_REG = $AF112C +=$af112d GP22_REG = $AF112D +=$af112f GP24_REG = $AF112F +=$af1130 GP25_REG = $AF1130 +=$af1131 GP26_REG = $AF1131 +=$af1132 GP27_REG = $AF1132 +=$af1133 GP30_REG = $AF1133 +=$af1134 GP31_REG = $AF1134 +=$af1135 GP32_REG = $AF1135 +=$af1136 GP33_REG = $AF1136 +=$af1137 GP34_REG = $AF1137 +=$af1138 GP35_REG = $AF1138 +=$af1139 GP36_REG = $AF1139 +=$af113a GP37_REG = $AF113A +=$af113b GP40_REG = $AF113B +=$af113c GP41_REG = $AF113C +=$af113d GP42_REG = $AF113D +=$af113e GP43_REG = $AF113E +=$af113f GP50_REG = $AF113F +=$af1140 GP51_REG = $AF1140 +=$af1141 GP52_REG = $AF1141 +=$af1142 GP53_REG = $AF1142 +=$af1143 GP54_REG = $AF1143 +=$af1144 GP55_REG = $AF1144 +=$af1145 GP56_REG = $AF1145 +=$af1146 GP57_REG = $AF1146 +=$af1147 GP60_REG = $AF1147 +=$af1148 GP61_REG = $AF1148 +=$af114b GP1_REG = $AF114B +=$af114c GP2_REG = $AF114C +=$af114d GP3_REG = $AF114D +=$af114e GP4_REG = $AF114E +=$af114f GP5_REG = $AF114F +=$af1150 GP6_REG = $AF1150 =$af1156 FAN1_REG = $AF1156 -=$af1157 FAN2_REG = $AF1157 -=$af1158 FAN_CTRL_REG = $AF1158 -=$af1159 FAN1_TACH_REG = $AF1159 -=$af115a FAN2_TACH_REG = $AF115A -=$af115b FAN1_PRELOAD_REG = $AF115B -=$af115c FAN2_PRELOAD_REG = $AF115C +=$af1157 FAN2_REG = $AF1157 +=$af1158 FAN_CTRL_REG = $AF1158 +=$af1159 FAN1_TACH_REG = $AF1159 +=$af115a FAN2_TACH_REG = $AF115A +=$af115b FAN1_PRELOAD_REG = $AF115B +=$af115c FAN2_PRELOAD_REG = $AF115C =$af115d LED1_REG = $AF115D =$af115e LED2_REG = $AF115E -=$af115f KEYBOARD_SCAN_CODE = $AF115F +=$af115f KEYBOARD_SCAN_CODE = $AF115F +=$af1200 SIO_JOY = $AF1200 +=$af12f8 SIO_COM1 = $AF12F8 +=$af1330 SIO_MPU = $AF1330 +=$af1378 SIO_LPT0 = $AF1378 +=$af13f0 SIO_FDC = $AF13F0 +=$af13f0 SIO_FDC_SRA = $AF13F0 ; Read Only - Status Register A +=$af13f1 SIO_FDC_SRB = $AF13F1 ; Read Only - Status Register B +=$af13f2 SIO_FDC_DOR = $AF13F2 ; Read/Write - Digital Output Register +=$af13f3 SIO_FDC_TSR = $AF13F3 ; Read/Write - Tape Drive Status +=$af13f4 SIO_FDC_MSR = $AF13F4 ; Read - Main Status Register +=$af13f4 SIO_FDC_DSR = $AF13F4 ; Write - Data Select Register +=$af13f5 SIO_FDC_DTA = $AF13F5 ; Read/Write - Data - FIFO +=$af13f6 SIO_FDC_RSV = $AF13F6 ; Reserved +=$af13f7 SIO_FDC_DIR = $AF13F7 ; Read - Digital Input Register +=$af13f8 SIO_FDC_CCR = $AF13F8 ; Write - Configuration Control Register +=$af13f8 SIO_COM0 = $AF13F8 ;****** Return to file: src\kernel.asm @@ -1414,6 +1420,7 @@ =$af0002 GAMMA_CTRL_REG = $AF0002 =$01 GAMMA_Ctrl_Input = $01 ; 0 = DipSwitch Chooses GAMMA on/off , 1- Software Control =$02 GAMMA_Ctrl_Soft = $02 ; 0 = GAMMA Table is not Applied, 1 = GAMMA Table is Applied +=$04 SYNC_Turn_Off = $04 ; 0 = Normal Operation, 1 = Turn Off Sync to get sleep mode from Monitor =$08 GAMMA_DP_SW_VAL = $08 ; READ ONLY - Actual DIP Switch Value =$10 HIRES_DP_SW_VAL = $10 ; READ ONLY - 0 = Hi-Res on BOOT ON, 1 = Hi-Res on BOOT OFF =$af0003 VKY_RESERVED_01 = $AF0003 @@ -1612,7 +1619,7 @@ =$01 TILE_Enable = $01 =$40 TILE_Collision_On = $40 ; Enable -=$af0200 TL0_CONTROL_REG = $AF0200 ; Bit[0] - Enable, Bit[3:1] - LUT Select, +=$af0200 TL0_CONTROL_REG = $AF0200 ; Bit[0] - Enable, Bit[3:1] - LUT Select, Bit[6] - Collision On =$af0201 TL0_START_ADDY_L = $AF0201 ; Not USed right now - Starting Address to where is the MAP =$af0202 TL0_START_ADDY_M = $AF0202 =$af0203 TL0_START_ADDY_H = $AF0203 @@ -1621,9 +1628,9 @@ =$af0206 TL0_TOTAL_Y_SIZE_L = $AF0206 ; Size of the Map in Y Tile Count [9:0] =$af0207 TL0_TOTAL_Y_SIZE_H = $AF0207 =$af0208 TL0_WINDOW_X_POS_L = $AF0208 ; Top Left Corner Position of the TileMAp Window in X + Scroll -=$af0209 TL0_WINDOW_X_POS_H = $AF0209 ; Direction: [14] Scroll: [13:10] Pos: [9:0] in X +=$af0209 TL0_WINDOW_X_POS_H = $AF0209 ; Direction: [14] Pos: [13-4] Scroll: [3:0] in X =$af020a TL0_WINDOW_Y_POS_L = $AF020A ; Top Left Corner Position of the TileMAp Window in Y -=$af020b TL0_WINDOW_Y_POS_H = $AF020B ; Direction: [14] Scroll: [13:10] Pos: [9:0] in Y +=$af020b TL0_WINDOW_Y_POS_H = $AF020B ; Direction: [14] Pos: [13:4] Scroll: [3:0] in Y =$af020c TL1_CONTROL_REG = $AF020C ; Bit[0] - Enable, Bit[3:1] - LUT Select, =$af020d TL1_START_ADDY_L = $AF020D ; Not USed right now - Starting Address to where is the MAP =$af020e TL1_START_ADDY_M = $AF020E @@ -1633,9 +1640,9 @@ =$af0212 TL1_TOTAL_Y_SIZE_L = $AF0212 ; Size of the Map in Y Tile Count [9:0] =$af0213 TL1_TOTAL_Y_SIZE_H = $AF0213 =$af0214 TL1_WINDOW_X_POS_L = $AF0214 ; Top Left Corner Position of the TileMAp Window in X + Scroll -=$af0215 TL1_WINDOW_X_POS_H = $AF0215 ; Direction: [14] Scroll: [13:10] Pos: [9:0] in X +=$af0215 TL1_WINDOW_X_POS_H = $AF0215 ; Direction: [14] Pos: [13-4] Scroll: [3:0] in X =$af0216 TL1_WINDOW_Y_POS_L = $AF0216 ; Top Left Corner Position of the TileMAp Window in Y -=$af0217 TL1_WINDOW_Y_POS_H = $AF0217 ; Direction: [14] Scroll: [13:10] Pos: [9:0] in Y +=$af0217 TL1_WINDOW_Y_POS_H = $AF0217 ; Direction: [14] Pos: [13:4] Scroll: [3:0] in Y =$af0218 TL2_CONTROL_REG = $AF0218 ; Bit[0] - Enable, Bit[3:1] - LUT Select, =$af0219 TL2_START_ADDY_L = $AF0219 ; Not USed right now - Starting Address to where is the MAP =$af021a TL2_START_ADDY_M = $AF021A @@ -1645,9 +1652,9 @@ =$af021e TL2_TOTAL_Y_SIZE_L = $AF021E ; Size of the Map in Y Tile Count [9:0] =$af021f TL2_TOTAL_Y_SIZE_H = $AF021F =$af0220 TL2_WINDOW_X_POS_L = $AF0220 ; Top Left Corner Position of the TileMAp Window in X + Scroll -=$af0221 TL2_WINDOW_X_POS_H = $AF0221 ; Direction: [14] Scroll: [13:10] Pos: [9:0] in X +=$af0221 TL2_WINDOW_X_POS_H = $AF0221 ; Direction: [14] Pos: [13-4] Scroll: [3:0] in X =$af0222 TL2_WINDOW_Y_POS_L = $AF0222 ; Top Left Corner Position of the TileMAp Window in Y -=$af0223 TL2_WINDOW_Y_POS_H = $AF0223 ; Direction: [14] Scroll: [13:10] Pos: [9:0] in Y +=$af0223 TL2_WINDOW_Y_POS_H = $AF0223 ; Direction: [14] Pos: [13:4] Scroll: [3:0] in Y =$af0224 TL3_CONTROL_REG = $AF0224 ; Bit[0] - Enable, Bit[3:1] - LUT Select, =$af0225 TL3_START_ADDY_L = $AF0225 ; Not USed right now - Starting Address to where is the MAP =$af0226 TL3_START_ADDY_M = $AF0226 @@ -1657,9 +1664,9 @@ =$af022a TL3_TOTAL_Y_SIZE_L = $AF022A ; Size of the Map in Y Tile Count [9:0] =$af022b TL3_TOTAL_Y_SIZE_H = $AF022B =$af022c TL3_WINDOW_X_POS_L = $AF022C ; Top Left Corner Position of the TileMAp Window in X + Scroll -=$af022d TL3_WINDOW_X_POS_H = $AF022D ; Direction: [14] Scroll: [13:10] Pos: [9:0] in X +=$af022d TL3_WINDOW_X_POS_H = $AF022D ; Direction: [14] Pos: [13-4] Scroll: [3:0] in X =$af022e TL3_WINDOW_Y_POS_L = $AF022E ; Top Left Corner Position of the TileMAp Window in Y -=$af022f TL3_WINDOW_Y_POS_H = $AF022F ; Direction: [14] Scroll: [13:10] Pos: [9:0] in Y +=$af022f TL3_WINDOW_Y_POS_H = $AF022F ; Direction: [14] Pos: [13:4] Scroll: [3:0] in Y =$af0280 TILESET0_ADDY_L = $AF0280 ; Pointer to Tileset 0 [21:0] =$af0281 TILESET0_ADDY_M = $AF0281 =$af0282 TILESET0_ADDY_H = $AF0282 @@ -2491,11 +2498,11 @@ .39046a f0 0f beq $39047b BEQ InitC100ESID .39046c c9 c8 00 cmp #$00c8 CMP #$00C8 .39046f d0 0e bne $39047f BNE SkipInitExpC100C200 -.390471 22 8e 69 39 jsl $39698e JSL SIMPLE_INIT_ETHERNET_CTRL -.390475 22 15 6a 39 jsl $396a15 JSL INIT_EVID_VID_MODE +.390471 22 24 69 39 jsl $396924 JSL SIMPLE_INIT_ETHERNET_CTRL +.390475 22 ab 69 39 jsl $3969ab JSL INIT_EVID_VID_MODE .390479 80 04 bra $39047f BRA SkipInitExpC100C200 .39047b InitC100ESID: -.39047b 22 8e 69 39 jsl $39698e JSL SIMPLE_INIT_ETHERNET_CTRL +.39047b 22 24 69 39 jsl $396924 JSL SIMPLE_INIT_ETHERNET_CTRL .39047f SkipInitExpC100C200: .39047f e2 20 sep #$20 SEP #$20 ; set A short .390481 c2 10 rep #$10 REP #$10 ; set X long @@ -2526,7 +2533,7 @@ .3904c7 a9 00 lda #$00 LDA #0 .3904c9 22 38 10 00 jsl $001038 JSL SETIN .3904cd 22 3c 10 00 jsl $00103c JSL SETOUT -.3904d1 22 a8 6b 39 jsl $396ba8 JSL ANSI_INIT +.3904d1 22 3e 6b 39 jsl $396b3e JSL ANSI_INIT .3904d5 22 2c 11 00 jsl $00112c JSL SETSIZES .3904d9 22 dc 10 00 jsl $0010dc JSL INITCODEC .3904dd c2 30 rep #$30 REP #$30 ; set A&X long @@ -2536,11 +2543,11 @@ .3904eb 22 95 0b 39 jsl $390b95 JSL INITMOUSEPOINTER .3904ef 22 bc 10 00 jsl $0010bc JSL INITCURSOR .3904f3 a9 01 00 lda #$0001 LDA #CHAN_COM1 ; Initialize COM1 -.3904f6 22 4b 57 39 jsl $39574b JSL UART_SELECT -.3904fa 22 b7 57 39 jsl $3957b7 JSL UART_INIT +.3904f6 22 43 57 39 jsl $395743 JSL UART_SELECT +.3904fa 22 af 57 39 jsl $3957af JSL UART_INIT .3904fe a9 02 00 lda #$0002 LDA #CHAN_COM2 ; Initialize COM2 -.390501 22 4b 57 39 jsl $39574b JSL UART_SELECT -.390505 22 b7 57 39 jsl $3957b7 JSL UART_INIT +.390501 22 43 57 39 jsl $395743 JSL UART_SELECT +.390505 22 af 57 39 jsl $3957af JSL UART_INIT .390509 c2 20 rep #$20 REP #$20 ; set A long .39050b 48 pha PHA ; begin setdp macro .39050c 08 php PHP @@ -2571,7 +2578,7 @@ .39053e e0 00 10 cpx #$1000 CPX #$1000 .390541 d0 f2 bne $390535 BNE jmpcopy .390543 retry_boot -.390543 22 65 3e 39 jsl $393e65 JSL DOS_INIT ; Initialize the "disc operating system" +.390543 22 5d 3e 39 jsl $393e5d JSL DOS_INIT ; Initialize the "disc operating system" .390547 22 73 80 39 jsl $398073 JSL BOOT_SOUND ; Play the boot sound .39054b 22 00 00 3e jsl $3e0000 JSL BOOT_MENU ; Show the splash screen / boot menu and wait for key presses .39054f 22 a8 10 00 jsl $0010a8 JSL CLRSCREEN ; Clear Screen and Set a standard color in Color Memory @@ -2589,7 +2596,7 @@ .390563 a2 2a 81 ldx #$812a LDX #<>greet_msg .390566 22 1d 07 39 jsl $39071d JSL IPRINT ; print the first line .39056a 22 2c 09 39 jsl $39092c JSL ICOLORFLAG ; This is to set the color memory for the text logo -.39056e 22 f5 6a 39 jsl $396af5 JSL EVID_GREET ; Print the EVID greeting, if the EVID card is installed +.39056e 22 8b 6a 39 jsl $396a8b JSL EVID_GREET ; Print the EVID greeting, if the EVID card is installed .390572 c2 30 rep #$30 REP #$30 ; set A&X long .390574 a9 ff fe lda #$feff LDA #STACK_END ; We are the root, let's make sure from now on, that we start clean .390577 1b tcs TAS @@ -2623,9 +2630,9 @@ .3905b4 e2 20 sep #$20 SEP #$20 ; set A short .3905b6 a9 02 lda #$02 LDA #BIOS_DEV_SD .3905b8 8f 21 03 00 sta $000321 STA @l BIOS_DEV -.3905bc 22 37 3f 39 jsl $393f37 JSL DOS_MOUNT ; Mount the SDC +.3905bc 22 2f 3f 39 jsl $393f2f JSL DOS_MOUNT ; Mount the SDC .3905c0 90 06 bcc $3905c8 BCC sdc_error ; Print an error message if couldn't get anything -.3905c2 22 f2 40 39 jsl $3940f2 JSL DOS_TESTBOOT ; Try to boot from the SDC's MBR +.3905c2 22 ea 40 39 jsl $3940ea JSL DOS_TESTBOOT ; Try to boot from the SDC's MBR .3905c6 80 de bra $3905a6 BRA BOOTBASIC ; If we couldn't fall, into BASIC .3905c8 a2 48 85 ldx #$8548 sdc_error LDX #<>sdc_err_boot ; Print a message saying SD card booting is not implemented .3905cb 80 40 bra $39060d BRA PR_BOOT_ERROR @@ -2634,9 +2641,9 @@ .3905d4 e2 20 sep #$20 SEP #$20 ; set A short .3905d6 a9 06 lda #$06 LDA #BIOS_DEV_HD0 .3905d8 8f 21 03 00 sta $000321 STA @l BIOS_DEV -.3905dc 22 37 3f 39 jsl $393f37 JSL DOS_MOUNT ; Mount the IDE drive +.3905dc 22 2f 3f 39 jsl $393f2f JSL DOS_MOUNT ; Mount the IDE drive .3905e0 90 07 bcc $3905e9 BCC hdc_error ; Print an error message if couldn't get anything -.3905e2 22 f2 40 39 jsl $3940f2 JSL DOS_TESTBOOT ; Try to boot from the IDE's MBR +.3905e2 22 ea 40 39 jsl $3940ea JSL DOS_TESTBOOT ; Try to boot from the IDE's MBR .3905e6 82 bd ff brl $3905a6 BRL BOOTBASIC ; If we couldn't fall, into BASIC .3905e9 a2 64 85 ldx #$8564 hdc_error LDX #<>ide_err_boot ; Print a message saying SD card booting is not implemented .3905ec 80 1f bra $39060d BRA PR_BOOT_ERROR @@ -2645,9 +2652,9 @@ .3905f5 e2 20 sep #$20 SEP #$20 ; set A short .3905f7 a9 00 lda #$00 LDA #BIOS_DEV_FDC .3905f9 8f 21 03 00 sta $000321 STA @l BIOS_DEV -.3905fd 22 47 63 39 jsl $396347 JSL FDC_MOUNT ; Mount the floppy drive +.3905fd 22 dd 62 39 jsl $3962dd JSL FDC_MOUNT ; Mount the floppy drive .390601 90 07 bcc $39060a BCC fdc_error ; Print an error message if couldn't get anything -.390603 22 f2 40 39 jsl $3940f2 JSL DOS_TESTBOOT ; Try to boot from the FDC's MBR +.390603 22 ea 40 39 jsl $3940ea JSL DOS_TESTBOOT ; Try to boot from the FDC's MBR .390607 82 9c ff brl $3905a6 BRL BOOTBASIC ; If we couldn't, fall into BASIC .39060a a2 87 85 ldx #$8587 fdc_error LDX #<>fdc_err_boot ; Print a message saying SD card booting is not implemented .39060d 22 1d 07 39 jsl $39071d PR_BOOT_ERROR JSL IPRINT ; Print the error message in X @@ -2753,10 +2760,10 @@ .3906d2 7a ply PLY .3906d3 fa plx PLX .3906d4 6b rtl RTL -.3906d5 22 4b 57 39 jsl $39574b getc_uart JSL UART_SELECT ; Select the correct COM port -.3906d9 22 ff 57 39 jsl $3957ff JSL UART_GETC ; Get the charater from the COM port +.3906d5 22 43 57 39 jsl $395743 getc_uart JSL UART_SELECT ; Select the correct COM port +.3906d9 22 f7 57 39 jsl $3957f7 JSL UART_GETC ; Get the charater from the COM port .3906dd 80 04 bra $3906e3 BRA done -.3906df 22 18 78 39 jsl $397818 getc_keyboard JSL KBD_GETCW ; Get the character from the keyboard +.3906df 22 ae 77 39 jsl $3977ae getc_keyboard JSL KBD_GETCW ; Get the character from the keyboard .3906e3 28 plp done PLP .3906e4 18 clc CLC ; Return carry clear for valid data .3906e5 2b pld PLD @@ -2785,10 +2792,10 @@ .390705 7a ply PLY .390706 fa plx PLX .390707 6b rtl RTL -.390708 22 4b 57 39 jsl $39574b getc_uart JSL UART_SELECT ; Select the correct COM port -.39070c 22 ff 57 39 jsl $3957ff JSL UART_GETC ; Get the charater from the COM port +.390708 22 43 57 39 jsl $395743 getc_uart JSL UART_SELECT ; Select the correct COM port +.39070c 22 f7 57 39 jsl $3957f7 JSL UART_GETC ; Get the charater from the COM port .390710 80 04 bra $390716 BRA done -.390712 22 24 78 39 jsl $397824 getc_keyboard JSL KBD_GETC ; Get the character from the keyboard +.390712 22 ba 77 39 jsl $3977ba getc_keyboard JSL KBD_GETC ; Get the character from the keyboard .390716 28 plp done PLP .390717 18 clc CLC ; Return carry clear for valid data .390718 2b pld PLD @@ -2846,12 +2853,12 @@ .39076b f0 03 beq $390770 BEQ putc_uart ; Yes: handle printing to the UART .39076d 68 pla PLA ; Otherwise, just exit .39076e 80 10 bra $390780 BRA done -.390770 22 4b 57 39 jsl $39574b putc_uart JSL UART_SELECT ; Point to the correct UART +.390770 22 43 57 39 jsl $395743 putc_uart JSL UART_SELECT ; Point to the correct UART .390774 68 pla PLA ; Recover the character to send -.390775 22 20 58 39 jsl $395820 JSL UART_PUTC ; Send the character +.390775 22 18 58 39 jsl $395818 JSL UART_PUTC ; Send the character .390779 80 05 bra $390780 BRA done .39077b 68 pla putc_ansi PLA ; Recover the character to send -.39077c 22 e7 6d 39 jsl $396de7 JSL ANSI_PUTC ; Print to the current selected ANSI screen +.39077c 22 7d 6d 39 jsl $396d7d JSL ANSI_PUTC ; Print to the current selected ANSI screen .390780 28 plp done PLP .390781 ab plb PLB .390782 2b pld PLD @@ -2955,7 +2962,7 @@ .390809 c9 02 cmp #$02 CMP #CHAN_COM2 ; Check to see if it's the COM2 port .39080b f0 02 beq $39080f BEQ uart_printcr ; Yes: handle printing to the UART .39080d 80 1c bra $39082b BRA done -.39080f 22 4b 57 39 jsl $39574b uart_printcr JSL UART_SELECT +.39080f 22 43 57 39 jsl $395743 uart_printcr JSL UART_SELECT .390813 a9 0d lda #$0d LDA #CHAR_CR .390815 22 18 10 00 jsl $001018 JSL PUTC .390819 a9 0a lda #$0a LDA #CHAR_LF @@ -2986,7 +2993,7 @@ .390844 48 pha PHA .390845 0b phd PHD .390846 08 php PHP -.390847 22 9f 72 39 jsl $39729f JSL ANSI_CSRRIGHT +.390847 22 35 72 39 jsl $397235 JSL ANSI_CSRRIGHT .39084b 28 plp PLP .39084c 2b pld PLD .39084d 68 pla PLA @@ -2999,7 +3006,7 @@ .390853 48 pha PHA .390854 0b phd PHD .390855 08 php PHP -.390856 22 ca 72 39 jsl $3972ca JSL ANSI_CSRLEFT +.390856 22 60 72 39 jsl $397260 JSL ANSI_CSRLEFT .39085a 28 plp PLP .39085b 2b pld PLD .39085c 68 pla PLA @@ -3012,7 +3019,7 @@ .390862 48 pha PHA .390863 0b phd PHD .390864 08 php PHP -.390865 22 e8 72 39 jsl $3972e8 JSL ANSI_CSRUP +.390865 22 7e 72 39 jsl $39727e JSL ANSI_CSRUP .390869 28 plp PLP .39086a 2b pld PLD .39086b 68 pla PLA @@ -3022,7 +3029,7 @@ .39086f da phx ICSRDOWN PHX .390870 5a phy PHY .390871 0b phd PHD -.390872 22 06 73 39 jsl $397306 JSL ANSI_CSRDOWN +.390872 22 9c 72 39 jsl $39729c JSL ANSI_CSRDOWN .390876 2b pld PLD .390877 7a ply PLY .390878 fa plx PLX @@ -3030,7 +3037,7 @@ .39087a 48 pha ILOCATE PHA .39087b 0b phd PHD .39087c 08 php PHP -.39087d 22 29 73 39 jsl $397329 JSL ANSI_LOCATE +.39087d 22 bf 72 39 jsl $3972bf JSL ANSI_LOCATE .390881 28 plp ilocate_done PLP .390882 2b pld PLD .390883 68 pla PLA @@ -3042,7 +3049,7 @@ .390888 8b phb PHB .390889 0b phd PHD .39088a 08 php PHP -.39088b 22 8d 73 39 jsl $39738d JSL ANSI_SCROLLUP +.39088b 22 23 73 39 jsl $397323 JSL ANSI_SCROLLUP .39088f 28 plp PLP .390890 2b pld PLD .390891 ab plb PLB @@ -3109,7 +3116,7 @@ .390901 48 pha ICLRSCREEN PHA .390902 da phx PHX .390903 08 php PHP -.390904 22 22 74 39 jsl $397422 JSL ANSI_CLRSCREEN +.390904 22 b8 73 39 jsl $3973b8 JSL ANSI_CLRSCREEN .390908 28 plp PLP .390909 fa plx PLX .39090a 68 pla PLA @@ -3206,7 +3213,7 @@ .3909ad 08 php PHP .3909ae 48 pha PHA .3909af da phx PHX -.3909b0 22 ed 6b 39 jsl $396bed JSL ANSI_INIT_LUTS +.3909b0 22 83 6b 39 jsl $396b83 JSL ANSI_INIT_LUTS .3909b4 fa plx PLX .3909b5 68 pla PLA .3909b6 28 plp PLP @@ -3354,7 +3361,7 @@ .390b19 68 pla PLA .390b1a 6b rtl RTL .390b1b ISETSIZES -.390b1b 22 be 6c 39 jsl $396cbe JSL ANSI_SETSIZES +.390b1b 22 54 6c 39 jsl $396c54 JSL ANSI_SETSIZES .390b1f 6b rtl RTL .390b20 IINITVKYGRPMODE .390b20 48 pha PHA @@ -6522,7 +6529,7 @@ ;****** Return to file: src\kernel.asm -;****** Processing file: src\Defines/sdcard_controller_def.asm +;****** Processing file: src\Defines/SDCard_Controller_def.asm =$afea00 SDC_VERSION_REG = $AFEA00 ; Ought to read 12 =$afea01 SDC_CONTROL_REG = $AFEA01 ; Bit0 1 = Reset core logic, and registers. Self clearing @@ -6562,7 +6569,7 @@ ;****** Return to file: src\kernel.asm -;****** Processing file: src\sdos.asm +;****** Processing file: src\SDOS.asm ;****** Processing file: src\sdos_fat.asm @@ -6658,7 +6665,7 @@ .393b1a a5 01 lda $0321 LDA BIOS_DEV ; Get the device number .393b1c c9 00 cmp #$00 CMP #BIOS_DEV_FDC ; Check to see if we're sending to the floppy .393b1e d0 06 bne $393b26 BNE ret_success ; No: just return -.393b20 22 71 64 39 jsl $396471 JSL FDC_CMDBLOCK ; Yes: call upon the floppy code +.393b20 22 07 64 39 jsl $396407 JSL FDC_CMDBLOCK ; Yes: call upon the floppy code .393b24 90 0c bcc $393b32 BCC pass_failure .393b26 ret_success .393b26 e2 20 sep #$20 SEP #$20 ; set A short @@ -6703,433 +6710,427 @@ .393b5b d0 f8 bne $393b55 BNE clr_loop .393b5d a5 01 lda $0321 LDA BIOS_DEV ; Check the device number .393b5f c9 02 cmp #$02 CMP #BIOS_DEV_SD ; Is it for the SDC? -.393b61 f0 14 beq $393b77 BEQ sd_getblock ; Yes: go to the SDC GETBLOCK routine +.393b61 f0 10 beq $393b73 BEQ sd_getblock ; Yes: go to the SDC GETBLOCK routine .393b63 c9 00 cmp #$00 CMP #BIOS_DEV_FDC ; Is it for the floppy drive? -.393b65 f0 18 beq $393b7f BEQ fd_getblock ; Yes: go to the FDC GETBLOCK routine +.393b65 f0 14 beq $393b7b BEQ fd_getblock ; Yes: go to the FDC GETBLOCK routine .393b67 c9 06 cmp #$06 CMP #BIOS_DEV_HD0 ; Is it for the IDE drive? -.393b69 f0 1c beq $393b87 BEQ hd_getblock +.393b69 f0 18 beq $393b83 BEQ hd_getblock .393b6b a9 80 lda #$80 LDA #BIOS_ERR_BADDEV ; Otherwise: return a bad device error -.393b6d ret_failure -.393b6d e2 20 sep #$20 SEP #$20 ; set A short -.393b6f 85 00 sta $0320 STA BIOS_STATUS ; Set BIOS STATUS -.393b71 28 plp PLP -.393b72 ab plb PLB -.393b73 2b pld PLD -.393b74 7a ply PLY -.393b75 38 sec SEC ; Return failure -.393b76 6b rtl RTL -.393b77 22 7d 59 39 jsl $39597d sd_getblock JSL SDC_GETBLOCK ; Call the SDC GETBLOCK routine -.393b7b b0 12 bcs $393b8f BCS ret_success -.393b7d 80 ee bra $393b6d BRA ret_failure -.393b7f 22 76 62 39 jsl $396276 fd_getblock JSL FDC_GETBLOCK ; Call the FDC GETBLOCK routine -.393b83 b0 0a bcs $393b8f BCS ret_success -.393b85 80 e6 bra $393b6d BRA ret_failure -.393b87 22 52 68 39 jsl $396852 hd_getblock JSL IDE_GETBLOCK ; Call the IDE GETBLOCK routine -.393b8b b0 02 bcs $393b8f BCS ret_success -.393b8d 80 de bra $393b6d BRA ret_failure -.393b8f ret_success -.393b8f e2 20 sep #$20 SEP #$20 ; set A short -.393b91 64 00 stz $0320 STZ BIOS_STATUS ; Set BIOS STATUS to OK -.393b93 28 plp PLP -.393b94 ab plb PLB -.393b95 2b pld PLD -.393b96 7a ply PLY -.393b97 38 sec SEC ; Return success -.393b98 6b rtl RTL -.393b99 IPUTBLOCK -.393b99 0b phd PHD -.393b9a 8b phb PHB -.393b9b 08 php PHP -.393b9c 48 pha PHA ; begin setdbr macro -.393b9d 08 php PHP -.393b9e e2 20 sep #$20 SEP #$20 ; set A short -.393ba0 a9 00 lda #$00 LDA #0 -.393ba2 48 pha PHA -.393ba3 ab plb PLB -.393ba4 28 plp PLP -.393ba5 68 pla PLA ; end setdbr macro -.393ba6 48 pha PHA ; begin setdp macro -.393ba7 08 php PHP -.393ba8 c2 20 rep #$20 REP #$20 ; set A long -.393baa a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.393bad 5b tcd TCD -.393bae 28 plp PLP -.393baf 68 pla PLA ; end setdp macro -.393bb0 e2 20 sep #$20 SEP #$20 ; set A short -.393bb2 a5 01 lda $0321 LDA BIOS_DEV ; Check the device number -.393bb4 c9 02 cmp #$02 CMP #BIOS_DEV_SD ; Is it for the SDC? -.393bb6 f0 13 beq $393bcb BEQ sd_putblock ; Yes: go to the SDC PUTBLOCK routine -.393bb8 c9 00 cmp #$00 CMP #BIOS_DEV_FDC ; Is it for the FDC? -.393bba f0 17 beq $393bd3 BEQ fd_putblock ; Yes: go to the FDC PUTBLOCK routine -.393bbc c9 06 cmp #$06 CMP #BIOS_DEV_HD0 ; Is it for the IDE drive? -.393bbe f0 1b beq $393bdb BEQ hd_putblock -.393bc0 a9 80 lda #$80 LDA #BIOS_ERR_BADDEV ; Otherwise: return a bad device error -.393bc2 ret_failure -.393bc2 e2 20 sep #$20 SEP #$20 ; set A short -.393bc4 85 00 sta $0320 STA BIOS_STATUS ; Set BIOS STATUS -.393bc6 28 plp PLP -.393bc7 ab plb PLB -.393bc8 2b pld PLD -.393bc9 18 clc CLC ; Return failure -.393bca 6b rtl RTL -.393bcb 22 24 5a 39 jsl $395a24 sd_putblock JSL SDC_PUTBLOCK ; Call the SDC PUTBLOCK routine -.393bcf 90 f1 bcc $393bc2 BCC ret_failure -.393bd1 80 10 bra $393be3 BRA ret_success -.393bd3 22 db 62 39 jsl $3962db fd_putblock JSL FDC_PUTBLOCK ; Call the FDC PUTBLOCK routine -.393bd7 90 e9 bcc $393bc2 BCC ret_failure -.393bd9 80 08 bra $393be3 BRA ret_success -.393bdb 22 e3 68 39 jsl $3968e3 hd_putblock JSL IDE_PUTBLOCK ; Call the IDE PUTBLOCK routine -.393bdf 90 e1 bcc $393bc2 BCC ret_failure -.393be1 80 00 bra $393be3 BRA ret_success -.393be3 ret_success -.393be3 e2 20 sep #$20 SEP #$20 ; set A short -.393be5 64 00 stz $0320 STZ BIOS_STATUS ; Set BIOS STATUS to OK -.393be7 28 plp PLP -.393be8 ab plb PLB -.393be9 2b pld PLD -.393bea 38 sec SEC ; Return success -.393beb 6b rtl RTL +.393b6d 28 plp ret_failure PLP +.393b6e ab plb PLB +.393b6f 2b pld PLD +.393b70 7a ply PLY +.393b71 38 sec SEC ; Return failure +.393b72 6b rtl RTL +.393b73 22 1d 59 39 jsl $39591d sd_getblock JSL SDC_GETBLOCK ; Call the SDC GETBLOCK routine +.393b77 b0 12 bcs $393b8b BCS ret_success +.393b79 80 f2 bra $393b6d BRA ret_failure +.393b7b 22 0c 62 39 jsl $39620c fd_getblock JSL FDC_GETBLOCK ; Call the FDC GETBLOCK routine +.393b7f b0 0a bcs $393b8b BCS ret_success +.393b81 80 ea bra $393b6d BRA ret_failure +.393b83 22 e8 67 39 jsl $3967e8 hd_getblock JSL IDE_GETBLOCK ; Call the IDE GETBLOCK routine +.393b87 b0 02 bcs $393b8b BCS ret_success +.393b89 80 e2 bra $393b6d BRA ret_failure +.393b8b ret_success +.393b8b e2 20 sep #$20 SEP #$20 ; set A short +.393b8d 64 00 stz $0320 STZ BIOS_STATUS ; Set BIOS STATUS to OK +.393b8f 28 plp PLP +.393b90 ab plb PLB +.393b91 2b pld PLD +.393b92 7a ply PLY +.393b93 38 sec SEC ; Return success +.393b94 6b rtl RTL +.393b95 IPUTBLOCK +.393b95 0b phd PHD +.393b96 8b phb PHB +.393b97 08 php PHP +.393b98 48 pha PHA ; begin setdbr macro +.393b99 08 php PHP +.393b9a e2 20 sep #$20 SEP #$20 ; set A short +.393b9c a9 00 lda #$00 LDA #0 +.393b9e 48 pha PHA +.393b9f ab plb PLB +.393ba0 28 plp PLP +.393ba1 68 pla PLA ; end setdbr macro +.393ba2 48 pha PHA ; begin setdp macro +.393ba3 08 php PHP +.393ba4 c2 20 rep #$20 REP #$20 ; set A long +.393ba6 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.393ba9 5b tcd TCD +.393baa 28 plp PLP +.393bab 68 pla PLA ; end setdp macro +.393bac e2 20 sep #$20 SEP #$20 ; set A short +.393bae a5 01 lda $0321 LDA BIOS_DEV ; Check the device number +.393bb0 c9 02 cmp #$02 CMP #BIOS_DEV_SD ; Is it for the SDC? +.393bb2 f0 0f beq $393bc3 BEQ sd_putblock ; Yes: go to the SDC PUTBLOCK routine +.393bb4 c9 00 cmp #$00 CMP #BIOS_DEV_FDC ; Is it for the FDC? +.393bb6 f0 13 beq $393bcb BEQ fd_putblock ; Yes: go to the FDC PUTBLOCK routine +.393bb8 c9 06 cmp #$06 CMP #BIOS_DEV_HD0 ; Is it for the IDE drive? +.393bba f0 17 beq $393bd3 BEQ hd_putblock +.393bbc a9 80 lda #$80 LDA #BIOS_ERR_BADDEV ; Otherwise: return a bad device error +.393bbe 28 plp ret_failure PLP +.393bbf ab plb PLB +.393bc0 2b pld PLD +.393bc1 18 clc CLC ; Return failure +.393bc2 6b rtl RTL +.393bc3 22 ba 59 39 jsl $3959ba sd_putblock JSL SDC_PUTBLOCK ; Call the SDC PUTBLOCK routine +.393bc7 90 f5 bcc $393bbe BCC ret_failure +.393bc9 80 10 bra $393bdb BRA ret_success +.393bcb 22 71 62 39 jsl $396271 fd_putblock JSL FDC_PUTBLOCK ; Call the FDC PUTBLOCK routine +.393bcf 90 ed bcc $393bbe BCC ret_failure +.393bd1 80 08 bra $393bdb BRA ret_success +.393bd3 22 79 68 39 jsl $396879 hd_putblock JSL IDE_PUTBLOCK ; Call the IDE PUTBLOCK routine +.393bd7 90 e5 bcc $393bbe BCC ret_failure +.393bd9 80 00 bra $393bdb BRA ret_success +.393bdb ret_success +.393bdb e2 20 sep #$20 SEP #$20 ; set A short +.393bdd 64 00 stz $0320 STZ BIOS_STATUS ; Set BIOS STATUS to OK +.393bdf 28 plp PLP +.393be0 ab plb PLB +.393be1 2b pld PLD +.393be2 38 sec SEC ; Return success +.393be3 6b rtl RTL ;****** Return to file: src\sdos_fat.asm ;****** Processing file: src\sdos_dir.asm -.393bec DOS_DIROPEN -.393bec da phx PHX -.393bed 5a phy PHY -.393bee 0b phd PHD -.393bef 8b phb PHB -.393bf0 08 php PHP -.393bf1 48 pha PHA ; begin setdbr macro -.393bf2 08 php PHP -.393bf3 e2 20 sep #$20 SEP #$20 ; set A short -.393bf5 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.393bf7 48 pha PHA -.393bf8 ab plb PLB -.393bf9 28 plp PLP -.393bfa 68 pla PLA ; end setdbr macro -.393bfb 48 pha PHA ; begin setdp macro -.393bfc 08 php PHP -.393bfd c2 20 rep #$20 REP #$20 ; set A long -.393bff a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.393c02 5b tcd TCD -.393c03 28 plp PLP -.393c04 68 pla PLA ; end setdp macro -.393c05 ad 20 a0 lda $38a020 LDA ROOT_DIR_FIRST_CLUSTER ; Set the cluster (or sector for FAT12) -.393c08 8d 32 a0 sta $38a032 STA DOS_DIR_BLOCK_ID ; to that of the root directory's start -.393c0b ad 22 a0 lda $38a022 LDA ROOT_DIR_FIRST_CLUSTER+2 -.393c0e 8d 34 a0 sta $38a034 STA DOS_DIR_BLOCK_ID+2 -.393c11 a9 00 a1 lda #$a100 LDA #<>DOS_DIR_CLUSTER ; Point to the directory cluster buffer for loading -.393c14 85 1c sta $033c STA DOS_BUFF_PTR -.393c16 85 18 sta $0338 STA DOS_DIR_PTR -.393c18 a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER -.393c1b 85 1e sta $033e STA DOS_BUFF_PTR+2 -.393c1d 85 1a sta $033a STA DOS_DIR_PTR+2 -.393c1f e2 20 sep #$20 SEP #$20 ; set A short -.393c21 ad 01 a0 lda $38a001 LDA FILE_SYSTEM ; Check the file system -.393c24 c9 00 cmp #$00 CMP #PART_TYPE_FAT12 ; Is it FAT12? -.393c26 d0 24 bne $393c4c BNE fetch_fat32 ; No: handle processing the diretory as FAT32 -.393c28 fetch_fat12 -.393c28 e2 20 sep #$20 SEP #$20 ; set A short -.393c2a a9 00 lda #$00 LDA #DOS_DIR_TYPE_FAT12ROOT ; Set the directory type to FAT12 root directory -.393c2c 8d 45 a0 sta $38a045 STA DOS_DIR_TYPE -.393c2f c2 20 rep #$20 REP #$20 ; set A long -.393c31 a5 18 lda $0338 LDA DOS_DIR_PTR ; Set the BIOS buffer pointer -.393c33 85 06 sta $0326 STA BIOS_BUFF_PTR -.393c35 a5 1a lda $033a LDA DOS_DIR_PTR+2 -.393c37 85 08 sta $0328 STA BIOS_BUFF_PTR+2 -.393c39 ad 32 a0 lda $38a032 LDA DOS_DIR_BLOCK_ID ; Set the LBA of the sector -.393c3c 85 02 sta $0322 STA BIOS_LBA -.393c3e ad 34 a0 lda $38a034 LDA DOS_DIR_BLOCK_ID+2 -.393c41 85 04 sta $0324 STA BIOS_LBA+2 -.393c43 22 44 10 00 jsl $001044 JSL GETBLOCK ; Get the sector from the FAT12 device -.393c47 b0 1f bcs $393c68 BCS do_success ; If sucessful, set the directory cursor -.393c49 82 84 18 brl $3954d0 BRL IF_PASSFAILURE ; Otherwise: pass up the failure -.393c4c fetch_fat32 -.393c4c e2 20 sep #$20 SEP #$20 ; set A short -.393c4e a9 01 lda #$01 LDA #DOS_DIR_TYPE_FILE ; Set the directory type to file type (all FAT32, any FAT12 subdirectory) -.393c50 8d 45 a0 sta $38a045 STA DOS_DIR_TYPE -.393c53 c2 20 rep #$20 REP #$20 ; set A long -.393c55 ad 32 a0 lda $38a032 LDA DOS_DIR_BLOCK_ID -.393c58 85 10 sta $0330 STA DOS_CLUS_ID -.393c5a ad 34 a0 lda $38a034 LDA DOS_DIR_BLOCK_ID+2 -.393c5d 85 12 sta $0332 STA DOS_CLUS_ID+2 -.393c5f 22 cf 41 39 jsl $3941cf JSL DOS_GETCLUSTER ; Try to read the first cluster -.393c63 b0 03 bcs $393c68 BCS do_success ; If successful: set the directory cursor -.393c65 82 68 18 brl $3954d0 BRL IF_PASSFAILURE ; Otherwise: pass up the failure -.393c68 82 6c 18 brl $3954d7 do_success BRL IF_SUCCESS -.393c6b DOS_DIRFIRST -.393c6b 0b phd PHD -.393c6c 08 php PHP -.393c6d 48 pha PHA ; begin setdp macro -.393c6e 08 php PHP +.393be4 DOS_DIROPEN +.393be4 da phx PHX +.393be5 5a phy PHY +.393be6 0b phd PHD +.393be7 8b phb PHB +.393be8 08 php PHP +.393be9 48 pha PHA ; begin setdbr macro +.393bea 08 php PHP +.393beb e2 20 sep #$20 SEP #$20 ; set A short +.393bed a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.393bef 48 pha PHA +.393bf0 ab plb PLB +.393bf1 28 plp PLP +.393bf2 68 pla PLA ; end setdbr macro +.393bf3 48 pha PHA ; begin setdp macro +.393bf4 08 php PHP +.393bf5 c2 20 rep #$20 REP #$20 ; set A long +.393bf7 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.393bfa 5b tcd TCD +.393bfb 28 plp PLP +.393bfc 68 pla PLA ; end setdp macro +.393bfd ad 20 a0 lda $38a020 LDA ROOT_DIR_FIRST_CLUSTER ; Set the cluster (or sector for FAT12) +.393c00 8d 32 a0 sta $38a032 STA DOS_DIR_BLOCK_ID ; to that of the root directory's start +.393c03 ad 22 a0 lda $38a022 LDA ROOT_DIR_FIRST_CLUSTER+2 +.393c06 8d 34 a0 sta $38a034 STA DOS_DIR_BLOCK_ID+2 +.393c09 a9 00 a1 lda #$a100 LDA #<>DOS_DIR_CLUSTER ; Point to the directory cluster buffer for loading +.393c0c 85 1c sta $033c STA DOS_BUFF_PTR +.393c0e 85 18 sta $0338 STA DOS_DIR_PTR +.393c10 a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER +.393c13 85 1e sta $033e STA DOS_BUFF_PTR+2 +.393c15 85 1a sta $033a STA DOS_DIR_PTR+2 +.393c17 e2 20 sep #$20 SEP #$20 ; set A short +.393c19 ad 01 a0 lda $38a001 LDA FILE_SYSTEM ; Check the file system +.393c1c c9 00 cmp #$00 CMP #PART_TYPE_FAT12 ; Is it FAT12? +.393c1e d0 24 bne $393c44 BNE fetch_fat32 ; No: handle processing the diretory as FAT32 +.393c20 fetch_fat12 +.393c20 e2 20 sep #$20 SEP #$20 ; set A short +.393c22 a9 00 lda #$00 LDA #DOS_DIR_TYPE_FAT12ROOT ; Set the directory type to FAT12 root directory +.393c24 8d 45 a0 sta $38a045 STA DOS_DIR_TYPE +.393c27 c2 20 rep #$20 REP #$20 ; set A long +.393c29 a5 18 lda $0338 LDA DOS_DIR_PTR ; Set the BIOS buffer pointer +.393c2b 85 06 sta $0326 STA BIOS_BUFF_PTR +.393c2d a5 1a lda $033a LDA DOS_DIR_PTR+2 +.393c2f 85 08 sta $0328 STA BIOS_BUFF_PTR+2 +.393c31 ad 32 a0 lda $38a032 LDA DOS_DIR_BLOCK_ID ; Set the LBA of the sector +.393c34 85 02 sta $0322 STA BIOS_LBA +.393c36 ad 34 a0 lda $38a034 LDA DOS_DIR_BLOCK_ID+2 +.393c39 85 04 sta $0324 STA BIOS_LBA+2 +.393c3b 22 44 10 00 jsl $001044 JSL GETBLOCK ; Get the sector from the FAT12 device +.393c3f b0 1f bcs $393c60 BCS do_success ; If sucessful, set the directory cursor +.393c41 82 84 18 brl $3954c8 BRL IF_PASSFAILURE ; Otherwise: pass up the failure +.393c44 fetch_fat32 +.393c44 e2 20 sep #$20 SEP #$20 ; set A short +.393c46 a9 01 lda #$01 LDA #DOS_DIR_TYPE_FILE ; Set the directory type to file type (all FAT32, any FAT12 subdirectory) +.393c48 8d 45 a0 sta $38a045 STA DOS_DIR_TYPE +.393c4b c2 20 rep #$20 REP #$20 ; set A long +.393c4d ad 32 a0 lda $38a032 LDA DOS_DIR_BLOCK_ID +.393c50 85 10 sta $0330 STA DOS_CLUS_ID +.393c52 ad 34 a0 lda $38a034 LDA DOS_DIR_BLOCK_ID+2 +.393c55 85 12 sta $0332 STA DOS_CLUS_ID+2 +.393c57 22 c7 41 39 jsl $3941c7 JSL DOS_GETCLUSTER ; Try to read the first cluster +.393c5b b0 03 bcs $393c60 BCS do_success ; If successful: set the directory cursor +.393c5d 82 68 18 brl $3954c8 BRL IF_PASSFAILURE ; Otherwise: pass up the failure +.393c60 82 6c 18 brl $3954cf do_success BRL IF_SUCCESS +.393c63 DOS_DIRFIRST +.393c63 0b phd PHD +.393c64 08 php PHP +.393c65 48 pha PHA ; begin setdp macro +.393c66 08 php PHP +.393c67 c2 20 rep #$20 REP #$20 ; set A long +.393c69 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.393c6c 5b tcd TCD +.393c6d 28 plp PLP +.393c6e 68 pla PLA ; end setdp macro .393c6f c2 20 rep #$20 REP #$20 ; set A long -.393c71 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.393c74 5b tcd TCD -.393c75 28 plp PLP -.393c76 68 pla PLA ; end setdp macro -.393c77 c2 20 rep #$20 REP #$20 ; set A long -.393c79 a9 00 a1 lda #$a100 LDA #<>DOS_DIR_CLUSTER -.393c7c 85 18 sta $0338 STA DOS_DIR_PTR -.393c7e a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER -.393c81 85 1a sta $033a STA DOS_DIR_PTR+2 -.393c83 28 plp PLP -.393c84 2b pld PLD -.393c85 6b rtl RTL -.393c86 DOS_DIRNEXT -.393c86 da phx PHX -.393c87 5a phy PHY -.393c88 0b phd PHD -.393c89 8b phb PHB -.393c8a 08 php PHP -.393c8b 48 pha PHA ; begin setdbr macro -.393c8c 08 php PHP -.393c8d e2 20 sep #$20 SEP #$20 ; set A short -.393c8f a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.393c91 48 pha PHA -.393c92 ab plb PLB -.393c93 28 plp PLP -.393c94 68 pla PLA ; end setdbr macro -.393c95 48 pha PHA ; begin setdp macro -.393c96 08 php PHP +.393c71 a9 00 a1 lda #$a100 LDA #<>DOS_DIR_CLUSTER +.393c74 85 18 sta $0338 STA DOS_DIR_PTR +.393c76 a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER +.393c79 85 1a sta $033a STA DOS_DIR_PTR+2 +.393c7b 28 plp PLP +.393c7c 2b pld PLD +.393c7d 6b rtl RTL +.393c7e DOS_DIRNEXT +.393c7e da phx PHX +.393c7f 5a phy PHY +.393c80 0b phd PHD +.393c81 8b phb PHB +.393c82 08 php PHP +.393c83 48 pha PHA ; begin setdbr macro +.393c84 08 php PHP +.393c85 e2 20 sep #$20 SEP #$20 ; set A short +.393c87 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.393c89 48 pha PHA +.393c8a ab plb PLB +.393c8b 28 plp PLP +.393c8c 68 pla PLA ; end setdbr macro +.393c8d 48 pha PHA ; begin setdp macro +.393c8e 08 php PHP +.393c8f c2 20 rep #$20 REP #$20 ; set A long +.393c91 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.393c94 5b tcd TCD +.393c95 28 plp PLP +.393c96 68 pla PLA ; end setdp macro .393c97 c2 20 rep #$20 REP #$20 ; set A long -.393c99 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.393c9c 5b tcd TCD -.393c9d 28 plp PLP -.393c9e 68 pla PLA ; end setdp macro -.393c9f c2 20 rep #$20 REP #$20 ; set A long -.393ca1 18 clc CLC ; Advance the directory entry pointer to the next entry -.393ca2 a5 18 lda $0338 LDA DOS_DIR_PTR -.393ca4 69 20 00 adc #$0020 ADC #DOS_DIR_ENTRY_SIZE -.393ca7 85 18 sta $0338 STA DOS_DIR_PTR -.393ca9 a5 1a lda $033a LDA DOS_DIR_PTR+2 -.393cab 69 00 00 adc #$0000 ADC #0 -.393cae 85 1a sta $033a STA DOS_DIR_PTR+2 -.393cb0 38 sec SEC ; Check to see if we've reached the end of the sector buffer -.393cb1 a9 00 a3 lda #$a300 LDA #<>DOS_DIR_CLUSTER_END -.393cb4 e5 18 sbc $0338 SBC DOS_DIR_PTR -.393cb6 85 28 sta $0348 STA DOS_TEMP -.393cb8 a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER_END -.393cbb e5 1a sbc $033a SBC DOS_DIR_PTR+2 -.393cbd 85 2a sta $034a STA DOS_TEMP+2 -.393cbf 30 0c bmi $393ccd BMI get_next_block ; Yes: try to fetch the next directory entry -.393cc1 f0 03 beq $393cc6 BEQ check_lower -.393cc3 82 11 18 brl $3954d7 BRL IF_SUCCESS -.393cc6 a5 28 lda $0348 check_lower LDA DOS_TEMP -.393cc8 f0 03 beq $393ccd BEQ get_next_block -.393cca 82 0a 18 brl $3954d7 BRL IF_SUCCESS -.393ccd get_next_block -.393ccd e2 20 sep #$20 SEP #$20 ; set A short -.393ccf ad 45 a0 lda $38a045 LDA DOS_DIR_TYPE ; Check the type of the directory -.393cd2 c9 01 cmp #$01 CMP #DOS_DIR_TYPE_FILE -.393cd4 f0 38 beq $393d0e BEQ next_cluster ; FILE TYPE: it's cluster based (FAT32, or FAT12 non-root) -.393cd6 next_sector -.393cd6 c2 20 rep #$20 REP #$20 ; set A long -.393cd8 ad 32 a0 lda $38a032 LDA DOS_DIR_BLOCK_ID -.393cdb 1a inc a INC A -.393cdc 8d 32 a0 sta $38a032 STA DOS_DIR_BLOCK_ID ; Increment the sector number (FAT12 root directory is sector based) -.393cdf c9 0a 00 cmp #$000a CMP #10 ; See if we're at the end (TODO: calculate this) -.393ce2 d0 07 bne $393ceb BNE read_sector -.393ce4 e2 20 sep #$20 SEP #$20 ; set A short -.393ce6 a9 00 lda #$00 LDA #0 -.393ce8 82 e1 17 brl $3954cc BRL IF_FAILURE -.393ceb read_sector -.393ceb c2 20 rep #$20 REP #$20 ; set A long -.393ced ad 32 a0 lda $38a032 LDA DOS_DIR_BLOCK_ID ; Set the LBA to the sector # -.393cf0 85 02 sta $0322 STA BIOS_LBA -.393cf2 ad 34 a0 lda $38a034 LDA DOS_DIR_BLOCK_ID+2 -.393cf5 85 04 sta $0324 STA BIOS_LBA+2 -.393cf7 a9 00 a1 lda #$a100 LDA #<>DOS_DIR_CLUSTER ; Set the pointers to the buffer -.393cfa 85 06 sta $0326 STA BIOS_BUFF_PTR -.393cfc 85 18 sta $0338 STA DOS_DIR_PTR -.393cfe a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER -.393d01 85 08 sta $0328 STA BIOS_BUFF_PTR+2 -.393d03 85 1a sta $033a STA DOS_DIR_PTR+2 -.393d05 22 44 10 00 jsl $001044 JSL GETBLOCK ; Attempt to read the sector from the FAT12 device -.393d09 b0 39 bcs $393d44 BCS do_success ; If successful: set the directory cursor -.393d0b 82 c2 17 brl $3954d0 BRL IF_PASSFAILURE ; Otherwise: pass up the failure -.393d0e next_cluster -.393d0e c2 20 rep #$20 REP #$20 ; set A long -.393d10 ad 32 a0 lda $38a032 LDA DOS_DIR_BLOCK_ID ; Get the current block (cluster) ID -.393d13 85 10 sta $0330 STA DOS_CLUS_ID -.393d15 ad 34 a0 lda $38a034 LDA DOS_DIR_BLOCK_ID+2 -.393d18 85 12 sta $0332 STA DOS_CLUS_ID+2 -.393d1a a9 00 a1 lda #$a100 LDA #<>DOS_DIR_CLUSTER -.393d1d 85 1c sta $033c STA DOS_BUFF_PTR -.393d1f 85 18 sta $0338 STA DOS_DIR_PTR -.393d21 a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER -.393d24 85 1e sta $033e STA DOS_BUFF_PTR+2 -.393d26 85 1a sta $033a STA DOS_DIR_PTR+2 -.393d28 22 e3 45 39 jsl $3945e3 JSL NEXTCLUSTER ; Try to find the next cluster -.393d2c b0 03 bcs $393d31 BCS set_next -.393d2e 82 9f 17 brl $3954d0 BRL IF_PASSFAILURE ; If error: pass it up the chain -.393d31 a5 10 lda $0330 set_next LDA DOS_CLUS_ID ; Save the cluster as the current directory cluster -.393d33 8d 32 a0 sta $38a032 STA DOS_DIR_BLOCK_ID -.393d36 a5 12 lda $0332 LDA DOS_CLUS_ID+2 -.393d38 8d 34 a0 sta $38a034 STA DOS_DIR_BLOCK_ID+2 -.393d3b 22 cf 41 39 jsl $3941cf JSL DOS_GETCLUSTER ; Try to read the first cluster -.393d3f b0 03 bcs $393d44 BCS do_success ; If successful: set the directory cursor -.393d41 82 8c 17 brl $3954d0 BRL IF_PASSFAILURE ; Otherwise: pass up the failure -.393d44 82 90 17 brl $3954d7 do_success BRL IF_SUCCESS -.393d47 DOS_DIRFINDFREE -.393d47 da phx PHX -.393d48 5a phy PHY -.393d49 0b phd PHD -.393d4a 8b phb PHB -.393d4b 08 php PHP -.393d4c 48 pha PHA ; begin setdbr macro -.393d4d 08 php PHP -.393d4e e2 20 sep #$20 SEP #$20 ; set A short -.393d50 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.393d52 48 pha PHA -.393d53 ab plb PLB -.393d54 28 plp PLP -.393d55 68 pla PLA ; end setdbr macro -.393d56 48 pha PHA ; begin setdp macro -.393d57 08 php PHP -.393d58 c2 20 rep #$20 REP #$20 ; set A long -.393d5a a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.393d5d 5b tcd TCD -.393d5e 28 plp PLP -.393d5f 68 pla PLA ; end setdp macro -.393d60 22 ee 4f 39 jsl $394fee JSL IF_DIROPEN -.393d64 b0 06 bcs $393d6c BCS start_walk -.393d66 a9 08 00 lda #$0008 LDA #DOS_ERR_NODIR ; Return that we could not read the directory -.393d69 82 28 00 brl $393d94 BRL ret_failure -.393d6c a0 00 00 ldy #$0000 start_walk LDY #0 ; We check the first character of the entry -.393d6f chk_entry -.393d6f e2 20 sep #$20 SEP #$20 ; set A short -.393d71 b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y ; Get the first byte of the directory entry -.393d73 f0 1c beq $393d91 BEQ ret_success ; If 0: we have a blank... return it -.393d75 c9 e5 cmp #$e5 CMP #DOS_DIR_ENT_UNUSED ; Is it an unused (deleted) entry? -.393d77 f0 18 beq $393d91 BEQ ret_success ; Yes: return it -.393d79 22 28 50 39 jsl $395028 JSL IF_DIRNEXT ; Go to the next directory entry -.393d7d b0 ed bcs $393d6c BCS start_walk ; If we got one, start walking it -.393d7f 22 97 3d 39 jsl $393d97 JSL DOS_DIRAPPEND ; If there isn't one, create a blank cluster -.393d83 90 0f bcc $393d94 BCC ret_failure ; If that didn't work, return the failure -.393d85 c2 20 rep #$20 REP #$20 ; set A long -.393d87 a9 00 a1 lda #$a100 LDA #<>DOS_DIR_CLUSTER ; Return the first entry -.393d8a 85 18 sta $0338 STA DOS_DIR_PTR -.393d8c a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER -.393d8f 85 1a sta $033a STA DOS_DIR_PTR+2 -.393d91 82 43 17 brl $3954d7 ret_success BRL IF_SUCCESS -.393d94 82 35 17 brl $3954cc ret_failure BRL IF_FAILURE -.393d97 DOS_DIRAPPEND -.393d97 da phx PHX -.393d98 8b phb PHB -.393d99 0b phd PHD -.393d9a 08 php PHP -.393d9b 48 pha PHA ; begin setdbr macro -.393d9c 08 php PHP -.393d9d e2 20 sep #$20 SEP #$20 ; set A short -.393d9f a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.393da1 48 pha PHA -.393da2 ab plb PLB -.393da3 28 plp PLP -.393da4 68 pla PLA ; end setdbr macro -.393da5 48 pha PHA ; begin setdp macro -.393da6 08 php PHP -.393da7 c2 20 rep #$20 REP #$20 ; set A long -.393da9 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.393dac 5b tcd TCD -.393dad 28 plp PLP -.393dae 68 pla PLA ; end setdp macro -.393daf e2 20 sep #$20 SEP #$20 ; set A short -.393db1 ad 45 a0 lda $38a045 LDA DOS_DIR_TYPE -.393db4 c9 01 cmp #$01 CMP #DOS_DIR_TYPE_FILE ; Are we looking at a file type directory -.393db6 f0 09 beq $393dc1 BEQ clr_sector ; Yes: clear out the directory data -.393db8 ret_failure -.393db8 e2 20 sep #$20 SEP #$20 ; set A short -.393dba a9 15 lda #$15 LDA #DOS_ERR_DIRFULL ; No: return a directory-full error -.393dbc 85 0e sta $032e STA DOS_STATUS -.393dbe 82 3e 00 brl $393dff BRL pass_failure -.393dc1 clr_sector -.393dc1 c2 20 rep #$20 REP #$20 ; set A long -.393dc3 a9 00 00 lda #$0000 LDA #0 -.393dc6 a2 00 00 ldx #$0000 LDX #0 -.393dc9 9d 00 a1 sta $38a100,x clr_loop STA DOS_DIR_CLUSTER,X ; Clear the directory cluster -.393dcc e8 inx INX -.393dcd e8 inx INX -.393dce e0 00 02 cpx #$0200 CPX #512 -.393dd1 d0 f6 bne $393dc9 BNE clr_loop -.393dd3 a9 00 a1 lda #$a100 LDA #<>DOS_DIR_CLUSTER ; Point to the new, blank directory data -.393dd6 85 1c sta $033c STA DOS_BUFF_PTR -.393dd8 a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER -.393ddb 85 1e sta $033e STA DOS_BUFF_PTR+2 -.393ddd ad 32 a0 lda $38a032 LDA DOS_DIR_BLOCK_ID ; We want to append it to the current directory -.393de0 85 10 sta $0330 STA DOS_CLUS_ID -.393de2 ad 34 a0 lda $38a034 LDA DOS_DIR_BLOCK_ID+2 -.393de5 85 12 sta $0332 STA DOS_CLUS_ID+2 -.393de7 22 04 4a 39 jsl $394a04 JSL DOS_APPENDCLUS ; Attempt to append the blank data as a new cluster -.393deb 90 12 bcc $393dff BCC pass_failure ; If there was an error, pass it up the chain -.393ded ad 36 a0 lda $38a036 LDA DOS_NEW_CLUSTER ; Set the block ID of the new directory cluster -.393df0 8d 32 a0 sta $38a032 STA DOS_DIR_BLOCK_ID -.393df3 ad 38 a0 lda $38a038 LDA DOS_NEW_CLUSTER+2 -.393df6 8d 34 a0 sta $38a034 STA DOS_DIR_BLOCK_ID+2 -.393df9 28 plp ret_success PLP -.393dfa 2b pld PLD -.393dfb ab plb PLB -.393dfc fa plx PLX -.393dfd 38 sec SEC -.393dfe 6b rtl RTL -.393dff 28 plp pass_failure PLP -.393e00 2b pld PLD -.393e01 ab plb PLB -.393e02 fa plx PLX -.393e03 18 clc CLC -.393e04 6b rtl RTL -.393e05 DOS_DIRWRITE -.393e05 da phx PHX -.393e06 5a phy PHY -.393e07 0b phd PHD -.393e08 8b phb PHB -.393e09 08 php PHP -.393e0a 48 pha PHA ; begin setdbr macro -.393e0b 08 php PHP -.393e0c e2 20 sep #$20 SEP #$20 ; set A short -.393e0e a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.393e10 48 pha PHA -.393e11 ab plb PLB -.393e12 28 plp PLP -.393e13 68 pla PLA ; end setdbr macro -.393e14 48 pha PHA ; begin setdp macro -.393e15 08 php PHP -.393e16 c2 20 rep #$20 REP #$20 ; set A long -.393e18 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.393e1b 5b tcd TCD -.393e1c 28 plp PLP -.393e1d 68 pla PLA ; end setdp macro -.393e1e e2 20 sep #$20 SEP #$20 ; set A short -.393e20 ad 45 a0 lda $38a045 LDA DOS_DIR_TYPE ; Check the type of the directory -.393e23 c9 01 cmp #$01 CMP #DOS_DIR_TYPE_FILE ; Is it a file type directory (FAT32 or FAT12 non-root?) -.393e25 f0 1f beq $393e46 BEQ write_cluster ; Yes: write it back using a cluster ID -.393e27 write_sector -.393e27 c2 20 rep #$20 REP #$20 ; set A long -.393e29 ad 32 a0 lda $38a032 LDA DOS_DIR_BLOCK_ID ; Set the BIOS_LBA to the LBA of the sector -.393e2c 85 02 sta $0322 STA BIOS_LBA -.393e2e ad 34 a0 lda $38a034 LDA DOS_DIR_BLOCK_ID+2 -.393e31 85 04 sta $0324 STA BIOS_LBA+2 -.393e33 a9 00 a1 lda #$a100 LDA #<>DOS_DIR_CLUSTER ; Set the pointer to the directory buffer -.393e36 85 06 sta $0326 STA BIOS_BUFF_PTR -.393e38 a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER -.393e3b 85 08 sta $0328 STA BIOS_BUFF_PTR+2 -.393e3d 22 24 10 00 jsl $001024 JSL PUTBLOCK ; Try to write the sector to disk -.393e41 b0 1f bcs $393e62 BCS ret_success -.393e43 82 86 16 brl $3954cc ret_failure BRL IF_FAILURE -.393e46 write_cluster -.393e46 c2 20 rep #$20 REP #$20 ; set A long -.393e48 ad 32 a0 lda $38a032 LDA DOS_DIR_BLOCK_ID ; Set the DOS_CLUS_ID to the ID of the cluster -.393e4b 85 10 sta $0330 STA DOS_CLUS_ID -.393e4d ad 34 a0 lda $38a034 LDA DOS_DIR_BLOCK_ID+2 -.393e50 85 12 sta $0332 STA DOS_CLUS_ID+2 -.393e52 a9 00 a1 lda #$a100 LDA #<>DOS_DIR_CLUSTER ; Set the pointer to the directory buffer -.393e55 85 1c sta $033c STA DOS_BUFF_PTR -.393e57 a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER -.393e5a 85 1e sta $033e STA DOS_BUFF_PTR+2 -.393e5c 22 0c 42 39 jsl $39420c JSL DOS_PUTCLUSTER ; Try to write the cluster to disk -.393e60 90 e1 bcc $393e43 BCC ret_failure -.393e62 82 72 16 brl $3954d7 ret_success BRL IF_SUCCESS +.393c99 18 clc CLC ; Advance the directory entry pointer to the next entry +.393c9a a5 18 lda $0338 LDA DOS_DIR_PTR +.393c9c 69 20 00 adc #$0020 ADC #DOS_DIR_ENTRY_SIZE +.393c9f 85 18 sta $0338 STA DOS_DIR_PTR +.393ca1 a5 1a lda $033a LDA DOS_DIR_PTR+2 +.393ca3 69 00 00 adc #$0000 ADC #0 +.393ca6 85 1a sta $033a STA DOS_DIR_PTR+2 +.393ca8 38 sec SEC ; Check to see if we've reached the end of the sector buffer +.393ca9 a9 00 a3 lda #$a300 LDA #<>DOS_DIR_CLUSTER_END +.393cac e5 18 sbc $0338 SBC DOS_DIR_PTR +.393cae 85 28 sta $0348 STA DOS_TEMP +.393cb0 a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER_END +.393cb3 e5 1a sbc $033a SBC DOS_DIR_PTR+2 +.393cb5 85 2a sta $034a STA DOS_TEMP+2 +.393cb7 30 0c bmi $393cc5 BMI get_next_block ; Yes: try to fetch the next directory entry +.393cb9 f0 03 beq $393cbe BEQ check_lower +.393cbb 82 11 18 brl $3954cf BRL IF_SUCCESS +.393cbe a5 28 lda $0348 check_lower LDA DOS_TEMP +.393cc0 f0 03 beq $393cc5 BEQ get_next_block +.393cc2 82 0a 18 brl $3954cf BRL IF_SUCCESS +.393cc5 get_next_block +.393cc5 e2 20 sep #$20 SEP #$20 ; set A short +.393cc7 ad 45 a0 lda $38a045 LDA DOS_DIR_TYPE ; Check the type of the directory +.393cca c9 01 cmp #$01 CMP #DOS_DIR_TYPE_FILE +.393ccc f0 38 beq $393d06 BEQ next_cluster ; FILE TYPE: it's cluster based (FAT32, or FAT12 non-root) +.393cce next_sector +.393cce c2 20 rep #$20 REP #$20 ; set A long +.393cd0 ad 32 a0 lda $38a032 LDA DOS_DIR_BLOCK_ID +.393cd3 1a inc a INC A +.393cd4 8d 32 a0 sta $38a032 STA DOS_DIR_BLOCK_ID ; Increment the sector number (FAT12 root directory is sector based) +.393cd7 c9 0a 00 cmp #$000a CMP #10 ; See if we're at the end (TODO: calculate this) +.393cda d0 07 bne $393ce3 BNE read_sector +.393cdc e2 20 sep #$20 SEP #$20 ; set A short +.393cde a9 00 lda #$00 LDA #0 +.393ce0 82 e1 17 brl $3954c4 BRL IF_FAILURE +.393ce3 read_sector +.393ce3 c2 20 rep #$20 REP #$20 ; set A long +.393ce5 ad 32 a0 lda $38a032 LDA DOS_DIR_BLOCK_ID ; Set the LBA to the sector # +.393ce8 85 02 sta $0322 STA BIOS_LBA +.393cea ad 34 a0 lda $38a034 LDA DOS_DIR_BLOCK_ID+2 +.393ced 85 04 sta $0324 STA BIOS_LBA+2 +.393cef a9 00 a1 lda #$a100 LDA #<>DOS_DIR_CLUSTER ; Set the pointers to the buffer +.393cf2 85 06 sta $0326 STA BIOS_BUFF_PTR +.393cf4 85 18 sta $0338 STA DOS_DIR_PTR +.393cf6 a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER +.393cf9 85 08 sta $0328 STA BIOS_BUFF_PTR+2 +.393cfb 85 1a sta $033a STA DOS_DIR_PTR+2 +.393cfd 22 44 10 00 jsl $001044 JSL GETBLOCK ; Attempt to read the sector from the FAT12 device +.393d01 b0 39 bcs $393d3c BCS do_success ; If successful: set the directory cursor +.393d03 82 c2 17 brl $3954c8 BRL IF_PASSFAILURE ; Otherwise: pass up the failure +.393d06 next_cluster +.393d06 c2 20 rep #$20 REP #$20 ; set A long +.393d08 ad 32 a0 lda $38a032 LDA DOS_DIR_BLOCK_ID ; Get the current block (cluster) ID +.393d0b 85 10 sta $0330 STA DOS_CLUS_ID +.393d0d ad 34 a0 lda $38a034 LDA DOS_DIR_BLOCK_ID+2 +.393d10 85 12 sta $0332 STA DOS_CLUS_ID+2 +.393d12 a9 00 a1 lda #$a100 LDA #<>DOS_DIR_CLUSTER +.393d15 85 1c sta $033c STA DOS_BUFF_PTR +.393d17 85 18 sta $0338 STA DOS_DIR_PTR +.393d19 a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER +.393d1c 85 1e sta $033e STA DOS_BUFF_PTR+2 +.393d1e 85 1a sta $033a STA DOS_DIR_PTR+2 +.393d20 22 db 45 39 jsl $3945db JSL NEXTCLUSTER ; Try to find the next cluster +.393d24 b0 03 bcs $393d29 BCS set_next +.393d26 82 9f 17 brl $3954c8 BRL IF_PASSFAILURE ; If error: pass it up the chain +.393d29 a5 10 lda $0330 set_next LDA DOS_CLUS_ID ; Save the cluster as the current directory cluster +.393d2b 8d 32 a0 sta $38a032 STA DOS_DIR_BLOCK_ID +.393d2e a5 12 lda $0332 LDA DOS_CLUS_ID+2 +.393d30 8d 34 a0 sta $38a034 STA DOS_DIR_BLOCK_ID+2 +.393d33 22 c7 41 39 jsl $3941c7 JSL DOS_GETCLUSTER ; Try to read the first cluster +.393d37 b0 03 bcs $393d3c BCS do_success ; If successful: set the directory cursor +.393d39 82 8c 17 brl $3954c8 BRL IF_PASSFAILURE ; Otherwise: pass up the failure +.393d3c 82 90 17 brl $3954cf do_success BRL IF_SUCCESS +.393d3f DOS_DIRFINDFREE +.393d3f da phx PHX +.393d40 5a phy PHY +.393d41 0b phd PHD +.393d42 8b phb PHB +.393d43 08 php PHP +.393d44 48 pha PHA ; begin setdbr macro +.393d45 08 php PHP +.393d46 e2 20 sep #$20 SEP #$20 ; set A short +.393d48 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.393d4a 48 pha PHA +.393d4b ab plb PLB +.393d4c 28 plp PLP +.393d4d 68 pla PLA ; end setdbr macro +.393d4e 48 pha PHA ; begin setdp macro +.393d4f 08 php PHP +.393d50 c2 20 rep #$20 REP #$20 ; set A long +.393d52 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.393d55 5b tcd TCD +.393d56 28 plp PLP +.393d57 68 pla PLA ; end setdp macro +.393d58 22 e6 4f 39 jsl $394fe6 JSL IF_DIROPEN +.393d5c b0 06 bcs $393d64 BCS start_walk +.393d5e a9 08 00 lda #$0008 LDA #DOS_ERR_NODIR ; Return that we could not read the directory +.393d61 82 28 00 brl $393d8c BRL ret_failure +.393d64 a0 00 00 ldy #$0000 start_walk LDY #0 ; We check the first character of the entry +.393d67 chk_entry +.393d67 e2 20 sep #$20 SEP #$20 ; set A short +.393d69 b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y ; Get the first byte of the directory entry +.393d6b f0 1c beq $393d89 BEQ ret_success ; If 0: we have a blank... return it +.393d6d c9 e5 cmp #$e5 CMP #DOS_DIR_ENT_UNUSED ; Is it an unused (deleted) entry? +.393d6f f0 18 beq $393d89 BEQ ret_success ; Yes: return it +.393d71 22 20 50 39 jsl $395020 JSL IF_DIRNEXT ; Go to the next directory entry +.393d75 b0 ed bcs $393d64 BCS start_walk ; If we got one, start walking it +.393d77 22 8f 3d 39 jsl $393d8f JSL DOS_DIRAPPEND ; If there isn't one, create a blank cluster +.393d7b 90 0f bcc $393d8c BCC ret_failure ; If that didn't work, return the failure +.393d7d c2 20 rep #$20 REP #$20 ; set A long +.393d7f a9 00 a1 lda #$a100 LDA #<>DOS_DIR_CLUSTER ; Return the first entry +.393d82 85 18 sta $0338 STA DOS_DIR_PTR +.393d84 a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER +.393d87 85 1a sta $033a STA DOS_DIR_PTR+2 +.393d89 82 43 17 brl $3954cf ret_success BRL IF_SUCCESS +.393d8c 82 35 17 brl $3954c4 ret_failure BRL IF_FAILURE +.393d8f DOS_DIRAPPEND +.393d8f da phx PHX +.393d90 8b phb PHB +.393d91 0b phd PHD +.393d92 08 php PHP +.393d93 48 pha PHA ; begin setdbr macro +.393d94 08 php PHP +.393d95 e2 20 sep #$20 SEP #$20 ; set A short +.393d97 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.393d99 48 pha PHA +.393d9a ab plb PLB +.393d9b 28 plp PLP +.393d9c 68 pla PLA ; end setdbr macro +.393d9d 48 pha PHA ; begin setdp macro +.393d9e 08 php PHP +.393d9f c2 20 rep #$20 REP #$20 ; set A long +.393da1 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.393da4 5b tcd TCD +.393da5 28 plp PLP +.393da6 68 pla PLA ; end setdp macro +.393da7 e2 20 sep #$20 SEP #$20 ; set A short +.393da9 ad 45 a0 lda $38a045 LDA DOS_DIR_TYPE +.393dac c9 01 cmp #$01 CMP #DOS_DIR_TYPE_FILE ; Are we looking at a file type directory +.393dae f0 09 beq $393db9 BEQ clr_sector ; Yes: clear out the directory data +.393db0 ret_failure +.393db0 e2 20 sep #$20 SEP #$20 ; set A short +.393db2 a9 15 lda #$15 LDA #DOS_ERR_DIRFULL ; No: return a directory-full error +.393db4 85 0e sta $032e STA DOS_STATUS +.393db6 82 3e 00 brl $393df7 BRL pass_failure +.393db9 clr_sector +.393db9 c2 20 rep #$20 REP #$20 ; set A long +.393dbb a9 00 00 lda #$0000 LDA #0 +.393dbe a2 00 00 ldx #$0000 LDX #0 +.393dc1 9d 00 a1 sta $38a100,x clr_loop STA DOS_DIR_CLUSTER,X ; Clear the directory cluster +.393dc4 e8 inx INX +.393dc5 e8 inx INX +.393dc6 e0 00 02 cpx #$0200 CPX #512 +.393dc9 d0 f6 bne $393dc1 BNE clr_loop +.393dcb a9 00 a1 lda #$a100 LDA #<>DOS_DIR_CLUSTER ; Point to the new, blank directory data +.393dce 85 1c sta $033c STA DOS_BUFF_PTR +.393dd0 a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER +.393dd3 85 1e sta $033e STA DOS_BUFF_PTR+2 +.393dd5 ad 32 a0 lda $38a032 LDA DOS_DIR_BLOCK_ID ; We want to append it to the current directory +.393dd8 85 10 sta $0330 STA DOS_CLUS_ID +.393dda ad 34 a0 lda $38a034 LDA DOS_DIR_BLOCK_ID+2 +.393ddd 85 12 sta $0332 STA DOS_CLUS_ID+2 +.393ddf 22 fc 49 39 jsl $3949fc JSL DOS_APPENDCLUS ; Attempt to append the blank data as a new cluster +.393de3 90 12 bcc $393df7 BCC pass_failure ; If there was an error, pass it up the chain +.393de5 ad 36 a0 lda $38a036 LDA DOS_NEW_CLUSTER ; Set the block ID of the new directory cluster +.393de8 8d 32 a0 sta $38a032 STA DOS_DIR_BLOCK_ID +.393deb ad 38 a0 lda $38a038 LDA DOS_NEW_CLUSTER+2 +.393dee 8d 34 a0 sta $38a034 STA DOS_DIR_BLOCK_ID+2 +.393df1 28 plp ret_success PLP +.393df2 2b pld PLD +.393df3 ab plb PLB +.393df4 fa plx PLX +.393df5 38 sec SEC +.393df6 6b rtl RTL +.393df7 28 plp pass_failure PLP +.393df8 2b pld PLD +.393df9 ab plb PLB +.393dfa fa plx PLX +.393dfb 18 clc CLC +.393dfc 6b rtl RTL +.393dfd DOS_DIRWRITE +.393dfd da phx PHX +.393dfe 5a phy PHY +.393dff 0b phd PHD +.393e00 8b phb PHB +.393e01 08 php PHP +.393e02 48 pha PHA ; begin setdbr macro +.393e03 08 php PHP +.393e04 e2 20 sep #$20 SEP #$20 ; set A short +.393e06 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.393e08 48 pha PHA +.393e09 ab plb PLB +.393e0a 28 plp PLP +.393e0b 68 pla PLA ; end setdbr macro +.393e0c 48 pha PHA ; begin setdp macro +.393e0d 08 php PHP +.393e0e c2 20 rep #$20 REP #$20 ; set A long +.393e10 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.393e13 5b tcd TCD +.393e14 28 plp PLP +.393e15 68 pla PLA ; end setdp macro +.393e16 e2 20 sep #$20 SEP #$20 ; set A short +.393e18 ad 45 a0 lda $38a045 LDA DOS_DIR_TYPE ; Check the type of the directory +.393e1b c9 01 cmp #$01 CMP #DOS_DIR_TYPE_FILE ; Is it a file type directory (FAT32 or FAT12 non-root?) +.393e1d f0 1f beq $393e3e BEQ write_cluster ; Yes: write it back using a cluster ID +.393e1f write_sector +.393e1f c2 20 rep #$20 REP #$20 ; set A long +.393e21 ad 32 a0 lda $38a032 LDA DOS_DIR_BLOCK_ID ; Set the BIOS_LBA to the LBA of the sector +.393e24 85 02 sta $0322 STA BIOS_LBA +.393e26 ad 34 a0 lda $38a034 LDA DOS_DIR_BLOCK_ID+2 +.393e29 85 04 sta $0324 STA BIOS_LBA+2 +.393e2b a9 00 a1 lda #$a100 LDA #<>DOS_DIR_CLUSTER ; Set the pointer to the directory buffer +.393e2e 85 06 sta $0326 STA BIOS_BUFF_PTR +.393e30 a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER +.393e33 85 08 sta $0328 STA BIOS_BUFF_PTR+2 +.393e35 22 24 10 00 jsl $001024 JSL PUTBLOCK ; Try to write the sector to disk +.393e39 b0 1f bcs $393e5a BCS ret_success +.393e3b 82 86 16 brl $3954c4 ret_failure BRL IF_FAILURE +.393e3e write_cluster +.393e3e c2 20 rep #$20 REP #$20 ; set A long +.393e40 ad 32 a0 lda $38a032 LDA DOS_DIR_BLOCK_ID ; Set the DOS_CLUS_ID to the ID of the cluster +.393e43 85 10 sta $0330 STA DOS_CLUS_ID +.393e45 ad 34 a0 lda $38a034 LDA DOS_DIR_BLOCK_ID+2 +.393e48 85 12 sta $0332 STA DOS_CLUS_ID+2 +.393e4a a9 00 a1 lda #$a100 LDA #<>DOS_DIR_CLUSTER ; Set the pointer to the directory buffer +.393e4d 85 1c sta $033c STA DOS_BUFF_PTR +.393e4f a9 38 00 lda #$0038 LDA #`DOS_DIR_CLUSTER +.393e52 85 1e sta $033e STA DOS_BUFF_PTR+2 +.393e54 22 04 42 39 jsl $394204 JSL DOS_PUTCLUSTER ; Try to write the cluster to disk +.393e58 90 e1 bcc $393e3b BCC ret_failure +.393e5a 82 72 16 brl $3954cf ret_success BRL IF_SUCCESS ;****** Return to file: src\sdos_fat.asm @@ -7275,897 +7276,901 @@ ;****** Return to file: src\sdos_fat.asm -.393e65 DOS_INIT -.393e65 8b phb PHB -.393e66 0b phd PHD -.393e67 08 php PHP -.393e68 48 pha PHA ; begin setdbr macro -.393e69 08 php PHP -.393e6a e2 20 sep #$20 SEP #$20 ; set A short -.393e6c a9 00 lda #$00 LDA #0 -.393e6e 48 pha PHA -.393e6f ab plb PLB -.393e70 28 plp PLP -.393e71 68 pla PLA ; end setdbr macro -.393e72 48 pha PHA ; begin setdp macro -.393e73 08 php PHP -.393e74 c2 20 rep #$20 REP #$20 ; set A long -.393e76 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.393e79 5b tcd TCD -.393e7a 28 plp PLP -.393e7b 68 pla PLA ; end setdp macro -.393e7c e2 20 sep #$20 SEP #$20 ; set A short -.393e7e c2 10 rep #$10 REP #$10 ; set X long -.393e80 a2 00 00 ldx #$0000 LDX #0 ; Zero out all the bank 0 variables -.393e83 a9 00 lda #$00 LDA #0 -.393e85 9d 20 03 sta $0320,x b0_clr_loop STA @w SDOS_VARIABLES,X -.393e88 e8 inx INX -.393e89 e0 15 02 cpx #$0215 CPX #<>(FDC_CMD_RETRY - SDOS_VARIABLES + 1) -.393e8c d0 f7 bne $393e85 BNE b0_clr_loop -.393e8e 48 pha PHA ; begin setdbr macro -.393e8f 08 php PHP -.393e90 e2 20 sep #$20 SEP #$20 ; set A short -.393e92 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.393e94 48 pha PHA -.393e95 ab plb PLB -.393e96 28 plp PLP -.393e97 68 pla PLA ; end setdbr macro -.393e98 48 pha PHA ; begin setdp macro -.393e99 08 php PHP -.393e9a c2 20 rep #$20 REP #$20 ; set A long -.393e9c a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.393e9f 5b tcd TCD -.393ea0 28 plp PLP -.393ea1 68 pla PLA ; end setdp macro -.393ea2 e2 20 sep #$20 SEP #$20 ; set A short -.393ea4 c2 10 rep #$10 REP #$10 ; set X long -.393ea6 a2 00 00 ldx #$0000 LDX #0 ; Zero out all the bank $38 variables -.393ea9 a9 00 lda #$00 LDA #0 -.393eab 9d 00 a0 sta $38a000,x b38_clr_loop STA @w DOS_HIGH_VARIABLES,X -.393eae e8 inx INX -.393eaf e0 01 20 cpx #$2001 CPX #<>(DOS_FILE_BUFFS_END - DOS_HIGH_VARIABLES + 1) -.393eb2 d0 f7 bne $393eab BNE b38_clr_loop -.393eb4 c2 20 rep #$20 REP #$20 ; set A long -.393eb6 a9 64 42 lda #$4264 LDA #<>DOS_HD_DESC ; Initialize the device names list -.393eb9 8f 4a a0 38 sta $38a04a STA @l DOS_DEV_NAMES -.393ebd a9 39 00 lda #$0039 LDA #`DOS_HD_DESC -.393ec0 8f 4c a0 38 sta $38a04c STA @l DOS_DEV_NAMES+2 -.393ec4 e2 20 sep #$20 SEP #$20 ; set A short -.393ec6 a9 02 lda #$02 LDA #BIOS_DEV_SD ; Default to the SD card -.393ec8 85 01 sta $0321 STA BIOS_DEV -.393eca a9 ff lda #$ff LDA #$FF ; Set the mounted device to a sentinel value -.393ecc 8f 50 a0 38 sta $38a050 STA @l DOS_MOUNT_DEV -.393ed0 a9 00 lda #$00 LDA #0 -.393ed2 a2 00 00 ldx #$0000 LDX #0 -.393ed5 9d 20 ad sta $38ad20,x fd_zero_loop STA @w DOS_FILE_DESCS,X -.393ed8 e8 inx INX -.393ed9 e0 00 01 cpx #$0100 CPX #(DOS_FILE_DESCS_END - DOS_FILE_DESCS) -.393edc d0 f7 bne $393ed5 BNE fd_zero_loop -.393ede a9 00 lda #$00 LDA #0 -.393ee0 a2 00 00 ldx #$0000 LDX #0 -.393ee3 9d 00 b0 sta $38b000,x sect_zero_loop STA @w DOS_FILE_BUFFS,X -.393ee6 e8 inx INX -.393ee7 e0 00 10 cpx #$1000 CPX #(DOS_FILE_BUFFS_END - DOS_FILE_BUFFS) -.393eea d0 f7 bne $393ee3 BNE sect_zero_loop -.393eec c2 20 rep #$20 REP #$20 ; set A long -.393eee a9 20 ad lda #$ad20 LDA #<>DOS_FILE_DESCS ; Initialize a pointer to the file descriptors -.393ef1 85 20 sta $0340 STA @b DOS_FD_PTR -.393ef3 a9 38 00 lda #$0038 LDA #`DOS_FILE_DESCS -.393ef6 85 22 sta $0342 STA @b DOS_FD_PTR+2 -.393ef8 a9 00 b0 lda #$b000 LDA #<>DOS_FILE_BUFFS ; Initialize a pointer to the sector buffers -.393efb 85 28 sta $0348 STA @b DOS_TEMP -.393efd a9 38 00 lda #$0038 LDA #`DOS_FILE_BUFFS -.393f00 85 2a sta $034a STA @b DOS_TEMP+2 -.393f02 a2 08 00 ldx #$0008 LDX #DOS_FD_MAX ; Set how many file descriptors to update -.393f05 a0 0e 00 ldy #$000e fd_buff_loop LDY #FILEDESC.BUFFER ; Set the file descriptor's buffer pointer -.393f08 a5 28 lda $0348 LDA @b DOS_TEMP -.393f0a 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.393f0c c8 iny INY -.393f0d c8 iny INY -.393f0e a5 2a lda $034a LDA @b DOS_TEMP+2 -.393f10 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.393f12 18 clc CLC ; Advance the file descriptor pointer to the next file descriptor -.393f13 a5 20 lda $0340 LDA @b DOS_FD_PTR -.393f15 69 20 00 adc #$0020 ADC #SIZE(FILEDESC) -.393f18 85 20 sta $0340 STA @b DOS_FD_PTR -.393f1a a5 22 lda $0342 LDA @b DOS_FD_PTR+2 -.393f1c 69 00 00 adc #$0000 ADC #0 -.393f1f 85 22 sta $0342 STA @b DOS_FD_PTR+2 -.393f21 18 clc CLC ; Advance the sector buffer pointer to the next buffer -.393f22 a5 28 lda $0348 LDA @b DOS_TEMP -.393f24 69 00 02 adc #$0200 ADC #DOS_SECTOR_SIZE -.393f27 85 28 sta $0348 STA @b DOS_TEMP -.393f29 a5 2a lda $034a LDA @b DOS_TEMP+2 -.393f2b 69 00 00 adc #$0000 ADC #0 -.393f2e 85 2a sta $034a STA @b DOS_TEMP+2 -.393f30 ca dex DEX ; Count down the descriptors... -.393f31 d0 d2 bne $393f05 BNE fd_buff_loop ; If not zero, keep setting the buffer pointers -.393f33 28 plp PLP -.393f34 2b pld PLD -.393f35 ab plb PLB -.393f36 6b rtl RTL -.393f37 DOS_MOUNT -.393f37 8b phb PHB -.393f38 0b phd PHD -.393f39 08 php PHP -.393f3a 48 pha PHA ; begin setdbr macro -.393f3b 08 php PHP -.393f3c e2 20 sep #$20 SEP #$20 ; set A short -.393f3e a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.393f40 48 pha PHA -.393f41 ab plb PLB -.393f42 28 plp PLP -.393f43 68 pla PLA ; end setdbr macro -.393f44 48 pha PHA ; begin setdp macro -.393f45 08 php PHP -.393f46 c2 20 rep #$20 REP #$20 ; set A long -.393f48 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.393f4b 5b tcd TCD -.393f4c 28 plp PLP -.393f4d 68 pla PLA ; end setdp macro -.393f4e e2 20 sep #$20 SEP #$20 ; set A short -.393f50 a5 01 lda $0321 LDA BIOS_DEV ; Get the device to moount -.393f52 8f 50 a0 38 sta $38a050 try_mount STA @l DOS_MOUNT_DEV ; Save the device we're going to try to mount -.393f56 c9 02 cmp #$02 CMP #BIOS_DEV_SD ; Is it the SDC? -.393f58 f0 1f beq $393f79 BEQ do_sdc_mount ; Yes: attempt to mount it -.393f5a c9 06 cmp #$06 CMP #BIOS_DEV_HD0 ; Is it HD0? -.393f5c f0 26 beq $393f84 BEQ do_ide_mount ; Yes: attempt to mount the IDE drive -.393f5e c9 00 cmp #$00 CMP #BIOS_DEV_FDC ; Is it the FDC? -.393f60 f0 0b beq $393f6d BEQ do_fdc_mount ; Yes: attempt to mount it -.393f62 a9 04 lda #$04 LDA #DOS_ERR_NOINIT ; Otherwise: return a bad device error -.393f64 85 0e sta $032e STA DOS_STATUS -.393f66 a9 80 lda #$80 LDA #BIOS_ERR_BADDEV -.393f68 85 00 sta $0320 STA BIOS_STATUS -.393f6a 82 7c 01 brl $3940e9 BRL ret_failure -.393f6d 22 47 63 39 jsl $396347 do_fdc_mount JSL FDC_MOUNT ; Attempt to mount the floppy disk -.393f71 b0 03 bcs $393f76 BCS fdc_success -.393f73 82 73 01 brl $3940e9 BRL ret_failure -.393f76 82 67 01 brl $3940e0 fdc_success BRL ret_success -.393f79 22 2f 59 39 jsl $39592f do_sdc_mount JSL SDC_INIT ; Yes: Initialize access to the SDC -.393f7d b0 10 bcs $393f8f BCS get_mbr ; Continue if success -.393f7f a9 04 lda #$04 LDA #DOS_ERR_NOINIT ; Otherwise: return an error -.393f81 82 65 01 brl $3940e9 BRL ret_failure -.393f84 22 57 67 39 jsl $396757 do_ide_mount JSL IDE_INIT ; Yes: Initialize access to the IDE drive -.393f88 b0 05 bcs $393f8f BCS get_mbr ; Continue if success -.393f8a a9 04 lda #$04 LDA #DOS_ERR_NOINIT ; Otherwise: return an error -.393f8c 82 5a 01 brl $3940e9 BRL ret_failure -.393f8f get_mbr -.393f8f c2 30 rep #$30 REP #$30 ; set A&X long -.393f91 64 02 stz $0322 STZ BIOS_LBA ; Get the MBR -.393f93 64 04 stz $0324 STZ BIOS_LBA+2 -.393f95 a9 00 a3 lda #$a300 LDA #<>DOS_SECTOR ; Into DOS_SECTOR -.393f98 85 06 sta $0326 STA BIOS_BUFF_PTR -.393f9a a9 38 00 lda #$0038 LDA #`DOS_SECTOR -.393f9d 85 08 sta $0328 STA BIOS_BUFF_PTR+2 -.393f9f 22 44 10 00 jsl $001044 JSL GETBLOCK ; Try to read the MBR -.393fa3 b0 07 bcs $393fac BCS chk_signature ; If success, check the signature bytes -.393fa5 e2 20 sep #$20 SEP #$20 ; set A short -.393fa7 a9 01 lda #$01 LDA #DOS_ERR_READ ; Otherwise: report we couldn't read the first sector -.393fa9 82 3d 01 brl $3940e9 BRL ret_failure -.393fac chk_signature -.393fac e2 20 sep #$20 SEP #$20 ; set A short -.393fae ad fe a4 lda $38a4fe LDA DOS_SECTOR+MBR_SIGNATURE -.393fb1 c9 55 cmp #$55 CMP #$55 ; Is first byte of signature $55? -.393fb3 d0 07 bne $393fbc BNE not_mbr ; No: signal we could find the MBR -.393fb5 ad ff a4 lda $38a4ff LDA DOS_SECTOR+MBR_SIGNATURE+1 -.393fb8 c9 aa cmp #$aa CMP #$AA ; Is second byte of signature $AA? -.393fba f0 05 beq $393fc1 BEQ chk_part_type ; Yes: we have an MBR -.393fbc a9 02 lda #$02 not_mbr LDA #DOS_ERR_NOTMBR ; Return that we didn't find the MBR -.393fbe 82 28 01 brl $3940e9 BRL ret_failure -.393fc1 ad c2 a4 lda $38a4c2 chk_part_type LDA DOS_SECTOR+PART0_OFF+PART_TYPE_OFF -.393fc4 c9 0c cmp #$0c CMP #PART_TYPE_FAT32_LBA -.393fc6 f0 05 beq $393fcd BEQ get_LBA ; Is FAT32 with LBA? -.393fc8 a9 03 lda #$03 LDA #DOS_ERR_NOFAT32 ; No: return No FAT32 found error -.393fca 82 1c 01 brl $3940e9 BRL ret_failure -.393fcd 8d 01 a0 sta $38a001 get_LBA STA FILE_SYSTEM ; Save the file system of the partition -.393fd0 c2 20 rep #$20 REP #$20 ; set A long -.393fd2 ad c6 a4 lda $38a4c6 LDA DOS_SECTOR+PART0_OFF+PART_LBA_OFF -.393fd5 8d 04 a0 sta $38a004 STA FIRSTSECTOR -.393fd8 ad c8 a4 lda $38a4c8 LDA DOS_SECTOR+PART0_OFF+PART_LBA_OFF+2 -.393fdb 8d 06 a0 sta $38a006 STA FIRSTSECTOR+2 -.393fde ad cb a4 lda $38a4cb LDA DOS_SECTOR+PART0_OFF+PART_SECT_COUNT_OFF -.393fe1 8d 08 a0 sta $38a008 STA SECTORCOUNT -.393fe4 ad cd a4 lda $38a4cd LDA DOS_SECTOR+PART0_OFF+PART_SECT_COUNT_OFF+2 -.393fe7 8d 0a a0 sta $38a00a STA SECTORCOUNT+2 -.393fea e2 20 sep #$20 SEP #$20 ; set A short -.393fec a5 01 lda $0321 LDA BIOS_DEV ; Save the device number -.393fee 8d 00 a0 sta $38a000 STA DEVICE -.393ff1 a9 00 lda #$00 LDA #0 -.393ff3 8d 02 a0 sta $38a002 STA PARTITION ; For the moment, we only support the first partition -.393ff6 c2 20 rep #$20 REP #$20 ; set A long -.393ff8 a9 00 a3 lda #$a300 LDA #<>DOS_SECTOR -.393ffb 85 06 sta $0326 STA BIOS_BUFF_PTR -.393ffd a9 38 00 lda #$0038 LDA #`DOS_SECTOR -.394000 85 08 sta $0328 STA BIOS_BUFF_PTR+2 -.394002 ad 04 a0 lda $38a004 LDA FIRSTSECTOR -.394005 85 02 sta $0322 STA BIOS_LBA -.394007 ad 06 a0 lda $38a006 LDA FIRSTSECTOR+2 -.39400a 85 04 sta $0324 STA BIOS_LBA+2 -.39400c 22 44 10 00 jsl $001044 JSL GETBLOCK ; Attempt to load the volume ID -.394010 b0 1c bcs $39402e BCS get_first_sec ; Got it? Start parsing it -.394012 e2 20 sep #$20 SEP #$20 ; set A short -.394014 a9 05 lda #$05 LDA #DOS_ERR_VOLID ; Otherwise: return an error -.394016 82 d0 00 brl $3940e9 BRL ret_failure -.394019 chk_bpb_sig -.394019 e2 20 sep #$20 SEP #$20 ; set A short -.39401b ad fe a4 lda $38a4fe LDA DOS_SECTOR+BPB_SIGNATURE -.39401e c9 55 cmp #$55 CMP #$55 ; Is first byte of signature $55? -.394020 d0 07 bne $394029 BNE not_bpb ; No: signal we could find the volume ID -.394022 ad ff a4 lda $38a4ff LDA DOS_SECTOR+BPB_SIGNATURE+1 -.394025 c9 aa cmp #$aa CMP #$AA ; Is second byte of signature $AA? -.394027 f0 05 beq $39402e BEQ get_first_sec ; Yes: we have an volume ID -.394029 a9 05 lda #$05 not_bpb LDA #DOS_ERR_VOLID ; Return that we didn't find the Volume ID (BPB) -.39402b 82 bb 00 brl $3940e9 BRL ret_failure -.39402e get_first_sec -.39402e c2 20 rep #$20 REP #$20 ; set A long -.394030 ad 2c a3 lda $38a32c LDA DOS_SECTOR+BPB_ROOTCLUS_OFF -.394033 8d 20 a0 sta $38a020 STA ROOT_DIR_FIRST_CLUSTER -.394036 ad 2e a3 lda $38a32e LDA DOS_SECTOR+BPB_ROOTCLUS_OFF+2 -.394039 8d 22 a0 sta $38a022 STA ROOT_DIR_FIRST_CLUSTER+2 -.39403c ad 0e a3 lda $38a30e LDA DOS_SECTOR+BPB_RSRVCLUS_OFF -.39403f 8d 0c a0 sta $38a00c STA NUM_RSRV_SEC -.394042 18 clc CLC ; fat_begin_lba := FirstSector + Number_of_Reserved_Sectors -.394043 ad 04 a0 lda $38a004 LDA FIRSTSECTOR -.394046 6d 0c a0 adc $38a00c ADC NUM_RSRV_SEC -.394049 8d 14 a0 sta $38a014 STA FAT_BEGIN_LBA -.39404c ad 06 a0 lda $38a006 LDA FIRSTSECTOR+2 -.39404f 69 00 00 adc #$0000 ADC #0 -.394052 8d 16 a0 sta $38a016 STA FAT_BEGIN_LBA+2 -.394055 e2 20 sep #$20 SEP #$20 ; set A short -.394057 a2 00 00 ldx #$0000 LDX #0 -.39405a bf 24 a3 38 lda $38a324,x cpy_secperfat LDA @l DOS_SECTOR+BPB_SECPERFAT_OFF,X -.39405e 9f 10 a0 38 sta $38a010,x STA @l SEC_PER_FAT,X -.394062 e8 inx INX -.394063 e0 04 00 cpx #$0004 CPX #4 -.394066 d0 f2 bne $39405a BNE cpy_secperfat -.394068 ad 10 a0 lda $38a010 LDA SEC_PER_FAT -.39406b 0a asl a ASL A -.39406c 8d 1c a0 sta $38a01c STA CLUSTER_BEGIN_LBA -.39406f ad 11 a0 lda $38a011 LDA SEC_PER_FAT+1 -.394072 2a rol a ROL A -.394073 8d 1d a0 sta $38a01d STA CLUSTER_BEGIN_LBA+1 -.394076 ad 12 a0 lda $38a012 LDA SEC_PER_FAT+2 -.394079 2a rol a ROL A -.39407a 8d 1e a0 sta $38a01e STA CLUSTER_BEGIN_LBA+2 -.39407d ad 13 a0 lda $38a013 LDA SEC_PER_FAT+3 -.394080 2a rol a ROL A -.394081 8d 1f a0 sta $38a01f STA CLUSTER_BEGIN_LBA+3 -.394084 18 clc CLC -.394085 ad 1c a0 lda $38a01c LDA CLUSTER_BEGIN_LBA -.394088 6d 14 a0 adc $38a014 ADC FAT_BEGIN_LBA -.39408b 8d 1c a0 sta $38a01c STA CLUSTER_BEGIN_LBA -.39408e ad 1d a0 lda $38a01d LDA CLUSTER_BEGIN_LBA+1 -.394091 6d 15 a0 adc $38a015 ADC FAT_BEGIN_LBA+1 -.394094 8d 1d a0 sta $38a01d STA CLUSTER_BEGIN_LBA+1 -.394097 ad 1e a0 lda $38a01e LDA CLUSTER_BEGIN_LBA+2 -.39409a 6d 16 a0 adc $38a016 ADC FAT_BEGIN_LBA+2 -.39409d 8d 1e a0 sta $38a01e STA CLUSTER_BEGIN_LBA+2 -.3940a0 ad 1f a0 lda $38a01f LDA CLUSTER_BEGIN_LBA+3 -.3940a3 6d 17 a0 adc $38a017 ADC FAT_BEGIN_LBA+3 -.3940a6 8d 1f a0 sta $38a01f STA CLUSTER_BEGIN_LBA+3 -.3940a9 e2 20 sep #$20 SEP #$20 ; set A short -.3940ab ad 0d a3 lda $38a30d LDA DOS_SECTOR+BPB_SECPERCLUS_OFF -.3940ae 8d 03 a0 sta $38a003 STA SECTORS_PER_CLUSTER -.3940b1 18 clc CLC -.3940b2 ad 14 a0 lda $38a014 LDA FAT_BEGIN_LBA ; Compute the address of the first sector of -.3940b5 6d 10 a0 adc $38a010 ADC SEC_PER_FAT ; the second copy of the FAT -.3940b8 8d 18 a0 sta $38a018 STA FAT2_BEGIN_LBA -.3940bb ad 15 a0 lda $38a015 LDA FAT_BEGIN_LBA+1 -.3940be 6d 11 a0 adc $38a011 ADC SEC_PER_FAT+1 -.3940c1 8d 19 a0 sta $38a019 STA FAT2_BEGIN_LBA+1 -.3940c4 ad 16 a0 lda $38a016 LDA FAT_BEGIN_LBA+2 -.3940c7 6d 12 a0 adc $38a012 ADC SEC_PER_FAT+2 -.3940ca 8d 1a a0 sta $38a01a STA FAT2_BEGIN_LBA+2 -.3940cd ad 17 a0 lda $38a017 LDA FAT_BEGIN_LBA+3 -.3940d0 6d 13 a0 adc $38a013 ADC SEC_PER_FAT+3 -.3940d3 8d 1b a0 sta $38a01b STA FAT2_BEGIN_LBA+3 -.3940d6 a9 00 lda #$00 LDA #DOS_SECTOR_SIZE -.3940dd 8d 0f a0 sta $38a00f STA CLUSTER_SIZE+1 -.3940e0 ret_success -.3940e0 e2 20 sep #$20 SEP #$20 ; set A short -.3940e2 64 0e stz $032e STZ DOS_STATUS ; Set status code to 0 -.3940e4 28 plp PLP -.3940e5 2b pld PLD -.3940e6 ab plb PLB -.3940e7 38 sec SEC -.3940e8 6b rtl RTL -.3940e9 ret_failure -.3940e9 e2 20 sep #$20 SEP #$20 ; set A short -.3940eb 85 0e sta $032e STA DOS_STATUS ; Save the status code -.3940ed 28 plp PLP -.3940ee 2b pld PLD -.3940ef ab plb PLB -.3940f0 18 clc CLC -.3940f1 6b rtl RTL -.3940f2 DOS_TESTBOOT -.3940f2 8b phb PHB -.3940f3 0b phd PHD -.3940f4 da phx PHX -.3940f5 08 php PHP -.3940f6 48 pha PHA ; begin setdbr macro -.3940f7 08 php PHP -.3940f8 e2 20 sep #$20 SEP #$20 ; set A short -.3940fa a9 00 lda #$00 LDA #0 -.3940fc 48 pha PHA -.3940fd ab plb PLB -.3940fe 28 plp PLP -.3940ff 68 pla PLA ; end setdbr macro -.394100 48 pha PHA ; begin setdp macro -.394101 08 php PHP -.394102 c2 20 rep #$20 REP #$20 ; set A long -.394104 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394107 5b tcd TCD -.394108 28 plp PLP -.394109 68 pla PLA ; end setdp macro -.39410a c2 10 rep #$10 REP #$10 ; set X long -.39410c chk_dev -.39410c e2 20 sep #$20 SEP #$20 ; set A short -.39410e a5 01 lda $0321 LDA @b BIOS_DEV ; Look at the device # -.394110 c9 00 cmp #$00 CMP #BIOS_DEV_FDC ; Is it the floppy drive? -.394112 f0 24 beq $394138 BEQ chk_vbr_brl ; Yes: check if BRL is in the right place in the VBR -.394114 c2 30 rep #$30 REP #$30 ; set A&X long -.394116 a9 00 00 lda #$0000 LDA #0 ; Point to the MBR -.394119 85 02 sta $0322 STA @b BIOS_LBA -.39411b 85 04 sta $0324 STA @b BIOS_LBA+2 -.39411d a9 00 a3 lda #$a300 LDA #<>DOS_SECTOR ; And the buffer -.394120 85 06 sta $0326 STA @b BIOS_BUFF_PTR -.394122 a9 38 00 lda #$0038 LDA #`DOS_SECTOR -.394125 85 08 sta $0328 STA @b BIOS_BUFF_PTR+2 -.394127 22 44 10 00 jsl $001044 JSL GETBLOCK ; Try to load the MBR -.39412b b0 03 bcs $394130 BCS chk_mbr_brl -.39412d 82 47 00 brl $394177 BRL done ; If failed... just return -.394130 chk_mbr_brl -.394130 e2 20 sep #$20 SEP #$20 ; set A short -.394132 af 00 a3 38 lda $38a300 LDA @l DOS_SECTOR ; Check the first byte of the MBR -.394136 80 04 bra $39413c BRA chk_brl -.394138 af 3e a3 38 lda $38a33e chk_vbr_brl LDA @l DOS_SECTOR+FDC_BOOT_START -.39413c c9 80 cmp #$80 chk_brl CMP #$80 ; Is the first byte a BRL/BRA instruction? -.39413e f0 06 beq $394146 BEQ chk_magic ; Yes: check for the magic text -.394140 c9 82 cmp #$82 CMP #$82 -.394142 f0 02 beq $394146 BEQ chk_magic -.394144 80 31 bra $394177 BRA done ; No: just return -.394146 a2 00 00 ldx #$0000 chk_magic LDX #0 -.394149 bf 03 a3 38 lda $38a303,x magic_loop LDA @l DOS_SECTOR+3,X ; Check the "vendor" byte -.39414d df 7c 41 39 cmp $39417c,x CMP DOS_BOOT_MAGIC,X ; Compare it against our boot magic code -.394151 d0 24 bne $394177 BNE done ; If it's not equal, just return -.394153 e8 inx INX ; Otherwise, check the next one -.394154 e0 08 00 cpx #$0008 CPX #8 -.394157 d0 f0 bne $394149 BNE magic_loop ; Until we've checked all 8 bytes -.394159 c2 30 rep #$30 REP #$30 ; set A&X long -.39415b a9 00 02 lda #$0200 LDA #DOS_SECTOR_SIZE -.39415e a2 00 a5 ldx #$a500 LDX #<>(DOS_SECTOR+DOS_SECTOR_SIZE) -.394161 a0 00 ab ldy #$ab00 LDY #<>(DOS_BOOT_SECTOR+DOS_SECTOR_SIZE) -.394164 44 38 38 mvp $38,$38 MVP #`DOS_SECTOR, #`DOS_BOOT_SECTOR -.394167 e2 20 sep #$20 SEP #$20 ; set A short -.394169 a5 01 lda $0321 LDA @b BIOS_DEV ; Check the device -.39416b c9 00 cmp #$00 CMP #BIOS_DEV_FDC ; Is it the FDC? -.39416d f0 04 beq $394173 BEQ jmp_fdc_start ; Yes: jump to the start of the VBR code -.39416f 5c 00 a9 38 jmp $38a900 JML DOS_BOOT_SECTOR ; No: it's an MBR, start at the first byte -.394173 5c 3e a9 38 jmp $38a93e jmp_fdc_start JML DOS_BOOT_SECTOR+FDC_BOOT_START -.394177 28 plp done PLP -.394178 2b pld PLD -.394179 ab plb PLB -.39417a fa plx PLX -.39417b 6b rtl RTL ->39417c 43 32 35 36 44 4f 53 20 DOS_BOOT_MAGIC .text "C256DOS " -.394184 DOS_CALC_LBA -.394184 8b phb PHB -.394185 0b phd PHD -.394186 08 php PHP -.394187 48 pha PHA ; begin setdbr macro -.394188 08 php PHP -.394189 e2 20 sep #$20 SEP #$20 ; set A short -.39418b a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.39418d 48 pha PHA -.39418e ab plb PLB -.39418f 28 plp PLP -.394190 68 pla PLA ; end setdbr macro -.394191 48 pha PHA ; begin setdp macro -.394192 08 php PHP +.393e5d DOS_INIT +.393e5d 8b phb PHB +.393e5e 0b phd PHD +.393e5f 08 php PHP +.393e60 48 pha PHA ; begin setdbr macro +.393e61 08 php PHP +.393e62 e2 20 sep #$20 SEP #$20 ; set A short +.393e64 a9 00 lda #$00 LDA #0 +.393e66 48 pha PHA +.393e67 ab plb PLB +.393e68 28 plp PLP +.393e69 68 pla PLA ; end setdbr macro +.393e6a 48 pha PHA ; begin setdp macro +.393e6b 08 php PHP +.393e6c c2 20 rep #$20 REP #$20 ; set A long +.393e6e a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.393e71 5b tcd TCD +.393e72 28 plp PLP +.393e73 68 pla PLA ; end setdp macro +.393e74 e2 20 sep #$20 SEP #$20 ; set A short +.393e76 c2 10 rep #$10 REP #$10 ; set X long +.393e78 a2 00 00 ldx #$0000 LDX #0 ; Zero out all the bank 0 variables +.393e7b a9 00 lda #$00 LDA #0 +.393e7d 9d 20 03 sta $0320,x b0_clr_loop STA @w SDOS_VARIABLES,X +.393e80 e8 inx INX +.393e81 e0 15 02 cpx #$0215 CPX #<>(FDC_CMD_RETRY - SDOS_VARIABLES + 1) +.393e84 d0 f7 bne $393e7d BNE b0_clr_loop +.393e86 48 pha PHA ; begin setdbr macro +.393e87 08 php PHP +.393e88 e2 20 sep #$20 SEP #$20 ; set A short +.393e8a a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.393e8c 48 pha PHA +.393e8d ab plb PLB +.393e8e 28 plp PLP +.393e8f 68 pla PLA ; end setdbr macro +.393e90 48 pha PHA ; begin setdp macro +.393e91 08 php PHP +.393e92 c2 20 rep #$20 REP #$20 ; set A long +.393e94 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.393e97 5b tcd TCD +.393e98 28 plp PLP +.393e99 68 pla PLA ; end setdp macro +.393e9a e2 20 sep #$20 SEP #$20 ; set A short +.393e9c c2 10 rep #$10 REP #$10 ; set X long +.393e9e a2 00 00 ldx #$0000 LDX #0 ; Zero out all the bank $38 variables +.393ea1 a9 00 lda #$00 LDA #0 +.393ea3 9d 00 a0 sta $38a000,x b38_clr_loop STA @w DOS_HIGH_VARIABLES,X +.393ea6 e8 inx INX +.393ea7 e0 01 20 cpx #$2001 CPX #<>(DOS_FILE_BUFFS_END - DOS_HIGH_VARIABLES + 1) +.393eaa d0 f7 bne $393ea3 BNE b38_clr_loop +.393eac c2 20 rep #$20 REP #$20 ; set A long +.393eae a9 5c 42 lda #$425c LDA #<>DOS_HD_DESC ; Initialize the device names list +.393eb1 8f 4a a0 38 sta $38a04a STA @l DOS_DEV_NAMES +.393eb5 a9 39 00 lda #$0039 LDA #`DOS_HD_DESC +.393eb8 8f 4c a0 38 sta $38a04c STA @l DOS_DEV_NAMES+2 +.393ebc e2 20 sep #$20 SEP #$20 ; set A short +.393ebe a9 02 lda #$02 LDA #BIOS_DEV_SD ; Default to the SD card +.393ec0 85 01 sta $0321 STA BIOS_DEV +.393ec2 a9 ff lda #$ff LDA #$FF ; Set the mounted device to a sentinel value +.393ec4 8f 50 a0 38 sta $38a050 STA @l DOS_MOUNT_DEV +.393ec8 a9 00 lda #$00 LDA #0 +.393eca a2 00 00 ldx #$0000 LDX #0 +.393ecd 9d 20 ad sta $38ad20,x fd_zero_loop STA @w DOS_FILE_DESCS,X +.393ed0 e8 inx INX +.393ed1 e0 00 01 cpx #$0100 CPX #(DOS_FILE_DESCS_END - DOS_FILE_DESCS) +.393ed4 d0 f7 bne $393ecd BNE fd_zero_loop +.393ed6 a9 00 lda #$00 LDA #0 +.393ed8 a2 00 00 ldx #$0000 LDX #0 +.393edb 9d 00 b0 sta $38b000,x sect_zero_loop STA @w DOS_FILE_BUFFS,X +.393ede e8 inx INX +.393edf e0 00 10 cpx #$1000 CPX #(DOS_FILE_BUFFS_END - DOS_FILE_BUFFS) +.393ee2 d0 f7 bne $393edb BNE sect_zero_loop +.393ee4 c2 20 rep #$20 REP #$20 ; set A long +.393ee6 a9 20 ad lda #$ad20 LDA #<>DOS_FILE_DESCS ; Initialize a pointer to the file descriptors +.393ee9 85 20 sta $0340 STA @b DOS_FD_PTR +.393eeb a9 38 00 lda #$0038 LDA #`DOS_FILE_DESCS +.393eee 85 22 sta $0342 STA @b DOS_FD_PTR+2 +.393ef0 a9 00 b0 lda #$b000 LDA #<>DOS_FILE_BUFFS ; Initialize a pointer to the sector buffers +.393ef3 85 28 sta $0348 STA @b DOS_TEMP +.393ef5 a9 38 00 lda #$0038 LDA #`DOS_FILE_BUFFS +.393ef8 85 2a sta $034a STA @b DOS_TEMP+2 +.393efa a2 08 00 ldx #$0008 LDX #DOS_FD_MAX ; Set how many file descriptors to update +.393efd a0 0e 00 ldy #$000e fd_buff_loop LDY #FILEDESC.BUFFER ; Set the file descriptor's buffer pointer +.393f00 a5 28 lda $0348 LDA @b DOS_TEMP +.393f02 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.393f04 c8 iny INY +.393f05 c8 iny INY +.393f06 a5 2a lda $034a LDA @b DOS_TEMP+2 +.393f08 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.393f0a 18 clc CLC ; Advance the file descriptor pointer to the next file descriptor +.393f0b a5 20 lda $0340 LDA @b DOS_FD_PTR +.393f0d 69 20 00 adc #$0020 ADC #SIZE(FILEDESC) +.393f10 85 20 sta $0340 STA @b DOS_FD_PTR +.393f12 a5 22 lda $0342 LDA @b DOS_FD_PTR+2 +.393f14 69 00 00 adc #$0000 ADC #0 +.393f17 85 22 sta $0342 STA @b DOS_FD_PTR+2 +.393f19 18 clc CLC ; Advance the sector buffer pointer to the next buffer +.393f1a a5 28 lda $0348 LDA @b DOS_TEMP +.393f1c 69 00 02 adc #$0200 ADC #DOS_SECTOR_SIZE +.393f1f 85 28 sta $0348 STA @b DOS_TEMP +.393f21 a5 2a lda $034a LDA @b DOS_TEMP+2 +.393f23 69 00 00 adc #$0000 ADC #0 +.393f26 85 2a sta $034a STA @b DOS_TEMP+2 +.393f28 ca dex DEX ; Count down the descriptors... +.393f29 d0 d2 bne $393efd BNE fd_buff_loop ; If not zero, keep setting the buffer pointers +.393f2b 28 plp PLP +.393f2c 2b pld PLD +.393f2d ab plb PLB +.393f2e 6b rtl RTL +.393f2f DOS_MOUNT +.393f2f 8b phb PHB +.393f30 0b phd PHD +.393f31 08 php PHP +.393f32 48 pha PHA ; begin setdbr macro +.393f33 08 php PHP +.393f34 e2 20 sep #$20 SEP #$20 ; set A short +.393f36 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.393f38 48 pha PHA +.393f39 ab plb PLB +.393f3a 28 plp PLP +.393f3b 68 pla PLA ; end setdbr macro +.393f3c 48 pha PHA ; begin setdp macro +.393f3d 08 php PHP +.393f3e c2 20 rep #$20 REP #$20 ; set A long +.393f40 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.393f43 5b tcd TCD +.393f44 28 plp PLP +.393f45 68 pla PLA ; end setdp macro +.393f46 e2 20 sep #$20 SEP #$20 ; set A short +.393f48 a5 01 lda $0321 LDA BIOS_DEV ; Get the device to moount +.393f4a 8f 50 a0 38 sta $38a050 try_mount STA @l DOS_MOUNT_DEV ; Save the device we're going to try to mount +.393f4e c9 02 cmp #$02 CMP #BIOS_DEV_SD ; Is it the SDC? +.393f50 f0 1f beq $393f71 BEQ do_sdc_mount ; Yes: attempt to mount it +.393f52 c9 06 cmp #$06 CMP #BIOS_DEV_HD0 ; Is it HD0? +.393f54 f0 26 beq $393f7c BEQ do_ide_mount ; Yes: attempt to mount the IDE drive +.393f56 c9 00 cmp #$00 CMP #BIOS_DEV_FDC ; Is it the FDC? +.393f58 f0 0b beq $393f65 BEQ do_fdc_mount ; Yes: attempt to mount it +.393f5a a9 04 lda #$04 LDA #DOS_ERR_NOINIT ; Otherwise: return a bad device error +.393f5c 85 0e sta $032e STA DOS_STATUS +.393f5e a9 80 lda #$80 LDA #BIOS_ERR_BADDEV +.393f60 85 00 sta $0320 STA BIOS_STATUS +.393f62 82 7c 01 brl $3940e1 BRL ret_failure +.393f65 22 dd 62 39 jsl $3962dd do_fdc_mount JSL FDC_MOUNT ; Attempt to mount the floppy disk +.393f69 b0 03 bcs $393f6e BCS fdc_success +.393f6b 82 73 01 brl $3940e1 BRL ret_failure +.393f6e 82 67 01 brl $3940d8 fdc_success BRL ret_success +.393f71 22 db 58 39 jsl $3958db do_sdc_mount JSL SDC_INIT ; Yes: Initialize access to the SDC +.393f75 b0 10 bcs $393f87 BCS get_mbr ; Continue if success +.393f77 a9 04 lda #$04 LDA #DOS_ERR_NOINIT ; Otherwise: return an error +.393f79 82 65 01 brl $3940e1 BRL ret_failure +.393f7c 22 ed 66 39 jsl $3966ed do_ide_mount JSL IDE_INIT ; Yes: Initialize access to the IDE drive +.393f80 b0 05 bcs $393f87 BCS get_mbr ; Continue if success +.393f82 a9 04 lda #$04 LDA #DOS_ERR_NOINIT ; Otherwise: return an error +.393f84 82 5a 01 brl $3940e1 BRL ret_failure +.393f87 get_mbr +.393f87 c2 30 rep #$30 REP #$30 ; set A&X long +.393f89 64 02 stz $0322 STZ BIOS_LBA ; Get the MBR +.393f8b 64 04 stz $0324 STZ BIOS_LBA+2 +.393f8d a9 00 a3 lda #$a300 LDA #<>DOS_SECTOR ; Into DOS_SECTOR +.393f90 85 06 sta $0326 STA BIOS_BUFF_PTR +.393f92 a9 38 00 lda #$0038 LDA #`DOS_SECTOR +.393f95 85 08 sta $0328 STA BIOS_BUFF_PTR+2 +.393f97 22 44 10 00 jsl $001044 JSL GETBLOCK ; Try to read the MBR +.393f9b b0 07 bcs $393fa4 BCS chk_signature ; If success, check the signature bytes +.393f9d e2 20 sep #$20 SEP #$20 ; set A short +.393f9f a9 01 lda #$01 LDA #DOS_ERR_READ ; Otherwise: report we couldn't read the first sector +.393fa1 82 3d 01 brl $3940e1 BRL ret_failure +.393fa4 chk_signature +.393fa4 e2 20 sep #$20 SEP #$20 ; set A short +.393fa6 ad fe a4 lda $38a4fe LDA DOS_SECTOR+MBR_SIGNATURE +.393fa9 c9 55 cmp #$55 CMP #$55 ; Is first byte of signature $55? +.393fab d0 07 bne $393fb4 BNE not_mbr ; No: signal we could find the MBR +.393fad ad ff a4 lda $38a4ff LDA DOS_SECTOR+MBR_SIGNATURE+1 +.393fb0 c9 aa cmp #$aa CMP #$AA ; Is second byte of signature $AA? +.393fb2 f0 05 beq $393fb9 BEQ chk_part_type ; Yes: we have an MBR +.393fb4 a9 02 lda #$02 not_mbr LDA #DOS_ERR_NOTMBR ; Return that we didn't find the MBR +.393fb6 82 28 01 brl $3940e1 BRL ret_failure +.393fb9 ad c2 a4 lda $38a4c2 chk_part_type LDA DOS_SECTOR+PART0_OFF+PART_TYPE_OFF +.393fbc c9 0c cmp #$0c CMP #PART_TYPE_FAT32_LBA +.393fbe f0 05 beq $393fc5 BEQ get_LBA ; Is FAT32 with LBA? +.393fc0 a9 03 lda #$03 LDA #DOS_ERR_NOFAT32 ; No: return No FAT32 found error +.393fc2 82 1c 01 brl $3940e1 BRL ret_failure +.393fc5 8d 01 a0 sta $38a001 get_LBA STA FILE_SYSTEM ; Save the file system of the partition +.393fc8 c2 20 rep #$20 REP #$20 ; set A long +.393fca ad c6 a4 lda $38a4c6 LDA DOS_SECTOR+PART0_OFF+PART_LBA_OFF +.393fcd 8d 04 a0 sta $38a004 STA FIRSTSECTOR +.393fd0 ad c8 a4 lda $38a4c8 LDA DOS_SECTOR+PART0_OFF+PART_LBA_OFF+2 +.393fd3 8d 06 a0 sta $38a006 STA FIRSTSECTOR+2 +.393fd6 ad cb a4 lda $38a4cb LDA DOS_SECTOR+PART0_OFF+PART_SECT_COUNT_OFF +.393fd9 8d 08 a0 sta $38a008 STA SECTORCOUNT +.393fdc ad cd a4 lda $38a4cd LDA DOS_SECTOR+PART0_OFF+PART_SECT_COUNT_OFF+2 +.393fdf 8d 0a a0 sta $38a00a STA SECTORCOUNT+2 +.393fe2 e2 20 sep #$20 SEP #$20 ; set A short +.393fe4 a5 01 lda $0321 LDA BIOS_DEV ; Save the device number +.393fe6 8d 00 a0 sta $38a000 STA DEVICE +.393fe9 a9 00 lda #$00 LDA #0 +.393feb 8d 02 a0 sta $38a002 STA PARTITION ; For the moment, we only support the first partition +.393fee c2 20 rep #$20 REP #$20 ; set A long +.393ff0 a9 00 a3 lda #$a300 LDA #<>DOS_SECTOR +.393ff3 85 06 sta $0326 STA BIOS_BUFF_PTR +.393ff5 a9 38 00 lda #$0038 LDA #`DOS_SECTOR +.393ff8 85 08 sta $0328 STA BIOS_BUFF_PTR+2 +.393ffa ad 04 a0 lda $38a004 LDA FIRSTSECTOR +.393ffd 85 02 sta $0322 STA BIOS_LBA +.393fff ad 06 a0 lda $38a006 LDA FIRSTSECTOR+2 +.394002 85 04 sta $0324 STA BIOS_LBA+2 +.394004 22 44 10 00 jsl $001044 JSL GETBLOCK ; Attempt to load the volume ID +.394008 b0 1c bcs $394026 BCS get_first_sec ; Got it? Start parsing it +.39400a e2 20 sep #$20 SEP #$20 ; set A short +.39400c a9 05 lda #$05 LDA #DOS_ERR_VOLID ; Otherwise: return an error +.39400e 82 d0 00 brl $3940e1 BRL ret_failure +.394011 chk_bpb_sig +.394011 e2 20 sep #$20 SEP #$20 ; set A short +.394013 ad fe a4 lda $38a4fe LDA DOS_SECTOR+BPB_SIGNATURE +.394016 c9 55 cmp #$55 CMP #$55 ; Is first byte of signature $55? +.394018 d0 07 bne $394021 BNE not_bpb ; No: signal we could find the volume ID +.39401a ad ff a4 lda $38a4ff LDA DOS_SECTOR+BPB_SIGNATURE+1 +.39401d c9 aa cmp #$aa CMP #$AA ; Is second byte of signature $AA? +.39401f f0 05 beq $394026 BEQ get_first_sec ; Yes: we have an volume ID +.394021 a9 05 lda #$05 not_bpb LDA #DOS_ERR_VOLID ; Return that we didn't find the Volume ID (BPB) +.394023 82 bb 00 brl $3940e1 BRL ret_failure +.394026 get_first_sec +.394026 c2 20 rep #$20 REP #$20 ; set A long +.394028 ad 2c a3 lda $38a32c LDA DOS_SECTOR+BPB_ROOTCLUS_OFF +.39402b 8d 20 a0 sta $38a020 STA ROOT_DIR_FIRST_CLUSTER +.39402e ad 2e a3 lda $38a32e LDA DOS_SECTOR+BPB_ROOTCLUS_OFF+2 +.394031 8d 22 a0 sta $38a022 STA ROOT_DIR_FIRST_CLUSTER+2 +.394034 ad 0e a3 lda $38a30e LDA DOS_SECTOR+BPB_RSRVCLUS_OFF +.394037 8d 0c a0 sta $38a00c STA NUM_RSRV_SEC +.39403a 18 clc CLC ; fat_begin_lba := FirstSector + Number_of_Reserved_Sectors +.39403b ad 04 a0 lda $38a004 LDA FIRSTSECTOR +.39403e 6d 0c a0 adc $38a00c ADC NUM_RSRV_SEC +.394041 8d 14 a0 sta $38a014 STA FAT_BEGIN_LBA +.394044 ad 06 a0 lda $38a006 LDA FIRSTSECTOR+2 +.394047 69 00 00 adc #$0000 ADC #0 +.39404a 8d 16 a0 sta $38a016 STA FAT_BEGIN_LBA+2 +.39404d e2 20 sep #$20 SEP #$20 ; set A short +.39404f a2 00 00 ldx #$0000 LDX #0 +.394052 bf 24 a3 38 lda $38a324,x cpy_secperfat LDA @l DOS_SECTOR+BPB_SECPERFAT_OFF,X +.394056 9f 10 a0 38 sta $38a010,x STA @l SEC_PER_FAT,X +.39405a e8 inx INX +.39405b e0 04 00 cpx #$0004 CPX #4 +.39405e d0 f2 bne $394052 BNE cpy_secperfat +.394060 ad 10 a0 lda $38a010 LDA SEC_PER_FAT +.394063 0a asl a ASL A +.394064 8d 1c a0 sta $38a01c STA CLUSTER_BEGIN_LBA +.394067 ad 11 a0 lda $38a011 LDA SEC_PER_FAT+1 +.39406a 2a rol a ROL A +.39406b 8d 1d a0 sta $38a01d STA CLUSTER_BEGIN_LBA+1 +.39406e ad 12 a0 lda $38a012 LDA SEC_PER_FAT+2 +.394071 2a rol a ROL A +.394072 8d 1e a0 sta $38a01e STA CLUSTER_BEGIN_LBA+2 +.394075 ad 13 a0 lda $38a013 LDA SEC_PER_FAT+3 +.394078 2a rol a ROL A +.394079 8d 1f a0 sta $38a01f STA CLUSTER_BEGIN_LBA+3 +.39407c 18 clc CLC +.39407d ad 1c a0 lda $38a01c LDA CLUSTER_BEGIN_LBA +.394080 6d 14 a0 adc $38a014 ADC FAT_BEGIN_LBA +.394083 8d 1c a0 sta $38a01c STA CLUSTER_BEGIN_LBA +.394086 ad 1d a0 lda $38a01d LDA CLUSTER_BEGIN_LBA+1 +.394089 6d 15 a0 adc $38a015 ADC FAT_BEGIN_LBA+1 +.39408c 8d 1d a0 sta $38a01d STA CLUSTER_BEGIN_LBA+1 +.39408f ad 1e a0 lda $38a01e LDA CLUSTER_BEGIN_LBA+2 +.394092 6d 16 a0 adc $38a016 ADC FAT_BEGIN_LBA+2 +.394095 8d 1e a0 sta $38a01e STA CLUSTER_BEGIN_LBA+2 +.394098 ad 1f a0 lda $38a01f LDA CLUSTER_BEGIN_LBA+3 +.39409b 6d 17 a0 adc $38a017 ADC FAT_BEGIN_LBA+3 +.39409e 8d 1f a0 sta $38a01f STA CLUSTER_BEGIN_LBA+3 +.3940a1 e2 20 sep #$20 SEP #$20 ; set A short +.3940a3 ad 0d a3 lda $38a30d LDA DOS_SECTOR+BPB_SECPERCLUS_OFF +.3940a6 8d 03 a0 sta $38a003 STA SECTORS_PER_CLUSTER +.3940a9 18 clc CLC +.3940aa ad 14 a0 lda $38a014 LDA FAT_BEGIN_LBA ; Compute the address of the first sector of +.3940ad 6d 10 a0 adc $38a010 ADC SEC_PER_FAT ; the second copy of the FAT +.3940b0 8d 18 a0 sta $38a018 STA FAT2_BEGIN_LBA +.3940b3 ad 15 a0 lda $38a015 LDA FAT_BEGIN_LBA+1 +.3940b6 6d 11 a0 adc $38a011 ADC SEC_PER_FAT+1 +.3940b9 8d 19 a0 sta $38a019 STA FAT2_BEGIN_LBA+1 +.3940bc ad 16 a0 lda $38a016 LDA FAT_BEGIN_LBA+2 +.3940bf 6d 12 a0 adc $38a012 ADC SEC_PER_FAT+2 +.3940c2 8d 1a a0 sta $38a01a STA FAT2_BEGIN_LBA+2 +.3940c5 ad 17 a0 lda $38a017 LDA FAT_BEGIN_LBA+3 +.3940c8 6d 13 a0 adc $38a013 ADC SEC_PER_FAT+3 +.3940cb 8d 1b a0 sta $38a01b STA FAT2_BEGIN_LBA+3 +.3940ce a9 00 lda #$00 LDA #DOS_SECTOR_SIZE +.3940d5 8d 0f a0 sta $38a00f STA CLUSTER_SIZE+1 +.3940d8 ret_success +.3940d8 e2 20 sep #$20 SEP #$20 ; set A short +.3940da 64 0e stz $032e STZ DOS_STATUS ; Set status code to 0 +.3940dc 28 plp PLP +.3940dd 2b pld PLD +.3940de ab plb PLB +.3940df 38 sec SEC +.3940e0 6b rtl RTL +.3940e1 ret_failure +.3940e1 e2 20 sep #$20 SEP #$20 ; set A short +.3940e3 85 0e sta $032e STA DOS_STATUS ; Save the status code +.3940e5 28 plp PLP +.3940e6 2b pld PLD +.3940e7 ab plb PLB +.3940e8 18 clc CLC +.3940e9 6b rtl RTL +.3940ea DOS_TESTBOOT +.3940ea 8b phb PHB +.3940eb 0b phd PHD +.3940ec da phx PHX +.3940ed 08 php PHP +.3940ee 48 pha PHA ; begin setdbr macro +.3940ef 08 php PHP +.3940f0 e2 20 sep #$20 SEP #$20 ; set A short +.3940f2 a9 00 lda #$00 LDA #0 +.3940f4 48 pha PHA +.3940f5 ab plb PLB +.3940f6 28 plp PLP +.3940f7 68 pla PLA ; end setdbr macro +.3940f8 48 pha PHA ; begin setdp macro +.3940f9 08 php PHP +.3940fa c2 20 rep #$20 REP #$20 ; set A long +.3940fc a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3940ff 5b tcd TCD +.394100 28 plp PLP +.394101 68 pla PLA ; end setdp macro +.394102 c2 10 rep #$10 REP #$10 ; set X long +.394104 chk_dev +.394104 e2 20 sep #$20 SEP #$20 ; set A short +.394106 a5 01 lda $0321 LDA @b BIOS_DEV ; Look at the device # +.394108 c9 00 cmp #$00 CMP #BIOS_DEV_FDC ; Is it the floppy drive? +.39410a f0 24 beq $394130 BEQ chk_vbr_brl ; Yes: check if BRL is in the right place in the VBR +.39410c c2 30 rep #$30 REP #$30 ; set A&X long +.39410e a9 00 00 lda #$0000 LDA #0 ; Point to the MBR +.394111 85 02 sta $0322 STA @b BIOS_LBA +.394113 85 04 sta $0324 STA @b BIOS_LBA+2 +.394115 a9 00 a3 lda #$a300 LDA #<>DOS_SECTOR ; And the buffer +.394118 85 06 sta $0326 STA @b BIOS_BUFF_PTR +.39411a a9 38 00 lda #$0038 LDA #`DOS_SECTOR +.39411d 85 08 sta $0328 STA @b BIOS_BUFF_PTR+2 +.39411f 22 44 10 00 jsl $001044 JSL GETBLOCK ; Try to load the MBR +.394123 b0 03 bcs $394128 BCS chk_mbr_brl +.394125 82 47 00 brl $39416f BRL done ; If failed... just return +.394128 chk_mbr_brl +.394128 e2 20 sep #$20 SEP #$20 ; set A short +.39412a af 00 a3 38 lda $38a300 LDA @l DOS_SECTOR ; Check the first byte of the MBR +.39412e 80 04 bra $394134 BRA chk_brl +.394130 af 3e a3 38 lda $38a33e chk_vbr_brl LDA @l DOS_SECTOR+FDC_BOOT_START +.394134 c9 80 cmp #$80 chk_brl CMP #$80 ; Is the first byte a BRL/BRA instruction? +.394136 f0 06 beq $39413e BEQ chk_magic ; Yes: check for the magic text +.394138 c9 82 cmp #$82 CMP #$82 +.39413a f0 02 beq $39413e BEQ chk_magic +.39413c 80 31 bra $39416f BRA done ; No: just return +.39413e a2 00 00 ldx #$0000 chk_magic LDX #0 +.394141 bf 03 a3 38 lda $38a303,x magic_loop LDA @l DOS_SECTOR+3,X ; Check the "vendor" byte +.394145 df 74 41 39 cmp $394174,x CMP DOS_BOOT_MAGIC,X ; Compare it against our boot magic code +.394149 d0 24 bne $39416f BNE done ; If it's not equal, just return +.39414b e8 inx INX ; Otherwise, check the next one +.39414c e0 08 00 cpx #$0008 CPX #8 +.39414f d0 f0 bne $394141 BNE magic_loop ; Until we've checked all 8 bytes +.394151 c2 30 rep #$30 REP #$30 ; set A&X long +.394153 a9 00 02 lda #$0200 LDA #DOS_SECTOR_SIZE +.394156 a2 00 a5 ldx #$a500 LDX #<>(DOS_SECTOR+DOS_SECTOR_SIZE) +.394159 a0 00 ab ldy #$ab00 LDY #<>(DOS_BOOT_SECTOR+DOS_SECTOR_SIZE) +.39415c 44 38 38 mvp $38,$38 MVP #`DOS_SECTOR, #`DOS_BOOT_SECTOR +.39415f e2 20 sep #$20 SEP #$20 ; set A short +.394161 a5 01 lda $0321 LDA @b BIOS_DEV ; Check the device +.394163 c9 00 cmp #$00 CMP #BIOS_DEV_FDC ; Is it the FDC? +.394165 f0 04 beq $39416b BEQ jmp_fdc_start ; Yes: jump to the start of the VBR code +.394167 5c 00 a9 38 jmp $38a900 JML DOS_BOOT_SECTOR ; No: it's an MBR, start at the first byte +.39416b 5c 3e a9 38 jmp $38a93e jmp_fdc_start JML DOS_BOOT_SECTOR+FDC_BOOT_START +.39416f 28 plp done PLP +.394170 2b pld PLD +.394171 ab plb PLB +.394172 fa plx PLX +.394173 6b rtl RTL +>394174 43 32 35 36 44 4f 53 20 DOS_BOOT_MAGIC .text "C256DOS " +.39417c DOS_CALC_LBA +.39417c 8b phb PHB +.39417d 0b phd PHD +.39417e 08 php PHP +.39417f 48 pha PHA ; begin setdbr macro +.394180 08 php PHP +.394181 e2 20 sep #$20 SEP #$20 ; set A short +.394183 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.394185 48 pha PHA +.394186 ab plb PLB +.394187 28 plp PLP +.394188 68 pla PLA ; end setdbr macro +.394189 48 pha PHA ; begin setdp macro +.39418a 08 php PHP +.39418b c2 20 rep #$20 REP #$20 ; set A long +.39418d a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394190 5b tcd TCD +.394191 28 plp PLP +.394192 68 pla PLA ; end setdp macro .394193 c2 20 rep #$20 REP #$20 ; set A long -.394195 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394198 5b tcd TCD -.394199 28 plp PLP -.39419a 68 pla PLA ; end setdp macro -.39419b c2 20 rep #$20 REP #$20 ; set A long -.39419d 38 sec SEC -.39419e a5 10 lda $0330 LDA DOS_CLUS_ID ; cluster - 2 -.3941a0 e9 02 00 sbc #$0002 SBC #2 -.3941a3 85 28 sta $0348 STA DOS_TEMP -.3941a5 a5 12 lda $0332 LDA DOS_CLUS_ID+2 -.3941a7 e9 00 00 sbc #$0000 SBC #0 -.3941aa 85 2a sta $034a STA DOS_TEMP+2 -.3941ac e2 10 sep #$10 SEP #$10 ; set X short -.3941ae ae 03 a0 ldx $38a003 LDX SECTORS_PER_CLUSTER -.3941b1 e0 01 cpx #$01 mult_loop CPX #1 -.3941b3 f0 07 beq $3941bc BEQ add_offset -.3941b5 06 28 asl $0348 ASL DOS_TEMP -.3941b7 26 28 rol $0348 ROL DOS_TEMP -.3941b9 ca dex DEX -.3941ba 80 f5 bra $3941b1 BRA mult_loop -.3941bc 18 clc add_offset CLC -.3941bd a5 28 lda $0348 LDA DOS_TEMP ; cluster_being_lba + (cluster - 2) * SECTORS_PER_CLUSTER -.3941bf 6d 1c a0 adc $38a01c ADC CLUSTER_BEGIN_LBA -.3941c2 85 02 sta $0322 STA BIOS_LBA -.3941c4 a5 2a lda $034a LDA DOS_TEMP+2 -.3941c6 6d 1e a0 adc $38a01e ADC CLUSTER_BEGIN_LBA+2 -.3941c9 85 04 sta $0324 STA BIOS_LBA+2 -.3941cb 28 plp PLP -.3941cc 2b pld PLD -.3941cd ab plb PLB -.3941ce 6b rtl RTL -.3941cf DOS_GETCLUSTER -.3941cf 8b phb PHB -.3941d0 0b phd PHD -.3941d1 08 php PHP -.3941d2 48 pha PHA ; begin setdbr macro -.3941d3 08 php PHP -.3941d4 e2 20 sep #$20 SEP #$20 ; set A short -.3941d6 a9 00 lda #$00 LDA #0 -.3941d8 48 pha PHA -.3941d9 ab plb PLB -.3941da 28 plp PLP -.3941db 68 pla PLA ; end setdbr macro -.3941dc 48 pha PHA ; begin setdp macro -.3941dd 08 php PHP +.394195 38 sec SEC +.394196 a5 10 lda $0330 LDA DOS_CLUS_ID ; cluster - 2 +.394198 e9 02 00 sbc #$0002 SBC #2 +.39419b 85 28 sta $0348 STA DOS_TEMP +.39419d a5 12 lda $0332 LDA DOS_CLUS_ID+2 +.39419f e9 00 00 sbc #$0000 SBC #0 +.3941a2 85 2a sta $034a STA DOS_TEMP+2 +.3941a4 e2 10 sep #$10 SEP #$10 ; set X short +.3941a6 ae 03 a0 ldx $38a003 LDX SECTORS_PER_CLUSTER +.3941a9 e0 01 cpx #$01 mult_loop CPX #1 +.3941ab f0 07 beq $3941b4 BEQ add_offset +.3941ad 06 28 asl $0348 ASL DOS_TEMP +.3941af 26 28 rol $0348 ROL DOS_TEMP +.3941b1 ca dex DEX +.3941b2 80 f5 bra $3941a9 BRA mult_loop +.3941b4 18 clc add_offset CLC +.3941b5 a5 28 lda $0348 LDA DOS_TEMP ; cluster_being_lba + (cluster - 2) * SECTORS_PER_CLUSTER +.3941b7 6d 1c a0 adc $38a01c ADC CLUSTER_BEGIN_LBA +.3941ba 85 02 sta $0322 STA BIOS_LBA +.3941bc a5 2a lda $034a LDA DOS_TEMP+2 +.3941be 6d 1e a0 adc $38a01e ADC CLUSTER_BEGIN_LBA+2 +.3941c1 85 04 sta $0324 STA BIOS_LBA+2 +.3941c3 28 plp PLP +.3941c4 2b pld PLD +.3941c5 ab plb PLB +.3941c6 6b rtl RTL +.3941c7 DOS_GETCLUSTER +.3941c7 8b phb PHB +.3941c8 0b phd PHD +.3941c9 08 php PHP +.3941ca 48 pha PHA ; begin setdbr macro +.3941cb 08 php PHP +.3941cc e2 20 sep #$20 SEP #$20 ; set A short +.3941ce a9 00 lda #$00 LDA #0 +.3941d0 48 pha PHA +.3941d1 ab plb PLB +.3941d2 28 plp PLP +.3941d3 68 pla PLA ; end setdbr macro +.3941d4 48 pha PHA ; begin setdp macro +.3941d5 08 php PHP +.3941d6 c2 20 rep #$20 REP #$20 ; set A long +.3941d8 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3941db 5b tcd TCD +.3941dc 28 plp PLP +.3941dd 68 pla PLA ; end setdp macro .3941de c2 20 rep #$20 REP #$20 ; set A long -.3941e0 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.3941e3 5b tcd TCD -.3941e4 28 plp PLP -.3941e5 68 pla PLA ; end setdp macro -.3941e6 c2 20 rep #$20 REP #$20 ; set A long -.3941e8 a5 1c lda $033c LDA DOS_BUFF_PTR ; Set the BIOS BUFFER -.3941ea 85 06 sta $0326 STA BIOS_BUFF_PTR -.3941ec a5 1e lda $033e LDA DOS_BUFF_PTR+2 -.3941ee 85 08 sta $0328 STA BIOS_BUFF_PTR+2 -.3941f0 22 84 41 39 jsl $394184 JSL DOS_CALC_LBA ; Convert the cluster # to the first sector's LBA -.3941f4 22 44 10 00 jsl $001044 JSL GETBLOCK ; Get the first block of the cluster -.3941f8 90 09 bcc $394203 BCC ret_failure -.3941fa ret_success -.3941fa e2 20 sep #$20 SEP #$20 ; set A short -.3941fc 64 0e stz $032e STZ DOS_STATUS -.3941fe 28 plp PLP -.3941ff 2b pld PLD -.394200 ab plb PLB -.394201 38 sec SEC -.394202 6b rtl RTL -.394203 ret_failure -.394203 e2 20 sep #$20 SEP #$20 ; set A short -.394205 85 0e sta $032e STA DOS_STATUS -.394207 28 plp PLP -.394208 2b pld PLD -.394209 ab plb PLB -.39420a 18 clc CLC -.39420b 6b rtl RTL -.39420c DOS_PUTCLUSTER -.39420c 8b phb PHB -.39420d 0b phd PHD -.39420e 08 php PHP -.39420f 48 pha PHA ; begin setdbr macro -.394210 08 php PHP -.394211 e2 20 sep #$20 SEP #$20 ; set A short -.394213 a9 00 lda #$00 LDA #0 -.394215 48 pha PHA -.394216 ab plb PLB -.394217 28 plp PLP -.394218 68 pla PLA ; end setdbr macro -.394219 48 pha PHA ; begin setdp macro -.39421a 08 php PHP +.3941e0 a5 1c lda $033c LDA DOS_BUFF_PTR ; Set the BIOS BUFFER +.3941e2 85 06 sta $0326 STA BIOS_BUFF_PTR +.3941e4 a5 1e lda $033e LDA DOS_BUFF_PTR+2 +.3941e6 85 08 sta $0328 STA BIOS_BUFF_PTR+2 +.3941e8 22 7c 41 39 jsl $39417c JSL DOS_CALC_LBA ; Convert the cluster # to the first sector's LBA +.3941ec 22 44 10 00 jsl $001044 JSL GETBLOCK ; Get the first block of the cluster +.3941f0 90 09 bcc $3941fb BCC ret_failure +.3941f2 ret_success +.3941f2 e2 20 sep #$20 SEP #$20 ; set A short +.3941f4 64 0e stz $032e STZ DOS_STATUS +.3941f6 28 plp PLP +.3941f7 2b pld PLD +.3941f8 ab plb PLB +.3941f9 38 sec SEC +.3941fa 6b rtl RTL +.3941fb ret_failure +.3941fb e2 20 sep #$20 SEP #$20 ; set A short +.3941fd 85 0e sta $032e STA DOS_STATUS +.3941ff 28 plp PLP +.394200 2b pld PLD +.394201 ab plb PLB +.394202 18 clc CLC +.394203 6b rtl RTL +.394204 DOS_PUTCLUSTER +.394204 8b phb PHB +.394205 0b phd PHD +.394206 08 php PHP +.394207 48 pha PHA ; begin setdbr macro +.394208 08 php PHP +.394209 e2 20 sep #$20 SEP #$20 ; set A short +.39420b a9 00 lda #$00 LDA #0 +.39420d 48 pha PHA +.39420e ab plb PLB +.39420f 28 plp PLP +.394210 68 pla PLA ; end setdbr macro +.394211 48 pha PHA ; begin setdp macro +.394212 08 php PHP +.394213 c2 20 rep #$20 REP #$20 ; set A long +.394215 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394218 5b tcd TCD +.394219 28 plp PLP +.39421a 68 pla PLA ; end setdp macro .39421b c2 20 rep #$20 REP #$20 ; set A long -.39421d a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394220 5b tcd TCD -.394221 28 plp PLP -.394222 68 pla PLA ; end setdp macro -.394223 c2 20 rep #$20 REP #$20 ; set A long -.394225 a5 1c lda $033c LDA DOS_BUFF_PTR ; Set the BIOS BUFFER -.394227 85 06 sta $0326 STA BIOS_BUFF_PTR -.394229 a5 1e lda $033e LDA DOS_BUFF_PTR+2 -.39422b 85 08 sta $0328 STA BIOS_BUFF_PTR+2 -.39422d 22 84 41 39 jsl $394184 JSL DOS_CALC_LBA ; Convert the cluster # to the first sector's LBA -.394231 22 24 10 00 jsl $001024 JSL PUTBLOCK ; PUT the first block of the cluster -.394235 90 09 bcc $394240 BCC ret_failure -.394237 ret_success -.394237 e2 20 sep #$20 SEP #$20 ; set A short -.394239 64 0e stz $032e STZ DOS_STATUS -.39423b 28 plp PLP -.39423c 2b pld PLD -.39423d ab plb PLB -.39423e 38 sec SEC -.39423f 6b rtl RTL -.394240 ret_failure -.394240 e2 20 sep #$20 SEP #$20 ; set A short -.394242 85 0e sta $032e STA DOS_STATUS -.394244 28 plp PLP -.394245 2b pld PLD -.394246 ab plb PLB -.394247 18 clc CLC -.394248 6b rtl RTL ->394249 40 46 00 DOS_FDC_NAME .null "@F" -.39424c DOS_FDC_DESC ->39424c 49 42 39 00 DEVNAME .dword DOS_FDC_NAME ; A pointer to the ASCIIZ name of the device ->394250 00 DEVNUMBER .byte BIOS_DEV_FDC ; The BIOS_DEV number for the device ->394251 00 00 00 00 NEXT .dword 0 ; A pointer to the next device descriptor ->394255 40 53 00 DOS_SDC_NAME .null "@S" -.394258 DOS_SDC_DESC ->394258 55 42 39 00 DEVNAME .dword DOS_SDC_NAME ; A pointer to the ASCIIZ name of the device ->39425c 02 DEVNUMBER .byte BIOS_DEV_SD ; The BIOS_DEV number for the device ->39425d 4c 42 39 00 NEXT .dword DOS_FDC_DESC ; A pointer to the next device descriptor ->394261 40 48 00 DOS_HDC_NAME .null "@H" -.394264 DOS_HD_DESC ->394264 61 42 39 00 DEVNAME .dword DOS_HDC_NAME ; A pointer to the ASCIIZ name of the device ->394268 06 DEVNUMBER .byte BIOS_DEV_HD0 ; The BIOS_DEV number for the device ->394269 58 42 39 00 NEXT .dword DOS_SDC_DESC ; A pointer to the next device descriptor -.39426d DOS_PARSE_DEV -.39426d 8b phb PHB -.39426e 0b phd PHD -.39426f 08 php PHP -.394270 48 pha PHA ; begin setdbr macro -.394271 08 php PHP -.394272 e2 20 sep #$20 SEP #$20 ; set A short -.394274 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.394276 48 pha PHA -.394277 ab plb PLB -.394278 28 plp PLP -.394279 68 pla PLA ; end setdbr macro -.39427a 48 pha PHA ; begin setdp macro -.39427b 08 php PHP -.39427c c2 20 rep #$20 REP #$20 ; set A long -.39427e a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394281 5b tcd TCD -.394282 28 plp PLP -.394283 68 pla PLA ; end setdp macro -.394284 c2 30 rep #$30 REP #$30 ; set A&X long -.394286 af 4a a0 38 lda $38a04a LDA @l DOS_DEV_NAMES ; Point to the first device name to check -.39428a 85 28 sta $0348 STA DOS_TEMP -.39428c af 4c a0 38 lda $38a04c LDA @l DOS_DEV_NAMES+2 -.394290 85 2a sta $034a STA DOS_TEMP+2 -.394292 a9 00 04 lda #$0400 LDA #<>DOS_PATH_BUFF ; Make DOS_STR2_PTR point to the path to check -.394295 85 48 sta $0368 STA DOS_STR2_PTR -.394297 a9 00 00 lda #$0000 LDA #`DOS_PATH_BUFF -.39429a 85 4a sta $036a STA DOS_STR2_PTR+2 -.39429c a0 00 00 ldy #$0000 dev_loop LDY #DEVICE_DESC.DEVNAME ; Get the name of the current device into DOS_STR1_PTR -.39429f b7 28 lda [$0348],y LDA [DOS_TEMP],Y -.3942a1 85 44 sta $0364 STA DOS_STR1_PTR -.3942a3 c8 iny INY -.3942a4 c8 iny INY -.3942a5 b7 28 lda [$0348],y LDA [DOS_TEMP],Y -.3942a7 85 46 sta $0366 STA DOS_STR1_PTR+2 -.3942a9 e2 20 sep #$20 SEP #$20 ; set A short -.3942ab a0 00 00 ldy #$0000 LDY #0 -.3942ae b7 44 lda [$0364],y cmp_loop LDA [DOS_STR1_PTR],Y ; Get the Yth character of the device name -.3942b0 f0 24 beq $3942d6 BEQ found ; If it's NULL, we found a match -.3942b2 d7 48 cmp [$0368],y CMP [DOS_STR2_PTR],Y ; Compare it to the Yth character of the path -.3942b4 d0 03 bne $3942b9 BNE next_device ; If no match, try to load the next device -.3942b6 c8 iny INY ; Go to the next character -.3942b7 80 f5 bra $3942ae BRA cmp_loop -.3942b9 next_device -.3942b9 c2 20 rep #$20 REP #$20 ; set A long -.3942bb a0 05 00 ldy #$0005 LDY #DEVICE_DESC.NEXT ; DOS_TEMP := DOS_TEMP->NEXT -.3942be b7 28 lda [$0348],y LDA [DOS_TEMP],Y -.3942c0 48 pha PHA -.3942c1 c8 iny INY -.3942c2 c8 iny INY -.3942c3 b7 28 lda [$0348],y LDA [DOS_TEMP],Y -.3942c5 85 2a sta $034a STA DOS_TEMP+2 -.3942c7 68 pla PLA -.3942c8 85 28 sta $0348 STA DOS_TEMP -.3942ca a5 28 lda $0348 LDA DOS_TEMP ; Is DOS_TEMP = NULL? -.3942cc d0 ce bne $39429c BNE dev_loop ; No: check this device -.3942ce a5 2a lda $034a LDA DOS_TEMP+2 -.3942d0 d0 ca bne $39429c BNE dev_loop -.3942d2 28 plp done PLP ; Otherwise, return having not found a match -.3942d3 2b pld PLD -.3942d4 ab plb PLB -.3942d5 6b rtl RTL -.3942d6 22 e7 42 39 jsl $3942e7 found JSL DOS_ADJUSTPATH ; Remove the device name from the buffer -.3942da e2 20 sep #$20 SEP #$20 ; set A short -.3942dc a0 04 00 ldy #$0004 LDY #DEVICE_DESC.DEVNUMBER ; Set the BIOS device number from the found device -.3942df b7 28 lda [$0348],y LDA [DOS_TEMP],Y -.3942e1 8f 21 03 00 sta $000321 STA @l BIOS_DEV -.3942e5 80 eb bra $3942d2 BRA done -.3942e7 DOS_ADJUSTPATH -.3942e7 da phx PHX -.3942e8 5a phy PHY -.3942e9 8b phb PHB -.3942ea 0b phd PHD -.3942eb 08 php PHP -.3942ec 48 pha PHA ; begin setdbr macro -.3942ed 08 php PHP -.3942ee e2 20 sep #$20 SEP #$20 ; set A short -.3942f0 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.3942f2 48 pha PHA -.3942f3 ab plb PLB -.3942f4 28 plp PLP -.3942f5 68 pla PLA ; end setdbr macro -.3942f6 48 pha PHA ; begin setdp macro -.3942f7 08 php PHP -.3942f8 c2 20 rep #$20 REP #$20 ; set A long -.3942fa a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.3942fd 5b tcd TCD -.3942fe 28 plp PLP -.3942ff 68 pla PLA ; end setdp macro -.394300 c2 30 rep #$30 REP #$30 ; set A&X long -.394302 84 4b sty $036b STY DOS_SCRATCH ; Save the index to later compute the size -.394304 98 tya TYA ; Compute the address of the first source byte -.394305 18 clc CLC -.394306 69 00 04 adc #$0400 ADC #<>DOS_PATH_BUFF -.394309 aa tax TAX -.39430a a9 00 04 lda #$0400 LDA #<>DOS_PATH_BUFF ; Compute the destination address for the source byte -.39430d a8 tay TAY -.39430e 38 sec SEC ; Compute the number of bytes to copy -.39430f a9 00 01 lda #$0100 LDA #256 -.394312 e5 4b sbc $036b SBC DOS_SCRATCH -.394314 54 00 00 mvn $00,$00 MVN #`DOS_PATH_BUFF, #`DOS_PATH_BUFF -.394317 28 plp PLP -.394318 2b pld PLD -.394319 ab plb PLB -.39431a 7a ply PLY -.39431b fa plx PLX -.39431c 6b rtl RTL -.39431d DOS_PARSE_PATH -.39431d 8b phb PHB -.39431e 0b phd PHD -.39431f 08 php PHP -.394320 48 pha PHA ; begin setdbr macro -.394321 08 php PHP -.394322 e2 20 sep #$20 SEP #$20 ; set A short -.394324 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.394326 48 pha PHA -.394327 ab plb PLB -.394328 28 plp PLP -.394329 68 pla PLA ; end setdbr macro -.39432a 48 pha PHA ; begin setdp macro -.39432b 08 php PHP -.39432c c2 20 rep #$20 REP #$20 ; set A long -.39432e a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394331 5b tcd TCD -.394332 28 plp PLP -.394333 68 pla PLA ; end setdp macro -.394334 c2 10 rep #$10 REP #$10 ; set X long -.394336 e2 20 sep #$20 SEP #$20 ; set A short -.394338 a2 00 00 ldx #$0000 LDX #0 -.39433b b5 e0 lda $0400,x upcase_loop LDA DOS_PATH_BUFF,X ; Get the character -.39433d f0 1b beq $39435a BEQ parse_dev ; If it's NULL, the path is upper case, attempt to parse the device -.39433f c9 20 cmp #$20 CMP #' ' ; Is a control character? -.394341 b0 05 bcs $394348 BGE check_case ; No: check the case -.394343 a9 07 lda #$07 LDA #DOS_ERR_BADPATH ; Yes: return a bad path error -.394345 82 64 00 brl $3943ac BRL ret_failure -.394348 c9 61 cmp #$61 check_case CMP #'a' ; Is the character lower case? -.39434a 90 08 bcc $394354 BLT next_char -.39434c c9 7b cmp #$7b CMP #'z'+1 -.39434e b0 04 bcs $394354 BGE next_char -.394350 29 5f and #$5f AND #%01011111 ; Yes: Convert to uppercase -.394352 95 e0 sta $0400,x STA DOS_PATH_BUFF,X -.394354 e8 inx next_char INX ; Move to the next character -.394355 e0 00 01 cpx #$0100 CPX #$100 -.394358 d0 e1 bne $39433b BNE upcase_loop -.39435a 22 6d 42 39 jsl $39426d parse_dev JSL DOS_PARSE_DEV ; Parse and extract a device specifier ":xxx:" -.39435e a5 e0 lda $0400 LDA DOS_PATH_BUFF ; Check the first character of the path -.394360 c9 3a cmp #$3a CMP #':' -.394362 d0 07 bne $39436b BNE clr_name ; If not colon, treat it as a file name -.394364 a0 01 00 ldy #$0001 LDY #1 ; Otherwise... -.394367 22 e7 42 39 jsl $3942e7 JSL DOS_ADJUSTPATH ; For now, just remove the leading ":" -.39436b a0 00 00 ldy #$0000 clr_name LDY #0 ; Set the short name to blanks -.39436e a9 20 lda #$20 LDA #' ' -.394370 99 3a a0 sta $38a03a,y clr_loop STA DOS_SHORT_NAME,Y -.394373 c8 iny INY -.394374 c0 0b 00 cpy #$000b CPY #11 -.394377 d0 f7 bne $394370 BNE clr_loop -.394379 a2 00 00 ldx #$0000 LDX #0 -.39437c a0 00 00 ldy #$0000 LDY #0 -.39437f b5 e0 lda $0400,x cpy_name_loop LDA DOS_PATH_BUFF,X ; Get the character of the name -.394381 f0 20 beq $3943a3 BEQ ret_success ; If NULL: we've finished parsing the path -.394383 c9 2e cmp #$2e CMP #'.' ; If it's a dot, we've finished the name part -.394385 f0 0a beq $394391 BEQ cpy_ext ; And move to the extension -.394387 99 3a a0 sta $38a03a,y STA DOS_SHORT_NAME,Y ; Otherwise, store it to the name portion -.39438a e8 inx INX -.39438b c8 iny INY ; Move to the next character -.39438c c0 08 00 cpy #$0008 CPY #8 ; Have we processed 8? -.39438f d0 ee bne $39437f BNE cpy_name_loop ; No: process this one -.394391 e8 inx cpy_ext INX ; Skip the dot -.394392 a0 08 00 ldy #$0008 LDY #8 -.394395 b5 e0 lda $0400,x cpy_ext_loop LDA DOS_PATH_BUFF,X ; Get the character of the extension -.394397 f0 0a beq $3943a3 BEQ ret_success ; If it's NULL, we've finished -.394399 99 3a a0 sta $38a03a,y STA DOS_SHORT_NAME,Y ; Otherwise, copy it to the short name -.39439c e8 inx INX -.39439d c8 iny INY ; Move to the next character -.39439e c0 0b 00 cpy #$000b CPY #11 ; Have we processed the three ext characters? -.3943a1 d0 f2 bne $394395 BNE cpy_ext_loop ; No: process this one -.3943a3 ret_success -.3943a3 e2 20 sep #$20 SEP #$20 ; set A short -.3943a5 64 0e stz $032e STZ DOS_STATUS -.3943a7 28 plp PLP -.3943a8 2b pld PLD -.3943a9 ab plb PLB -.3943aa 38 sec SEC -.3943ab 6b rtl RTL -.3943ac ret_failure -.3943ac e2 20 sep #$20 SEP #$20 ; set A short -.3943ae 85 0e sta $032e STA DOS_STATUS -.3943b0 28 plp PLP -.3943b1 2b pld PLD -.3943b2 ab plb PLB -.3943b3 18 clc CLC -.3943b4 6b rtl RTL -.3943b5 DOS_FINDFILE -.3943b5 8b phb PHB -.3943b6 0b phd PHD -.3943b7 08 php PHP -.3943b8 48 pha PHA ; begin setdbr macro -.3943b9 08 php PHP -.3943ba e2 20 sep #$20 SEP #$20 ; set A short -.3943bc a9 00 lda #$00 LDA #0 -.3943be 48 pha PHA -.3943bf ab plb PLB -.3943c0 28 plp PLP -.3943c1 68 pla PLA ; end setdbr macro -.3943c2 48 pha PHA ; begin setdp macro -.3943c3 08 php PHP -.3943c4 c2 20 rep #$20 REP #$20 ; set A long -.3943c6 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.3943c9 5b tcd TCD -.3943ca 28 plp PLP -.3943cb 68 pla PLA ; end setdp macro -.3943cc c2 30 rep #$30 REP #$30 ; set A&X long -.3943ce 22 1d 43 39 jsl $39431d JSL DOS_PARSE_PATH ; Break out the path into its components -.3943d2 b0 05 bcs $3943d9 BCS mount ; If success: try to open the directory -.3943d4 28 plp pass_failure PLP ; If failure, just pass the failure back up -.3943d5 2b pld PLD -.3943d6 ab plb PLB -.3943d7 18 clc CLC -.3943d8 6b rtl RTL -.3943d9 22 37 3f 39 jsl $393f37 mount JSL DOS_MOUNT ; Try to mount the drive -.3943dd b0 07 bcs $3943e6 BCS get_directory -.3943df e2 20 sep #$20 SEP #$20 ; set A short -.3943e1 a9 17 lda #$17 LDA #DOS_ERR_NOMEDIA ; If failure: Report that we couldn't access the media -.3943e3 82 56 00 brl $39443c BRL ret_failure -.3943e6 get_directory -.3943e6 c2 20 rep #$20 REP #$20 ; set A long -.3943e8 22 ec 3b 39 jsl $393bec JSL DOS_DIROPEN ; Get the directory -.3943ec b0 07 bcs $3943f5 BCS scan_entries ; If success: start scanning the directory entries -.3943ee e2 20 sep #$20 SEP #$20 ; set A short -.3943f0 a9 08 lda #$08 LDA #DOS_ERR_NODIR ; Otherwise: return a no directory error -.3943f2 82 47 00 brl $39443c BRL ret_failure -.3943f5 22 6b 3c 39 jsl $393c6b scan_entries JSL DOS_DIRFIRST ; Move the DIR pointer to the beginning of the sector -.3943f9 scan_loop -.3943f9 e2 20 sep #$20 SEP #$20 ; set A short -.3943fb a0 00 00 ldy #$0000 LDY #0 -.3943fe b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y ; Check the directory entry -.394400 d0 05 bne $394407 BNE chk_unused ; If there's an entry, check to see if it's unused -.394402 a9 09 lda #$09 LDA #DOS_ERR_NOTFOUND ; If end-of-directory, we couldn't find a match -.394404 82 35 00 brl $39443c BRL ret_failure -.394407 c9 e5 cmp #$e5 chk_unused CMP #DOS_DIR_ENT_UNUSED ; If it's unused... -.394409 f0 26 beq $394431 BEQ next_entry ; Go to the next entry -.39440b a0 0b 00 ldy #$000b LDY #DIRENTRY.ATTRIBUTE ; Check the entry's attributes -.39440e b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y -.394410 89 08 bit #$08 BIT #DOS_ATTR_VOLUME ; Is it a volume name? -.394412 d0 1d bne $394431 BNE next_entry ; Yes: skip it! -.394414 29 0f and #$0f AND #DOS_ATTR_LONGNAME -.394416 c9 0f cmp #$0f CMP #DOS_ATTR_LONGNAME ; Is it a long name field? -.394418 f0 17 beq $394431 BEQ next_entry ; Yes: skip it! -.39441a a2 00 00 ldx #$0000 LDX #0 -.39441d a0 00 00 ldy #$0000 LDY #DIRENTRY.SHORTNAME -.394420 b7 18 lda [$0338],y scan_cmp_loop LDA [DOS_DIR_PTR],Y ; Get the X'th character of the entry -.394422 df 3a a0 38 cmp $38a03a,x CMP DOS_SHORT_NAME,X ; And compare to the X'th character of the name we want -.394426 d0 09 bne $394431 BNE next_entry ; If not equal: try the next entry -.394428 c8 iny INY ; Advance to the next character -.394429 e8 inx INX -.39442a e0 0b 00 cpx #$000b CPX #11 ; Did we reach the end of the names? -.39442d f0 16 beq $394445 BEQ match ; Yes: we have a match! -.39442f 80 ef bra $394420 BRA scan_cmp_loop ; No: keep checking -.394431 22 86 3c 39 jsl $393c86 next_entry JSL DOS_DIRNEXT ; Try to get the next directory entry -.394435 90 05 bcc $39443c BCC ret_failure ; If we're at the end of the directory, return a failure. -.394437 82 bf ff brl $3943f9 BRL scan_loop ; If found: keep scanning -.39443a a9 08 lda #$08 bad_dir LDA #DOS_ERR_NODIR ; Otherwise: fail with a NODIR error (maybe something else is better) -.39443c ret_failure -.39443c e2 20 sep #$20 SEP #$20 ; set A short -.39443e 85 0e sta $032e STA DOS_STATUS -.394440 28 plp PLP -.394441 2b pld PLD -.394442 ab plb PLB -.394443 18 clc CLC -.394444 6b rtl RTL -.394445 match -.394445 c2 20 rep #$20 REP #$20 ; set A long -.394447 a0 1a 00 ldy #$001a LDY #DIRENTRY.CLUSTER_L ; Copy the cluster number from the directory entry -.39444a b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y -.39444c 85 10 sta $0330 STA DOS_CLUS_ID ; To DOS_CLUS_ID -.39444e a0 14 00 ldy #$0014 LDY #DIRENTRY.CLUSTER_H -.394451 b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y -.394453 85 12 sta $0332 STA DOS_CLUS_ID+2 -.394455 ret_success -.394455 e2 20 sep #$20 SEP #$20 ; set A short -.394457 64 0e stz $032e STZ DOS_STATUS -.394459 28 plp PLP -.39445a 2b pld PLD -.39445b ab plb PLB -.39445c 38 sec SEC -.39445d 6b rtl RTL -.39445e DOS_READFILE -.39445e 8b phb PHB -.39445f 0b phd PHD -.394460 08 php PHP -.394461 48 pha PHA ; begin setdbr macro -.394462 08 php PHP -.394463 e2 20 sep #$20 SEP #$20 ; set A short -.394465 a9 00 lda #$00 LDA #0 -.394467 48 pha PHA -.394468 ab plb PLB -.394469 28 plp PLP -.39446a 68 pla PLA ; end setdbr macro -.39446b 48 pha PHA ; begin setdp macro -.39446c 08 php PHP -.39446d c2 20 rep #$20 REP #$20 ; set A long -.39446f a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394472 5b tcd TCD -.394473 28 plp PLP -.394474 68 pla PLA ; end setdp macro -.394475 c2 30 rep #$30 REP #$30 ; set A&X long -.394477 a5 1e lda $033e LDA DOS_BUFF_PTR+2 -.394479 48 pha PHA -.39447a a5 1c lda $033c LDA DOS_BUFF_PTR -.39447c 48 pha PHA -.39447d 22 b5 43 39 jsl $3943b5 JSL DOS_FINDFILE ; Attempt to find the file's directory entry -.394481 68 pla PLA -.394482 85 1c sta $033c STA DOS_BUFF_PTR -.394484 68 pla PLA -.394485 85 1e sta $033e STA DOS_BUFF_PTR+2 -.394487 90 0f bcc $394498 BCC pass_failure ; If found: try to load the cluster -.394489 22 cf 41 39 jsl $3941cf load_cluster JSL DOS_GETCLUSTER ; Get the first block of the cluster -.39448d 90 09 bcc $394498 BCC pass_failure ; If there's an error... pass it up the chain -.39448f ret_success -.39448f e2 20 sep #$20 SEP #$20 ; set A short -.394491 64 0e stz $032e STZ DOS_STATUS -.394493 28 plp PLP -.394494 2b pld PLD -.394495 ab plb PLB -.394496 38 sec SEC -.394497 6b rtl RTL -.394498 28 plp pass_failure PLP ; Otherwise: pass any error up the chain -.394499 2b pld PLD -.39449a ab plb PLB -.39449b 18 clc CLC -.39449c 6b rtl RTL -.39449d ENTRYFORCLUS12 -.39449d 8b phb PHB -.39449e 0b phd PHD -.39449f 08 php PHP -.3944a0 48 pha PHA ; begin setdbr macro -.3944a1 08 php PHP -.3944a2 e2 20 sep #$20 SEP #$20 ; set A short -.3944a4 a9 00 lda #$00 LDA #0 -.3944a6 48 pha PHA -.3944a7 ab plb PLB -.3944a8 28 plp PLP -.3944a9 68 pla PLA ; end setdbr macro -.3944aa 48 pha PHA ; begin setdp macro -.3944ab 08 php PHP -.3944ac c2 20 rep #$20 REP #$20 ; set A long -.3944ae a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.3944b1 5b tcd TCD -.3944b2 28 plp PLP -.3944b3 68 pla PLA ; end setdp macro -.3944b4 c2 30 rep #$30 REP #$30 ; set A&X long -.3944b6 a5 10 lda $0330 LDA DOS_CLUS_ID ; DOS_TEMP := DOS_CLUS_ID * 3 -.3944b8 0a asl a ASL A -.3944b9 85 28 sta $0348 STA DOS_TEMP -.3944bb a5 12 lda $0332 LDA DOS_CLUS_ID+2 -.3944bd 2a rol a ROL A -.3944be 85 2a sta $034a STA DOS_TEMP+2 -.3944c0 18 clc CLC -.3944c1 a5 10 lda $0330 LDA DOS_CLUS_ID -.3944c3 65 28 adc $0348 ADC DOS_TEMP -.3944c5 85 28 sta $0348 STA DOS_TEMP -.3944c7 a5 12 lda $0332 LDA DOS_CLUS_ID+2 -.3944c9 65 2a adc $034a ADC DOS_TEMP+2 -.3944cb 85 2a sta $034a STA DOS_TEMP+2 -.3944cd 46 2a lsr $034a LSR DOS_TEMP+2 ; DOS_TEMP := (DOS_CLUS_ID * 3) / 2 -.3944cf 66 28 ror $0348 ROR DOS_TEMP ; DOS_TEMP is now the offset to the cluster's entry in the FAT -.3944d1 a5 28 lda $0348 LDA DOS_TEMP ; X should be the offset within the FAT buffer -.3944d3 29 ff 03 and #$03ff AND #$003FF -.3944d6 aa tax TAX +.39421d a5 1c lda $033c LDA DOS_BUFF_PTR ; Set the BIOS BUFFER +.39421f 85 06 sta $0326 STA BIOS_BUFF_PTR +.394221 a5 1e lda $033e LDA DOS_BUFF_PTR+2 +.394223 85 08 sta $0328 STA BIOS_BUFF_PTR+2 +.394225 22 7c 41 39 jsl $39417c JSL DOS_CALC_LBA ; Convert the cluster # to the first sector's LBA +.394229 22 24 10 00 jsl $001024 JSL PUTBLOCK ; PUT the first block of the cluster +.39422d 90 09 bcc $394238 BCC ret_failure +.39422f ret_success +.39422f e2 20 sep #$20 SEP #$20 ; set A short +.394231 64 0e stz $032e STZ DOS_STATUS +.394233 28 plp PLP +.394234 2b pld PLD +.394235 ab plb PLB +.394236 38 sec SEC +.394237 6b rtl RTL +.394238 ret_failure +.394238 e2 20 sep #$20 SEP #$20 ; set A short +.39423a 85 0e sta $032e STA DOS_STATUS +.39423c 28 plp PLP +.39423d 2b pld PLD +.39423e ab plb PLB +.39423f 18 clc CLC +.394240 6b rtl RTL +>394241 40 46 00 DOS_FDC_NAME .null "@F" +.394244 DOS_FDC_DESC +>394244 41 42 39 00 DEVNAME .dword DOS_FDC_NAME ; A pointer to the ASCIIZ name of the device +>394248 00 DEVNUMBER .byte BIOS_DEV_FDC ; The BIOS_DEV number for the device +>394249 00 00 00 00 NEXT .dword 0 ; A pointer to the next device descriptor +>39424d 40 53 00 DOS_SDC_NAME .null "@S" +.394250 DOS_SDC_DESC +>394250 4d 42 39 00 DEVNAME .dword DOS_SDC_NAME ; A pointer to the ASCIIZ name of the device +>394254 02 DEVNUMBER .byte BIOS_DEV_SD ; The BIOS_DEV number for the device +>394255 44 42 39 00 NEXT .dword DOS_FDC_DESC ; A pointer to the next device descriptor +>394259 40 48 00 DOS_HDC_NAME .null "@H" +.39425c DOS_HD_DESC +>39425c 59 42 39 00 DEVNAME .dword DOS_HDC_NAME ; A pointer to the ASCIIZ name of the device +>394260 06 DEVNUMBER .byte BIOS_DEV_HD0 ; The BIOS_DEV number for the device +>394261 50 42 39 00 NEXT .dword DOS_SDC_DESC ; A pointer to the next device descriptor +.394265 DOS_PARSE_DEV +.394265 8b phb PHB +.394266 0b phd PHD +.394267 08 php PHP +.394268 48 pha PHA ; begin setdbr macro +.394269 08 php PHP +.39426a e2 20 sep #$20 SEP #$20 ; set A short +.39426c a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.39426e 48 pha PHA +.39426f ab plb PLB +.394270 28 plp PLP +.394271 68 pla PLA ; end setdbr macro +.394272 48 pha PHA ; begin setdp macro +.394273 08 php PHP +.394274 c2 20 rep #$20 REP #$20 ; set A long +.394276 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394279 5b tcd TCD +.39427a 28 plp PLP +.39427b 68 pla PLA ; end setdp macro +.39427c c2 30 rep #$30 REP #$30 ; set A&X long +.39427e af 4a a0 38 lda $38a04a LDA @l DOS_DEV_NAMES ; Point to the first device name to check +.394282 85 28 sta $0348 STA DOS_TEMP +.394284 af 4c a0 38 lda $38a04c LDA @l DOS_DEV_NAMES+2 +.394288 85 2a sta $034a STA DOS_TEMP+2 +.39428a a9 00 04 lda #$0400 LDA #<>DOS_PATH_BUFF ; Make DOS_STR2_PTR point to the path to check +.39428d 85 48 sta $0368 STA DOS_STR2_PTR +.39428f a9 00 00 lda #$0000 LDA #`DOS_PATH_BUFF +.394292 85 4a sta $036a STA DOS_STR2_PTR+2 +.394294 a0 00 00 ldy #$0000 dev_loop LDY #DEVICE_DESC.DEVNAME ; Get the name of the current device into DOS_STR1_PTR +.394297 b7 28 lda [$0348],y LDA [DOS_TEMP],Y +.394299 85 44 sta $0364 STA DOS_STR1_PTR +.39429b c8 iny INY +.39429c c8 iny INY +.39429d b7 28 lda [$0348],y LDA [DOS_TEMP],Y +.39429f 85 46 sta $0366 STA DOS_STR1_PTR+2 +.3942a1 e2 20 sep #$20 SEP #$20 ; set A short +.3942a3 a0 00 00 ldy #$0000 LDY #0 +.3942a6 b7 44 lda [$0364],y cmp_loop LDA [DOS_STR1_PTR],Y ; Get the Yth character of the device name +.3942a8 f0 24 beq $3942ce BEQ found ; If it's NULL, we found a match +.3942aa d7 48 cmp [$0368],y CMP [DOS_STR2_PTR],Y ; Compare it to the Yth character of the path +.3942ac d0 03 bne $3942b1 BNE next_device ; If no match, try to load the next device +.3942ae c8 iny INY ; Go to the next character +.3942af 80 f5 bra $3942a6 BRA cmp_loop +.3942b1 next_device +.3942b1 c2 20 rep #$20 REP #$20 ; set A long +.3942b3 a0 05 00 ldy #$0005 LDY #DEVICE_DESC.NEXT ; DOS_TEMP := DOS_TEMP->NEXT +.3942b6 b7 28 lda [$0348],y LDA [DOS_TEMP],Y +.3942b8 48 pha PHA +.3942b9 c8 iny INY +.3942ba c8 iny INY +.3942bb b7 28 lda [$0348],y LDA [DOS_TEMP],Y +.3942bd 85 2a sta $034a STA DOS_TEMP+2 +.3942bf 68 pla PLA +.3942c0 85 28 sta $0348 STA DOS_TEMP +.3942c2 a5 28 lda $0348 LDA DOS_TEMP ; Is DOS_TEMP = NULL? +.3942c4 d0 ce bne $394294 BNE dev_loop ; No: check this device +.3942c6 a5 2a lda $034a LDA DOS_TEMP+2 +.3942c8 d0 ca bne $394294 BNE dev_loop +.3942ca 28 plp done PLP ; Otherwise, return having not found a match +.3942cb 2b pld PLD +.3942cc ab plb PLB +.3942cd 6b rtl RTL +.3942ce 22 df 42 39 jsl $3942df found JSL DOS_ADJUSTPATH ; Remove the device name from the buffer +.3942d2 e2 20 sep #$20 SEP #$20 ; set A short +.3942d4 a0 04 00 ldy #$0004 LDY #DEVICE_DESC.DEVNUMBER ; Set the BIOS device number from the found device +.3942d7 b7 28 lda [$0348],y LDA [DOS_TEMP],Y +.3942d9 8f 21 03 00 sta $000321 STA @l BIOS_DEV +.3942dd 80 eb bra $3942ca BRA done +.3942df DOS_ADJUSTPATH +.3942df da phx PHX +.3942e0 5a phy PHY +.3942e1 8b phb PHB +.3942e2 0b phd PHD +.3942e3 08 php PHP +.3942e4 48 pha PHA ; begin setdbr macro +.3942e5 08 php PHP +.3942e6 e2 20 sep #$20 SEP #$20 ; set A short +.3942e8 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.3942ea 48 pha PHA +.3942eb ab plb PLB +.3942ec 28 plp PLP +.3942ed 68 pla PLA ; end setdbr macro +.3942ee 48 pha PHA ; begin setdp macro +.3942ef 08 php PHP +.3942f0 c2 20 rep #$20 REP #$20 ; set A long +.3942f2 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3942f5 5b tcd TCD +.3942f6 28 plp PLP +.3942f7 68 pla PLA ; end setdp macro +.3942f8 c2 30 rep #$30 REP #$30 ; set A&X long +.3942fa 84 4b sty $036b STY DOS_SCRATCH ; Save the index to later compute the size +.3942fc 98 tya TYA ; Compute the address of the first source byte +.3942fd 18 clc CLC +.3942fe 69 00 04 adc #$0400 ADC #<>DOS_PATH_BUFF +.394301 aa tax TAX +.394302 a9 00 04 lda #$0400 LDA #<>DOS_PATH_BUFF ; Compute the destination address for the source byte +.394305 a8 tay TAY +.394306 38 sec SEC ; Compute the number of bytes to copy +.394307 a9 00 01 lda #$0100 LDA #256 +.39430a e5 4b sbc $036b SBC DOS_SCRATCH +.39430c 54 00 00 mvn $00,$00 MVN #`DOS_PATH_BUFF, #`DOS_PATH_BUFF +.39430f 28 plp PLP +.394310 2b pld PLD +.394311 ab plb PLB +.394312 7a ply PLY +.394313 fa plx PLX +.394314 6b rtl RTL +.394315 DOS_PARSE_PATH +.394315 8b phb PHB +.394316 0b phd PHD +.394317 08 php PHP +.394318 48 pha PHA ; begin setdbr macro +.394319 08 php PHP +.39431a e2 20 sep #$20 SEP #$20 ; set A short +.39431c a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.39431e 48 pha PHA +.39431f ab plb PLB +.394320 28 plp PLP +.394321 68 pla PLA ; end setdbr macro +.394322 48 pha PHA ; begin setdp macro +.394323 08 php PHP +.394324 c2 20 rep #$20 REP #$20 ; set A long +.394326 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394329 5b tcd TCD +.39432a 28 plp PLP +.39432b 68 pla PLA ; end setdp macro +.39432c c2 10 rep #$10 REP #$10 ; set X long +.39432e e2 20 sep #$20 SEP #$20 ; set A short +.394330 a2 00 00 ldx #$0000 LDX #0 +.394333 b5 e0 lda $0400,x upcase_loop LDA DOS_PATH_BUFF,X ; Get the character +.394335 f0 1b beq $394352 BEQ parse_dev ; If it's NULL, the path is upper case, attempt to parse the device +.394337 c9 20 cmp #$20 CMP #' ' ; Is a control character? +.394339 b0 05 bcs $394340 BGE check_case ; No: check the case +.39433b a9 07 lda #$07 LDA #DOS_ERR_BADPATH ; Yes: return a bad path error +.39433d 82 64 00 brl $3943a4 BRL ret_failure +.394340 c9 61 cmp #$61 check_case CMP #'a' ; Is the character lower case? +.394342 90 08 bcc $39434c BLT next_char +.394344 c9 7b cmp #$7b CMP #'z'+1 +.394346 b0 04 bcs $39434c BGE next_char +.394348 29 5f and #$5f AND #%01011111 ; Yes: Convert to uppercase +.39434a 95 e0 sta $0400,x STA DOS_PATH_BUFF,X +.39434c e8 inx next_char INX ; Move to the next character +.39434d e0 00 01 cpx #$0100 CPX #$100 +.394350 d0 e1 bne $394333 BNE upcase_loop +.394352 22 65 42 39 jsl $394265 parse_dev JSL DOS_PARSE_DEV ; Parse and extract a device specifier ":xxx:" +.394356 a5 e0 lda $0400 LDA DOS_PATH_BUFF ; Check the first character of the path +.394358 c9 3a cmp #$3a CMP #':' +.39435a d0 07 bne $394363 BNE clr_name ; If not colon, treat it as a file name +.39435c a0 01 00 ldy #$0001 LDY #1 ; Otherwise... +.39435f 22 df 42 39 jsl $3942df JSL DOS_ADJUSTPATH ; For now, just remove the leading ":" +.394363 a0 00 00 ldy #$0000 clr_name LDY #0 ; Set the short name to blanks +.394366 a9 20 lda #$20 LDA #' ' +.394368 99 3a a0 sta $38a03a,y clr_loop STA DOS_SHORT_NAME,Y +.39436b c8 iny INY +.39436c c0 0b 00 cpy #$000b CPY #11 +.39436f d0 f7 bne $394368 BNE clr_loop +.394371 a2 00 00 ldx #$0000 LDX #0 +.394374 a0 00 00 ldy #$0000 LDY #0 +.394377 b5 e0 lda $0400,x cpy_name_loop LDA DOS_PATH_BUFF,X ; Get the character of the name +.394379 f0 20 beq $39439b BEQ ret_success ; If NULL: we've finished parsing the path +.39437b c9 2e cmp #$2e CMP #'.' ; If it's a dot, we've finished the name part +.39437d f0 0a beq $394389 BEQ cpy_ext ; And move to the extension +.39437f 99 3a a0 sta $38a03a,y STA DOS_SHORT_NAME,Y ; Otherwise, store it to the name portion +.394382 e8 inx INX +.394383 c8 iny INY ; Move to the next character +.394384 c0 08 00 cpy #$0008 CPY #8 ; Have we processed 8? +.394387 d0 ee bne $394377 BNE cpy_name_loop ; No: process this one +.394389 e8 inx cpy_ext INX ; Skip the dot +.39438a a0 08 00 ldy #$0008 LDY #8 +.39438d b5 e0 lda $0400,x cpy_ext_loop LDA DOS_PATH_BUFF,X ; Get the character of the extension +.39438f f0 0a beq $39439b BEQ ret_success ; If it's NULL, we've finished +.394391 99 3a a0 sta $38a03a,y STA DOS_SHORT_NAME,Y ; Otherwise, copy it to the short name +.394394 e8 inx INX +.394395 c8 iny INY ; Move to the next character +.394396 c0 0b 00 cpy #$000b CPY #11 ; Have we processed the three ext characters? +.394399 d0 f2 bne $39438d BNE cpy_ext_loop ; No: process this one +.39439b ret_success +.39439b e2 20 sep #$20 SEP #$20 ; set A short +.39439d 64 0e stz $032e STZ DOS_STATUS +.39439f 28 plp PLP +.3943a0 2b pld PLD +.3943a1 ab plb PLB +.3943a2 38 sec SEC +.3943a3 6b rtl RTL +.3943a4 ret_failure +.3943a4 e2 20 sep #$20 SEP #$20 ; set A short +.3943a6 85 0e sta $032e STA DOS_STATUS +.3943a8 28 plp PLP +.3943a9 2b pld PLD +.3943aa ab plb PLB +.3943ab 18 clc CLC +.3943ac 6b rtl RTL +.3943ad DOS_FINDFILE +.3943ad 8b phb PHB +.3943ae 0b phd PHD +.3943af 08 php PHP +.3943b0 48 pha PHA ; begin setdbr macro +.3943b1 08 php PHP +.3943b2 e2 20 sep #$20 SEP #$20 ; set A short +.3943b4 a9 00 lda #$00 LDA #0 +.3943b6 48 pha PHA +.3943b7 ab plb PLB +.3943b8 28 plp PLP +.3943b9 68 pla PLA ; end setdbr macro +.3943ba 48 pha PHA ; begin setdp macro +.3943bb 08 php PHP +.3943bc c2 20 rep #$20 REP #$20 ; set A long +.3943be a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3943c1 5b tcd TCD +.3943c2 28 plp PLP +.3943c3 68 pla PLA ; end setdp macro +.3943c4 c2 30 rep #$30 REP #$30 ; set A&X long +.3943c6 22 15 43 39 jsl $394315 JSL DOS_PARSE_PATH ; Break out the path into its components +.3943ca b0 05 bcs $3943d1 BCS mount ; If success: try to open the directory +.3943cc 28 plp pass_failure PLP ; If failure, just pass the failure back up +.3943cd 2b pld PLD +.3943ce ab plb PLB +.3943cf 18 clc CLC +.3943d0 6b rtl RTL +.3943d1 22 2f 3f 39 jsl $393f2f mount JSL DOS_MOUNT ; Try to mount the drive +.3943d5 b0 07 bcs $3943de BCS get_directory +.3943d7 e2 20 sep #$20 SEP #$20 ; set A short +.3943d9 a9 17 lda #$17 LDA #DOS_ERR_NOMEDIA ; If failure: Report that we couldn't access the media +.3943db 82 56 00 brl $394434 BRL ret_failure +.3943de get_directory +.3943de c2 20 rep #$20 REP #$20 ; set A long +.3943e0 22 e4 3b 39 jsl $393be4 JSL DOS_DIROPEN ; Get the directory +.3943e4 b0 07 bcs $3943ed BCS scan_entries ; If success: start scanning the directory entries +.3943e6 e2 20 sep #$20 SEP #$20 ; set A short +.3943e8 a9 08 lda #$08 LDA #DOS_ERR_NODIR ; Otherwise: return a no directory error +.3943ea 82 47 00 brl $394434 BRL ret_failure +.3943ed 22 63 3c 39 jsl $393c63 scan_entries JSL DOS_DIRFIRST ; Move the DIR pointer to the beginning of the sector +.3943f1 scan_loop +.3943f1 e2 20 sep #$20 SEP #$20 ; set A short +.3943f3 a0 00 00 ldy #$0000 LDY #0 +.3943f6 b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y ; Check the directory entry +.3943f8 d0 05 bne $3943ff BNE chk_unused ; If there's an entry, check to see if it's unused +.3943fa a9 09 lda #$09 LDA #DOS_ERR_NOTFOUND ; If end-of-directory, we couldn't find a match +.3943fc 82 35 00 brl $394434 BRL ret_failure +.3943ff c9 e5 cmp #$e5 chk_unused CMP #DOS_DIR_ENT_UNUSED ; If it's unused... +.394401 f0 26 beq $394429 BEQ next_entry ; Go to the next entry +.394403 a0 0b 00 ldy #$000b LDY #DIRENTRY.ATTRIBUTE ; Check the entry's attributes +.394406 b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y +.394408 89 08 bit #$08 BIT #DOS_ATTR_VOLUME ; Is it a volume name? +.39440a d0 1d bne $394429 BNE next_entry ; Yes: skip it! +.39440c 29 0f and #$0f AND #DOS_ATTR_LONGNAME +.39440e c9 0f cmp #$0f CMP #DOS_ATTR_LONGNAME ; Is it a long name field? +.394410 f0 17 beq $394429 BEQ next_entry ; Yes: skip it! +.394412 a2 00 00 ldx #$0000 LDX #0 +.394415 a0 00 00 ldy #$0000 LDY #DIRENTRY.SHORTNAME +.394418 b7 18 lda [$0338],y scan_cmp_loop LDA [DOS_DIR_PTR],Y ; Get the X'th character of the entry +.39441a df 3a a0 38 cmp $38a03a,x CMP DOS_SHORT_NAME,X ; And compare to the X'th character of the name we want +.39441e d0 09 bne $394429 BNE next_entry ; If not equal: try the next entry +.394420 c8 iny INY ; Advance to the next character +.394421 e8 inx INX +.394422 e0 0b 00 cpx #$000b CPX #11 ; Did we reach the end of the names? +.394425 f0 16 beq $39443d BEQ match ; Yes: we have a match! +.394427 80 ef bra $394418 BRA scan_cmp_loop ; No: keep checking +.394429 22 7e 3c 39 jsl $393c7e next_entry JSL DOS_DIRNEXT ; Try to get the next directory entry +.39442d 90 05 bcc $394434 BCC ret_failure ; If we're at the end of the directory, return a failure. +.39442f 82 bf ff brl $3943f1 BRL scan_loop ; If found: keep scanning +.394432 a9 08 lda #$08 bad_dir LDA #DOS_ERR_NODIR ; Otherwise: fail with a NODIR error (maybe something else is better) +.394434 ret_failure +.394434 e2 20 sep #$20 SEP #$20 ; set A short +.394436 85 0e sta $032e STA DOS_STATUS +.394438 28 plp PLP +.394439 2b pld PLD +.39443a ab plb PLB +.39443b 18 clc CLC +.39443c 6b rtl RTL +.39443d match +.39443d c2 20 rep #$20 REP #$20 ; set A long +.39443f a0 1a 00 ldy #$001a LDY #DIRENTRY.CLUSTER_L ; Copy the cluster number from the directory entry +.394442 b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y +.394444 85 10 sta $0330 STA DOS_CLUS_ID ; To DOS_CLUS_ID +.394446 a0 14 00 ldy #$0014 LDY #DIRENTRY.CLUSTER_H +.394449 b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y +.39444b 85 12 sta $0332 STA DOS_CLUS_ID+2 +.39444d ret_success +.39444d e2 20 sep #$20 SEP #$20 ; set A short +.39444f 64 0e stz $032e STZ DOS_STATUS +.394451 28 plp PLP +.394452 2b pld PLD +.394453 ab plb PLB +.394454 38 sec SEC +.394455 6b rtl RTL +.394456 DOS_READFILE +.394456 8b phb PHB +.394457 0b phd PHD +.394458 08 php PHP +.394459 48 pha PHA ; begin setdbr macro +.39445a 08 php PHP +.39445b e2 20 sep #$20 SEP #$20 ; set A short +.39445d a9 00 lda #$00 LDA #0 +.39445f 48 pha PHA +.394460 ab plb PLB +.394461 28 plp PLP +.394462 68 pla PLA ; end setdbr macro +.394463 48 pha PHA ; begin setdp macro +.394464 08 php PHP +.394465 c2 20 rep #$20 REP #$20 ; set A long +.394467 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.39446a 5b tcd TCD +.39446b 28 plp PLP +.39446c 68 pla PLA ; end setdp macro +.39446d c2 30 rep #$30 REP #$30 ; set A&X long +.39446f a5 1e lda $033e LDA DOS_BUFF_PTR+2 +.394471 48 pha PHA +.394472 a5 1c lda $033c LDA DOS_BUFF_PTR +.394474 48 pha PHA +.394475 22 ad 43 39 jsl $3943ad JSL DOS_FINDFILE ; Attempt to find the file's directory entry +.394479 68 pla PLA +.39447a 85 1c sta $033c STA DOS_BUFF_PTR +.39447c 68 pla PLA +.39447d 85 1e sta $033e STA DOS_BUFF_PTR+2 +.39447f 90 0f bcc $394490 BCC pass_failure ; If found: try to load the cluster +.394481 22 c7 41 39 jsl $3941c7 load_cluster JSL DOS_GETCLUSTER ; Get the first block of the cluster +.394485 90 09 bcc $394490 BCC pass_failure ; If there's an error... pass it up the chain +.394487 ret_success +.394487 e2 20 sep #$20 SEP #$20 ; set A short +.394489 64 0e stz $032e STZ DOS_STATUS +.39448b 28 plp PLP +.39448c 2b pld PLD +.39448d ab plb PLB +.39448e 38 sec SEC +.39448f 6b rtl RTL +.394490 28 plp pass_failure PLP ; Otherwise: pass any error up the chain +.394491 2b pld PLD +.394492 ab plb PLB +.394493 18 clc CLC +.394494 6b rtl RTL +.394495 ENTRYFORCLUS12 +.394495 8b phb PHB +.394496 0b phd PHD +.394497 08 php PHP +.394498 48 pha PHA ; begin setdbr macro +.394499 08 php PHP +.39449a e2 20 sep #$20 SEP #$20 ; set A short +.39449c a9 00 lda #$00 LDA #0 +.39449e 48 pha PHA +.39449f ab plb PLB +.3944a0 28 plp PLP +.3944a1 68 pla PLA ; end setdbr macro +.3944a2 48 pha PHA ; begin setdp macro +.3944a3 08 php PHP +.3944a4 c2 20 rep #$20 REP #$20 ; set A long +.3944a6 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3944a9 5b tcd TCD +.3944aa 28 plp PLP +.3944ab 68 pla PLA ; end setdp macro +.3944ac c2 30 rep #$30 REP #$30 ; set A&X long +.3944ae a5 10 lda $0330 LDA DOS_CLUS_ID ; DOS_TEMP := DOS_CLUS_ID * 3 +.3944b0 0a asl a ASL A +.3944b1 85 28 sta $0348 STA DOS_TEMP +.3944b3 a5 12 lda $0332 LDA DOS_CLUS_ID+2 +.3944b5 2a rol a ROL A +.3944b6 85 2a sta $034a STA DOS_TEMP+2 +.3944b8 18 clc CLC +.3944b9 a5 10 lda $0330 LDA DOS_CLUS_ID +.3944bb 65 28 adc $0348 ADC DOS_TEMP +.3944bd 85 28 sta $0348 STA DOS_TEMP +.3944bf a5 12 lda $0332 LDA DOS_CLUS_ID+2 +.3944c1 65 2a adc $034a ADC DOS_TEMP+2 +.3944c3 85 2a sta $034a STA DOS_TEMP+2 +.3944c5 46 2a lsr $034a LSR DOS_TEMP+2 ; DOS_TEMP := (DOS_CLUS_ID * 3) / 2 +.3944c7 66 28 ror $0348 ROR DOS_TEMP ; DOS_TEMP is now the offset to the cluster's entry in the FAT +.3944c9 a5 28 lda $0348 LDA DOS_TEMP ; X should be the offset within the FAT buffer +.3944cb 29 ff 03 and #$03ff AND #$003FF +.3944ce aa tax TAX +.3944cf 46 2a lsr $034a LSR DOS_TEMP+2 ; DOS_TEMP := DOS_TEMP / 512 +.3944d1 66 28 ror $0348 ROR DOS_TEMP +.3944d3 46 2a lsr $034a LSR DOS_TEMP+2 ; DOS_TEMP := DOS_TEMP / 512 +.3944d5 66 28 ror $0348 ROR DOS_TEMP .3944d7 46 2a lsr $034a LSR DOS_TEMP+2 ; DOS_TEMP := DOS_TEMP / 512 .3944d9 66 28 ror $0348 ROR DOS_TEMP .3944db 46 2a lsr $034a LSR DOS_TEMP+2 ; DOS_TEMP := DOS_TEMP / 512 @@ -8180,2596 +8185,2592 @@ .3944ed 66 28 ror $0348 ROR DOS_TEMP .3944ef 46 2a lsr $034a LSR DOS_TEMP+2 ; DOS_TEMP := DOS_TEMP / 512 .3944f1 66 28 ror $0348 ROR DOS_TEMP -.3944f3 46 2a lsr $034a LSR DOS_TEMP+2 ; DOS_TEMP := DOS_TEMP / 512 -.3944f5 66 28 ror $0348 ROR DOS_TEMP -.3944f7 46 2a lsr $034a LSR DOS_TEMP+2 ; DOS_TEMP := DOS_TEMP / 512 -.3944f9 66 28 ror $0348 ROR DOS_TEMP -.3944fb 18 clc CLC ; DOS_FAT_LBA should be the LBA of the first FAT sector we need -.3944fc af 14 a0 38 lda $38a014 LDA FAT_BEGIN_LBA -.394500 65 28 adc $0348 ADC DOS_TEMP -.394502 85 24 sta $0344 STA DOS_FAT_LBA -.394504 af 16 a0 38 lda $38a016 LDA FAT_BEGIN_LBA+2 -.394508 65 2a adc $034a ADC DOS_TEMP+2 -.39450a 85 26 sta $0346 STA DOS_FAT_LBA+2 -.39450c 28 plp PLP -.39450d 2b pld PLD -.39450e ab plb PLB -.39450f 6b rtl RTL -.394510 FATFORCLUSTER12 -.394510 8b phb PHB -.394511 0b phd PHD -.394512 08 php PHP -.394513 48 pha PHA ; begin setdbr macro -.394514 08 php PHP -.394515 e2 20 sep #$20 SEP #$20 ; set A short -.394517 a9 00 lda #$00 LDA #0 -.394519 48 pha PHA -.39451a ab plb PLB -.39451b 28 plp PLP -.39451c 68 pla PLA ; end setdbr macro -.39451d 48 pha PHA ; begin setdp macro -.39451e 08 php PHP -.39451f c2 20 rep #$20 REP #$20 ; set A long -.394521 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394524 5b tcd TCD -.394525 28 plp PLP -.394526 68 pla PLA ; end setdp macro -.394527 c2 30 rep #$30 REP #$30 ; set A&X long -.394529 a2 00 00 ldx #$0000 LDX #0 -.39452c a9 5a 5a lda #$5a5a LDA #$5A5A -.39452f 8f 00 a5 38 sta $38a500 clr_loop STA DOS_FAT_SECTORS -.394533 e8 inx INX -.394534 e8 inx INX -.394535 e0 00 04 cpx #$0400 CPX #1024 -.394538 d0 f5 bne $39452f BNE clr_loop -.39453a 22 9d 44 39 jsl $39449d JSL ENTRYFORCLUS12 ; Calculate the LBA -.39453e a5 24 lda $0344 LDA DOS_FAT_LBA ; Point to the desired sector in the FAT -.394540 85 02 sta $0322 STA BIOS_LBA -.394542 a5 26 lda $0346 LDA DOS_FAT_LBA+2 -.394544 85 04 sta $0324 STA BIOS_LBA+2 -.394546 a9 00 a5 lda #$a500 LDA #<>DOS_FAT_SECTORS ; Point to the first 512 bytes of the FAT buffer -.394549 85 06 sta $0326 STA BIOS_BUFF_PTR -.39454b a9 38 00 lda #$0038 LDA #`DOS_FAT_SECTORS -.39454e 85 08 sta $0328 STA BIOS_BUFF_PTR+2 -.394550 22 44 10 00 jsl $001044 JSL GETBLOCK ; Attempt to load the first FAT sector -.394554 90 17 bcc $39456d BCC error -.394556 e6 02 inc $0322 INC BIOS_LBA ; Move to the next sector -.394558 a9 00 a7 lda #$a700 LDA #<>DOS_FAT_SECTORS+512 ; And point to the second 512 bytes of teh FAT buffer -.39455b 85 06 sta $0326 STA BIOS_BUFF_PTR -.39455d a9 38 00 lda #$0038 LDA #`DOS_FAT_SECTORS -.394560 85 08 sta $0328 STA BIOS_BUFF_PTR+2 -.394562 22 44 10 00 jsl $001044 JSL GETBLOCK ; Attempt to load the first FAT sector -.394566 90 05 bcc $39456d BCC error -.394568 28 plp PLP -.394569 2b pld PLD -.39456a ab plb PLB -.39456b 38 sec SEC -.39456c 6b rtl RTL -.39456d error -.39456d e2 20 sep #$20 SEP #$20 ; set A short -.39456f a9 06 lda #$06 LDA #DOS_ERR_FAT -.394571 85 0e sta $032e STA DOS_STATUS -.394573 28 plp PLP -.394574 2b pld PLD -.394575 ab plb PLB -.394576 18 clc CLC -.394577 6b rtl RTL -.394578 FATFORCLUSTER32 -.394578 8b phb PHB -.394579 0b phd PHD -.39457a 48 pha PHA ; begin setdbr macro -.39457b 08 php PHP -.39457c e2 20 sep #$20 SEP #$20 ; set A short -.39457e a9 00 lda #$00 LDA #0 -.394580 48 pha PHA -.394581 ab plb PLB -.394582 28 plp PLP -.394583 68 pla PLA ; end setdbr macro -.394584 48 pha PHA ; begin setdp macro -.394585 08 php PHP -.394586 c2 20 rep #$20 REP #$20 ; set A long -.394588 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.39458b 5b tcd TCD -.39458c 28 plp PLP -.39458d 68 pla PLA ; end setdp macro -.39458e c2 30 rep #$30 REP #$30 ; set A&X long -.394590 a5 10 lda $0330 LDA DOS_CLUS_ID -.394592 85 24 sta $0344 STA DOS_FAT_LBA -.394594 a5 12 lda $0332 LDA DOS_CLUS_ID+2 -.394596 85 26 sta $0346 STA DOS_FAT_LBA+2 -.394598 a2 07 00 ldx #$0007 LDX #7 -.39459b 46 26 lsr $0346 div_loop LSR DOS_FAT_LBA+2 -.39459d 66 24 ror $0344 ROR DOS_FAT_LBA -.39459f ca dex DEX -.3945a0 d0 f9 bne $39459b BNE div_loop -.3945a2 18 clc CLC -.3945a3 a5 24 lda $0344 LDA DOS_FAT_LBA -.3945a5 6f 14 a0 38 adc $38a014 ADC FAT_BEGIN_LBA -.3945a9 85 24 sta $0344 STA DOS_FAT_LBA -.3945ab a5 26 lda $0346 LDA DOS_FAT_LBA+2 -.3945ad 6f 16 a0 38 adc $38a016 ADC FAT_BEGIN_LBA+2 -.3945b1 85 26 sta $0346 STA DOS_FAT_LBA+2 -.3945b3 a5 24 lda $0344 LDA DOS_FAT_LBA ; We want to load the FAT sector -.3945b5 85 02 sta $0322 STA BIOS_LBA -.3945b7 a5 26 lda $0346 LDA DOS_FAT_LBA+2 -.3945b9 85 04 sta $0324 STA BIOS_LBA+2 -.3945bb a9 00 a5 lda #$a500 LDA #<>DOS_FAT_SECTORS ; We want to load the FAT sector in DOS_FAT_SECTORS -.3945be 85 06 sta $0326 STA BIOS_BUFF_PTR -.3945c0 a9 38 00 lda #$0038 LDA #`DOS_FAT_SECTORS -.3945c3 85 08 sta $0328 STA BIOS_BUFF_PTR+2 -.3945c5 22 44 10 00 jsl $001044 JSL GETBLOCK ; Load the FAT entry -.3945c9 b0 06 bcs $3945d1 BCS find_entry -.3945cb e2 20 sep #$20 SEP #$20 ; set A short -.3945cd a9 06 lda #$06 LDA #DOS_ERR_FAT -.3945cf 80 0e bra $3945df BRA ret_failure -.3945d1 find_entry -.3945d1 c2 20 rep #$20 REP #$20 ; set A long -.3945d3 a5 10 lda $0330 LDA DOS_CLUS_ID -.3945d5 0a asl a ASL A -.3945d6 0a asl a ASL A ; * 4 -.3945d7 29 ff 01 and #$01ff AND #$1FF ; DOS_CLUS_ID MOD 512 -.3945da aa tax TAX ; X should be the offset within the sector -.3945db 2b pld ret_success PLD -.3945dc ab plb PLB -.3945dd 38 sec SEC ; return success -.3945de 6b rtl RTL -.3945df 2b pld ret_failure PLD -.3945e0 ab plb PLB -.3945e1 18 clc CLC ; Return failure -.3945e2 6b rtl RTL -.3945e3 NEXTCLUSTER -.3945e3 08 php PHP -.3945e4 e2 20 sep #$20 SEP #$20 ; set A short -.3945e6 af 01 a0 38 lda $38a001 LDA @l FILE_SYSTEM ; Get the file system code -.3945ea c9 00 cmp #$00 CMP #PART_TYPE_FAT12 ; Is it FAT12? -.3945ec d0 08 bne $3945f6 BNE fat32 ; No: assume it's FAT32 -.3945ee 22 04 46 39 jsl $394604 fat12 JSL NEXTCLUSTER12 ; Lookup the next cluster from FAT12 -.3945f2 90 0d bcc $394601 BCC pass_failure ; If there was an error, pass it up the chain -.3945f4 80 06 bra $3945fc BRA ret_success -.3945f6 22 6c 46 39 jsl $39466c fat32 JSL NEXTCLUSTER32 ; Lookup the next cluster from FAT32 -.3945fa 90 05 bcc $394601 BCC pass_failure ; If there was an error, pass it up the chain -.3945fc 64 0e stz $032e ret_success STZ DOS_STATUS -.3945fe 28 plp PLP -.3945ff 38 sec SEC -.394600 6b rtl RTL -.394601 28 plp pass_failure PLP -.394602 18 clc CLC -.394603 6b rtl RTL -.394604 NEXTCLUSTER12 -.394604 8b phb PHB -.394605 0b phd PHD -.394606 08 php PHP -.394607 48 pha PHA ; begin setdbr macro -.394608 08 php PHP -.394609 e2 20 sep #$20 SEP #$20 ; set A short -.39460b a9 00 lda #$00 LDA #0 -.39460d 48 pha PHA -.39460e ab plb PLB -.39460f 28 plp PLP -.394610 68 pla PLA ; end setdbr macro -.394611 48 pha PHA ; begin setdp macro -.394612 08 php PHP -.394613 c2 20 rep #$20 REP #$20 ; set A long -.394615 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394618 5b tcd TCD -.394619 28 plp PLP -.39461a 68 pla PLA ; end setdp macro -.39461b c2 30 rep #$30 REP #$30 ; set A&X long -.39461d 22 10 45 39 jsl $394510 JSL FATFORCLUSTER12 ; Attempt to load the FAT entries -.394621 b0 03 bcs $394626 BCS chk_clus_id -.394623 82 41 00 brl $394667 BRL pass_failure -.394626 a5 10 lda $0330 chk_clus_id LDA DOS_CLUS_ID ; Check the cluster ID... -.394628 89 01 00 bit #$0001 BIT #1 ; Is it odd? -.39462b d0 0d bne $39463a BNE is_odd ; Yes: calculate the next cluster for odd -.39462d is_even -.39462d c2 20 rep #$20 REP #$20 ; set A long -.39462f bf 00 a5 38 lda $38a500,x LDA DOS_FAT_SECTORS,X ; DOS_CLUS_ID := DOS_FAT_SECTORS[X] & $0FFF -.394633 29 ff 0f and #$0fff AND #$0FFF -.394636 85 28 sta $0348 STA DOS_TEMP -.394638 80 0c bra $394646 BRA check_id -.39463a is_odd -.39463a c2 20 rep #$20 REP #$20 ; set A long -.39463c bf 00 a5 38 lda $38a500,x LDA DOS_FAT_SECTORS,X ; DOS_CLUS_ID := DOS_FAT_SECTORS[X] >> 4 -.394640 4a lsr a LSR A -.394641 4a lsr a LSR A -.394642 4a lsr a LSR A -.394643 4a lsr a LSR A -.394644 85 28 sta $0348 STA DOS_TEMP -.394646 check_id -.394646 c2 20 rep #$20 REP #$20 ; set A long -.394648 a5 28 lda $0348 LDA DOS_TEMP ; Check the new cluster ID we got -.39464a 29 f0 0f and #$0ff0 AND #$0FF0 ; Is it in the range $0FF0 -- $0FFF? -.39464d c9 f0 0f cmp #$0ff0 CMP #$0FF0 -.394650 f0 0f beq $394661 BEQ no_more ; Yes: return that we've reached the end of the chain -.394652 a5 28 lda $0348 LDA DOS_TEMP ; Restore the "current" cluster ID -.394654 85 10 sta $0330 STA DOS_CLUS_ID -.394656 64 12 stz $0332 STZ DOS_CLUS_ID+2 -.394658 ret_success -.394658 e2 20 sep #$20 SEP #$20 ; set A short -.39465a 64 0e stz $032e STZ DOS_STATUS -.39465c 28 plp PLP -.39465d 2b pld PLD -.39465e ab plb PLB -.39465f 38 sec SEC -.394660 6b rtl RTL -.394661 no_more -.394661 e2 20 sep #$20 SEP #$20 ; set A short -.394663 a9 0a lda #$0a LDA #DOS_ERR_NOCLUSTER -.394665 85 0e sta $032e STA DOS_STATUS -.394667 28 plp pass_failure PLP -.394668 2b pld PLD -.394669 ab plb PLB -.39466a 18 clc CLC -.39466b 6b rtl RTL -.39466c NEXTCLUSTER32 -.39466c 8b phb PHB -.39466d 0b phd PHD -.39466e 08 php PHP -.39466f 48 pha PHA ; begin setdbr macro -.394670 08 php PHP -.394671 e2 20 sep #$20 SEP #$20 ; set A short -.394673 a9 00 lda #$00 LDA #0 -.394675 48 pha PHA -.394676 ab plb PLB -.394677 28 plp PLP -.394678 68 pla PLA ; end setdbr macro -.394679 48 pha PHA ; begin setdp macro -.39467a 08 php PHP -.39467b c2 20 rep #$20 REP #$20 ; set A long -.39467d a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394680 5b tcd TCD -.394681 28 plp PLP -.394682 68 pla PLA ; end setdp macro -.394683 c2 30 rep #$30 REP #$30 ; set A&X long -.394685 22 78 45 39 jsl $394578 JSL FATFORCLUSTER32 ; Get the FAT entry for this cluster -.394689 90 53 bcc $3946de BCC ret_failure ; If it did not work, return the error -.39468b e2 20 sep #$20 SEP #$20 ; set A short -.39468d bf 00 a5 38 lda $38a500,x LDA @l DOS_FAT_SECTORS,X ; Get the entry and copy it to DOS_TEMP -.394691 85 28 sta $0348 STA DOS_TEMP -.394693 bf 01 a5 38 lda $38a501,x LDA @l DOS_FAT_SECTORS+1,X -.394697 85 29 sta $0349 STA DOS_TEMP+1 -.394699 bf 02 a5 38 lda $38a502,x LDA @l DOS_FAT_SECTORS+2,X -.39469d 85 2a sta $034a STA DOS_TEMP+2 -.39469f bf 03 a5 38 lda $38a503,x LDA @l DOS_FAT_SECTORS+3,X -.3946a3 85 2b sta $034b STA DOS_TEMP+3 -.3946a5 a5 28 lda $0348 xxxx LDA DOS_TEMP ; Is DOS_TEMP = $FFFFFFFF? -.3946a7 c9 ff cmp #$ff CMP #$FF -.3946a9 d0 18 bne $3946c3 BNE found_next -.3946ab a5 29 lda $0349 LDA DOS_TEMP+1 -.3946ad c9 ff cmp #$ff CMP #$FF -.3946af d0 12 bne $3946c3 BNE found_next -.3946b1 a5 2a lda $034a LDA DOS_TEMP+2 -.3946b3 c9 ff cmp #$ff CMP #$FF -.3946b5 d0 0c bne $3946c3 BNE found_next -.3946b7 a5 2b lda $034b LDA DOS_TEMP+3 -.3946b9 c9 0f cmp #$0f CMP #$0F -.3946bb d0 06 bne $3946c3 BNE found_next ; No: return this cluster as the next -.3946bd e2 20 sep #$20 SEP #$20 ; set A short -.3946bf a9 0a lda #$0a LDA #DOS_ERR_NOCLUSTER ; Yes: return that there are no more clusters -.3946c1 80 1b bra $3946de BRA ret_failure -.3946c3 found_next -.3946c3 e2 20 sep #$20 SEP #$20 ; set A short -.3946c5 a5 28 lda $0348 LDA DOS_TEMP ; No: return DOS_TEMP as the new DOS_CLUS_ID -.3946c7 85 10 sta $0330 STA DOS_CLUS_ID -.3946c9 a5 29 lda $0349 LDA DOS_TEMP+1 -.3946cb 85 11 sta $0331 STA DOS_CLUS_ID+1 -.3946cd a5 2a lda $034a LDA DOS_TEMP+2 -.3946cf 85 12 sta $0332 STA DOS_CLUS_ID+2 -.3946d1 a5 2b lda $034b LDA DOS_TEMP+3 -.3946d3 85 13 sta $0333 STA DOS_CLUS_ID+3 -.3946d5 ret_success -.3946d5 e2 20 sep #$20 SEP #$20 ; set A short -.3946d7 64 0e stz $032e STZ DOS_STATUS ; Record success -.3946d9 28 plp PLP -.3946da 2b pld PLD -.3946db ab plb PLB -.3946dc 38 sec SEC -.3946dd 6b rtl RTL -.3946de ret_failure -.3946de e2 20 sep #$20 SEP #$20 ; set A short -.3946e0 85 0e sta $032e STA DOS_STATUS ; Record the error condition -.3946e2 28 plp PLP -.3946e3 2b pld PLD -.3946e4 ab plb PLB -.3946e5 18 clc CLC -.3946e6 6b rtl RTL -.3946e7 DOS_READNEXT -.3946e7 08 php PHP -.3946e8 c2 30 rep #$30 REP #$30 ; set A&X long -.3946ea 22 e3 45 39 jsl $3945e3 JSL NEXTCLUSTER ; Attempt to find the next cluster in the FAT -.3946ee 90 09 bcc $3946f9 BCC pass_failure ; If nothing found: pass the failure up the chain -.3946f0 22 cf 41 39 jsl $3941cf JSL DOS_GETCLUSTER ; Otherwise: attempt to read the cluster -.3946f4 90 03 bcc $3946f9 BCC pass_failure ; If nothing read: pass the failure up the chain -.3946f6 28 plp ret_success PLP -.3946f7 38 sec SEC -.3946f8 6b rtl RTL -.3946f9 28 plp pass_failure PLP -.3946fa 18 clc CLC -.3946fb 6b rtl RTL -.3946fc DOS_FREECLUS -.3946fc 08 php PHP -.3946fd 48 pha PHA ; begin setdp macro -.3946fe 08 php PHP -.3946ff c2 20 rep #$20 REP #$20 ; set A long -.394701 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394704 5b tcd TCD -.394705 28 plp PLP -.394706 68 pla PLA ; end setdp macro -.394707 e2 20 sep #$20 SEP #$20 ; set A short -.394709 af 01 a0 38 lda $38a001 LDA @l FILE_SYSTEM ; Get the file system code -.39470d c9 00 cmp #$00 CMP #PART_TYPE_FAT12 ; Is it FAT12? -.39470f d0 08 bne $394719 BNE fat32 ; No: assume it's FAT32 -.394711 22 8d 47 39 jsl $39478d fat12 JSL DOS_FREECLUS12 ; Find the next free cluster from FAT12 -.394715 90 0d bcc $394724 BCC pass_failure ; If there was an error, pass it up the chain -.394717 80 06 bra $39471f BRA ret_success -.394719 22 65 48 39 jsl $394865 fat32 JSL DOS_FREECLUS32 ; Find the next free cluster from FAT32 -.39471d 90 05 bcc $394724 BCC pass_failure ; If there was an error, pass it up the chain -.39471f 64 0e stz $032e ret_success STZ DOS_STATUS -.394721 28 plp PLP -.394722 38 sec SEC -.394723 6b rtl RTL -.394724 28 plp pass_failure PLP -.394725 18 clc CLC -.394726 6b rtl RTL -.394727 FDC_READ2FAT12 -.394727 8b phb PHB -.394728 0b phd PHD -.394729 08 php PHP -.39472a 48 pha PHA ; begin setdbr macro -.39472b 08 php PHP -.39472c e2 20 sep #$20 SEP #$20 ; set A short -.39472e a9 00 lda #$00 LDA #0 -.394730 48 pha PHA -.394731 ab plb PLB -.394732 28 plp PLP -.394733 68 pla PLA ; end setdbr macro -.394734 48 pha PHA ; begin setdp macro -.394735 08 php PHP -.394736 c2 20 rep #$20 REP #$20 ; set A long -.394738 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.39473b 5b tcd TCD -.39473c 28 plp PLP -.39473d 68 pla PLA ; end setdp macro -.39473e c2 30 rep #$30 REP #$30 ; set A&X long -.394740 a9 00 a5 lda #$a500 LDA #<>DOS_FAT_SECTORS ; Set the location to store the sector -.394743 85 06 sta $0326 STA BIOS_BUFF_PTR -.394745 a9 38 00 lda #$0038 LDA #`DOS_FAT_SECTORS -.394748 85 08 sta $0328 STA BIOS_BUFF_PTR+2 -.39474a a5 24 lda $0344 LDA DOS_FAT_LBA -.39474c 85 02 sta $0322 STA BIOS_LBA -.39474e a5 26 lda $0346 LDA DOS_FAT_LBA+2 -.394750 85 04 sta $0324 STA BIOS_LBA+2 -.394752 22 44 10 00 jsl $001044 JSL GETBLOCK ; Read the first sector -.394756 b0 07 bcs $39475f BCS inc_sect2 ; If success: start getting the second sector -.394758 e2 20 sep #$20 SEP #$20 ; set A short -.39475a a9 06 lda #$06 LDA #DOS_ERR_FAT -.39475c 82 1c 00 brl $39477b BRL ret_failure -.39475f inc_sect2 -.39475f c2 20 rep #$20 REP #$20 ; set A long -.394761 e6 02 inc $0322 INC BIOS_LBA ; Move to the next sector -.394763 d0 02 bne $394767 BNE inc_buff_ptr -.394765 e6 04 inc $0324 INC BIOS_LBA+2 -.394767 a9 00 a7 lda #$a700 inc_buff_ptr LDA #<>(DOS_FAT_SECTORS+DOS_SECTOR_SIZE) -.39476a 85 06 sta $0326 STA BIOS_BUFF_PTR -.39476c a9 38 00 lda #$0038 LDA #`(DOS_FAT_SECTORS+DOS_SECTOR_SIZE) -.39476f 85 08 sta $0328 STA BIOS_BUFF_PTR+2 -.394771 22 44 10 00 jsl $001044 JSL GETBLOCK ; Read the second sector -.394775 b0 0d bcs $394784 BCS ret_success ; If success, return success -.394777 e2 20 sep #$20 SEP #$20 ; set A short -.394779 a9 06 lda #$06 LDA #DOS_ERR_FAT -.39477b ret_failure -.39477b e2 20 sep #$20 SEP #$20 ; set A short -.39477d 85 00 sta $0320 STA BIOS_STATUS -.39477f 28 plp PLP -.394780 2b pld PLD -.394781 ab plb PLB -.394782 18 clc CLC -.394783 6b rtl RTL -.394784 ret_success -.394784 e2 20 sep #$20 SEP #$20 ; set A short -.394786 64 00 stz $0320 STZ BIOS_STATUS -.394788 28 plp PLP -.394789 2b pld PLD -.39478a ab plb PLB -.39478b 38 sec SEC -.39478c 6b rtl RTL -.39478d DOS_FREECLUS12 -.39478d da phx PHX -.39478e 8b phb PHB -.39478f 0b phd PHD -.394790 08 php PHP -.394791 48 pha PHA ; begin setdbr macro -.394792 08 php PHP -.394793 e2 20 sep #$20 SEP #$20 ; set A short -.394795 a9 00 lda #$00 LDA #0 -.394797 48 pha PHA -.394798 ab plb PLB -.394799 28 plp PLP -.39479a 68 pla PLA ; end setdbr macro -.39479b 48 pha PHA ; begin setdp macro -.39479c 08 php PHP -.39479d c2 20 rep #$20 REP #$20 ; set A long -.39479f a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.3947a2 5b tcd TCD -.3947a3 28 plp PLP -.3947a4 68 pla PLA ; end setdp macro -.3947a5 c2 30 rep #$30 REP #$30 ; set A&X long -.3947a7 a9 02 00 lda #$0002 LDA #2 ; Cluster ID is 2 to start with -.3947aa 85 10 sta $0330 STA DOS_CLUS_ID -.3947ac a9 00 00 lda #$0000 LDA #0 -.3947af 85 12 sta $0332 STA DOS_CLUS_ID+2 -.3947b1 22 9d 44 39 jsl $39449d JSL ENTRYFORCLUS12 ; Calculate the LBA and buffer offset for the cluster -.3947b5 22 27 47 39 jsl $394727 JSL FDC_READ2FAT12 ; Read the first two sectors of the FAT -.3947b9 b0 07 bcs $3947c2 BCS start_of_fat ; If success, move X to the start of the FAT -.3947bb e2 20 sep #$20 SEP #$20 ; set A short -.3947bd a9 06 lda #$06 LDA #DOS_ERR_FAT -.3947bf 82 99 00 brl $39485b BRL ret_failure -.3947c2 start_of_fat -.3947c2 c2 30 rep #$30 REP #$30 ; set A&X long -.3947c4 a5 10 lda $0330 chk_cluster LDA DOS_CLUS_ID ; Check to see if cluster number is even or odd -.3947c6 89 01 00 bit #$0001 BIT #1 -.3947c9 d0 09 bne $3947d4 BNE is_odd -.3947cb bf 00 a5 38 lda $38a500,x is_even LDA DOS_FAT_SECTORS,X ; Get the cluster status for an even numbered cluster -.3947cf 29 ff 0f and #$0fff AND #$0FFF -.3947d2 80 08 bra $3947dc BRA chk_available -.3947d4 bf 00 a5 38 lda $38a500,x is_odd LDA DOS_FAT_SECTORS,X ; Get the cluster status for an odd numbered cluster -.3947d8 4a lsr a LSR A -.3947d9 4a lsr a LSR A -.3947da 4a lsr a LSR A -.3947db 4a lsr a LSR A -.3947dc chk_available -.3947dc 85 28 sta $0348 STA DOS_TEMP -.3947de c9 00 00 cmp #$0000 CMP #0 ; Is it available? -.3947e1 f0 03 beq $3947e6 BEQ chk_found -.3947e3 82 39 00 brl $39481f BRL next_cluster ; No: advance to the next cluster -.3947e6 8a txa chk_found TXA -.3947e7 85 2a sta $034a STA DOS_TEMP+2 -.3947e9 a5 10 lda $0330 LDA DOS_CLUS_ID ; Check to see if cluster number is even or odd -.3947eb 89 01 00 bit #$0001 BIT #1 -.3947ee d0 0d bne $3947fd BNE is_odd2 -.3947f0 is_even2 -.3947f0 bf 00 a5 38 lda $38a500,x LDA DOS_FAT_SECTORS,X ; Reserve the cluster in the FAT, even offset case -.3947f4 09 ff 0f ora #$0fff ORA #$0FFF -.3947f7 9f 00 a5 38 sta $38a500,x STA DOS_FAT_SECTORS,X -.3947fb 80 0b bra $394808 BRA write_fat -.3947fd is_odd2 -.3947fd bf 00 a5 38 lda $38a500,x LDA DOS_FAT_SECTORS,X ; Reserve the cluster in the FAT, odd offset case -.394801 09 f0 ff ora #$fff0 ORA #$FFF0 -.394804 9f 00 a5 38 sta $38a500,x STA DOS_FAT_SECTORS,X -.394808 22 2f 49 39 jsl $39492f write_fat JSL WRITEFAT12 ; Write the two FAT sectors back to disk -.39480c b0 07 bcs $394815 BCS ret_success ; If success: return success -.39480e e2 20 sep #$20 SEP #$20 ; set A short -.394810 a9 14 lda #$14 LDA #DOS_ERR_FATUPDATE ; Flag an error trying to write the FAT back -.394812 82 46 00 brl $39485b BRL ret_failure -.394815 ret_success -.394815 e2 20 sep #$20 SEP #$20 ; set A short -.394817 64 0e stz $032e STZ DOS_STATUS -.394819 28 plp PLP -.39481a 2b pld PLD -.39481b ab plb PLB -.39481c fa plx PLX -.39481d 38 sec SEC -.39481e 6b rtl RTL -.39481f next_cluster -.39481f e6 10 inc $0330 INC DOS_CLUS_ID ; And advance the cluster ID -.394821 d0 02 bne $394825 BNE calc_entry -.394823 e6 12 inc $0332 INC DOS_CLUS_ID+2 -.394825 22 9d 44 39 jsl $39449d calc_entry JSL ENTRYFORCLUS12 ; Calculate the LBA and offset into the buffer for the cluster -.394829 e0 00 00 cpx #$0000 CPX #0 ; Did we wrap around? -.39482c f0 03 beq $394831 BEQ chk_end_of_fat -.39482e 82 93 ff brl $3947c4 BRL chk_cluster ; No: go back and check it too -.394831 chk_end_of_fat -.394831 a5 24 lda $0344 LDA DOS_FAT_LBA ; Are we at the end of the FAT? -.394833 cf 18 a0 38 cmp $38a018 CMP FAT2_BEGIN_LBA ; NOTE: we use the start sector of the second FAT as our sentinel -.394837 d0 0f bne $394848 BNE next_2 -.394839 a5 26 lda $0346 LDA DOS_FAT_LBA+2 -.39483b cf 1a a0 38 cmp $38a01a CMP FAT2_BEGIN_LBA+2 -.39483f d0 07 bne $394848 BNE next_2 ; No: get the next to sectors -.394841 e2 20 sep #$20 SEP #$20 ; set A short -.394843 a9 12 lda #$12 LDA #DOS_ERR_MEDIAFULL ; Yes: return media full -.394845 82 13 00 brl $39485b BRL ret_failure -.394848 next_2 -.394848 22 27 47 39 jsl $394727 JSL FDC_READ2FAT12 ; Read the next two sectors of the FAT -.39484c 90 06 bcc $394854 BCC fat_fail ; If failed: return error -.39484e a2 00 00 ldx #$0000 LDX #0 ; If success: Start scanning at the beginning of the sectors -.394851 82 70 ff brl $3947c4 BRL chk_cluster ; And start checking from there -.394854 fat_fail -.394854 e2 20 sep #$20 SEP #$20 ; set A short -.394856 a9 06 lda #$06 LDA #DOS_ERR_FAT -.394858 82 00 00 brl $39485b BRL ret_failure -.39485b ret_failure -.39485b e2 20 sep #$20 SEP #$20 ; set A short -.39485d 85 0e sta $032e STA DOS_STATUS -.39485f 28 plp PLP -.394860 2b pld PLD -.394861 ab plb PLB -.394862 fa plx PLX -.394863 18 clc CLC -.394864 6b rtl RTL -.394865 DOS_FREECLUS32 -.394865 8b phb PHB -.394866 0b phd PHD -.394867 08 php PHP -.394868 48 pha PHA ; begin setdbr macro -.394869 08 php PHP -.39486a e2 20 sep #$20 SEP #$20 ; set A short -.39486c a9 00 lda #$00 LDA #0 -.39486e 48 pha PHA -.39486f ab plb PLB -.394870 28 plp PLP -.394871 68 pla PLA ; end setdbr macro -.394872 48 pha PHA ; begin setdp macro -.394873 08 php PHP -.394874 c2 20 rep #$20 REP #$20 ; set A long -.394876 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394879 5b tcd TCD -.39487a 28 plp PLP -.39487b 68 pla PLA ; end setdp macro -.39487c c2 30 rep #$30 REP #$30 ; set A&X long -.39487e a9 00 a3 lda #$a300 LDA #<>DOS_SECTOR ; Set the location to store the sector -.394881 85 06 sta $0326 STA BIOS_BUFF_PTR -.394883 a9 38 00 lda #$0038 LDA #`DOS_SECTOR -.394886 85 08 sta $0328 STA BIOS_BUFF_PTR+2 -.394888 af 14 a0 38 lda $38a014 LDA FAT_BEGIN_LBA ; Set the LBA to that of the first FAT sector -.39488c 85 02 sta $0322 STA BIOS_LBA -.39488e af 16 a0 38 lda $38a016 LDA FAT_BEGIN_LBA+2 -.394892 85 04 sta $0324 STA BIOS_LBA+2 -.394894 22 44 10 00 jsl $001044 JSL GETBLOCK ; Load the sector into memory -.394898 b0 07 bcs $3948a1 BCS initial_entry ; If OK: set the initial entry to check -.39489a e2 20 sep #$20 SEP #$20 ; set A short -.39489c a9 06 lda #$06 LDA #DOS_ERR_FAT ; Return a NOFAT error -.39489e 82 6b 00 brl $39490c BRL ret_failure -.3948a1 initial_entry -.3948a1 c2 20 rep #$20 REP #$20 ; set A long -.3948a3 a9 02 00 lda #$0002 LDA #2 ; Set DOS_CLUS_ID to 2 -.3948a6 85 10 sta $0330 STA DOS_CLUS_ID -.3948a8 a9 00 00 lda #$0000 LDA #0 -.3948ab 85 12 sta $0332 STA DOS_CLUS_ID+2 -.3948ad a2 08 00 ldx #$0008 LDX #8 ; Set the offset to DOS_CLUS_ID * 4 -.3948b0 bf 00 a3 38 lda $38a300,x chk_entry LDA DOS_SECTOR,X ; Is the cluster entry == $00000000? -.3948b4 d0 06 bne $3948bc BNE next_entry ; No: move to the next entry -.3948b6 bf 02 a3 38 lda $38a302,x LDA DOS_SECTOR+2,X -.3948ba f0 36 beq $3948f2 BEQ found_free ; Yes: go to allocate and return it -.3948bc e6 10 inc $0330 next_entry INC DOS_CLUS_ID ; Move to the next cluster -.3948be d0 02 bne $3948c2 BNE inc_ptr -.3948c0 e6 12 inc $0332 INC DOS_CLUS_ID+2 -.3948c2 e8 inx inc_ptr INX ; Update the index to the entry -.3948c3 e8 inx INX -.3948c4 e8 inx INX -.3948c5 e8 inx INX -.3948c6 e0 00 02 cpx #$0200 CPX #DOS_SECTOR_SIZE ; Are we outside the sector? -.3948c9 90 e5 bcc $3948b0 BLT chk_entry ; No: check this entry -.3948cb e6 02 inc $0322 INC BIOS_LBA ; Point to the next sector in the FAT -.3948cd d0 18 bne $3948e7 BNE get_block -.3948cf e6 04 inc $0324 INC BIOS_LBA+2 -.3948d1 a5 04 lda $0324 LDA BIOS_LBA+2 -.3948d3 cf 1a a0 38 cmp $38a01a CMP FAT2_BEGIN_LBA+2 -.3948d7 90 0e bcc $3948e7 BLT get_block -.3948d9 a5 02 lda $0322 LDA BIOS_LBA -.3948db cf 18 a0 38 cmp $38a018 CMP FAT2_BEGIN_LBA -.3948df 90 06 bcc $3948e7 BLT get_block -.3948e1 e2 20 sep #$20 SEP #$20 ; set A short -.3948e3 a9 12 lda #$12 LDA #DOS_ERR_MEDIAFULL ; No: throw a media full error -.3948e5 80 25 bra $39490c BRA ret_failure -.3948e7 22 44 10 00 jsl $001044 get_block JSL GETBLOCK ; Attempt to read the block -.3948eb 90 1b bcc $394908 BCC ret_fat_error ; If error: throw a FAT error -.3948ed a2 00 00 ldx #$0000 set_ptr LDX #0 ; Set index pointer to the first entry -.3948f0 80 be bra $3948b0 BRA chk_entry ; Check this entry -.3948f2 found_free -.3948f2 c2 20 rep #$20 REP #$20 ; set A long -.3948f4 a9 ff ff lda #$ffff LDA #<>FAT_LAST_CLUSTER ; Set the entry to $0FFFFFFF to make it the last entry in its chain -.3948f7 9f 00 a3 38 sta $38a300,x STA DOS_SECTOR,X -.3948fb a9 ff 0f lda #$0fff LDA #(FAT_LAST_CLUSTER >> 16) -.3948fe 9f 02 a3 38 sta $38a302,x STA DOS_SECTOR+2,X -.394902 22 24 10 00 jsl $001024 JSL PUTBLOCK ; Write the sector back to the block device -.394906 b0 0d bcs $394915 BCS ret_success ; If OK: return success -.394908 ret_fat_error -.394908 e2 20 sep #$20 SEP #$20 ; set A short -.39490a a9 06 lda #$06 LDA #DOS_ERR_FAT ; Otherwise: return NOFAT error -.39490c ret_failure -.39490c e2 20 sep #$20 SEP #$20 ; set A short -.39490e 85 0e sta $032e STA DOS_STATUS -.394910 28 plp PLP -.394911 2b pld PLD -.394912 ab plb PLB -.394913 18 clc CLC -.394914 6b rtl RTL -.394915 ret_success -.394915 e2 20 sep #$20 SEP #$20 ; set A short -.394917 64 0e stz $032e STZ DOS_STATUS -.394919 28 plp PLP -.39491a 2b pld PLD -.39491b ab plb PLB -.39491c 38 sec SEC -.39491d 6b rtl RTL -.39491e DELCLUSTER -.39491e e2 20 sep #$20 SEP #$20 ; set A short -.394920 af 01 a0 38 lda $38a001 LDA @l FILE_SYSTEM ; Get the file system code -.394924 c9 00 cmp #$00 CMP #PART_TYPE_FAT12 ; Is it FAT12? -.394926 d0 04 bne $39492c BNE fat32 ; No: assume it's FAT32 -.394928 5c 76 49 39 jmp $394976 fat12 JML DELCLUSTER12 -.39492c 4c c4 49 jmp $3949c4 fat32 JMP DELCLUSTER32 -.39492f WRITEFAT12 -.39492f 8b phb PHB -.394930 0b phd PHD -.394931 48 pha PHA ; begin setdbr macro -.394932 08 php PHP -.394933 e2 20 sep #$20 SEP #$20 ; set A short -.394935 a9 00 lda #$00 LDA #0 -.394937 48 pha PHA -.394938 ab plb PLB -.394939 28 plp PLP -.39493a 68 pla PLA ; end setdbr macro -.39493b 48 pha PHA ; begin setdp macro -.39493c 08 php PHP -.39493d c2 20 rep #$20 REP #$20 ; set A long -.39493f a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394942 5b tcd TCD -.394943 28 plp PLP -.394944 68 pla PLA ; end setdp macro -.394945 c2 30 rep #$30 REP #$30 ; set A&X long -.394947 a9 00 a5 lda #$a500 LDA #<>DOS_FAT_SECTORS ; Point to the first FAT sector in memory -.39494a 85 06 sta $0326 STA BIOS_BUFF_PTR -.39494c a9 38 00 lda #$0038 LDA #`DOS_FAT_SECTORS -.39494f 85 08 sta $0328 STA BIOS_BUFF_PTR+2 -.394951 a5 24 lda $0344 LDA DOS_FAT_LBA ; Set the LBA to that of the first sector's -.394953 85 02 sta $0322 STA BIOS_LBA -.394955 a5 26 lda $0346 LDA DOS_FAT_LBA+2 -.394957 85 04 sta $0324 STA BIOS_LBA+2 -.394959 22 24 10 00 jsl $001024 JSL PUTBLOCK ; Write the first sector back to the block device -.39495d 90 14 bcc $394973 BCC done -.39495f a9 00 a7 lda #$a700 LDA #<>(DOS_FAT_SECTORS+DOS_SECTOR_SIZE) -.394962 85 06 sta $0326 STA BIOS_BUFF_PTR -.394964 a9 38 00 lda #$0038 LDA #`(DOS_FAT_SECTORS+DOS_SECTOR_SIZE) -.394967 85 08 sta $0328 STA BIOS_BUFF_PTR+2 -.394969 e6 02 inc $0322 INC BIOS_LBA ; Point to the next sector in the FAT -.39496b d0 02 bne $39496f BNE put_second -.39496d e6 04 inc $0324 INC BIOS_LBA+2 -.39496f 22 24 10 00 jsl $001024 put_second JSL PUTBLOCK ; Write the second sector back to the block device -.394973 2b pld done PLD -.394974 ab plb PLB -.394975 6b rtl RTL -.394976 DELCLUSTER12 -.394976 8b phb PHB -.394977 0b phd PHD -.394978 08 php PHP -.394979 48 pha PHA ; begin setdbr macro -.39497a 08 php PHP -.39497b e2 20 sep #$20 SEP #$20 ; set A short -.39497d a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.39497f 48 pha PHA -.394980 ab plb PLB -.394981 28 plp PLP -.394982 68 pla PLA ; end setdbr macro -.394983 48 pha PHA ; begin setdp macro -.394984 08 php PHP -.394985 c2 20 rep #$20 REP #$20 ; set A long -.394987 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.39498a 5b tcd TCD -.39498b 28 plp PLP -.39498c 68 pla PLA ; end setdp macro -.39498d c2 30 rep #$30 REP #$30 ; set A&X long -.39498f 22 10 45 39 jsl $394510 JSL FATFORCLUSTER12 -.394993 8a txa TXA ; Check to see if the index is odd or even -.394994 89 01 00 bit #$0001 BIT #1 -.394997 d0 08 bne $3949a1 BNE is_odd -.394999 bd 00 a5 lda $38a500,x is_even LDA DOS_FAT_SECTORS,X ; Get the two bytes from the FAT -.39499c 29 00 f0 and #$f000 AND #$F000 ; Mask out the lower 12 bits -.39499f 80 06 bra $3949a7 BRA save_update -.3949a1 bd 00 a5 lda $38a500,x is_odd LDA DOS_FAT_SECTORS,X ; Get the two bytes from the FAT -.3949a4 29 0f 00 and #$000f AND #$000F ; Mask out the upper 12 bits -.3949a7 9d 00 a5 sta $38a500,x save_update STA DOS_FAT_SECTORS,X ; And write it back -.3949aa 22 2f 49 39 jsl $39492f JSL WRITEFAT12 ; Write the two FAT12 sectors back to the drive -.3949ae b0 0b bcs $3949bb BCS ret_success -.3949b0 ret_failure -.3949b0 e2 20 sep #$20 SEP #$20 ; set A short -.3949b2 a9 06 lda #$06 LDA #DOS_ERR_FAT -.3949b4 85 0e sta $032e STA DOS_STATUS -.3949b6 28 plp PLP -.3949b7 2b pld PLD -.3949b8 ab plb PLB -.3949b9 18 clc CLC -.3949ba 6b rtl RTL -.3949bb ret_success -.3949bb e2 20 sep #$20 SEP #$20 ; set A short -.3949bd 64 0e stz $032e STZ DOS_STATUS -.3949bf 28 plp PLP -.3949c0 2b pld PLD -.3949c1 ab plb PLB -.3949c2 38 sec SEC -.3949c3 6b rtl RTL -.3949c4 DELCLUSTER32 -.3949c4 8b phb PHB -.3949c5 0b phd PHD -.3949c6 08 php PHP -.3949c7 c2 30 rep #$30 REP #$30 ; set A&X long -.3949c9 48 pha PHA ; begin setdbr macro -.3949ca 08 php PHP -.3949cb e2 20 sep #$20 SEP #$20 ; set A short -.3949cd a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.3949cf 48 pha PHA -.3949d0 ab plb PLB -.3949d1 28 plp PLP -.3949d2 68 pla PLA ; end setdbr macro -.3949d3 48 pha PHA ; begin setdp macro -.3949d4 08 php PHP -.3949d5 c2 20 rep #$20 REP #$20 ; set A long -.3949d7 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.3949da 5b tcd TCD -.3949db 28 plp PLP -.3949dc 68 pla PLA ; end setdp macro -.3949dd 22 78 45 39 jsl $394578 JSL FATFORCLUSTER32 -.3949e1 a9 00 00 lda #$0000 LDA #0 -.3949e4 9d 00 a5 sta $38a500,x STA DOS_FAT_SECTORS,X ; Set the cluster entry to 0 -.3949e7 9d 02 a5 sta $38a502,x STA DOS_FAT_SECTORS+2,X -.3949ea 22 24 10 00 jsl $001024 JSL PUTBLOCK ; Write the sector back to the block device -.3949ee b0 0b bcs $3949fb BCS ret_success -.3949f0 ret_failure -.3949f0 e2 20 sep #$20 SEP #$20 ; set A short -.3949f2 a9 06 lda #$06 LDA #DOS_ERR_FAT -.3949f4 85 0e sta $032e STA DOS_STATUS -.3949f6 28 plp PLP -.3949f7 2b pld PLD -.3949f8 ab plb PLB -.3949f9 18 clc CLC -.3949fa 6b rtl RTL -.3949fb ret_success -.3949fb e2 20 sep #$20 SEP #$20 ; set A short -.3949fd 64 0e stz $032e STZ DOS_STATUS -.3949ff 28 plp PLP -.394a00 2b pld PLD -.394a01 ab plb PLB -.394a02 38 sec SEC -.394a03 6b rtl RTL -.394a04 DOS_APPENDCLUS -.394a04 8b phb PHB -.394a05 0b phd PHD -.394a06 08 php PHP -.394a07 48 pha PHA ; begin setdbr macro -.394a08 08 php PHP -.394a09 e2 20 sep #$20 SEP #$20 ; set A short -.394a0b a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.394a0d 48 pha PHA -.394a0e ab plb PLB -.394a0f 28 plp PLP -.394a10 68 pla PLA ; end setdbr macro -.394a11 48 pha PHA ; begin setdp macro -.394a12 08 php PHP -.394a13 c2 20 rep #$20 REP #$20 ; set A long -.394a15 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394a18 5b tcd TCD -.394a19 28 plp PLP -.394a1a 68 pla PLA ; end setdp macro -.394a1b c2 30 rep #$30 REP #$30 ; set A&X long -.394a1d a5 12 lda $0332 LDA DOS_CLUS_ID+2 ; Save the cluster number for later -.394a1f 48 pha PHA -.394a20 a5 10 lda $0330 LDA DOS_CLUS_ID -.394a22 48 pha PHA -.394a23 22 fc 46 39 jsl $3946fc JSL DOS_FREECLUS ; Find a free cluster on the block device -.394a27 b0 09 bcs $394a32 BCS save_cluster ; If we got a cluster, write the data to it -.394a29 68 pla fail_cleanup PLA ; Restore the cluster of the file -.394a2a 85 10 sta $0330 STA DOS_CLUS_ID -.394a2c 68 pla PLA -.394a2d 85 12 sta $0332 STA DOS_CLUS_ID+2 -.394a2f 82 7d 00 brl $394aaf BRL pass_failure ; Pass the failure back up the chain -.394a32 a5 10 lda $0330 save_cluster LDA DOS_CLUS_ID -.394a34 8d 36 a0 sta $38a036 STA DOS_NEW_CLUSTER -.394a37 a5 12 lda $0332 LDA DOS_CLUS_ID+2 -.394a39 8d 38 a0 sta $38a038 STA DOS_NEW_CLUSTER+2 -.394a3c 22 0c 42 39 jsl $39420c JSL DOS_PUTCLUSTER ; Write the data to the free cluster -.394a40 90 e7 bcc $394a29 BCC fail_cleanup ; If failure: clean up stack and pass the failure up -.394a42 68 pla PLA ; Restore the cluster of the file -.394a43 85 10 sta $0330 STA DOS_CLUS_ID -.394a45 68 pla PLA -.394a46 85 12 sta $0332 STA DOS_CLUS_ID+2 -.394a48 22 e3 45 39 jsl $3945e3 walk_loop JSL NEXTCLUSTER ; Try to get the next cluster in the chain -.394a4c b0 fa bcs $394a48 BCS walk_loop ; If found a cluster, keep walking the chain -.394a4e e2 20 sep #$20 SEP #$20 ; set A short -.394a50 af 01 a0 38 lda $38a001 LDA @l FILE_SYSTEM ; Get the file system code -.394a54 c9 00 cmp #$00 CMP #PART_TYPE_FAT12 ; Is it FAT12? -.394a56 d0 3d bne $394a95 BNE fat32 ; No: assume it's FAT32 -.394a58 fat12 -.394a58 c2 20 rep #$20 REP #$20 ; set A long -.394a5a 22 9d 44 39 jsl $39449d JSL ENTRYFORCLUS12 ; Make sure we have the right offset for the cluster -.394a5e a5 10 lda $0330 LDA DOS_CLUS_ID ; Check to see if the last cluster ID is even or odd -.394a60 89 01 00 bit #$0001 BIT #1 -.394a63 d0 11 bne $394a76 BNE is_odd -.394a65 ad 36 a0 lda $38a036 is_even LDA DOS_NEW_CLUSTER ; Handle the even case (change the lower 12 bits) -.394a68 29 ff 0f and #$0fff AND #$0FFF -.394a6b 8d 36 a0 sta $38a036 STA DOS_NEW_CLUSTER -.394a6e bd 00 a5 lda $38a500,x LDA DOS_FAT_SECTORS,X -.394a71 29 00 f0 and #$f000 AND #$F000 -.394a74 80 10 bra $394a86 BRA update_fat12 -.394a76 ad 36 a0 lda $38a036 is_odd LDA DOS_NEW_CLUSTER ; Handle the odd case (change the upper 12 bits) -.394a79 0a asl a ASL A -.394a7a 0a asl a ASL A -.394a7b 0a asl a ASL A -.394a7c 0a asl a ASL A -.394a7d 8d 36 a0 sta $38a036 STA DOS_NEW_CLUSTER -.394a80 bd 00 a5 lda $38a500,x LDA DOS_FAT_SECTORS,X -.394a83 29 0f 00 and #$000f AND #$000F -.394a86 0d 36 a0 ora $38a036 update_fat12 ORA DOS_NEW_CLUSTER -.394a89 9d 00 a5 sta $38a500,x STA DOS_FAT_SECTORS,X -.394a8c 22 2f 49 39 jsl $39492f JSL WRITEFAT12 ; Write the two FAT12 sectors back to the drive -.394a90 b0 22 bcs $394ab4 BCS ret_success -.394a92 82 1a 00 brl $394aaf BRL pass_failure -.394a95 fat32 -.394a95 c2 20 rep #$20 REP #$20 ; set A long -.394a97 ad 36 a0 lda $38a036 LDA DOS_NEW_CLUSTER ; Write the ID of the new cluster to the end of the chain -.394a9a 9d 00 a5 sta $38a500,x STA DOS_FAT_SECTORS,X -.394a9d ad 38 a0 lda $38a038 LDA DOS_NEW_CLUSTER+2 -.394aa0 9d 02 a5 sta $38a502,x STA DOS_FAT_SECTORS+2,X -.394aa3 22 24 10 00 jsl $001024 JSL PUTBLOCK ; Write the FAT sector back (assumes BIOS_LBA and BIOS_BUFF_PTR haven't changed) -.394aa7 b0 0b bcs $394ab4 BCS ret_success -.394aa9 e2 20 sep #$20 SEP #$20 ; set A short -.394aab a9 06 lda #$06 LDA #DOS_ERR_FAT ; Problem working with the FAT -.394aad 85 0e sta $032e STA DOS_STATUS -.394aaf 28 plp pass_failure PLP -.394ab0 2b pld PLD -.394ab1 ab plb PLB -.394ab2 18 clc CLC -.394ab3 6b rtl RTL -.394ab4 ret_success -.394ab4 e2 20 sep #$20 SEP #$20 ; set A short -.394ab6 64 0e stz $032e STZ DOS_STATUS -.394ab8 28 plp PLP -.394ab9 2b pld PLD -.394aba ab plb PLB -.394abb 38 sec SEC -.394abc 6b rtl RTL -.394abd BCD2BIN -.394abd 8b phb PHB -.394abe 0b phd PHD -.394abf 08 php PHP -.394ac0 48 pha PHA ; begin setdbr macro -.394ac1 08 php PHP -.394ac2 e2 20 sep #$20 SEP #$20 ; set A short -.394ac4 a9 00 lda #$00 LDA #0 -.394ac6 48 pha PHA -.394ac7 ab plb PLB -.394ac8 28 plp PLP -.394ac9 68 pla PLA ; end setdbr macro -.394aca 48 pha PHA ; begin setdp macro -.394acb 08 php PHP -.394acc c2 20 rep #$20 REP #$20 ; set A long -.394ace a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394ad1 5b tcd TCD -.394ad2 28 plp PLP -.394ad3 68 pla PLA ; end setdp macro -.394ad4 c2 30 rep #$30 REP #$30 ; set A&X long -.394ad6 85 28 sta $0348 STA DOS_TEMP -.394ad8 29 0f 00 and #$000f AND #$000F -.394adb 85 2a sta $034a STA DOS_TEMP+2 -.394add a5 28 lda $0348 LDA DOS_TEMP -.394adf 4a lsr a LSR A -.394ae0 4a lsr a LSR A -.394ae1 4a lsr a LSR A -.394ae2 4a lsr a LSR A -.394ae3 85 28 sta $0348 STA DOS_TEMP -.394ae5 29 0f 00 and #$000f AND #$000F -.394ae8 8f 00 01 00 sta $000100 STA @l UNSIGNED_MULT_A_LO -.394aec a9 0a 00 lda #$000a LDA #10 -.394aef 8f 02 01 00 sta $000102 STA @l UNSIGNED_MULT_B_LO -.394af3 af 04 01 00 lda $000104 LDA @l UNSIGNED_MULT_AL_LO -.394af7 18 clc CLC -.394af8 65 2a adc $034a ADC DOS_TEMP+2 -.394afa 85 2a sta $034a STA DOS_TEMP+2 -.394afc a5 28 lda $0348 LDA DOS_TEMP -.394afe 4a lsr a LSR A -.394aff 4a lsr a LSR A -.394b00 4a lsr a LSR A -.394b01 4a lsr a LSR A -.394b02 85 28 sta $0348 STA DOS_TEMP -.394b04 29 0f 00 and #$000f AND #$000F -.394b07 8f 00 01 00 sta $000100 STA @l UNSIGNED_MULT_A_LO -.394b0b a9 64 00 lda #$0064 LDA #100 -.394b0e 8f 02 01 00 sta $000102 STA @l UNSIGNED_MULT_B_LO -.394b12 af 04 01 00 lda $000104 LDA @l UNSIGNED_MULT_AL_LO -.394b16 18 clc CLC -.394b17 65 2a adc $034a ADC DOS_TEMP+2 -.394b19 85 2a sta $034a STA DOS_TEMP+2 -.394b1b a5 28 lda $0348 LDA DOS_TEMP -.394b1d 4a lsr a LSR A -.394b1e 4a lsr a LSR A -.394b1f 4a lsr a LSR A -.394b20 4a lsr a LSR A -.394b21 29 0f 00 and #$000f AND #$000F -.394b24 8f 00 01 00 sta $000100 STA @l UNSIGNED_MULT_A_LO -.394b28 a9 e8 03 lda #$03e8 LDA #1000 -.394b2b 8f 02 01 00 sta $000102 STA @l UNSIGNED_MULT_B_LO -.394b2f af 04 01 00 lda $000104 LDA @l UNSIGNED_MULT_AL_LO -.394b33 18 clc CLC -.394b34 65 2a adc $034a ADC DOS_TEMP+2 -.394b36 28 plp PLP -.394b37 2b pld PLD -.394b38 ab plb PLB -.394b39 6b rtl RTL -.394b3a DOS_RTCCREATE -.394b3a 8b phb PHB -.394b3b 0b phd PHD -.394b3c 08 php PHP -.394b3d 48 pha PHA ; begin setdbr macro -.394b3e 08 php PHP -.394b3f e2 20 sep #$20 SEP #$20 ; set A short -.394b41 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.394b43 48 pha PHA -.394b44 ab plb PLB -.394b45 28 plp PLP -.394b46 68 pla PLA ; end setdbr macro -.394b47 48 pha PHA ; begin setdp macro -.394b48 08 php PHP -.394b49 c2 20 rep #$20 REP #$20 ; set A long -.394b4b a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394b4e 5b tcd TCD -.394b4f 28 plp PLP -.394b50 68 pla PLA ; end setdp macro -.394b51 c2 10 rep #$10 REP #$10 ; set X long -.394b53 e2 20 sep #$20 SEP #$20 ; set A short -.394b55 af 0e 08 af lda $af080e LDA @l RTC_CTRL ; Turn off the updates to the clock -.394b59 09 08 ora #$08 ORA #%00001000 -.394b5b 8f 0e 08 af sta $af080e STA @l RTC_CTRL -.394b5f af 0f 08 af lda $af080f LDA @l RTC_CENTURY -.394b63 85 29 sta $0349 STA DOS_TEMP+1 -.394b65 af 0a 08 af lda $af080a LDA @l RTC_YEAR ; Get the year -.394b69 85 28 sta $0348 STA DOS_TEMP -.394b6b c2 20 rep #$20 REP #$20 ; set A long -.394b6d a5 28 lda $0348 LDA DOS_TEMP -.394b6f 22 bd 4a 39 jsl $394abd JSL BCD2BIN ; Convert it to binary -.394b73 85 28 sta $0348 STA DOS_TEMP -.394b75 38 sec SEC ; Year is relative to 1980 -.394b76 e9 bc 07 sbc #$07bc SBC #1980 -.394b79 c2 20 rep #$20 REP #$20 ; set A long +.3944f3 18 clc CLC ; DOS_FAT_LBA should be the LBA of the first FAT sector we need +.3944f4 af 14 a0 38 lda $38a014 LDA FAT_BEGIN_LBA +.3944f8 65 28 adc $0348 ADC DOS_TEMP +.3944fa 85 24 sta $0344 STA DOS_FAT_LBA +.3944fc af 16 a0 38 lda $38a016 LDA FAT_BEGIN_LBA+2 +.394500 65 2a adc $034a ADC DOS_TEMP+2 +.394502 85 26 sta $0346 STA DOS_FAT_LBA+2 +.394504 28 plp PLP +.394505 2b pld PLD +.394506 ab plb PLB +.394507 6b rtl RTL +.394508 FATFORCLUSTER12 +.394508 8b phb PHB +.394509 0b phd PHD +.39450a 08 php PHP +.39450b 48 pha PHA ; begin setdbr macro +.39450c 08 php PHP +.39450d e2 20 sep #$20 SEP #$20 ; set A short +.39450f a9 00 lda #$00 LDA #0 +.394511 48 pha PHA +.394512 ab plb PLB +.394513 28 plp PLP +.394514 68 pla PLA ; end setdbr macro +.394515 48 pha PHA ; begin setdp macro +.394516 08 php PHP +.394517 c2 20 rep #$20 REP #$20 ; set A long +.394519 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.39451c 5b tcd TCD +.39451d 28 plp PLP +.39451e 68 pla PLA ; end setdp macro +.39451f c2 30 rep #$30 REP #$30 ; set A&X long +.394521 a2 00 00 ldx #$0000 LDX #0 +.394524 a9 5a 5a lda #$5a5a LDA #$5A5A +.394527 8f 00 a5 38 sta $38a500 clr_loop STA DOS_FAT_SECTORS +.39452b e8 inx INX +.39452c e8 inx INX +.39452d e0 00 04 cpx #$0400 CPX #1024 +.394530 d0 f5 bne $394527 BNE clr_loop +.394532 22 95 44 39 jsl $394495 JSL ENTRYFORCLUS12 ; Calculate the LBA +.394536 a5 24 lda $0344 LDA DOS_FAT_LBA ; Point to the desired sector in the FAT +.394538 85 02 sta $0322 STA BIOS_LBA +.39453a a5 26 lda $0346 LDA DOS_FAT_LBA+2 +.39453c 85 04 sta $0324 STA BIOS_LBA+2 +.39453e a9 00 a5 lda #$a500 LDA #<>DOS_FAT_SECTORS ; Point to the first 512 bytes of the FAT buffer +.394541 85 06 sta $0326 STA BIOS_BUFF_PTR +.394543 a9 38 00 lda #$0038 LDA #`DOS_FAT_SECTORS +.394546 85 08 sta $0328 STA BIOS_BUFF_PTR+2 +.394548 22 44 10 00 jsl $001044 JSL GETBLOCK ; Attempt to load the first FAT sector +.39454c 90 17 bcc $394565 BCC error +.39454e e6 02 inc $0322 INC BIOS_LBA ; Move to the next sector +.394550 a9 00 a7 lda #$a700 LDA #<>DOS_FAT_SECTORS+512 ; And point to the second 512 bytes of teh FAT buffer +.394553 85 06 sta $0326 STA BIOS_BUFF_PTR +.394555 a9 38 00 lda #$0038 LDA #`DOS_FAT_SECTORS +.394558 85 08 sta $0328 STA BIOS_BUFF_PTR+2 +.39455a 22 44 10 00 jsl $001044 JSL GETBLOCK ; Attempt to load the first FAT sector +.39455e 90 05 bcc $394565 BCC error +.394560 28 plp PLP +.394561 2b pld PLD +.394562 ab plb PLB +.394563 38 sec SEC +.394564 6b rtl RTL +.394565 error +.394565 e2 20 sep #$20 SEP #$20 ; set A short +.394567 a9 06 lda #$06 LDA #DOS_ERR_FAT +.394569 85 0e sta $032e STA DOS_STATUS +.39456b 28 plp PLP +.39456c 2b pld PLD +.39456d ab plb PLB +.39456e 18 clc CLC +.39456f 6b rtl RTL +.394570 FATFORCLUSTER32 +.394570 8b phb PHB +.394571 0b phd PHD +.394572 48 pha PHA ; begin setdbr macro +.394573 08 php PHP +.394574 e2 20 sep #$20 SEP #$20 ; set A short +.394576 a9 00 lda #$00 LDA #0 +.394578 48 pha PHA +.394579 ab plb PLB +.39457a 28 plp PLP +.39457b 68 pla PLA ; end setdbr macro +.39457c 48 pha PHA ; begin setdp macro +.39457d 08 php PHP +.39457e c2 20 rep #$20 REP #$20 ; set A long +.394580 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394583 5b tcd TCD +.394584 28 plp PLP +.394585 68 pla PLA ; end setdp macro +.394586 c2 30 rep #$30 REP #$30 ; set A&X long +.394588 a5 10 lda $0330 LDA DOS_CLUS_ID +.39458a 85 24 sta $0344 STA DOS_FAT_LBA +.39458c a5 12 lda $0332 LDA DOS_CLUS_ID+2 +.39458e 85 26 sta $0346 STA DOS_FAT_LBA+2 +.394590 a2 07 00 ldx #$0007 LDX #7 +.394593 46 26 lsr $0346 div_loop LSR DOS_FAT_LBA+2 +.394595 66 24 ror $0344 ROR DOS_FAT_LBA +.394597 ca dex DEX +.394598 d0 f9 bne $394593 BNE div_loop +.39459a 18 clc CLC +.39459b a5 24 lda $0344 LDA DOS_FAT_LBA +.39459d 6f 14 a0 38 adc $38a014 ADC FAT_BEGIN_LBA +.3945a1 85 24 sta $0344 STA DOS_FAT_LBA +.3945a3 a5 26 lda $0346 LDA DOS_FAT_LBA+2 +.3945a5 6f 16 a0 38 adc $38a016 ADC FAT_BEGIN_LBA+2 +.3945a9 85 26 sta $0346 STA DOS_FAT_LBA+2 +.3945ab a5 24 lda $0344 LDA DOS_FAT_LBA ; We want to load the FAT sector +.3945ad 85 02 sta $0322 STA BIOS_LBA +.3945af a5 26 lda $0346 LDA DOS_FAT_LBA+2 +.3945b1 85 04 sta $0324 STA BIOS_LBA+2 +.3945b3 a9 00 a5 lda #$a500 LDA #<>DOS_FAT_SECTORS ; We want to load the FAT sector in DOS_FAT_SECTORS +.3945b6 85 06 sta $0326 STA BIOS_BUFF_PTR +.3945b8 a9 38 00 lda #$0038 LDA #`DOS_FAT_SECTORS +.3945bb 85 08 sta $0328 STA BIOS_BUFF_PTR+2 +.3945bd 22 44 10 00 jsl $001044 JSL GETBLOCK ; Load the FAT entry +.3945c1 b0 06 bcs $3945c9 BCS find_entry +.3945c3 e2 20 sep #$20 SEP #$20 ; set A short +.3945c5 a9 06 lda #$06 LDA #DOS_ERR_FAT +.3945c7 80 0e bra $3945d7 BRA ret_failure +.3945c9 find_entry +.3945c9 c2 20 rep #$20 REP #$20 ; set A long +.3945cb a5 10 lda $0330 LDA DOS_CLUS_ID +.3945cd 0a asl a ASL A +.3945ce 0a asl a ASL A ; * 4 +.3945cf 29 ff 01 and #$01ff AND #$1FF ; DOS_CLUS_ID MOD 512 +.3945d2 aa tax TAX ; X should be the offset within the sector +.3945d3 2b pld ret_success PLD +.3945d4 ab plb PLB +.3945d5 38 sec SEC ; return success +.3945d6 6b rtl RTL +.3945d7 2b pld ret_failure PLD +.3945d8 ab plb PLB +.3945d9 18 clc CLC ; Return failure +.3945da 6b rtl RTL +.3945db NEXTCLUSTER +.3945db 08 php PHP +.3945dc e2 20 sep #$20 SEP #$20 ; set A short +.3945de af 01 a0 38 lda $38a001 LDA @l FILE_SYSTEM ; Get the file system code +.3945e2 c9 00 cmp #$00 CMP #PART_TYPE_FAT12 ; Is it FAT12? +.3945e4 d0 08 bne $3945ee BNE fat32 ; No: assume it's FAT32 +.3945e6 22 fc 45 39 jsl $3945fc fat12 JSL NEXTCLUSTER12 ; Lookup the next cluster from FAT12 +.3945ea 90 0d bcc $3945f9 BCC pass_failure ; If there was an error, pass it up the chain +.3945ec 80 06 bra $3945f4 BRA ret_success +.3945ee 22 64 46 39 jsl $394664 fat32 JSL NEXTCLUSTER32 ; Lookup the next cluster from FAT32 +.3945f2 90 05 bcc $3945f9 BCC pass_failure ; If there was an error, pass it up the chain +.3945f4 64 0e stz $032e ret_success STZ DOS_STATUS +.3945f6 28 plp PLP +.3945f7 38 sec SEC +.3945f8 6b rtl RTL +.3945f9 28 plp pass_failure PLP +.3945fa 18 clc CLC +.3945fb 6b rtl RTL +.3945fc NEXTCLUSTER12 +.3945fc 8b phb PHB +.3945fd 0b phd PHD +.3945fe 08 php PHP +.3945ff 48 pha PHA ; begin setdbr macro +.394600 08 php PHP +.394601 e2 20 sep #$20 SEP #$20 ; set A short +.394603 a9 00 lda #$00 LDA #0 +.394605 48 pha PHA +.394606 ab plb PLB +.394607 28 plp PLP +.394608 68 pla PLA ; end setdbr macro +.394609 48 pha PHA ; begin setdp macro +.39460a 08 php PHP +.39460b c2 20 rep #$20 REP #$20 ; set A long +.39460d a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394610 5b tcd TCD +.394611 28 plp PLP +.394612 68 pla PLA ; end setdp macro +.394613 c2 30 rep #$30 REP #$30 ; set A&X long +.394615 22 08 45 39 jsl $394508 JSL FATFORCLUSTER12 ; Attempt to load the FAT entries +.394619 b0 03 bcs $39461e BCS chk_clus_id +.39461b 82 41 00 brl $39465f BRL pass_failure +.39461e a5 10 lda $0330 chk_clus_id LDA DOS_CLUS_ID ; Check the cluster ID... +.394620 89 01 00 bit #$0001 BIT #1 ; Is it odd? +.394623 d0 0d bne $394632 BNE is_odd ; Yes: calculate the next cluster for odd +.394625 is_even +.394625 c2 20 rep #$20 REP #$20 ; set A long +.394627 bf 00 a5 38 lda $38a500,x LDA DOS_FAT_SECTORS,X ; DOS_CLUS_ID := DOS_FAT_SECTORS[X] & $0FFF +.39462b 29 ff 0f and #$0fff AND #$0FFF +.39462e 85 28 sta $0348 STA DOS_TEMP +.394630 80 0c bra $39463e BRA check_id +.394632 is_odd +.394632 c2 20 rep #$20 REP #$20 ; set A long +.394634 bf 00 a5 38 lda $38a500,x LDA DOS_FAT_SECTORS,X ; DOS_CLUS_ID := DOS_FAT_SECTORS[X] >> 4 +.394638 4a lsr a LSR A +.394639 4a lsr a LSR A +.39463a 4a lsr a LSR A +.39463b 4a lsr a LSR A +.39463c 85 28 sta $0348 STA DOS_TEMP +.39463e check_id +.39463e c2 20 rep #$20 REP #$20 ; set A long +.394640 a5 28 lda $0348 LDA DOS_TEMP ; Check the new cluster ID we got +.394642 29 f0 0f and #$0ff0 AND #$0FF0 ; Is it in the range $0FF0 -- $0FFF? +.394645 c9 f0 0f cmp #$0ff0 CMP #$0FF0 +.394648 f0 0f beq $394659 BEQ no_more ; Yes: return that we've reached the end of the chain +.39464a a5 28 lda $0348 LDA DOS_TEMP ; Restore the "current" cluster ID +.39464c 85 10 sta $0330 STA DOS_CLUS_ID +.39464e 64 12 stz $0332 STZ DOS_CLUS_ID+2 +.394650 ret_success +.394650 e2 20 sep #$20 SEP #$20 ; set A short +.394652 64 0e stz $032e STZ DOS_STATUS +.394654 28 plp PLP +.394655 2b pld PLD +.394656 ab plb PLB +.394657 38 sec SEC +.394658 6b rtl RTL +.394659 no_more +.394659 e2 20 sep #$20 SEP #$20 ; set A short +.39465b a9 0a lda #$0a LDA #DOS_ERR_NOCLUSTER +.39465d 85 0e sta $032e STA DOS_STATUS +.39465f 28 plp pass_failure PLP +.394660 2b pld PLD +.394661 ab plb PLB +.394662 18 clc CLC +.394663 6b rtl RTL +.394664 NEXTCLUSTER32 +.394664 8b phb PHB +.394665 0b phd PHD +.394666 08 php PHP +.394667 48 pha PHA ; begin setdbr macro +.394668 08 php PHP +.394669 e2 20 sep #$20 SEP #$20 ; set A short +.39466b a9 00 lda #$00 LDA #0 +.39466d 48 pha PHA +.39466e ab plb PLB +.39466f 28 plp PLP +.394670 68 pla PLA ; end setdbr macro +.394671 48 pha PHA ; begin setdp macro +.394672 08 php PHP +.394673 c2 20 rep #$20 REP #$20 ; set A long +.394675 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394678 5b tcd TCD +.394679 28 plp PLP +.39467a 68 pla PLA ; end setdp macro +.39467b c2 30 rep #$30 REP #$30 ; set A&X long +.39467d 22 70 45 39 jsl $394570 JSL FATFORCLUSTER32 ; Get the FAT entry for this cluster +.394681 90 53 bcc $3946d6 BCC ret_failure ; If it did not work, return the error +.394683 e2 20 sep #$20 SEP #$20 ; set A short +.394685 bf 00 a5 38 lda $38a500,x LDA @l DOS_FAT_SECTORS,X ; Get the entry and copy it to DOS_TEMP +.394689 85 28 sta $0348 STA DOS_TEMP +.39468b bf 01 a5 38 lda $38a501,x LDA @l DOS_FAT_SECTORS+1,X +.39468f 85 29 sta $0349 STA DOS_TEMP+1 +.394691 bf 02 a5 38 lda $38a502,x LDA @l DOS_FAT_SECTORS+2,X +.394695 85 2a sta $034a STA DOS_TEMP+2 +.394697 bf 03 a5 38 lda $38a503,x LDA @l DOS_FAT_SECTORS+3,X +.39469b 85 2b sta $034b STA DOS_TEMP+3 +.39469d a5 28 lda $0348 xxxx LDA DOS_TEMP ; Is DOS_TEMP = $FFFFFFFF? +.39469f c9 ff cmp #$ff CMP #$FF +.3946a1 d0 18 bne $3946bb BNE found_next +.3946a3 a5 29 lda $0349 LDA DOS_TEMP+1 +.3946a5 c9 ff cmp #$ff CMP #$FF +.3946a7 d0 12 bne $3946bb BNE found_next +.3946a9 a5 2a lda $034a LDA DOS_TEMP+2 +.3946ab c9 ff cmp #$ff CMP #$FF +.3946ad d0 0c bne $3946bb BNE found_next +.3946af a5 2b lda $034b LDA DOS_TEMP+3 +.3946b1 c9 0f cmp #$0f CMP #$0F +.3946b3 d0 06 bne $3946bb BNE found_next ; No: return this cluster as the next +.3946b5 e2 20 sep #$20 SEP #$20 ; set A short +.3946b7 a9 0a lda #$0a LDA #DOS_ERR_NOCLUSTER ; Yes: return that there are no more clusters +.3946b9 80 1b bra $3946d6 BRA ret_failure +.3946bb found_next +.3946bb e2 20 sep #$20 SEP #$20 ; set A short +.3946bd a5 28 lda $0348 LDA DOS_TEMP ; No: return DOS_TEMP as the new DOS_CLUS_ID +.3946bf 85 10 sta $0330 STA DOS_CLUS_ID +.3946c1 a5 29 lda $0349 LDA DOS_TEMP+1 +.3946c3 85 11 sta $0331 STA DOS_CLUS_ID+1 +.3946c5 a5 2a lda $034a LDA DOS_TEMP+2 +.3946c7 85 12 sta $0332 STA DOS_CLUS_ID+2 +.3946c9 a5 2b lda $034b LDA DOS_TEMP+3 +.3946cb 85 13 sta $0333 STA DOS_CLUS_ID+3 +.3946cd ret_success +.3946cd e2 20 sep #$20 SEP #$20 ; set A short +.3946cf 64 0e stz $032e STZ DOS_STATUS ; Record success +.3946d1 28 plp PLP +.3946d2 2b pld PLD +.3946d3 ab plb PLB +.3946d4 38 sec SEC +.3946d5 6b rtl RTL +.3946d6 ret_failure +.3946d6 e2 20 sep #$20 SEP #$20 ; set A short +.3946d8 85 0e sta $032e STA DOS_STATUS ; Record the error condition +.3946da 28 plp PLP +.3946db 2b pld PLD +.3946dc ab plb PLB +.3946dd 18 clc CLC +.3946de 6b rtl RTL +.3946df DOS_READNEXT +.3946df 08 php PHP +.3946e0 c2 30 rep #$30 REP #$30 ; set A&X long +.3946e2 22 db 45 39 jsl $3945db JSL NEXTCLUSTER ; Attempt to find the next cluster in the FAT +.3946e6 90 09 bcc $3946f1 BCC pass_failure ; If nothing found: pass the failure up the chain +.3946e8 22 c7 41 39 jsl $3941c7 JSL DOS_GETCLUSTER ; Otherwise: attempt to read the cluster +.3946ec 90 03 bcc $3946f1 BCC pass_failure ; If nothing read: pass the failure up the chain +.3946ee 28 plp ret_success PLP +.3946ef 38 sec SEC +.3946f0 6b rtl RTL +.3946f1 28 plp pass_failure PLP +.3946f2 18 clc CLC +.3946f3 6b rtl RTL +.3946f4 DOS_FREECLUS +.3946f4 08 php PHP +.3946f5 48 pha PHA ; begin setdp macro +.3946f6 08 php PHP +.3946f7 c2 20 rep #$20 REP #$20 ; set A long +.3946f9 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3946fc 5b tcd TCD +.3946fd 28 plp PLP +.3946fe 68 pla PLA ; end setdp macro +.3946ff e2 20 sep #$20 SEP #$20 ; set A short +.394701 af 01 a0 38 lda $38a001 LDA @l FILE_SYSTEM ; Get the file system code +.394705 c9 00 cmp #$00 CMP #PART_TYPE_FAT12 ; Is it FAT12? +.394707 d0 08 bne $394711 BNE fat32 ; No: assume it's FAT32 +.394709 22 85 47 39 jsl $394785 fat12 JSL DOS_FREECLUS12 ; Find the next free cluster from FAT12 +.39470d 90 0d bcc $39471c BCC pass_failure ; If there was an error, pass it up the chain +.39470f 80 06 bra $394717 BRA ret_success +.394711 22 5d 48 39 jsl $39485d fat32 JSL DOS_FREECLUS32 ; Find the next free cluster from FAT32 +.394715 90 05 bcc $39471c BCC pass_failure ; If there was an error, pass it up the chain +.394717 64 0e stz $032e ret_success STZ DOS_STATUS +.394719 28 plp PLP +.39471a 38 sec SEC +.39471b 6b rtl RTL +.39471c 28 plp pass_failure PLP +.39471d 18 clc CLC +.39471e 6b rtl RTL +.39471f FDC_READ2FAT12 +.39471f 8b phb PHB +.394720 0b phd PHD +.394721 08 php PHP +.394722 48 pha PHA ; begin setdbr macro +.394723 08 php PHP +.394724 e2 20 sep #$20 SEP #$20 ; set A short +.394726 a9 00 lda #$00 LDA #0 +.394728 48 pha PHA +.394729 ab plb PLB +.39472a 28 plp PLP +.39472b 68 pla PLA ; end setdbr macro +.39472c 48 pha PHA ; begin setdp macro +.39472d 08 php PHP +.39472e c2 20 rep #$20 REP #$20 ; set A long +.394730 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394733 5b tcd TCD +.394734 28 plp PLP +.394735 68 pla PLA ; end setdp macro +.394736 c2 30 rep #$30 REP #$30 ; set A&X long +.394738 a9 00 a5 lda #$a500 LDA #<>DOS_FAT_SECTORS ; Set the location to store the sector +.39473b 85 06 sta $0326 STA BIOS_BUFF_PTR +.39473d a9 38 00 lda #$0038 LDA #`DOS_FAT_SECTORS +.394740 85 08 sta $0328 STA BIOS_BUFF_PTR+2 +.394742 a5 24 lda $0344 LDA DOS_FAT_LBA +.394744 85 02 sta $0322 STA BIOS_LBA +.394746 a5 26 lda $0346 LDA DOS_FAT_LBA+2 +.394748 85 04 sta $0324 STA BIOS_LBA+2 +.39474a 22 44 10 00 jsl $001044 JSL GETBLOCK ; Read the first sector +.39474e b0 07 bcs $394757 BCS inc_sect2 ; If success: start getting the second sector +.394750 e2 20 sep #$20 SEP #$20 ; set A short +.394752 a9 06 lda #$06 LDA #DOS_ERR_FAT +.394754 82 1c 00 brl $394773 BRL ret_failure +.394757 inc_sect2 +.394757 c2 20 rep #$20 REP #$20 ; set A long +.394759 e6 02 inc $0322 INC BIOS_LBA ; Move to the next sector +.39475b d0 02 bne $39475f BNE inc_buff_ptr +.39475d e6 04 inc $0324 INC BIOS_LBA+2 +.39475f a9 00 a7 lda #$a700 inc_buff_ptr LDA #<>(DOS_FAT_SECTORS+DOS_SECTOR_SIZE) +.394762 85 06 sta $0326 STA BIOS_BUFF_PTR +.394764 a9 38 00 lda #$0038 LDA #`(DOS_FAT_SECTORS+DOS_SECTOR_SIZE) +.394767 85 08 sta $0328 STA BIOS_BUFF_PTR+2 +.394769 22 44 10 00 jsl $001044 JSL GETBLOCK ; Read the second sector +.39476d b0 0d bcs $39477c BCS ret_success ; If success, return success +.39476f e2 20 sep #$20 SEP #$20 ; set A short +.394771 a9 06 lda #$06 LDA #DOS_ERR_FAT +.394773 ret_failure +.394773 e2 20 sep #$20 SEP #$20 ; set A short +.394775 85 0e sta $032e STA DOS_STATUS +.394777 28 plp PLP +.394778 2b pld PLD +.394779 ab plb PLB +.39477a 18 clc CLC +.39477b 6b rtl RTL +.39477c ret_success +.39477c e2 20 sep #$20 SEP #$20 ; set A short +.39477e 64 0e stz $032e STZ DOS_STATUS +.394780 28 plp PLP +.394781 2b pld PLD +.394782 ab plb PLB +.394783 38 sec SEC +.394784 6b rtl RTL +.394785 DOS_FREECLUS12 +.394785 da phx PHX +.394786 8b phb PHB +.394787 0b phd PHD +.394788 08 php PHP +.394789 48 pha PHA ; begin setdbr macro +.39478a 08 php PHP +.39478b e2 20 sep #$20 SEP #$20 ; set A short +.39478d a9 00 lda #$00 LDA #0 +.39478f 48 pha PHA +.394790 ab plb PLB +.394791 28 plp PLP +.394792 68 pla PLA ; end setdbr macro +.394793 48 pha PHA ; begin setdp macro +.394794 08 php PHP +.394795 c2 20 rep #$20 REP #$20 ; set A long +.394797 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.39479a 5b tcd TCD +.39479b 28 plp PLP +.39479c 68 pla PLA ; end setdp macro +.39479d c2 30 rep #$30 REP #$30 ; set A&X long +.39479f a9 02 00 lda #$0002 LDA #2 ; Cluster ID is 2 to start with +.3947a2 85 10 sta $0330 STA DOS_CLUS_ID +.3947a4 a9 00 00 lda #$0000 LDA #0 +.3947a7 85 12 sta $0332 STA DOS_CLUS_ID+2 +.3947a9 22 95 44 39 jsl $394495 JSL ENTRYFORCLUS12 ; Calculate the LBA and buffer offset for the cluster +.3947ad 22 1f 47 39 jsl $39471f JSL FDC_READ2FAT12 ; Read the first two sectors of the FAT +.3947b1 b0 07 bcs $3947ba BCS start_of_fat ; If success, move X to the start of the FAT +.3947b3 e2 20 sep #$20 SEP #$20 ; set A short +.3947b5 a9 06 lda #$06 LDA #DOS_ERR_FAT +.3947b7 82 99 00 brl $394853 BRL ret_failure +.3947ba start_of_fat +.3947ba c2 30 rep #$30 REP #$30 ; set A&X long +.3947bc a5 10 lda $0330 chk_cluster LDA DOS_CLUS_ID ; Check to see if cluster number is even or odd +.3947be 89 01 00 bit #$0001 BIT #1 +.3947c1 d0 09 bne $3947cc BNE is_odd +.3947c3 bf 00 a5 38 lda $38a500,x is_even LDA DOS_FAT_SECTORS,X ; Get the cluster status for an even numbered cluster +.3947c7 29 ff 0f and #$0fff AND #$0FFF +.3947ca 80 08 bra $3947d4 BRA chk_available +.3947cc bf 00 a5 38 lda $38a500,x is_odd LDA DOS_FAT_SECTORS,X ; Get the cluster status for an odd numbered cluster +.3947d0 4a lsr a LSR A +.3947d1 4a lsr a LSR A +.3947d2 4a lsr a LSR A +.3947d3 4a lsr a LSR A +.3947d4 chk_available +.3947d4 85 28 sta $0348 STA DOS_TEMP +.3947d6 c9 00 00 cmp #$0000 CMP #0 ; Is it available? +.3947d9 f0 03 beq $3947de BEQ chk_found +.3947db 82 39 00 brl $394817 BRL next_cluster ; No: advance to the next cluster +.3947de 8a txa chk_found TXA +.3947df 85 2a sta $034a STA DOS_TEMP+2 +.3947e1 a5 10 lda $0330 LDA DOS_CLUS_ID ; Check to see if cluster number is even or odd +.3947e3 89 01 00 bit #$0001 BIT #1 +.3947e6 d0 0d bne $3947f5 BNE is_odd2 +.3947e8 is_even2 +.3947e8 bf 00 a5 38 lda $38a500,x LDA DOS_FAT_SECTORS,X ; Reserve the cluster in the FAT, even offset case +.3947ec 09 ff 0f ora #$0fff ORA #$0FFF +.3947ef 9f 00 a5 38 sta $38a500,x STA DOS_FAT_SECTORS,X +.3947f3 80 0b bra $394800 BRA write_fat +.3947f5 is_odd2 +.3947f5 bf 00 a5 38 lda $38a500,x LDA DOS_FAT_SECTORS,X ; Reserve the cluster in the FAT, odd offset case +.3947f9 09 f0 ff ora #$fff0 ORA #$FFF0 +.3947fc 9f 00 a5 38 sta $38a500,x STA DOS_FAT_SECTORS,X +.394800 22 27 49 39 jsl $394927 write_fat JSL WRITEFAT12 ; Write the two FAT sectors back to disk +.394804 b0 07 bcs $39480d BCS ret_success ; If success: return success +.394806 e2 20 sep #$20 SEP #$20 ; set A short +.394808 a9 14 lda #$14 LDA #DOS_ERR_FATUPDATE ; Flag an error trying to write the FAT back +.39480a 82 46 00 brl $394853 BRL ret_failure +.39480d ret_success +.39480d e2 20 sep #$20 SEP #$20 ; set A short +.39480f 64 0e stz $032e STZ DOS_STATUS +.394811 28 plp PLP +.394812 2b pld PLD +.394813 ab plb PLB +.394814 fa plx PLX +.394815 38 sec SEC +.394816 6b rtl RTL +.394817 next_cluster +.394817 e6 10 inc $0330 INC DOS_CLUS_ID ; And advance the cluster ID +.394819 d0 02 bne $39481d BNE calc_entry +.39481b e6 12 inc $0332 INC DOS_CLUS_ID+2 +.39481d 22 95 44 39 jsl $394495 calc_entry JSL ENTRYFORCLUS12 ; Calculate the LBA and offset into the buffer for the cluster +.394821 e0 00 00 cpx #$0000 CPX #0 ; Did we wrap around? +.394824 f0 03 beq $394829 BEQ chk_end_of_fat +.394826 82 93 ff brl $3947bc BRL chk_cluster ; No: go back and check it too +.394829 chk_end_of_fat +.394829 a5 24 lda $0344 LDA DOS_FAT_LBA ; Are we at the end of the FAT? +.39482b cf 18 a0 38 cmp $38a018 CMP FAT2_BEGIN_LBA ; NOTE: we use the start sector of the second FAT as our sentinel +.39482f d0 0f bne $394840 BNE next_2 +.394831 a5 26 lda $0346 LDA DOS_FAT_LBA+2 +.394833 cf 1a a0 38 cmp $38a01a CMP FAT2_BEGIN_LBA+2 +.394837 d0 07 bne $394840 BNE next_2 ; No: get the next to sectors +.394839 e2 20 sep #$20 SEP #$20 ; set A short +.39483b a9 12 lda #$12 LDA #DOS_ERR_MEDIAFULL ; Yes: return media full +.39483d 82 13 00 brl $394853 BRL ret_failure +.394840 next_2 +.394840 22 1f 47 39 jsl $39471f JSL FDC_READ2FAT12 ; Read the next two sectors of the FAT +.394844 90 06 bcc $39484c BCC fat_fail ; If failed: return error +.394846 a2 00 00 ldx #$0000 LDX #0 ; If success: Start scanning at the beginning of the sectors +.394849 82 70 ff brl $3947bc BRL chk_cluster ; And start checking from there +.39484c fat_fail +.39484c e2 20 sep #$20 SEP #$20 ; set A short +.39484e a9 06 lda #$06 LDA #DOS_ERR_FAT +.394850 82 00 00 brl $394853 BRL ret_failure +.394853 ret_failure +.394853 e2 20 sep #$20 SEP #$20 ; set A short +.394855 85 0e sta $032e STA DOS_STATUS +.394857 28 plp PLP +.394858 2b pld PLD +.394859 ab plb PLB +.39485a fa plx PLX +.39485b 18 clc CLC +.39485c 6b rtl RTL +.39485d DOS_FREECLUS32 +.39485d 8b phb PHB +.39485e 0b phd PHD +.39485f 08 php PHP +.394860 48 pha PHA ; begin setdbr macro +.394861 08 php PHP +.394862 e2 20 sep #$20 SEP #$20 ; set A short +.394864 a9 00 lda #$00 LDA #0 +.394866 48 pha PHA +.394867 ab plb PLB +.394868 28 plp PLP +.394869 68 pla PLA ; end setdbr macro +.39486a 48 pha PHA ; begin setdp macro +.39486b 08 php PHP +.39486c c2 20 rep #$20 REP #$20 ; set A long +.39486e a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394871 5b tcd TCD +.394872 28 plp PLP +.394873 68 pla PLA ; end setdp macro +.394874 c2 30 rep #$30 REP #$30 ; set A&X long +.394876 a9 00 a3 lda #$a300 LDA #<>DOS_SECTOR ; Set the location to store the sector +.394879 85 06 sta $0326 STA BIOS_BUFF_PTR +.39487b a9 38 00 lda #$0038 LDA #`DOS_SECTOR +.39487e 85 08 sta $0328 STA BIOS_BUFF_PTR+2 +.394880 af 14 a0 38 lda $38a014 LDA FAT_BEGIN_LBA ; Set the LBA to that of the first FAT sector +.394884 85 02 sta $0322 STA BIOS_LBA +.394886 af 16 a0 38 lda $38a016 LDA FAT_BEGIN_LBA+2 +.39488a 85 04 sta $0324 STA BIOS_LBA+2 +.39488c 22 44 10 00 jsl $001044 JSL GETBLOCK ; Load the sector into memory +.394890 b0 07 bcs $394899 BCS initial_entry ; If OK: set the initial entry to check +.394892 e2 20 sep #$20 SEP #$20 ; set A short +.394894 a9 06 lda #$06 LDA #DOS_ERR_FAT ; Return a NOFAT error +.394896 82 6b 00 brl $394904 BRL ret_failure +.394899 initial_entry +.394899 c2 20 rep #$20 REP #$20 ; set A long +.39489b a9 02 00 lda #$0002 LDA #2 ; Set DOS_CLUS_ID to 2 +.39489e 85 10 sta $0330 STA DOS_CLUS_ID +.3948a0 a9 00 00 lda #$0000 LDA #0 +.3948a3 85 12 sta $0332 STA DOS_CLUS_ID+2 +.3948a5 a2 08 00 ldx #$0008 LDX #8 ; Set the offset to DOS_CLUS_ID * 4 +.3948a8 bf 00 a3 38 lda $38a300,x chk_entry LDA DOS_SECTOR,X ; Is the cluster entry == $00000000? +.3948ac d0 06 bne $3948b4 BNE next_entry ; No: move to the next entry +.3948ae bf 02 a3 38 lda $38a302,x LDA DOS_SECTOR+2,X +.3948b2 f0 36 beq $3948ea BEQ found_free ; Yes: go to allocate and return it +.3948b4 e6 10 inc $0330 next_entry INC DOS_CLUS_ID ; Move to the next cluster +.3948b6 d0 02 bne $3948ba BNE inc_ptr +.3948b8 e6 12 inc $0332 INC DOS_CLUS_ID+2 +.3948ba e8 inx inc_ptr INX ; Update the index to the entry +.3948bb e8 inx INX +.3948bc e8 inx INX +.3948bd e8 inx INX +.3948be e0 00 02 cpx #$0200 CPX #DOS_SECTOR_SIZE ; Are we outside the sector? +.3948c1 90 e5 bcc $3948a8 BLT chk_entry ; No: check this entry +.3948c3 e6 02 inc $0322 INC BIOS_LBA ; Point to the next sector in the FAT +.3948c5 d0 18 bne $3948df BNE get_block +.3948c7 e6 04 inc $0324 INC BIOS_LBA+2 +.3948c9 a5 04 lda $0324 LDA BIOS_LBA+2 +.3948cb cf 1a a0 38 cmp $38a01a CMP FAT2_BEGIN_LBA+2 +.3948cf 90 0e bcc $3948df BLT get_block +.3948d1 a5 02 lda $0322 LDA BIOS_LBA +.3948d3 cf 18 a0 38 cmp $38a018 CMP FAT2_BEGIN_LBA +.3948d7 90 06 bcc $3948df BLT get_block +.3948d9 e2 20 sep #$20 SEP #$20 ; set A short +.3948db a9 12 lda #$12 LDA #DOS_ERR_MEDIAFULL ; No: throw a media full error +.3948dd 80 25 bra $394904 BRA ret_failure +.3948df 22 44 10 00 jsl $001044 get_block JSL GETBLOCK ; Attempt to read the block +.3948e3 90 1b bcc $394900 BCC ret_fat_error ; If error: throw a FAT error +.3948e5 a2 00 00 ldx #$0000 set_ptr LDX #0 ; Set index pointer to the first entry +.3948e8 80 be bra $3948a8 BRA chk_entry ; Check this entry +.3948ea found_free +.3948ea c2 20 rep #$20 REP #$20 ; set A long +.3948ec a9 ff ff lda #$ffff LDA #<>FAT_LAST_CLUSTER ; Set the entry to $0FFFFFFF to make it the last entry in its chain +.3948ef 9f 00 a3 38 sta $38a300,x STA DOS_SECTOR,X +.3948f3 a9 ff 0f lda #$0fff LDA #(FAT_LAST_CLUSTER >> 16) +.3948f6 9f 02 a3 38 sta $38a302,x STA DOS_SECTOR+2,X +.3948fa 22 24 10 00 jsl $001024 JSL PUTBLOCK ; Write the sector back to the block device +.3948fe b0 0d bcs $39490d BCS ret_success ; If OK: return success +.394900 ret_fat_error +.394900 e2 20 sep #$20 SEP #$20 ; set A short +.394902 a9 06 lda #$06 LDA #DOS_ERR_FAT ; Otherwise: return NOFAT error +.394904 ret_failure +.394904 e2 20 sep #$20 SEP #$20 ; set A short +.394906 85 0e sta $032e STA DOS_STATUS +.394908 28 plp PLP +.394909 2b pld PLD +.39490a ab plb PLB +.39490b 18 clc CLC +.39490c 6b rtl RTL +.39490d ret_success +.39490d e2 20 sep #$20 SEP #$20 ; set A short +.39490f 64 0e stz $032e STZ DOS_STATUS +.394911 28 plp PLP +.394912 2b pld PLD +.394913 ab plb PLB +.394914 38 sec SEC +.394915 6b rtl RTL +.394916 DELCLUSTER +.394916 e2 20 sep #$20 SEP #$20 ; set A short +.394918 af 01 a0 38 lda $38a001 LDA @l FILE_SYSTEM ; Get the file system code +.39491c c9 00 cmp #$00 CMP #PART_TYPE_FAT12 ; Is it FAT12? +.39491e d0 04 bne $394924 BNE fat32 ; No: assume it's FAT32 +.394920 5c 6e 49 39 jmp $39496e fat12 JML DELCLUSTER12 +.394924 4c bc 49 jmp $3949bc fat32 JMP DELCLUSTER32 +.394927 WRITEFAT12 +.394927 8b phb PHB +.394928 0b phd PHD +.394929 48 pha PHA ; begin setdbr macro +.39492a 08 php PHP +.39492b e2 20 sep #$20 SEP #$20 ; set A short +.39492d a9 00 lda #$00 LDA #0 +.39492f 48 pha PHA +.394930 ab plb PLB +.394931 28 plp PLP +.394932 68 pla PLA ; end setdbr macro +.394933 48 pha PHA ; begin setdp macro +.394934 08 php PHP +.394935 c2 20 rep #$20 REP #$20 ; set A long +.394937 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.39493a 5b tcd TCD +.39493b 28 plp PLP +.39493c 68 pla PLA ; end setdp macro +.39493d c2 30 rep #$30 REP #$30 ; set A&X long +.39493f a9 00 a5 lda #$a500 LDA #<>DOS_FAT_SECTORS ; Point to the first FAT sector in memory +.394942 85 06 sta $0326 STA BIOS_BUFF_PTR +.394944 a9 38 00 lda #$0038 LDA #`DOS_FAT_SECTORS +.394947 85 08 sta $0328 STA BIOS_BUFF_PTR+2 +.394949 a5 24 lda $0344 LDA DOS_FAT_LBA ; Set the LBA to that of the first sector's +.39494b 85 02 sta $0322 STA BIOS_LBA +.39494d a5 26 lda $0346 LDA DOS_FAT_LBA+2 +.39494f 85 04 sta $0324 STA BIOS_LBA+2 +.394951 22 24 10 00 jsl $001024 JSL PUTBLOCK ; Write the first sector back to the block device +.394955 90 14 bcc $39496b BCC done +.394957 a9 00 a7 lda #$a700 LDA #<>(DOS_FAT_SECTORS+DOS_SECTOR_SIZE) +.39495a 85 06 sta $0326 STA BIOS_BUFF_PTR +.39495c a9 38 00 lda #$0038 LDA #`(DOS_FAT_SECTORS+DOS_SECTOR_SIZE) +.39495f 85 08 sta $0328 STA BIOS_BUFF_PTR+2 +.394961 e6 02 inc $0322 INC BIOS_LBA ; Point to the next sector in the FAT +.394963 d0 02 bne $394967 BNE put_second +.394965 e6 04 inc $0324 INC BIOS_LBA+2 +.394967 22 24 10 00 jsl $001024 put_second JSL PUTBLOCK ; Write the second sector back to the block device +.39496b 2b pld done PLD +.39496c ab plb PLB +.39496d 6b rtl RTL +.39496e DELCLUSTER12 +.39496e 8b phb PHB +.39496f 0b phd PHD +.394970 08 php PHP +.394971 48 pha PHA ; begin setdbr macro +.394972 08 php PHP +.394973 e2 20 sep #$20 SEP #$20 ; set A short +.394975 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.394977 48 pha PHA +.394978 ab plb PLB +.394979 28 plp PLP +.39497a 68 pla PLA ; end setdbr macro +.39497b 48 pha PHA ; begin setdp macro +.39497c 08 php PHP +.39497d c2 20 rep #$20 REP #$20 ; set A long +.39497f a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394982 5b tcd TCD +.394983 28 plp PLP +.394984 68 pla PLA ; end setdp macro +.394985 c2 30 rep #$30 REP #$30 ; set A&X long +.394987 22 08 45 39 jsl $394508 JSL FATFORCLUSTER12 +.39498b 8a txa TXA ; Check to see if the index is odd or even +.39498c 89 01 00 bit #$0001 BIT #1 +.39498f d0 08 bne $394999 BNE is_odd +.394991 bd 00 a5 lda $38a500,x is_even LDA DOS_FAT_SECTORS,X ; Get the two bytes from the FAT +.394994 29 00 f0 and #$f000 AND #$F000 ; Mask out the lower 12 bits +.394997 80 06 bra $39499f BRA save_update +.394999 bd 00 a5 lda $38a500,x is_odd LDA DOS_FAT_SECTORS,X ; Get the two bytes from the FAT +.39499c 29 0f 00 and #$000f AND #$000F ; Mask out the upper 12 bits +.39499f 9d 00 a5 sta $38a500,x save_update STA DOS_FAT_SECTORS,X ; And write it back +.3949a2 22 27 49 39 jsl $394927 JSL WRITEFAT12 ; Write the two FAT12 sectors back to the drive +.3949a6 b0 0b bcs $3949b3 BCS ret_success +.3949a8 ret_failure +.3949a8 e2 20 sep #$20 SEP #$20 ; set A short +.3949aa a9 06 lda #$06 LDA #DOS_ERR_FAT +.3949ac 85 0e sta $032e STA DOS_STATUS +.3949ae 28 plp PLP +.3949af 2b pld PLD +.3949b0 ab plb PLB +.3949b1 18 clc CLC +.3949b2 6b rtl RTL +.3949b3 ret_success +.3949b3 e2 20 sep #$20 SEP #$20 ; set A short +.3949b5 64 0e stz $032e STZ DOS_STATUS +.3949b7 28 plp PLP +.3949b8 2b pld PLD +.3949b9 ab plb PLB +.3949ba 38 sec SEC +.3949bb 6b rtl RTL +.3949bc DELCLUSTER32 +.3949bc 8b phb PHB +.3949bd 0b phd PHD +.3949be 08 php PHP +.3949bf c2 30 rep #$30 REP #$30 ; set A&X long +.3949c1 48 pha PHA ; begin setdbr macro +.3949c2 08 php PHP +.3949c3 e2 20 sep #$20 SEP #$20 ; set A short +.3949c5 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.3949c7 48 pha PHA +.3949c8 ab plb PLB +.3949c9 28 plp PLP +.3949ca 68 pla PLA ; end setdbr macro +.3949cb 48 pha PHA ; begin setdp macro +.3949cc 08 php PHP +.3949cd c2 20 rep #$20 REP #$20 ; set A long +.3949cf a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3949d2 5b tcd TCD +.3949d3 28 plp PLP +.3949d4 68 pla PLA ; end setdp macro +.3949d5 22 70 45 39 jsl $394570 JSL FATFORCLUSTER32 +.3949d9 a9 00 00 lda #$0000 LDA #0 +.3949dc 9d 00 a5 sta $38a500,x STA DOS_FAT_SECTORS,X ; Set the cluster entry to 0 +.3949df 9d 02 a5 sta $38a502,x STA DOS_FAT_SECTORS+2,X +.3949e2 22 24 10 00 jsl $001024 JSL PUTBLOCK ; Write the sector back to the block device +.3949e6 b0 0b bcs $3949f3 BCS ret_success +.3949e8 ret_failure +.3949e8 e2 20 sep #$20 SEP #$20 ; set A short +.3949ea a9 06 lda #$06 LDA #DOS_ERR_FAT +.3949ec 85 0e sta $032e STA DOS_STATUS +.3949ee 28 plp PLP +.3949ef 2b pld PLD +.3949f0 ab plb PLB +.3949f1 18 clc CLC +.3949f2 6b rtl RTL +.3949f3 ret_success +.3949f3 e2 20 sep #$20 SEP #$20 ; set A short +.3949f5 64 0e stz $032e STZ DOS_STATUS +.3949f7 28 plp PLP +.3949f8 2b pld PLD +.3949f9 ab plb PLB +.3949fa 38 sec SEC +.3949fb 6b rtl RTL +.3949fc DOS_APPENDCLUS +.3949fc 8b phb PHB +.3949fd 0b phd PHD +.3949fe 08 php PHP +.3949ff 48 pha PHA ; begin setdbr macro +.394a00 08 php PHP +.394a01 e2 20 sep #$20 SEP #$20 ; set A short +.394a03 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.394a05 48 pha PHA +.394a06 ab plb PLB +.394a07 28 plp PLP +.394a08 68 pla PLA ; end setdbr macro +.394a09 48 pha PHA ; begin setdp macro +.394a0a 08 php PHP +.394a0b c2 20 rep #$20 REP #$20 ; set A long +.394a0d a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394a10 5b tcd TCD +.394a11 28 plp PLP +.394a12 68 pla PLA ; end setdp macro +.394a13 c2 30 rep #$30 REP #$30 ; set A&X long +.394a15 a5 12 lda $0332 LDA DOS_CLUS_ID+2 ; Save the cluster number for later +.394a17 48 pha PHA +.394a18 a5 10 lda $0330 LDA DOS_CLUS_ID +.394a1a 48 pha PHA +.394a1b 22 f4 46 39 jsl $3946f4 JSL DOS_FREECLUS ; Find a free cluster on the block device +.394a1f b0 09 bcs $394a2a BCS save_cluster ; If we got a cluster, write the data to it +.394a21 68 pla fail_cleanup PLA ; Restore the cluster of the file +.394a22 85 10 sta $0330 STA DOS_CLUS_ID +.394a24 68 pla PLA +.394a25 85 12 sta $0332 STA DOS_CLUS_ID+2 +.394a27 82 7d 00 brl $394aa7 BRL pass_failure ; Pass the failure back up the chain +.394a2a a5 10 lda $0330 save_cluster LDA DOS_CLUS_ID +.394a2c 8d 36 a0 sta $38a036 STA DOS_NEW_CLUSTER +.394a2f a5 12 lda $0332 LDA DOS_CLUS_ID+2 +.394a31 8d 38 a0 sta $38a038 STA DOS_NEW_CLUSTER+2 +.394a34 22 04 42 39 jsl $394204 JSL DOS_PUTCLUSTER ; Write the data to the free cluster +.394a38 90 e7 bcc $394a21 BCC fail_cleanup ; If failure: clean up stack and pass the failure up +.394a3a 68 pla PLA ; Restore the cluster of the file +.394a3b 85 10 sta $0330 STA DOS_CLUS_ID +.394a3d 68 pla PLA +.394a3e 85 12 sta $0332 STA DOS_CLUS_ID+2 +.394a40 22 db 45 39 jsl $3945db walk_loop JSL NEXTCLUSTER ; Try to get the next cluster in the chain +.394a44 b0 fa bcs $394a40 BCS walk_loop ; If found a cluster, keep walking the chain +.394a46 e2 20 sep #$20 SEP #$20 ; set A short +.394a48 af 01 a0 38 lda $38a001 LDA @l FILE_SYSTEM ; Get the file system code +.394a4c c9 00 cmp #$00 CMP #PART_TYPE_FAT12 ; Is it FAT12? +.394a4e d0 3d bne $394a8d BNE fat32 ; No: assume it's FAT32 +.394a50 fat12 +.394a50 c2 20 rep #$20 REP #$20 ; set A long +.394a52 22 95 44 39 jsl $394495 JSL ENTRYFORCLUS12 ; Make sure we have the right offset for the cluster +.394a56 a5 10 lda $0330 LDA DOS_CLUS_ID ; Check to see if the last cluster ID is even or odd +.394a58 89 01 00 bit #$0001 BIT #1 +.394a5b d0 11 bne $394a6e BNE is_odd +.394a5d ad 36 a0 lda $38a036 is_even LDA DOS_NEW_CLUSTER ; Handle the even case (change the lower 12 bits) +.394a60 29 ff 0f and #$0fff AND #$0FFF +.394a63 8d 36 a0 sta $38a036 STA DOS_NEW_CLUSTER +.394a66 bd 00 a5 lda $38a500,x LDA DOS_FAT_SECTORS,X +.394a69 29 00 f0 and #$f000 AND #$F000 +.394a6c 80 10 bra $394a7e BRA update_fat12 +.394a6e ad 36 a0 lda $38a036 is_odd LDA DOS_NEW_CLUSTER ; Handle the odd case (change the upper 12 bits) +.394a71 0a asl a ASL A +.394a72 0a asl a ASL A +.394a73 0a asl a ASL A +.394a74 0a asl a ASL A +.394a75 8d 36 a0 sta $38a036 STA DOS_NEW_CLUSTER +.394a78 bd 00 a5 lda $38a500,x LDA DOS_FAT_SECTORS,X +.394a7b 29 0f 00 and #$000f AND #$000F +.394a7e 0d 36 a0 ora $38a036 update_fat12 ORA DOS_NEW_CLUSTER +.394a81 9d 00 a5 sta $38a500,x STA DOS_FAT_SECTORS,X +.394a84 22 27 49 39 jsl $394927 JSL WRITEFAT12 ; Write the two FAT12 sectors back to the drive +.394a88 b0 22 bcs $394aac BCS ret_success +.394a8a 82 1a 00 brl $394aa7 BRL pass_failure +.394a8d fat32 +.394a8d c2 20 rep #$20 REP #$20 ; set A long +.394a8f ad 36 a0 lda $38a036 LDA DOS_NEW_CLUSTER ; Write the ID of the new cluster to the end of the chain +.394a92 9d 00 a5 sta $38a500,x STA DOS_FAT_SECTORS,X +.394a95 ad 38 a0 lda $38a038 LDA DOS_NEW_CLUSTER+2 +.394a98 9d 02 a5 sta $38a502,x STA DOS_FAT_SECTORS+2,X +.394a9b 22 24 10 00 jsl $001024 JSL PUTBLOCK ; Write the FAT sector back (assumes BIOS_LBA and BIOS_BUFF_PTR haven't changed) +.394a9f b0 0b bcs $394aac BCS ret_success +.394aa1 e2 20 sep #$20 SEP #$20 ; set A short +.394aa3 a9 06 lda #$06 LDA #DOS_ERR_FAT ; Problem working with the FAT +.394aa5 85 0e sta $032e STA DOS_STATUS +.394aa7 28 plp pass_failure PLP +.394aa8 2b pld PLD +.394aa9 ab plb PLB +.394aaa 18 clc CLC +.394aab 6b rtl RTL +.394aac ret_success +.394aac e2 20 sep #$20 SEP #$20 ; set A short +.394aae 64 0e stz $032e STZ DOS_STATUS +.394ab0 28 plp PLP +.394ab1 2b pld PLD +.394ab2 ab plb PLB +.394ab3 38 sec SEC +.394ab4 6b rtl RTL +.394ab5 BCD2BIN +.394ab5 8b phb PHB +.394ab6 0b phd PHD +.394ab7 08 php PHP +.394ab8 48 pha PHA ; begin setdbr macro +.394ab9 08 php PHP +.394aba e2 20 sep #$20 SEP #$20 ; set A short +.394abc a9 00 lda #$00 LDA #0 +.394abe 48 pha PHA +.394abf ab plb PLB +.394ac0 28 plp PLP +.394ac1 68 pla PLA ; end setdbr macro +.394ac2 48 pha PHA ; begin setdp macro +.394ac3 08 php PHP +.394ac4 c2 20 rep #$20 REP #$20 ; set A long +.394ac6 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394ac9 5b tcd TCD +.394aca 28 plp PLP +.394acb 68 pla PLA ; end setdp macro +.394acc c2 30 rep #$30 REP #$30 ; set A&X long +.394ace 85 28 sta $0348 STA DOS_TEMP +.394ad0 29 0f 00 and #$000f AND #$000F +.394ad3 85 2a sta $034a STA DOS_TEMP+2 +.394ad5 a5 28 lda $0348 LDA DOS_TEMP +.394ad7 4a lsr a LSR A +.394ad8 4a lsr a LSR A +.394ad9 4a lsr a LSR A +.394ada 4a lsr a LSR A +.394adb 85 28 sta $0348 STA DOS_TEMP +.394add 29 0f 00 and #$000f AND #$000F +.394ae0 8f 00 01 00 sta $000100 STA @l UNSIGNED_MULT_A_LO +.394ae4 a9 0a 00 lda #$000a LDA #10 +.394ae7 8f 02 01 00 sta $000102 STA @l UNSIGNED_MULT_B_LO +.394aeb af 04 01 00 lda $000104 LDA @l UNSIGNED_MULT_AL_LO +.394aef 18 clc CLC +.394af0 65 2a adc $034a ADC DOS_TEMP+2 +.394af2 85 2a sta $034a STA DOS_TEMP+2 +.394af4 a5 28 lda $0348 LDA DOS_TEMP +.394af6 4a lsr a LSR A +.394af7 4a lsr a LSR A +.394af8 4a lsr a LSR A +.394af9 4a lsr a LSR A +.394afa 85 28 sta $0348 STA DOS_TEMP +.394afc 29 0f 00 and #$000f AND #$000F +.394aff 8f 00 01 00 sta $000100 STA @l UNSIGNED_MULT_A_LO +.394b03 a9 64 00 lda #$0064 LDA #100 +.394b06 8f 02 01 00 sta $000102 STA @l UNSIGNED_MULT_B_LO +.394b0a af 04 01 00 lda $000104 LDA @l UNSIGNED_MULT_AL_LO +.394b0e 18 clc CLC +.394b0f 65 2a adc $034a ADC DOS_TEMP+2 +.394b11 85 2a sta $034a STA DOS_TEMP+2 +.394b13 a5 28 lda $0348 LDA DOS_TEMP +.394b15 4a lsr a LSR A +.394b16 4a lsr a LSR A +.394b17 4a lsr a LSR A +.394b18 4a lsr a LSR A +.394b19 29 0f 00 and #$000f AND #$000F +.394b1c 8f 00 01 00 sta $000100 STA @l UNSIGNED_MULT_A_LO +.394b20 a9 e8 03 lda #$03e8 LDA #1000 +.394b23 8f 02 01 00 sta $000102 STA @l UNSIGNED_MULT_B_LO +.394b27 af 04 01 00 lda $000104 LDA @l UNSIGNED_MULT_AL_LO +.394b2b 18 clc CLC +.394b2c 65 2a adc $034a ADC DOS_TEMP+2 +.394b2e 28 plp PLP +.394b2f 2b pld PLD +.394b30 ab plb PLB +.394b31 6b rtl RTL +.394b32 DOS_RTCCREATE +.394b32 8b phb PHB +.394b33 0b phd PHD +.394b34 08 php PHP +.394b35 48 pha PHA ; begin setdbr macro +.394b36 08 php PHP +.394b37 e2 20 sep #$20 SEP #$20 ; set A short +.394b39 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.394b3b 48 pha PHA +.394b3c ab plb PLB +.394b3d 28 plp PLP +.394b3e 68 pla PLA ; end setdbr macro +.394b3f 48 pha PHA ; begin setdp macro +.394b40 08 php PHP +.394b41 c2 20 rep #$20 REP #$20 ; set A long +.394b43 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394b46 5b tcd TCD +.394b47 28 plp PLP +.394b48 68 pla PLA ; end setdp macro +.394b49 c2 10 rep #$10 REP #$10 ; set X long +.394b4b e2 20 sep #$20 SEP #$20 ; set A short +.394b4d af 0e 08 af lda $af080e LDA @l RTC_CTRL ; Turn off the updates to the clock +.394b51 09 08 ora #$08 ORA #%00001000 +.394b53 8f 0e 08 af sta $af080e STA @l RTC_CTRL +.394b57 af 0f 08 af lda $af080f LDA @l RTC_CENTURY +.394b5b 85 29 sta $0349 STA DOS_TEMP+1 +.394b5d af 0a 08 af lda $af080a LDA @l RTC_YEAR ; Get the year +.394b61 85 28 sta $0348 STA DOS_TEMP +.394b63 c2 20 rep #$20 REP #$20 ; set A long +.394b65 a5 28 lda $0348 LDA DOS_TEMP +.394b67 22 b5 4a 39 jsl $394ab5 JSL BCD2BIN ; Convert it to binary +.394b6b 85 28 sta $0348 STA DOS_TEMP +.394b6d 38 sec SEC ; Year is relative to 1980 +.394b6e e9 bc 07 sbc #$07bc SBC #1980 +.394b71 c2 20 rep #$20 REP #$20 ; set A long +.394b73 0a asl a ASL A +.394b74 0a asl a ASL A +.394b75 0a asl a ASL A +.394b76 0a asl a ASL A +.394b77 0a asl a ASL A +.394b78 0a asl a ASL A +.394b79 0a asl a ASL A +.394b7a 0a asl a ASL A .394b7b 0a asl a ASL A -.394b7c 0a asl a ASL A -.394b7d 0a asl a ASL A -.394b7e 0a asl a ASL A -.394b7f 0a asl a ASL A -.394b80 0a asl a ASL A -.394b81 0a asl a ASL A -.394b82 0a asl a ASL A -.394b83 0a asl a ASL A -.394b84 29 00 fe and #$fe00 AND #$FE00 -.394b87 a0 16 00 ldy #$0016 LDY #FILEDESC.CREATE_DATE ; And save it to the creation date field -.394b8a 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394b8c e2 20 sep #$20 SEP #$20 ; set A short -.394b8e af 09 08 af lda $af0809 LDA @l RTC_MONTH ; Get the month -.394b92 c2 20 rep #$20 REP #$20 ; set A long -.394b94 29 ff 00 and #$00ff AND #$00FF -.394b97 22 bd 4a 39 jsl $394abd JSL BCD2BIN ; Convert it to binary -.394b9b 29 ff 00 and #$00ff AND #$00FF ; Move the year to bits 15 - 9 -.394b9e 0a asl a ASL A -.394b9f 0a asl a ASL A -.394ba0 0a asl a ASL A -.394ba1 0a asl a ASL A -.394ba2 0a asl a ASL A -.394ba3 29 e0 01 and #$01e0 AND #$01E0 ; Make sure only the month is covered -.394ba6 a0 16 00 ldy #$0016 LDY #FILEDESC.CREATE_DATE ; And save it to the creation date field -.394ba9 17 20 ora [$0340],y ORA [DOS_FD_PTR],Y -.394bab 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394bad e2 20 sep #$20 SEP #$20 ; set A short -.394baf af 06 08 af lda $af0806 LDA @l RTC_DAY ; Get the day -.394bb3 c2 20 rep #$20 REP #$20 ; set A long -.394bb5 29 ff 00 and #$00ff AND #$00FF -.394bb8 22 bd 4a 39 jsl $394abd JSL BCD2BIN ; Convert it to binary -.394bbc 29 1f 00 and #$001f AND #$001F ; Make sure only the day is covered -.394bbf a0 16 00 ldy #$0016 LDY #FILEDESC.CREATE_DATE ; And save it to the creation date field -.394bc2 17 20 ora [$0340],y ORA [DOS_FD_PTR],Y -.394bc4 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394bc6 e2 20 sep #$20 SEP #$20 ; set A short -.394bc8 af 04 08 af lda $af0804 LDA @l RTC_HRS ; Get the hour -.394bcc 29 1f and #$1f AND #$1F ; Trim AM/PM bit -.394bce c2 20 rep #$20 REP #$20 ; set A long -.394bd0 29 ff 00 and #$00ff AND #$00FF -.394bd3 22 bd 4a 39 jsl $394abd JSL BCD2BIN ; Convert it to binary -.394bd7 c2 20 rep #$20 REP #$20 ; set A long +.394b7c 29 00 fe and #$fe00 AND #$FE00 +.394b7f a0 16 00 ldy #$0016 LDY #FILEDESC.CREATE_DATE ; And save it to the creation date field +.394b82 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394b84 e2 20 sep #$20 SEP #$20 ; set A short +.394b86 af 09 08 af lda $af0809 LDA @l RTC_MONTH ; Get the month +.394b8a c2 20 rep #$20 REP #$20 ; set A long +.394b8c 29 ff 00 and #$00ff AND #$00FF +.394b8f 22 b5 4a 39 jsl $394ab5 JSL BCD2BIN ; Convert it to binary +.394b93 29 ff 00 and #$00ff AND #$00FF ; Move the year to bits 15 - 9 +.394b96 0a asl a ASL A +.394b97 0a asl a ASL A +.394b98 0a asl a ASL A +.394b99 0a asl a ASL A +.394b9a 0a asl a ASL A +.394b9b 29 e0 01 and #$01e0 AND #$01E0 ; Make sure only the month is covered +.394b9e a0 16 00 ldy #$0016 LDY #FILEDESC.CREATE_DATE ; And save it to the creation date field +.394ba1 17 20 ora [$0340],y ORA [DOS_FD_PTR],Y +.394ba3 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394ba5 e2 20 sep #$20 SEP #$20 ; set A short +.394ba7 af 06 08 af lda $af0806 LDA @l RTC_DAY ; Get the day +.394bab c2 20 rep #$20 REP #$20 ; set A long +.394bad 29 ff 00 and #$00ff AND #$00FF +.394bb0 22 b5 4a 39 jsl $394ab5 JSL BCD2BIN ; Convert it to binary +.394bb4 29 1f 00 and #$001f AND #$001F ; Make sure only the day is covered +.394bb7 a0 16 00 ldy #$0016 LDY #FILEDESC.CREATE_DATE ; And save it to the creation date field +.394bba 17 20 ora [$0340],y ORA [DOS_FD_PTR],Y +.394bbc 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394bbe e2 20 sep #$20 SEP #$20 ; set A short +.394bc0 af 04 08 af lda $af0804 LDA @l RTC_HRS ; Get the hour +.394bc4 29 1f and #$1f AND #$1F ; Trim AM/PM bit +.394bc6 c2 20 rep #$20 REP #$20 ; set A long +.394bc8 29 ff 00 and #$00ff AND #$00FF +.394bcb 22 b5 4a 39 jsl $394ab5 JSL BCD2BIN ; Convert it to binary +.394bcf c2 20 rep #$20 REP #$20 ; set A long +.394bd1 0a asl a ASL A +.394bd2 0a asl a ASL A +.394bd3 0a asl a ASL A +.394bd4 0a asl a ASL A +.394bd5 0a asl a ASL A +.394bd6 0a asl a ASL A +.394bd7 0a asl a ASL A +.394bd8 0a asl a ASL A .394bd9 0a asl a ASL A .394bda 0a asl a ASL A .394bdb 0a asl a ASL A -.394bdc 0a asl a ASL A -.394bdd 0a asl a ASL A -.394bde 0a asl a ASL A -.394bdf 0a asl a ASL A -.394be0 0a asl a ASL A -.394be1 0a asl a ASL A -.394be2 0a asl a ASL A -.394be3 0a asl a ASL A -.394be4 29 00 f8 and #$f800 AND #$F800 -.394be7 a0 18 00 ldy #$0018 LDY #FILEDESC.CREATE_TIME ; And save it to the creation time field -.394bea 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394bec e2 20 sep #$20 SEP #$20 ; set A short -.394bee af 02 08 af lda $af0802 LDA @l RTC_MIN ; Get the minute -.394bf2 c2 20 rep #$20 REP #$20 ; set A long -.394bf4 29 ff 00 and #$00ff AND #$00FF -.394bf7 22 bd 4a 39 jsl $394abd JSL BCD2BIN ; Convert it to binary -.394bfb c2 20 rep #$20 REP #$20 ; set A long -.394bfd 0a asl a ASL A -.394bfe 0a asl a ASL A -.394bff 0a asl a ASL A -.394c00 0a asl a ASL A -.394c01 0a asl a ASL A -.394c02 29 e0 07 and #$07e0 AND #$07E0 -.394c05 a0 18 00 ldy #$0018 LDY #FILEDESC.CREATE_TIME ; And save it to the creation time field -.394c08 17 20 ora [$0340],y ORA [DOS_FD_PTR],Y -.394c0a 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394c0c e2 20 sep #$20 SEP #$20 ; set A short -.394c0e af 00 08 af lda $af0800 LDA @l RTC_SEC ; Get the second -.394c12 c2 20 rep #$20 REP #$20 ; set A long -.394c14 29 ff 00 and #$00ff AND #$00FF -.394c17 22 bd 4a 39 jsl $394abd JSL BCD2BIN ; Convert it to binary -.394c1b c2 20 rep #$20 REP #$20 ; set A long -.394c1d 29 1f 00 and #$001f AND #$001F -.394c20 a0 18 00 ldy #$0018 LDY #FILEDESC.CREATE_TIME ; And save it to the creation time field -.394c23 17 20 ora [$0340],y ORA [DOS_FD_PTR],Y -.394c25 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394c27 af 0e 08 af lda $af080e LDA @l RTC_CTRL ; Turn on the updates again -.394c2b 29 f7 00 and #$00f7 AND #%11110111 -.394c2e 8f 0e 08 af sta $af080e STA @l RTC_CTRL -.394c32 28 plp PLP -.394c33 2b pld PLD -.394c34 ab plb PLB -.394c35 6b rtl RTL -.394c36 DOS_CREATE -.394c36 8b phb PHB -.394c37 0b phd PHD -.394c38 08 php PHP -.394c39 48 pha PHA ; begin setdbr macro -.394c3a 08 php PHP -.394c3b e2 20 sep #$20 SEP #$20 ; set A short -.394c3d a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.394c3f 48 pha PHA -.394c40 ab plb PLB -.394c41 28 plp PLP -.394c42 68 pla PLA ; end setdbr macro -.394c43 48 pha PHA ; begin setdp macro -.394c44 08 php PHP -.394c45 c2 20 rep #$20 REP #$20 ; set A long -.394c47 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394c4a 5b tcd TCD -.394c4b 28 plp PLP -.394c4c 68 pla PLA ; end setdp macro -.394c4d c2 30 rep #$30 REP #$30 ; set A&X long -.394c4f a0 02 00 ldy #$0002 LDY #FILEDESC.PATH ; DOS_TEMP := DOS_FD_PTR->PATH -.394c52 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394c54 85 28 sta $0348 STA DOS_TEMP -.394c56 c8 iny INY -.394c57 c8 iny INY -.394c58 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394c5a 85 2a sta $034a STA DOS_TEMP+2 -.394c5c e2 20 sep #$20 SEP #$20 ; set A short -.394c5e a0 00 00 ldy #$0000 LDY #0 -.394c61 a2 00 00 ldx #$0000 LDX #0 -.394c64 b7 28 lda [$0348],y path_loop LDA [DOS_TEMP],Y ; Get a byte of the path -.394c66 95 e0 sta $0400,x STA DOS_PATH_BUFF,X ; ... save it to the path buffer -.394c68 f0 04 beq $394c6e BEQ find_file ; If it's NULL, we're done -.394c6a e8 inx INX -.394c6b c8 iny INY -.394c6c 80 f6 bra $394c64 BRA path_loop -.394c6e 22 1d 43 39 jsl $39431d find_file JSL DOS_PARSE_PATH -.394c72 22 b5 43 39 jsl $3943b5 JSL DOS_FINDFILE -.394c76 90 07 bcc $394c7f BCC set_device -.394c78 e2 20 sep #$20 SEP #$20 ; set A short -.394c7a a9 0b lda #$0b LDA #DOS_ERR_FILEEXISTS -.394c7c 82 d2 00 brl $394d51 BRL ret_failure -.394c7f set_device -.394c7f e2 20 sep #$20 SEP #$20 ; set A short -.394c81 a0 01 00 ldy #$0001 LDY #FILEDESC.DEV ; Set the device in the file descriptor -.394c84 a5 01 lda $0321 LDA BIOS_DEV -.394c86 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394c88 validate_name -.394c88 22 fc 46 39 jsl $3946fc JSL DOS_FREECLUS -.394c8c b0 03 bcs $394c91 BCS save_data -.394c8e 82 c4 00 brl $394d55 BRL pass_failure -.394c91 save_data -.394c91 c2 20 rep #$20 REP #$20 ; set A long -.394c93 a0 0a 00 ldy #$000a LDY #FILEDESC.FIRST_CLUSTER -.394c96 a5 10 lda $0330 LDA DOS_CLUS_ID ; DOS_FD_PTR->FIRST_CLUSTER := DOS_CLUS_ID -.394c98 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394c9a c8 iny INY -.394c9b c8 iny INY -.394c9c a5 12 lda $0332 LDA DOS_CLUS_ID+2 -.394c9e 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394ca0 a0 0e 00 ldy #$000e LDY #FILEDESC.BUFFER ; DOS_BUFF_PTR := DOS_FD_PTR->BUFFER -.394ca3 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394ca5 85 1c sta $033c STA DOS_BUFF_PTR -.394ca7 c8 iny INY -.394ca8 c8 iny INY -.394ca9 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394cab 85 1e sta $033e STA DOS_BUFF_PTR+2 -.394cad 22 0c 42 39 jsl $39420c JSL DOS_PUTCLUSTER -.394cb1 b0 00 bcs $394cb3 BCS find_dir -.394cb3 find_dir +.394bdc 29 00 f8 and #$f800 AND #$F800 +.394bdf a0 18 00 ldy #$0018 LDY #FILEDESC.CREATE_TIME ; And save it to the creation time field +.394be2 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394be4 e2 20 sep #$20 SEP #$20 ; set A short +.394be6 af 02 08 af lda $af0802 LDA @l RTC_MIN ; Get the minute +.394bea c2 20 rep #$20 REP #$20 ; set A long +.394bec 29 ff 00 and #$00ff AND #$00FF +.394bef 22 b5 4a 39 jsl $394ab5 JSL BCD2BIN ; Convert it to binary +.394bf3 c2 20 rep #$20 REP #$20 ; set A long +.394bf5 0a asl a ASL A +.394bf6 0a asl a ASL A +.394bf7 0a asl a ASL A +.394bf8 0a asl a ASL A +.394bf9 0a asl a ASL A +.394bfa 29 e0 07 and #$07e0 AND #$07E0 +.394bfd a0 18 00 ldy #$0018 LDY #FILEDESC.CREATE_TIME ; And save it to the creation time field +.394c00 17 20 ora [$0340],y ORA [DOS_FD_PTR],Y +.394c02 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394c04 e2 20 sep #$20 SEP #$20 ; set A short +.394c06 af 00 08 af lda $af0800 LDA @l RTC_SEC ; Get the second +.394c0a c2 20 rep #$20 REP #$20 ; set A long +.394c0c 29 ff 00 and #$00ff AND #$00FF +.394c0f 22 b5 4a 39 jsl $394ab5 JSL BCD2BIN ; Convert it to binary +.394c13 c2 20 rep #$20 REP #$20 ; set A long +.394c15 29 1f 00 and #$001f AND #$001F +.394c18 a0 18 00 ldy #$0018 LDY #FILEDESC.CREATE_TIME ; And save it to the creation time field +.394c1b 17 20 ora [$0340],y ORA [DOS_FD_PTR],Y +.394c1d 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394c1f af 0e 08 af lda $af080e LDA @l RTC_CTRL ; Turn on the updates again +.394c23 29 f7 00 and #$00f7 AND #%11110111 +.394c26 8f 0e 08 af sta $af080e STA @l RTC_CTRL +.394c2a 28 plp PLP +.394c2b 2b pld PLD +.394c2c ab plb PLB +.394c2d 6b rtl RTL +.394c2e DOS_CREATE +.394c2e 8b phb PHB +.394c2f 0b phd PHD +.394c30 08 php PHP +.394c31 48 pha PHA ; begin setdbr macro +.394c32 08 php PHP +.394c33 e2 20 sep #$20 SEP #$20 ; set A short +.394c35 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.394c37 48 pha PHA +.394c38 ab plb PLB +.394c39 28 plp PLP +.394c3a 68 pla PLA ; end setdbr macro +.394c3b 48 pha PHA ; begin setdp macro +.394c3c 08 php PHP +.394c3d c2 20 rep #$20 REP #$20 ; set A long +.394c3f a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394c42 5b tcd TCD +.394c43 28 plp PLP +.394c44 68 pla PLA ; end setdp macro +.394c45 c2 30 rep #$30 REP #$30 ; set A&X long +.394c47 a0 02 00 ldy #$0002 LDY #FILEDESC.PATH ; DOS_TEMP := DOS_FD_PTR->PATH +.394c4a b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394c4c 85 28 sta $0348 STA DOS_TEMP +.394c4e c8 iny INY +.394c4f c8 iny INY +.394c50 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394c52 85 2a sta $034a STA DOS_TEMP+2 +.394c54 e2 20 sep #$20 SEP #$20 ; set A short +.394c56 a0 00 00 ldy #$0000 LDY #0 +.394c59 a2 00 00 ldx #$0000 LDX #0 +.394c5c b7 28 lda [$0348],y path_loop LDA [DOS_TEMP],Y ; Get a byte of the path +.394c5e 95 e0 sta $0400,x STA DOS_PATH_BUFF,X ; ... save it to the path buffer +.394c60 f0 04 beq $394c66 BEQ find_file ; If it's NULL, we're done +.394c62 e8 inx INX +.394c63 c8 iny INY +.394c64 80 f6 bra $394c5c BRA path_loop +.394c66 22 15 43 39 jsl $394315 find_file JSL DOS_PARSE_PATH +.394c6a 22 ad 43 39 jsl $3943ad JSL DOS_FINDFILE +.394c6e 90 07 bcc $394c77 BCC set_device +.394c70 e2 20 sep #$20 SEP #$20 ; set A short +.394c72 a9 0b lda #$0b LDA #DOS_ERR_FILEEXISTS +.394c74 82 d2 00 brl $394d49 BRL ret_failure +.394c77 set_device +.394c77 e2 20 sep #$20 SEP #$20 ; set A short +.394c79 a0 01 00 ldy #$0001 LDY #FILEDESC.DEV ; Set the device in the file descriptor +.394c7c a5 01 lda $0321 LDA BIOS_DEV +.394c7e 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394c80 validate_name +.394c80 22 f4 46 39 jsl $3946f4 JSL DOS_FREECLUS +.394c84 b0 03 bcs $394c89 BCS save_data +.394c86 82 c4 00 brl $394d4d BRL pass_failure +.394c89 save_data +.394c89 c2 20 rep #$20 REP #$20 ; set A long +.394c8b a0 0a 00 ldy #$000a LDY #FILEDESC.FIRST_CLUSTER +.394c8e a5 10 lda $0330 LDA DOS_CLUS_ID ; DOS_FD_PTR->FIRST_CLUSTER := DOS_CLUS_ID +.394c90 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394c92 c8 iny INY +.394c93 c8 iny INY +.394c94 a5 12 lda $0332 LDA DOS_CLUS_ID+2 +.394c96 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394c98 a0 0e 00 ldy #$000e LDY #FILEDESC.BUFFER ; DOS_BUFF_PTR := DOS_FD_PTR->BUFFER +.394c9b b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394c9d 85 1c sta $033c STA DOS_BUFF_PTR +.394c9f c8 iny INY +.394ca0 c8 iny INY +.394ca1 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394ca3 85 1e sta $033e STA DOS_BUFF_PTR+2 +.394ca5 22 04 42 39 jsl $394204 JSL DOS_PUTCLUSTER +.394ca9 b0 00 bcs $394cab BCS find_dir +.394cab find_dir +.394cab c2 20 rep #$20 REP #$20 ; set A long +.394cad 22 3f 3d 39 jsl $393d3f JSL DOS_DIRFINDFREE +.394cb1 b0 1a bcs $394ccd BCS set_entry .394cb3 c2 20 rep #$20 REP #$20 ; set A long -.394cb5 22 47 3d 39 jsl $393d47 JSL DOS_DIRFINDFREE -.394cb9 b0 1a bcs $394cd5 BCS set_entry -.394cbb c2 20 rep #$20 REP #$20 ; set A long -.394cbd a0 0a 00 ldy #$000a LDY #FILEDESC.FIRST_CLUSTER ; Failed to get the directory entry... -.394cc0 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y ; DOS_CLUS_ID := DOS_FD_PTR->FIRST_CLUSTER -.394cc2 85 10 sta $0330 STA DOS_CLUS_ID -.394cc4 c8 iny INY -.394cc5 c8 iny INY -.394cc6 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394cc8 85 12 sta $0332 STA DOS_CLUS_ID+2 -.394cca 22 c4 49 39 jsl $3949c4 JSL DELCLUSTER32 ; Delete the cluster -.394cce e2 20 sep #$20 SEP #$20 ; set A short -.394cd0 a9 08 lda #$08 LDA #DOS_ERR_NODIR ; Return that we couldn't read the directory -.394cd2 82 7c 00 brl $394d51 BRL ret_failure -.394cd5 set_entry -.394cd5 e2 20 sep #$20 SEP #$20 ; set A short -.394cd7 a0 00 00 ldy #$0000 LDY #0 -.394cda a9 00 lda #$00 LDA #0 ; NULL -.394cdc 97 18 sta [$0338],y copy_dir_loop STA [DOS_DIR_PTR],Y ; Save it to the directory cluster -.394cde c8 iny INY -.394cdf c0 20 00 cpy #$0020 CPY #SIZE(DIRENTRY) -.394ce2 d0 f8 bne $394cdc BNE copy_dir_loop -.394ce4 a0 00 00 ldy #$0000 LDY #0 -.394ce7 b9 3a a0 lda $38a03a,y name_loop LDA DOS_SHORT_NAME,Y ; Copy the name over -.394cea 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y -.394cec c8 iny INY -.394ced c0 0b 00 cpy #$000b CPY #11 -.394cf0 d0 f5 bne $394ce7 BNE name_loop -.394cf2 c2 20 rep #$20 REP #$20 ; set A long -.394cf4 a0 0a 00 ldy #$000a LDY #FILEDESC.FIRST_CLUSTER ; DOS_DIR_PTR->CLUSTER_L := DOS_FD_PTR->FIRST_CLUSTER[15..0] -.394cf7 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394cf9 a0 1a 00 ldy #$001a LDY #DIRENTRY.CLUSTER_L -.394cfc 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y -.394cfe a0 0c 00 ldy #$000c LDY #FILEDESC.FIRST_CLUSTER+2 ; DOS_DIR_PTR->CLUSTER_H := DOS_FD_PTR->FIRST_CLUSTER[31..16] -.394d01 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394d03 a0 14 00 ldy #$0014 LDY #DIRENTRY.CLUSTER_H -.394d06 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y -.394d08 a0 12 00 ldy #$0012 LDY #FILEDESC.SIZE ; DOS_DIR_PTR->SIZE := DOS_FD_PTR->SIZE -.394d0b b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394d0d a0 1c 00 ldy #$001c LDY #DIRENTRY.SIZE -.394d10 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y -.394d12 a0 14 00 ldy #$0014 LDY #FILEDESC.SIZE+2 -.394d15 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394d17 a0 1e 00 ldy #$001e LDY #DIRENTRY.SIZE+2 -.394d1a 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y -.394d1c a9 00 00 lda #$0000 LDA #0 ; Force create date-time to 0 -.394d1f a0 16 00 ldy #$0016 LDY #FILEDESC.CREATE_DATE ; TODO: restore the RTC integration when that is working better. -.394d22 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394d24 a0 18 00 ldy #$0018 LDY #FILEDESC.CREATE_TIME -.394d27 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394d29 a0 16 00 ldy #$0016 LDY #FILEDESC.CREATE_DATE ; DOS_DIR_PTR->CREATE_DATE := DOS_FD_PTR->CREATE_DATE -.394d2c b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394d2e a0 10 00 ldy #$0010 LDY #DIRENTRY.CREATE_DATE -.394d31 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y -.394d33 a0 18 00 ldy #$0018 LDY #DIRENTRY.MODIFIED_DATE ; And DOS_DIR_PTR->MODIFIED_DATE -.394d36 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y -.394d38 a0 18 00 ldy #$0018 LDY #FILEDESC.CREATE_TIME ; DOS_DIR_PTR->CREATE_TIME := DOS_FD_PTR->CREATE_TIME -.394d3b b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394d3d a0 0e 00 ldy #$000e LDY #DIRENTRY.CREATE_TIME -.394d40 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y -.394d42 a0 16 00 ldy #$0016 LDY #DIRENTRY.MODIFIED_TIME ; And DOS_DIR_PTR->MODIFIED_TIME -.394d45 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y -.394d47 c2 20 rep #$20 REP #$20 ; set A long -.394d49 22 05 3e 39 jsl $393e05 JSL DOS_DIRWRITE -.394d4d b0 0b bcs $394d5a BCS ret_success -.394d4f 80 04 bra $394d55 BRA pass_failure -.394d51 ret_failure -.394d51 e2 20 sep #$20 SEP #$20 ; set A short -.394d53 85 0e sta $032e STA DOS_STATUS -.394d55 28 plp pass_failure PLP -.394d56 2b pld PLD -.394d57 ab plb PLB -.394d58 18 clc CLC -.394d59 6b rtl RTL -.394d5a ret_success -.394d5a e2 20 sep #$20 SEP #$20 ; set A short -.394d5c 64 0e stz $032e STZ DOS_STATUS -.394d5e 28 plp PLP -.394d5f 2b pld PLD -.394d60 ab plb PLB -.394d61 38 sec SEC -.394d62 6b rtl RTL -.394d63 DOS_COPYPATH -.394d63 da phx PHX -.394d64 5a phy PHY -.394d65 8b phb PHB -.394d66 0b phd PHD -.394d67 08 php PHP -.394d68 48 pha PHA ; begin setdbr macro -.394d69 08 php PHP -.394d6a e2 20 sep #$20 SEP #$20 ; set A short -.394d6c a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.394d6e 48 pha PHA -.394d6f ab plb PLB -.394d70 28 plp PLP -.394d71 68 pla PLA ; end setdbr macro -.394d72 48 pha PHA ; begin setdp macro -.394d73 08 php PHP -.394d74 c2 20 rep #$20 REP #$20 ; set A long -.394d76 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394d79 5b tcd TCD -.394d7a 28 plp PLP -.394d7b 68 pla PLA ; end setdp macro -.394d7c c2 30 rep #$30 REP #$30 ; set A&X long -.394d7e a9 00 00 lda #$0000 LDA #0 ; Set the DOS_PATH_BUFF to all zeros -.394d81 a2 00 00 ldx #$0000 LDX #0 -.394d84 95 e0 sta $0400,x clr_loop STA DOS_PATH_BUFF,X -.394d86 e8 inx INX -.394d87 e8 inx INX -.394d88 e0 00 01 cpx #$0100 CPX #256 -.394d8b d0 f7 bne $394d84 BNE clr_loop -.394d8d a5 20 lda $0340 LDA DOS_FD_PTR ; Is the DOS_FD_PTR null? -.394d8f d0 04 bne $394d95 BNE get_path ; No: attempt to fetch the path -.394d91 a5 22 lda $0342 LDA DOS_FD_PTR+2 -.394d93 f0 27 beq $394dbc BEQ done ; Yes: return an empty buffer -.394d95 a0 02 00 ldy #$0002 get_path LDY #FILEDESC.PATH ; Get the path buffer -.394d98 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394d9a 85 28 sta $0348 STA DOS_TEMP -.394d9c c8 iny INY -.394d9d c8 iny INY -.394d9e b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394da0 85 2a sta $034a STA DOS_TEMP+2 -.394da2 a5 28 lda $0348 LDA DOS_TEMP ; Is the path pointer NULL? -.394da4 d0 04 bne $394daa BNE start_copy ; No: start copying it -.394da6 a5 2a lda $034a LDA DOS_TEMP+2 -.394da8 f0 12 beq $394dbc BEQ done ; Yes: return an empty buffer -.394daa start_copy -.394daa e2 20 sep #$20 SEP #$20 ; set A short -.394dac a2 00 00 ldx #$0000 LDX #0 -.394daf a0 00 00 ldy #$0000 LDY #0 -.394db2 b7 28 lda [$0348],y loop LDA [DOS_TEMP],Y -.394db4 95 e0 sta $0400,x STA DOS_PATH_BUFF,X -.394db6 f0 04 beq $394dbc BEQ done -.394db8 e8 inx INX -.394db9 c8 iny INY -.394dba d0 f6 bne $394db2 BNE loop -.394dbc 28 plp done PLP -.394dbd 2b pld PLD -.394dbe ab plb PLB -.394dbf 7a ply PLY -.394dc0 fa plx PLX -.394dc1 6b rtl RTL +.394cb5 a0 0a 00 ldy #$000a LDY #FILEDESC.FIRST_CLUSTER ; Failed to get the directory entry... +.394cb8 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y ; DOS_CLUS_ID := DOS_FD_PTR->FIRST_CLUSTER +.394cba 85 10 sta $0330 STA DOS_CLUS_ID +.394cbc c8 iny INY +.394cbd c8 iny INY +.394cbe b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394cc0 85 12 sta $0332 STA DOS_CLUS_ID+2 +.394cc2 22 bc 49 39 jsl $3949bc JSL DELCLUSTER32 ; Delete the cluster +.394cc6 e2 20 sep #$20 SEP #$20 ; set A short +.394cc8 a9 08 lda #$08 LDA #DOS_ERR_NODIR ; Return that we couldn't read the directory +.394cca 82 7c 00 brl $394d49 BRL ret_failure +.394ccd set_entry +.394ccd e2 20 sep #$20 SEP #$20 ; set A short +.394ccf a0 00 00 ldy #$0000 LDY #0 +.394cd2 a9 00 lda #$00 LDA #0 ; NULL +.394cd4 97 18 sta [$0338],y copy_dir_loop STA [DOS_DIR_PTR],Y ; Save it to the directory cluster +.394cd6 c8 iny INY +.394cd7 c0 20 00 cpy #$0020 CPY #SIZE(DIRENTRY) +.394cda d0 f8 bne $394cd4 BNE copy_dir_loop +.394cdc a0 00 00 ldy #$0000 LDY #0 +.394cdf b9 3a a0 lda $38a03a,y name_loop LDA DOS_SHORT_NAME,Y ; Copy the name over +.394ce2 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y +.394ce4 c8 iny INY +.394ce5 c0 0b 00 cpy #$000b CPY #11 +.394ce8 d0 f5 bne $394cdf BNE name_loop +.394cea c2 20 rep #$20 REP #$20 ; set A long +.394cec a0 0a 00 ldy #$000a LDY #FILEDESC.FIRST_CLUSTER ; DOS_DIR_PTR->CLUSTER_L := DOS_FD_PTR->FIRST_CLUSTER[15..0] +.394cef b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394cf1 a0 1a 00 ldy #$001a LDY #DIRENTRY.CLUSTER_L +.394cf4 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y +.394cf6 a0 0c 00 ldy #$000c LDY #FILEDESC.FIRST_CLUSTER+2 ; DOS_DIR_PTR->CLUSTER_H := DOS_FD_PTR->FIRST_CLUSTER[31..16] +.394cf9 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394cfb a0 14 00 ldy #$0014 LDY #DIRENTRY.CLUSTER_H +.394cfe 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y +.394d00 a0 12 00 ldy #$0012 LDY #FILEDESC.SIZE ; DOS_DIR_PTR->SIZE := DOS_FD_PTR->SIZE +.394d03 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394d05 a0 1c 00 ldy #$001c LDY #DIRENTRY.SIZE +.394d08 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y +.394d0a a0 14 00 ldy #$0014 LDY #FILEDESC.SIZE+2 +.394d0d b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394d0f a0 1e 00 ldy #$001e LDY #DIRENTRY.SIZE+2 +.394d12 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y +.394d14 a9 00 00 lda #$0000 LDA #0 ; Force create date-time to 0 +.394d17 a0 16 00 ldy #$0016 LDY #FILEDESC.CREATE_DATE ; TODO: restore the RTC integration when that is working better. +.394d1a 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394d1c a0 18 00 ldy #$0018 LDY #FILEDESC.CREATE_TIME +.394d1f 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394d21 a0 16 00 ldy #$0016 LDY #FILEDESC.CREATE_DATE ; DOS_DIR_PTR->CREATE_DATE := DOS_FD_PTR->CREATE_DATE +.394d24 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394d26 a0 10 00 ldy #$0010 LDY #DIRENTRY.CREATE_DATE +.394d29 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y +.394d2b a0 18 00 ldy #$0018 LDY #DIRENTRY.MODIFIED_DATE ; And DOS_DIR_PTR->MODIFIED_DATE +.394d2e 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y +.394d30 a0 18 00 ldy #$0018 LDY #FILEDESC.CREATE_TIME ; DOS_DIR_PTR->CREATE_TIME := DOS_FD_PTR->CREATE_TIME +.394d33 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394d35 a0 0e 00 ldy #$000e LDY #DIRENTRY.CREATE_TIME +.394d38 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y +.394d3a a0 16 00 ldy #$0016 LDY #DIRENTRY.MODIFIED_TIME ; And DOS_DIR_PTR->MODIFIED_TIME +.394d3d 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y +.394d3f c2 20 rep #$20 REP #$20 ; set A long +.394d41 22 fd 3d 39 jsl $393dfd JSL DOS_DIRWRITE +.394d45 b0 0b bcs $394d52 BCS ret_success +.394d47 80 04 bra $394d4d BRA pass_failure +.394d49 ret_failure +.394d49 e2 20 sep #$20 SEP #$20 ; set A short +.394d4b 85 0e sta $032e STA DOS_STATUS +.394d4d 28 plp pass_failure PLP +.394d4e 2b pld PLD +.394d4f ab plb PLB +.394d50 18 clc CLC +.394d51 6b rtl RTL +.394d52 ret_success +.394d52 e2 20 sep #$20 SEP #$20 ; set A short +.394d54 64 0e stz $032e STZ DOS_STATUS +.394d56 28 plp PLP +.394d57 2b pld PLD +.394d58 ab plb PLB +.394d59 38 sec SEC +.394d5a 6b rtl RTL +.394d5b DOS_COPYPATH +.394d5b da phx PHX +.394d5c 5a phy PHY +.394d5d 8b phb PHB +.394d5e 0b phd PHD +.394d5f 08 php PHP +.394d60 48 pha PHA ; begin setdbr macro +.394d61 08 php PHP +.394d62 e2 20 sep #$20 SEP #$20 ; set A short +.394d64 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.394d66 48 pha PHA +.394d67 ab plb PLB +.394d68 28 plp PLP +.394d69 68 pla PLA ; end setdbr macro +.394d6a 48 pha PHA ; begin setdp macro +.394d6b 08 php PHP +.394d6c c2 20 rep #$20 REP #$20 ; set A long +.394d6e a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394d71 5b tcd TCD +.394d72 28 plp PLP +.394d73 68 pla PLA ; end setdp macro +.394d74 c2 30 rep #$30 REP #$30 ; set A&X long +.394d76 a9 00 00 lda #$0000 LDA #0 ; Set the DOS_PATH_BUFF to all zeros +.394d79 a2 00 00 ldx #$0000 LDX #0 +.394d7c 95 e0 sta $0400,x clr_loop STA DOS_PATH_BUFF,X +.394d7e e8 inx INX +.394d7f e8 inx INX +.394d80 e0 00 01 cpx #$0100 CPX #256 +.394d83 d0 f7 bne $394d7c BNE clr_loop +.394d85 a5 20 lda $0340 LDA DOS_FD_PTR ; Is the DOS_FD_PTR null? +.394d87 d0 04 bne $394d8d BNE get_path ; No: attempt to fetch the path +.394d89 a5 22 lda $0342 LDA DOS_FD_PTR+2 +.394d8b f0 27 beq $394db4 BEQ done ; Yes: return an empty buffer +.394d8d a0 02 00 ldy #$0002 get_path LDY #FILEDESC.PATH ; Get the path buffer +.394d90 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394d92 85 28 sta $0348 STA DOS_TEMP +.394d94 c8 iny INY +.394d95 c8 iny INY +.394d96 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394d98 85 2a sta $034a STA DOS_TEMP+2 +.394d9a a5 28 lda $0348 LDA DOS_TEMP ; Is the path pointer NULL? +.394d9c d0 04 bne $394da2 BNE start_copy ; No: start copying it +.394d9e a5 2a lda $034a LDA DOS_TEMP+2 +.394da0 f0 12 beq $394db4 BEQ done ; Yes: return an empty buffer +.394da2 start_copy +.394da2 e2 20 sep #$20 SEP #$20 ; set A short +.394da4 a2 00 00 ldx #$0000 LDX #0 +.394da7 a0 00 00 ldy #$0000 LDY #0 +.394daa b7 28 lda [$0348],y loop LDA [DOS_TEMP],Y +.394dac 95 e0 sta $0400,x STA DOS_PATH_BUFF,X +.394dae f0 04 beq $394db4 BEQ done +.394db0 e8 inx INX +.394db1 c8 iny INY +.394db2 d0 f6 bne $394daa BNE loop +.394db4 28 plp done PLP +.394db5 2b pld PLD +.394db6 ab plb PLB +.394db7 7a ply PLY +.394db8 fa plx PLX +.394db9 6b rtl RTL -;****** Return to file: src\sdos.asm +;****** Return to file: src\SDOS.asm -.394dc2 DOS_TEST -.394dc2 8b phb PHB -.394dc3 0b phd PHD -.394dc4 08 php PHP -.394dc5 48 pha PHA ; begin setdbr macro -.394dc6 08 php PHP -.394dc7 e2 20 sep #$20 SEP #$20 ; set A short -.394dc9 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.394dcb 48 pha PHA -.394dcc ab plb PLB -.394dcd 28 plp PLP -.394dce 68 pla PLA ; end setdbr macro -.394dcf 48 pha PHA ; begin setdp macro -.394dd0 08 php PHP -.394dd1 c2 20 rep #$20 REP #$20 ; set A long -.394dd3 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394dd6 5b tcd TCD -.394dd7 28 plp PLP -.394dd8 68 pla PLA ; end setdp macro -.394dd9 c2 30 rep #$30 REP #$30 ; set A&X long -.394ddb a9 01 4e lda #$4e01 LDA #<>src_file -.394dde 8f 64 03 00 sta $000364 STA @l DOS_STR1_PTR -.394de2 a9 39 00 lda #$0039 LDA #`src_file -.394de5 8f 66 03 00 sta $000366 STA @l DOS_STR1_PTR+2 -.394de9 a9 0e 4e lda #$4e0e LDA #<>dst_file -.394dec 8f 68 03 00 sta $000368 STA @l DOS_STR2_PTR -.394df0 a9 39 00 lda #$0039 LDA #`dst_file -.394df3 8f 6a 03 00 sta $00036a STA @l DOS_STR2_PTR+2 -.394df7 22 33 56 39 jsl $395633 JSL IF_COPY -.394dfb b0 00 bcs $394dfd BCS done -.394dfd 28 plp done PLP -.394dfe 2b pld PLD -.394dff ab plb PLB -.394e00 6b rtl RTL ->394e01 40 73 3a 68 65 6c 6c 6f src_file .null "@s:hello.bas" ->394e09 2e 62 61 73 00 ->394e0e 40 73 3a 68 65 6c 6c 6f dst_file .null "@s:hello2.bas" ->394e16 32 2e 62 61 73 00 -.394e1c IF_OPEN -.394e1c da phx PHX -.394e1d 5a phy PHY -.394e1e 0b phd PHD -.394e1f 8b phb PHB -.394e20 08 php PHP -.394e21 48 pha PHA ; begin setdbr macro -.394e22 08 php PHP -.394e23 e2 20 sep #$20 SEP #$20 ; set A short -.394e25 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.394e27 48 pha PHA -.394e28 ab plb PLB -.394e29 28 plp PLP -.394e2a 68 pla PLA ; end setdbr macro -.394e2b 48 pha PHA ; begin setdp macro -.394e2c 08 php PHP -.394e2d c2 20 rep #$20 REP #$20 ; set A long -.394e2f a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394e32 5b tcd TCD -.394e33 28 plp PLP -.394e34 68 pla PLA ; end setdp macro -.394e35 e2 20 sep #$20 SEP #$20 ; set A short -.394e37 a0 00 00 ldy #$0000 LDY #FILEDESC.STATUS ; Get the status to make sure a open is ok -.394e3a b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394e3c 89 20 bit #$20 BIT #FD_STAT_OPEN -.394e3e f0 05 beq $394e45 BEQ ok_to_open -.394e40 a9 0f lda #$0f LDA #DOS_ERR_OPEN ; If already open: throw an error -.394e42 82 87 06 brl $3954cc BRL IF_FAILURE -.394e45 22 63 4d 39 jsl $394d63 ok_to_open JSL DOS_COPYPATH ; Copy the path to the path buffer -.394e49 22 b5 43 39 jsl $3943b5 JSL DOS_FINDFILE ; Attempt to find the file -.394e4d b0 03 bcs $394e52 BCS is_found ; If OK: we found the file -.394e4f 82 7e 06 brl $3954d0 BRL IF_PASSFAILURE ; Otherwise: pass the failure up the chain -.394e52 is_found -.394e52 e2 20 sep #$20 SEP #$20 ; set A short -.394e54 a0 01 00 ldy #$0001 LDY #FILEDESC.DEV ; Set the device in the file descriptor -.394e57 a5 01 lda $0321 LDA BIOS_DEV -.394e59 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394e5b c2 20 rep #$20 REP #$20 ; set A long -.394e5d a0 0e 00 ldy #$000e LDY #FILEDESC.BUFFER ; Set the buffer point to the one provided in the file -.394e60 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394e62 85 1c sta $033c STA DOS_BUFF_PTR -.394e64 c8 iny INY -.394e65 c8 iny INY -.394e66 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394e68 85 1e sta $033e STA DOS_BUFF_PTR+2 -.394e6a 22 cf 41 39 jsl $3941cf JSL DOS_GETCLUSTER ; Attempt to load the cluster -.394e6e b0 03 bcs $394e73 BCS read_cluster -.394e70 82 5d 06 brl $3954d0 BRL IF_PASSFAILURE -.394e73 a0 0a 00 ldy #$000a read_cluster LDY #FILEDESC.FIRST_CLUSTER ; Set the first cluster in the file descriptor -.394e76 a5 10 lda $0330 LDA DOS_CLUS_ID -.394e78 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394e7a c8 iny INY -.394e7b c8 iny INY -.394e7c a5 12 lda $0332 LDA DOS_CLUS_ID+2 -.394e7e 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394e80 a0 06 00 ldy #$0006 LDY #FILEDESC.CLUSTER ; Set the current cluster in the file descriptor -.394e83 a5 10 lda $0330 LDA DOS_CLUS_ID -.394e85 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394e87 c8 iny INY -.394e88 c8 iny INY -.394e89 a5 12 lda $0332 LDA DOS_CLUS_ID+2 -.394e8b 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394e8d a0 1c 00 ldy #$001c LDY #DIRENTRY.SIZE ; Copy the filesize from the directory entry to the file descriptor -.394e90 b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y -.394e92 a0 12 00 ldy #$0012 LDY #FILEDESC.SIZE -.394e95 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394e97 a0 1e 00 ldy #$001e LDY #DIRENTRY.SIZE+2 -.394e9a b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y -.394e9c a0 14 00 ldy #$0014 LDY #FILEDESC.SIZE+2 -.394e9f 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394ea1 e2 20 sep #$20 SEP #$20 ; set A short -.394ea3 a0 00 00 ldy #$0000 LDY #FILEDESC.STATUS ; Mark file as open and readable -.394ea6 a9 21 lda #$21 LDA #FD_STAT_OPEN | FD_STAT_READ -.394ea8 17 20 ora [$0340],y ORA [DOS_FD_PTR],Y -.394eaa 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394eac 82 28 06 brl $3954d7 BRL IF_SUCCESS -.394eaf IF_CREATE -.394eaf da phx PHX -.394eb0 5a phy PHY -.394eb1 0b phd PHD -.394eb2 8b phb PHB -.394eb3 08 php PHP -.394eb4 48 pha PHA ; begin setdbr macro -.394eb5 08 php PHP -.394eb6 e2 20 sep #$20 SEP #$20 ; set A short -.394eb8 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.394eba 48 pha PHA -.394ebb ab plb PLB -.394ebc 28 plp PLP -.394ebd 68 pla PLA ; end setdbr macro -.394ebe 48 pha PHA ; begin setdp macro -.394ebf 08 php PHP -.394ec0 c2 20 rep #$20 REP #$20 ; set A long -.394ec2 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394ec5 5b tcd TCD -.394ec6 28 plp PLP -.394ec7 68 pla PLA ; end setdp macro -.394ec8 22 36 4c 39 jsl $394c36 JSL DOS_CREATE ; Attempt to create the file -.394ecc 90 18 bcc $394ee6 BCC pass_failure ; If it fails: pass the failure up the chain -.394ece c2 30 rep #$30 REP #$30 ; set A&X long -.394ed0 a0 06 00 ldy #$0006 LDY #FILEDESC.CLUSTER ; Sets the current cluster to 0 to make sure the next write appends -.394ed3 a9 00 00 lda #$0000 LDA #0 -.394ed6 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394ed8 c8 iny INY -.394ed9 c8 iny INY -.394eda 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394edc e2 20 sep #$20 SEP #$20 ; set A short -.394ede a0 00 00 ldy #$0000 LDY #FILEDESC.STATUS -.394ee1 a9 22 lda #$22 LDA #FD_STAT_OPEN | FD_STAT_WRITE ; Set the file to open and APPEND only -.394ee3 82 f1 05 brl $3954d7 BRL IF_SUCCESS -.394ee6 82 e3 05 brl $3954cc pass_failure BRL IF_FAILURE -.394ee9 IF_CLOSE -.394ee9 da phx PHX -.394eea 5a phy PHY -.394eeb 0b phd PHD -.394eec 8b phb PHB -.394eed 08 php PHP -.394eee 48 pha PHA ; begin setdbr macro -.394eef 08 php PHP -.394ef0 e2 20 sep #$20 SEP #$20 ; set A short -.394ef2 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.394ef4 48 pha PHA -.394ef5 ab plb PLB -.394ef6 28 plp PLP -.394ef7 68 pla PLA ; end setdbr macro -.394ef8 48 pha PHA ; begin setdp macro -.394ef9 08 php PHP -.394efa c2 20 rep #$20 REP #$20 ; set A long -.394efc a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394eff 5b tcd TCD -.394f00 28 plp PLP -.394f01 68 pla PLA ; end setdp macro -.394f02 e2 20 sep #$20 SEP #$20 ; set A short -.394f04 a0 00 00 ldy #$0000 LDY #FILEDESC.STATUS ; Check to see if we were writing the file -.394f07 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394f09 89 02 bit #$02 BIT #FD_STAT_WRITE -.394f0b f0 09 beq $394f16 BEQ set_flag ; No, just mark it closed -.394f0d 22 82 4f 39 jsl $394f82 JSL IF_WRITE ; Attempt to write the cluster -.394f11 b0 03 bcs $394f16 BCS set_flag -.394f13 82 ba 05 brl $3954d0 BRL IF_PASSFAILURE ; If there was a problem, pass it up the chain -.394f16 22 d1 55 39 jsl $3955d1 set_flag JSL IF_FREEFD ; Free the file descriptor as well -.394f1a 82 ba 05 brl $3954d7 BRL IF_SUCCESS -.394f1d IF_READ -.394f1d da phx PHX -.394f1e 5a phy PHY -.394f1f 0b phd PHD -.394f20 8b phb PHB -.394f21 08 php PHP -.394f22 48 pha PHA ; begin setdbr macro -.394f23 08 php PHP -.394f24 e2 20 sep #$20 SEP #$20 ; set A short -.394f26 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.394f28 48 pha PHA -.394f29 ab plb PLB -.394f2a 28 plp PLP -.394f2b 68 pla PLA ; end setdbr macro -.394f2c 48 pha PHA ; begin setdp macro -.394f2d 08 php PHP -.394f2e c2 20 rep #$20 REP #$20 ; set A long -.394f30 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394f33 5b tcd TCD -.394f34 28 plp PLP -.394f35 68 pla PLA ; end setdp macro -.394f36 c2 10 rep #$10 REP #$10 ; set X long -.394f38 e2 20 sep #$20 SEP #$20 ; set A short -.394f3a get_dev -.394f3a e2 20 sep #$20 SEP #$20 ; set A short -.394f3c a0 01 00 ldy #$0001 LDY #FILEDESC.DEV ; Get the device number from the file descriptor -.394f3f b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394f41 85 01 sta $0321 STA BIOS_DEV -.394f43 22 37 3f 39 jsl $393f37 JSL DOS_MOUNT ; Make sure the device is mounted (if needed) -.394f47 c2 20 rep #$20 REP #$20 ; set A long -.394f49 a0 06 00 ldy #$0006 LDY #FILEDESC.CLUSTER ; Get the file's current cluster -.394f4c b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394f4e 85 10 sta $0330 STA DOS_CLUS_ID -.394f50 c8 iny INY -.394f51 c8 iny INY -.394f52 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394f54 85 12 sta $0332 STA DOS_CLUS_ID+2 -.394f56 22 e3 45 39 jsl $3945e3 JSL NEXTCLUSTER ; Find the next cluster of the file -.394f5a 90 13 bcc $394f6f BCC pass_failure ; If not OK: pass the failure up the chain -.394f5c a0 0e 00 ldy #$000e LDY #FILEDESC.BUFFER ; Get the pointer to the file's cluster buffer -.394f5f b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394f61 85 1c sta $033c STA DOS_BUFF_PTR -.394f63 c8 iny INY -.394f64 c8 iny INY -.394f65 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394f67 85 1e sta $033e STA DOS_BUFF_PTR+2 -.394f69 22 cf 41 39 jsl $3941cf JSL DOS_GETCLUSTER ; Get the cluster -.394f6d b0 03 bcs $394f72 BCS ret_success ; If ok: return success -.394f6f pass_failure -.394f6f 82 5e 05 brl $3954d0 BRL IF_PASSFAILURE ; Otherwise: bubble up the failure -.394f72 a0 06 00 ldy #$0006 ret_success LDY #FILEDESC.CLUSTER ; Save the new cluster as the file's current cluster -.394f75 a5 10 lda $0330 LDA DOS_CLUS_ID -.394f77 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394f79 c8 iny INY -.394f7a c8 iny INY -.394f7b a5 12 lda $0332 LDA DOS_CLUS_ID+2 -.394f7d 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.394f7f 82 55 05 brl $3954d7 BRL IF_SUCCESS -.394f82 IF_WRITE -.394f82 da phx PHX -.394f83 5a phy PHY -.394f84 0b phd PHD -.394f85 8b phb PHB -.394f86 08 php PHP -.394f87 48 pha PHA ; begin setdbr macro -.394f88 08 php PHP -.394f89 e2 20 sep #$20 SEP #$20 ; set A short -.394f8b a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.394f8d 48 pha PHA -.394f8e ab plb PLB -.394f8f 28 plp PLP -.394f90 68 pla PLA ; end setdbr macro -.394f91 48 pha PHA ; begin setdp macro -.394f92 08 php PHP -.394f93 c2 20 rep #$20 REP #$20 ; set A long -.394f95 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.394f98 5b tcd TCD -.394f99 28 plp PLP -.394f9a 68 pla PLA ; end setdp macro -.394f9b c2 10 rep #$10 REP #$10 ; set X long -.394f9d e2 20 sep #$20 SEP #$20 ; set A short -.394f9f a0 01 00 ldy #$0001 get_dev LDY #FILEDESC.DEV ; Get the device number from the file descriptor -.394fa2 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394fa4 85 01 sta $0321 STA BIOS_DEV -.394fa6 22 37 3f 39 jsl $393f37 JSL DOS_MOUNT ; Make sure the device is mounted (if needed) -.394faa c2 20 rep #$20 REP #$20 ; set A long -.394fac a0 0e 00 ldy #$000e LDY #FILEDESC.BUFFER ; Get the pointer to the file's cluster buffer -.394faf b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394fb1 85 1c sta $033c STA DOS_BUFF_PTR -.394fb3 c8 iny INY -.394fb4 c8 iny INY -.394fb5 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394fb7 85 1e sta $033e STA DOS_BUFF_PTR+2 -.394fb9 a0 06 00 ldy #$0006 LDY #FILEDESC.CLUSTER ; Get the file's current cluster -.394fbc b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394fbe 85 10 sta $0330 STA DOS_CLUS_ID -.394fc0 c8 iny INY -.394fc1 c8 iny INY -.394fc2 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394fc4 85 12 sta $0332 STA DOS_CLUS_ID+2 -.394fc6 d0 1a bne $394fe2 BNE rewrite_cluster ; If the cluster ID <> 0, overwrite it -.394fc8 a5 10 lda $0330 LDA DOS_CLUS_ID -.394fca d0 16 bne $394fe2 BNE rewrite_cluster -.394fcc a0 0a 00 ldy #$000a LDY #FILEDESC.FIRST_CLUSTER ; Get the file's first cluster -.394fcf b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394fd1 85 10 sta $0330 STA DOS_CLUS_ID -.394fd3 c8 iny INY -.394fd4 c8 iny INY -.394fd5 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.394fd7 85 12 sta $0332 STA DOS_CLUS_ID+2 -.394fd9 22 04 4a 39 jsl $394a04 JSL DOS_APPENDCLUS ; Append the cluster -.394fdd b0 0c bcs $394feb BCS ret_success ; If OK: return success -.394fdf 82 ee 04 brl $3954d0 BRL IF_PASSFAILURE ; Otherwise: bubble up the failure -.394fe2 22 0c 42 39 jsl $39420c rewrite_cluster JSL DOS_PUTCLUSTER ; Over-write the cluster -.394fe6 b0 03 bcs $394feb BCS ret_success ; If ok: return success -.394fe8 82 e5 04 brl $3954d0 pass_failure BRL IF_PASSFAILURE ; Otherwise: bubble up the failure -.394feb 82 e9 04 brl $3954d7 ret_success BRL IF_SUCCESS -.394fee IF_DIROPEN -.394fee da phx PHX -.394fef 5a phy PHY -.394ff0 0b phd PHD -.394ff1 8b phb PHB -.394ff2 08 php PHP -.394ff3 48 pha PHA ; begin setdbr macro -.394ff4 08 php PHP -.394ff5 e2 20 sep #$20 SEP #$20 ; set A short -.394ff7 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.394ff9 48 pha PHA -.394ffa ab plb PLB -.394ffb 28 plp PLP -.394ffc 68 pla PLA ; end setdbr macro -.394ffd 48 pha PHA ; begin setdp macro -.394ffe 08 php PHP -.394fff c2 20 rep #$20 REP #$20 ; set A long -.395001 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.395004 5b tcd TCD -.395005 28 plp PLP -.395006 68 pla PLA ; end setdp macro -.395007 c2 30 rep #$30 REP #$30 ; set A&X long -.395009 22 63 4d 39 jsl $394d63 JSL DOS_COPYPATH ; Copy the path from the file descriptor to the path buffer -.39500d 22 1d 43 39 jsl $39431d JSL DOS_PARSE_PATH ; Parse the path -.395011 22 37 3f 39 jsl $393f37 JSL DOS_MOUNT ; Make sure we've mounted the SDC. -.395015 b0 03 bcs $39501a BCS get_root_dir ; If successful: get the root directory -.395017 82 b6 04 brl $3954d0 BRL IF_PASSFAILURE ; Otherwise: pass the error up the chain -.39501a get_root_dir -.39501a c2 30 rep #$30 REP #$30 ; set A&X long -.39501c 22 ec 3b 39 jsl $393bec JSL DOS_DIROPEN -.395020 b0 03 bcs $395025 BCS success -.395022 82 ab 04 brl $3954d0 BRL IF_PASSFAILURE -.395025 82 af 04 brl $3954d7 success BRL IF_SUCCESS -.395028 IF_DIRNEXT -.395028 5c 86 3c 39 jmp $393c86 JML DOS_DIRNEXT -.39502c IF_DELETE -.39502c da phx PHX -.39502d 5a phy PHY -.39502e 0b phd PHD -.39502f 8b phb PHB -.395030 08 php PHP -.395031 48 pha PHA ; begin setdbr macro -.395032 08 php PHP -.395033 e2 20 sep #$20 SEP #$20 ; set A short -.395035 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.395037 48 pha PHA -.395038 ab plb PLB -.395039 28 plp PLP -.39503a 68 pla PLA ; end setdbr macro -.39503b 48 pha PHA ; begin setdp macro -.39503c 08 php PHP -.39503d c2 20 rep #$20 REP #$20 ; set A long -.39503f a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.395042 5b tcd TCD -.395043 28 plp PLP -.395044 68 pla PLA ; end setdp macro -.395045 c2 30 rep #$30 REP #$30 ; set A&X long -.395047 22 b5 43 39 jsl $3943b5 JSL DOS_FINDFILE -.39504b b0 03 bcs $395050 BCS get_first_clus -.39504d 82 80 04 brl $3954d0 BRL IF_PASSFAILURE -.395050 get_first_clus -.395050 a0 1a 00 ldy #$001a LDY #DIRENTRY.CLUSTER_L -.395053 b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y -.395055 85 10 sta $0330 STA DOS_CLUS_ID -.395057 a0 14 00 ldy #$0014 LDY #DIRENTRY.CLUSTER_H -.39505a b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y -.39505c 85 12 sta $0332 STA DOS_CLUS_ID+2 -.39505e a5 10 lda $0330 LDA DOS_CLUS_ID -.395060 8d 2a a0 sta $38a02a STA DOS_CURR_CLUS -.395063 a5 12 lda $0332 LDA DOS_CLUS_ID+2 -.395065 8d 2c a0 sta $38a02c STA DOS_CURR_CLUS+2 -.395068 22 e3 45 39 jsl $3945e3 del_loop JSL NEXTCLUSTER -.39506c 90 2f bcc $39509d BCC del_one -.39506e a5 10 lda $0330 LDA DOS_CLUS_ID -.395070 8d 2e a0 sta $38a02e STA DOS_NEXT_CLUS -.395073 a5 12 lda $0332 LDA DOS_CLUS_ID+2 -.395075 8d 30 a0 sta $38a030 STA DOS_NEXT_CLUS+2 -.395078 ad 2a a0 lda $38a02a LDA DOS_CURR_CLUS -.39507b 85 10 sta $0330 STA DOS_CLUS_ID -.39507d ad 2c a0 lda $38a02c LDA DOS_CURR_CLUS+2 -.395080 85 12 sta $0332 STA DOS_CLUS_ID+2 -.395082 22 c4 49 39 jsl $3949c4 JSL DELCLUSTER32 -.395086 b0 03 bcs $39508b BCS go_next -.395088 82 45 04 brl $3954d0 BRL IF_PASSFAILURE -.39508b go_next -.39508b ad 2e a0 lda $38a02e LDA DOS_NEXT_CLUS -.39508e 85 10 sta $0330 STA DOS_CLUS_ID -.395090 8d 2a a0 sta $38a02a STA DOS_CURR_CLUS -.395093 ad 30 a0 lda $38a030 LDA DOS_NEXT_CLUS+2 -.395096 85 12 sta $0332 STA DOS_CLUS_ID+2 -.395098 8d 2c a0 sta $38a02c STA DOS_CURR_CLUS+2 -.39509b 80 cb bra $395068 BRA del_loop -.39509d del_one -.39509d ad 2a a0 lda $38a02a LDA DOS_CURR_CLUS -.3950a0 85 10 sta $0330 STA DOS_CLUS_ID -.3950a2 ad 2c a0 lda $38a02c LDA DOS_CURR_CLUS+2 -.3950a5 85 12 sta $0332 STA DOS_CLUS_ID+2 -.3950a7 22 1e 49 39 jsl $39491e JSL DELCLUSTER -.3950ab b0 03 bcs $3950b0 BCS free_dir_entry -.3950ad 82 20 04 brl $3954d0 BRL IF_PASSFAILURE -.3950b0 free_dir_entry -.3950b0 e2 20 sep #$20 SEP #$20 ; set A short -.3950b2 a0 00 00 ldy #$0000 LDY #DIRENTRY.SHORTNAME ; Flag the directory entry as deleted -.3950b5 a9 e5 lda #$e5 LDA #DOS_DIR_ENT_UNUSED -.3950b7 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y -.3950b9 22 05 3e 39 jsl $393e05 JSL DOS_DIRWRITE ; Write the directory entry back -.3950bd b0 03 bcs $3950c2 BCS ret_success -.3950bf 82 0e 04 brl $3954d0 BRL IF_PASSFAILURE -.3950c2 82 12 04 brl $3954d7 ret_success BRL IF_SUCCESS -.3950c5 IF_DIRREAD -.3950c5 da phx PHX -.3950c6 5a phy PHY -.3950c7 0b phd PHD -.3950c8 8b phb PHB -.3950c9 08 php PHP -.3950ca 48 pha PHA ; begin setdbr macro -.3950cb 08 php PHP -.3950cc e2 20 sep #$20 SEP #$20 ; set A short -.3950ce a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.3950d0 48 pha PHA -.3950d1 ab plb PLB -.3950d2 28 plp PLP -.3950d3 68 pla PLA ; end setdbr macro -.3950d4 48 pha PHA ; begin setdp macro -.3950d5 08 php PHP -.3950d6 c2 20 rep #$20 REP #$20 ; set A long -.3950d8 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.3950db 5b tcd TCD -.3950dc 28 plp PLP -.3950dd 68 pla PLA ; end setdp macro -.3950de c2 30 rep #$30 REP #$30 ; set A&X long -.3950e0 22 b5 43 39 jsl $3943b5 JSL DOS_FINDFILE -.3950e4 b0 03 bcs $3950e9 BCS success -.3950e6 82 e3 03 brl $3954cc BRL IF_FAILURE -.3950e9 82 eb 03 brl $3954d7 success BRL IF_SUCCESS -.3950ec IF_DIRWRITE -.3950ec 5c 05 3e 39 jmp $393e05 JML DOS_DIRWRITE -.3950f0 IF_LOAD -.3950f0 da phx PHX -.3950f1 5a phy PHY -.3950f2 0b phd PHD -.3950f3 8b phb PHB -.3950f4 08 php PHP -.3950f5 48 pha PHA ; begin setdbr macro -.3950f6 08 php PHP -.3950f7 e2 20 sep #$20 SEP #$20 ; set A short -.3950f9 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.3950fb 48 pha PHA -.3950fc ab plb PLB -.3950fd 28 plp PLP -.3950fe 68 pla PLA ; end setdbr macro -.3950ff 48 pha PHA ; begin setdp macro -.395100 08 php PHP -.395101 c2 20 rep #$20 REP #$20 ; set A long -.395103 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.395106 5b tcd TCD -.395107 28 plp PLP -.395108 68 pla PLA ; end setdp macro -.395109 c2 30 rep #$30 REP #$30 ; set A&X long -.39510b 22 1c 4e 39 jsl $394e1c JSL IF_OPEN -.39510f b0 03 bcs $395114 BCS setup ; If success: start setting things up -.395111 82 bc 03 brl $3954d0 BRL IF_PASSFAILURE ; Otherwise: pass the failure up the chain -.395114 setup -.395114 c2 20 rep #$20 REP #$20 ; set A long -.395116 a0 12 00 ldy #$0012 LDY #FILEDESC.SIZE ; Record the size of the file in DOS_FILE_SIZE -.395119 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.39511b 85 2c sta $034c STA DOS_FILE_SIZE -.39511d c8 iny INY -.39511e c8 iny INY -.39511f b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.395121 85 2e sta $034e STA DOS_FILE_SIZE+2 -.395123 a0 0e 00 ldy #$000e LDY #FILEDESC.BUFFER ; Set up the source pointer -.395126 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.395128 85 30 sta $0350 STA DOS_SRC_PTR -.39512a c8 iny INY -.39512b c8 iny INY -.39512c b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.39512e 85 32 sta $0352 STA DOS_SRC_PTR+2 -.395130 a5 36 lda $0356 LDA DOS_DST_PTR+2 ; Is there a destination address in RAM? -.395132 c9 40 00 cmp #$0040 CMP #$0040 -.395135 b0 04 bcs $39513b BGE load_by_type ; No: try to load it by type -.395137 5c 81 53 39 jmp $395381 JML IF_LOADRAW ; Otherwise, load it to the supplied destination -.39513b a0 08 00 ldy #$0008 load_by_type LDY #8 ; Point to the first extension byte -.39513e a2 00 00 ldx #$0000 LDX #0 ; and the first byte of the table -.395141 type_loop -.395141 e2 20 sep #$20 SEP #$20 ; set A short -.395143 bf 87 51 39 lda $395187,x LDA LOAD_TYPE_TABLE,X ; Get 1st extension character of the entry -.395147 f0 37 beq $395180 BEQ no_match ; If NULL... we didn't get a match -.395149 d9 3a a0 cmp $38a03a,y CMP DOS_SHORT_NAME,Y ; Get the character of the extension -.39514c d0 28 bne $395176 BNE next_entry ; If they don't match, try the next entry -.39514e bf 88 51 39 lda $395188,x LDA LOAD_TYPE_TABLE+1,X ; Get 2nd extension character of the entry -.395152 d9 3b a0 cmp $38a03b,y CMP DOS_SHORT_NAME+1,Y ; Get the 2nd character of the extension -.395155 d0 1f bne $395176 BNE next_entry ; If they don't match, try the next entry -.395157 bf 89 51 39 lda $395189,x LDA LOAD_TYPE_TABLE+2,X ; Get 3rd extension character of the entry -.39515b d9 3c a0 cmp $38a03c,y CMP DOS_SHORT_NAME+2,Y ; Get the 3rd character of the extension -.39515e d0 16 bne $395176 BNE next_entry ; If they don't match, try the next entry -.395160 c2 20 rep #$20 REP #$20 ; set A long -.395162 bf 8a 51 39 lda $39518a,x LDA LOAD_TYPE_TABLE+3,X ; Get the low word of the address -.395166 85 28 sta $0348 STA DOS_TEMP ; Save it to the jump vector -.395168 e2 20 sep #$20 SEP #$20 ; set A short -.39516a bf 8c 51 39 lda $39518c,x LDA LOAD_TYPE_TABLE+5,X ; Get the high byte of the address -.39516e 85 2a sta $034a STA DOS_TEMP+2 ; Save it to the jump vector -.395170 a2 00 00 ldx #$0000 LDX #0 -.395173 dc 48 03 jmp [$0348] JML [DOS_TEMP] ; Jump to the loading routine -.395176 next_entry -.395176 c2 30 rep #$30 REP #$30 ; set A&X long -.395178 8a txa TXA -.395179 18 clc CLC -.39517a 69 06 00 adc #$0006 ADC #6 -.39517d aa tax TAX -.39517e 80 c1 bra $395141 BRA type_loop ; And check it against the file -.395180 no_match -.395180 e2 20 sep #$20 SEP #$20 ; set A short -.395182 a9 11 lda #$11 LDA #DOS_ERR_NOEXEC ; Return an not-executable error -.395184 82 45 03 brl $3954cc BRL IF_FAILURE ->395187 50 47 58 LOAD_TYPE_TABLE .text "PGX" ; "PGX" --> IF_LOADPGX ->39518a 94 51 .word <>IF_LOADPGX ->39518c 39 .byte `IF_LOADPGX ->39518d 50 47 5a .text "PGZ" ; "PGZ" --> IF_LOADPGZ ->395190 1c 52 .word <>IF_LOADPGZ ->395192 39 .byte `IF_LOADPGZ ->395193 00 .byte 0 -.395194 IF_LOADPGX -.395194 c2 10 rep #$10 REP #$10 ; set X long -.395196 e2 20 sep #$20 SEP #$20 ; set A short -.395198 a0 00 00 ldy #$0000 LDY #0 -.39519b b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y ; Check for "PGX" signature -.39519d c9 50 cmp #$50 CMP #'P' -.39519f d0 15 bne $3951b6 BNE fail_sig ; If not found, fail -.3951a1 c8 iny INY -.3951a2 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y -.3951a4 c9 47 cmp #$47 CMP #'G' -.3951a6 d0 0e bne $3951b6 BNE fail_sig -.3951a8 c8 iny INY -.3951a9 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y -.3951ab c9 58 cmp #$58 CMP #'X' -.3951ad d0 07 bne $3951b6 BNE fail_sig -.3951af c8 iny INY ; Check for CPU and version code ($01 for 65816) -.3951b0 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y -.3951b2 c9 01 cmp #$01 CMP #$01 -.3951b4 f0 17 beq $3951cd BEQ get_dest ; All passes: go to get the destination address -.3951b6 a9 10 lda #$10 fail_sig LDA #DOS_ERR_PGXSIG ; Fail with a PGXSIG error code -.3951b8 22 cc 54 39 jsl $3954cc JSL IF_FAILURE -.3951bc adjust_size -.3951bc c2 20 rep #$20 REP #$20 ; set A long -.3951be 38 sec SEC ; Subtract the 8 bytes of the header from the file size -.3951bf a5 2c lda $034c LDA DOS_FILE_SIZE -.3951c1 e9 08 00 sbc #$0008 SBC #8 -.3951c4 85 2c sta $034c STA DOS_FILE_SIZE -.3951c6 a5 2e lda $034e LDA DOS_FILE_SIZE+2 -.3951c8 e9 00 00 sbc #$0000 SBC #0 -.3951cb 85 2e sta $034e STA DOS_FILE_SIZE+2 -.3951cd get_dest -.3951cd c2 20 rep #$20 REP #$20 ; set A long +.394dba DOS_TEST +.394dba 8b phb PHB +.394dbb 0b phd PHD +.394dbc 08 php PHP +.394dbd 48 pha PHA ; begin setdbr macro +.394dbe 08 php PHP +.394dbf e2 20 sep #$20 SEP #$20 ; set A short +.394dc1 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.394dc3 48 pha PHA +.394dc4 ab plb PLB +.394dc5 28 plp PLP +.394dc6 68 pla PLA ; end setdbr macro +.394dc7 48 pha PHA ; begin setdp macro +.394dc8 08 php PHP +.394dc9 c2 20 rep #$20 REP #$20 ; set A long +.394dcb a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394dce 5b tcd TCD +.394dcf 28 plp PLP +.394dd0 68 pla PLA ; end setdp macro +.394dd1 c2 30 rep #$30 REP #$30 ; set A&X long +.394dd3 a9 f9 4d lda #$4df9 LDA #<>src_file +.394dd6 8f 64 03 00 sta $000364 STA @l DOS_STR1_PTR +.394dda a9 39 00 lda #$0039 LDA #`src_file +.394ddd 8f 66 03 00 sta $000366 STA @l DOS_STR1_PTR+2 +.394de1 a9 06 4e lda #$4e06 LDA #<>dst_file +.394de4 8f 68 03 00 sta $000368 STA @l DOS_STR2_PTR +.394de8 a9 39 00 lda #$0039 LDA #`dst_file +.394deb 8f 6a 03 00 sta $00036a STA @l DOS_STR2_PTR+2 +.394def 22 2b 56 39 jsl $39562b JSL IF_COPY +.394df3 b0 00 bcs $394df5 BCS done +.394df5 28 plp done PLP +.394df6 2b pld PLD +.394df7 ab plb PLB +.394df8 6b rtl RTL +>394df9 40 73 3a 68 65 6c 6c 6f src_file .null "@s:hello.bas" +>394e01 2e 62 61 73 00 +>394e06 40 73 3a 68 65 6c 6c 6f dst_file .null "@s:hello2.bas" +>394e0e 32 2e 62 61 73 00 +.394e14 IF_OPEN +.394e14 da phx PHX +.394e15 5a phy PHY +.394e16 0b phd PHD +.394e17 8b phb PHB +.394e18 08 php PHP +.394e19 48 pha PHA ; begin setdbr macro +.394e1a 08 php PHP +.394e1b e2 20 sep #$20 SEP #$20 ; set A short +.394e1d a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.394e1f 48 pha PHA +.394e20 ab plb PLB +.394e21 28 plp PLP +.394e22 68 pla PLA ; end setdbr macro +.394e23 48 pha PHA ; begin setdp macro +.394e24 08 php PHP +.394e25 c2 20 rep #$20 REP #$20 ; set A long +.394e27 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394e2a 5b tcd TCD +.394e2b 28 plp PLP +.394e2c 68 pla PLA ; end setdp macro +.394e2d e2 20 sep #$20 SEP #$20 ; set A short +.394e2f a0 00 00 ldy #$0000 LDY #FILEDESC.STATUS ; Get the status to make sure a open is ok +.394e32 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394e34 89 20 bit #$20 BIT #FD_STAT_OPEN +.394e36 f0 05 beq $394e3d BEQ ok_to_open +.394e38 a9 0f lda #$0f LDA #DOS_ERR_OPEN ; If already open: throw an error +.394e3a 82 87 06 brl $3954c4 BRL IF_FAILURE +.394e3d 22 5b 4d 39 jsl $394d5b ok_to_open JSL DOS_COPYPATH ; Copy the path to the path buffer +.394e41 22 ad 43 39 jsl $3943ad JSL DOS_FINDFILE ; Attempt to find the file +.394e45 b0 03 bcs $394e4a BCS is_found ; If OK: we found the file +.394e47 82 7e 06 brl $3954c8 BRL IF_PASSFAILURE ; Otherwise: pass the failure up the chain +.394e4a is_found +.394e4a e2 20 sep #$20 SEP #$20 ; set A short +.394e4c a0 01 00 ldy #$0001 LDY #FILEDESC.DEV ; Set the device in the file descriptor +.394e4f a5 01 lda $0321 LDA BIOS_DEV +.394e51 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394e53 c2 20 rep #$20 REP #$20 ; set A long +.394e55 a0 0e 00 ldy #$000e LDY #FILEDESC.BUFFER ; Set the buffer point to the one provided in the file +.394e58 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394e5a 85 1c sta $033c STA DOS_BUFF_PTR +.394e5c c8 iny INY +.394e5d c8 iny INY +.394e5e b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394e60 85 1e sta $033e STA DOS_BUFF_PTR+2 +.394e62 22 c7 41 39 jsl $3941c7 JSL DOS_GETCLUSTER ; Attempt to load the cluster +.394e66 b0 03 bcs $394e6b BCS read_cluster +.394e68 82 5d 06 brl $3954c8 BRL IF_PASSFAILURE +.394e6b a0 0a 00 ldy #$000a read_cluster LDY #FILEDESC.FIRST_CLUSTER ; Set the first cluster in the file descriptor +.394e6e a5 10 lda $0330 LDA DOS_CLUS_ID +.394e70 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394e72 c8 iny INY +.394e73 c8 iny INY +.394e74 a5 12 lda $0332 LDA DOS_CLUS_ID+2 +.394e76 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394e78 a0 06 00 ldy #$0006 LDY #FILEDESC.CLUSTER ; Set the current cluster in the file descriptor +.394e7b a5 10 lda $0330 LDA DOS_CLUS_ID +.394e7d 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394e7f c8 iny INY +.394e80 c8 iny INY +.394e81 a5 12 lda $0332 LDA DOS_CLUS_ID+2 +.394e83 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394e85 a0 1c 00 ldy #$001c LDY #DIRENTRY.SIZE ; Copy the filesize from the directory entry to the file descriptor +.394e88 b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y +.394e8a a0 12 00 ldy #$0012 LDY #FILEDESC.SIZE +.394e8d 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394e8f a0 1e 00 ldy #$001e LDY #DIRENTRY.SIZE+2 +.394e92 b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y +.394e94 a0 14 00 ldy #$0014 LDY #FILEDESC.SIZE+2 +.394e97 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394e99 e2 20 sep #$20 SEP #$20 ; set A short +.394e9b a0 00 00 ldy #$0000 LDY #FILEDESC.STATUS ; Mark file as open and readable +.394e9e a9 21 lda #$21 LDA #FD_STAT_OPEN | FD_STAT_READ +.394ea0 17 20 ora [$0340],y ORA [DOS_FD_PTR],Y +.394ea2 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394ea4 82 28 06 brl $3954cf BRL IF_SUCCESS +.394ea7 IF_CREATE +.394ea7 da phx PHX +.394ea8 5a phy PHY +.394ea9 0b phd PHD +.394eaa 8b phb PHB +.394eab 08 php PHP +.394eac 48 pha PHA ; begin setdbr macro +.394ead 08 php PHP +.394eae e2 20 sep #$20 SEP #$20 ; set A short +.394eb0 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.394eb2 48 pha PHA +.394eb3 ab plb PLB +.394eb4 28 plp PLP +.394eb5 68 pla PLA ; end setdbr macro +.394eb6 48 pha PHA ; begin setdp macro +.394eb7 08 php PHP +.394eb8 c2 20 rep #$20 REP #$20 ; set A long +.394eba a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394ebd 5b tcd TCD +.394ebe 28 plp PLP +.394ebf 68 pla PLA ; end setdp macro +.394ec0 22 2e 4c 39 jsl $394c2e JSL DOS_CREATE ; Attempt to create the file +.394ec4 90 18 bcc $394ede BCC pass_failure ; If it fails: pass the failure up the chain +.394ec6 c2 30 rep #$30 REP #$30 ; set A&X long +.394ec8 a0 06 00 ldy #$0006 LDY #FILEDESC.CLUSTER ; Sets the current cluster to 0 to make sure the next write appends +.394ecb a9 00 00 lda #$0000 LDA #0 +.394ece 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394ed0 c8 iny INY +.394ed1 c8 iny INY +.394ed2 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394ed4 e2 20 sep #$20 SEP #$20 ; set A short +.394ed6 a0 00 00 ldy #$0000 LDY #FILEDESC.STATUS +.394ed9 a9 22 lda #$22 LDA #FD_STAT_OPEN | FD_STAT_WRITE ; Set the file to open and APPEND only +.394edb 82 f1 05 brl $3954cf BRL IF_SUCCESS +.394ede 82 e3 05 brl $3954c4 pass_failure BRL IF_FAILURE +.394ee1 IF_CLOSE +.394ee1 da phx PHX +.394ee2 5a phy PHY +.394ee3 0b phd PHD +.394ee4 8b phb PHB +.394ee5 08 php PHP +.394ee6 48 pha PHA ; begin setdbr macro +.394ee7 08 php PHP +.394ee8 e2 20 sep #$20 SEP #$20 ; set A short +.394eea a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.394eec 48 pha PHA +.394eed ab plb PLB +.394eee 28 plp PLP +.394eef 68 pla PLA ; end setdbr macro +.394ef0 48 pha PHA ; begin setdp macro +.394ef1 08 php PHP +.394ef2 c2 20 rep #$20 REP #$20 ; set A long +.394ef4 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394ef7 5b tcd TCD +.394ef8 28 plp PLP +.394ef9 68 pla PLA ; end setdp macro +.394efa e2 20 sep #$20 SEP #$20 ; set A short +.394efc a0 00 00 ldy #$0000 LDY #FILEDESC.STATUS ; Check to see if we were writing the file +.394eff b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394f01 89 02 bit #$02 BIT #FD_STAT_WRITE +.394f03 f0 09 beq $394f0e BEQ set_flag ; No, just mark it closed +.394f05 22 7a 4f 39 jsl $394f7a JSL IF_WRITE ; Attempt to write the cluster +.394f09 b0 03 bcs $394f0e BCS set_flag +.394f0b 82 ba 05 brl $3954c8 BRL IF_PASSFAILURE ; If there was a problem, pass it up the chain +.394f0e 22 c9 55 39 jsl $3955c9 set_flag JSL IF_FREEFD ; Free the file descriptor as well +.394f12 82 ba 05 brl $3954cf BRL IF_SUCCESS +.394f15 IF_READ +.394f15 da phx PHX +.394f16 5a phy PHY +.394f17 0b phd PHD +.394f18 8b phb PHB +.394f19 08 php PHP +.394f1a 48 pha PHA ; begin setdbr macro +.394f1b 08 php PHP +.394f1c e2 20 sep #$20 SEP #$20 ; set A short +.394f1e a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.394f20 48 pha PHA +.394f21 ab plb PLB +.394f22 28 plp PLP +.394f23 68 pla PLA ; end setdbr macro +.394f24 48 pha PHA ; begin setdp macro +.394f25 08 php PHP +.394f26 c2 20 rep #$20 REP #$20 ; set A long +.394f28 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394f2b 5b tcd TCD +.394f2c 28 plp PLP +.394f2d 68 pla PLA ; end setdp macro +.394f2e c2 10 rep #$10 REP #$10 ; set X long +.394f30 e2 20 sep #$20 SEP #$20 ; set A short +.394f32 get_dev +.394f32 e2 20 sep #$20 SEP #$20 ; set A short +.394f34 a0 01 00 ldy #$0001 LDY #FILEDESC.DEV ; Get the device number from the file descriptor +.394f37 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394f39 85 01 sta $0321 STA BIOS_DEV +.394f3b 22 2f 3f 39 jsl $393f2f JSL DOS_MOUNT ; Make sure the device is mounted (if needed) +.394f3f c2 20 rep #$20 REP #$20 ; set A long +.394f41 a0 06 00 ldy #$0006 LDY #FILEDESC.CLUSTER ; Get the file's current cluster +.394f44 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394f46 85 10 sta $0330 STA DOS_CLUS_ID +.394f48 c8 iny INY +.394f49 c8 iny INY +.394f4a b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394f4c 85 12 sta $0332 STA DOS_CLUS_ID+2 +.394f4e 22 db 45 39 jsl $3945db JSL NEXTCLUSTER ; Find the next cluster of the file +.394f52 90 13 bcc $394f67 BCC pass_failure ; If not OK: pass the failure up the chain +.394f54 a0 0e 00 ldy #$000e LDY #FILEDESC.BUFFER ; Get the pointer to the file's cluster buffer +.394f57 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394f59 85 1c sta $033c STA DOS_BUFF_PTR +.394f5b c8 iny INY +.394f5c c8 iny INY +.394f5d b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394f5f 85 1e sta $033e STA DOS_BUFF_PTR+2 +.394f61 22 c7 41 39 jsl $3941c7 JSL DOS_GETCLUSTER ; Get the cluster +.394f65 b0 03 bcs $394f6a BCS ret_success ; If ok: return success +.394f67 pass_failure +.394f67 82 5e 05 brl $3954c8 BRL IF_PASSFAILURE ; Otherwise: bubble up the failure +.394f6a a0 06 00 ldy #$0006 ret_success LDY #FILEDESC.CLUSTER ; Save the new cluster as the file's current cluster +.394f6d a5 10 lda $0330 LDA DOS_CLUS_ID +.394f6f 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394f71 c8 iny INY +.394f72 c8 iny INY +.394f73 a5 12 lda $0332 LDA DOS_CLUS_ID+2 +.394f75 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.394f77 82 55 05 brl $3954cf BRL IF_SUCCESS +.394f7a IF_WRITE +.394f7a da phx PHX +.394f7b 5a phy PHY +.394f7c 0b phd PHD +.394f7d 8b phb PHB +.394f7e 08 php PHP +.394f7f 48 pha PHA ; begin setdbr macro +.394f80 08 php PHP +.394f81 e2 20 sep #$20 SEP #$20 ; set A short +.394f83 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.394f85 48 pha PHA +.394f86 ab plb PLB +.394f87 28 plp PLP +.394f88 68 pla PLA ; end setdbr macro +.394f89 48 pha PHA ; begin setdp macro +.394f8a 08 php PHP +.394f8b c2 20 rep #$20 REP #$20 ; set A long +.394f8d a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394f90 5b tcd TCD +.394f91 28 plp PLP +.394f92 68 pla PLA ; end setdp macro +.394f93 c2 10 rep #$10 REP #$10 ; set X long +.394f95 e2 20 sep #$20 SEP #$20 ; set A short +.394f97 a0 01 00 ldy #$0001 get_dev LDY #FILEDESC.DEV ; Get the device number from the file descriptor +.394f9a b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394f9c 85 01 sta $0321 STA BIOS_DEV +.394f9e 22 2f 3f 39 jsl $393f2f JSL DOS_MOUNT ; Make sure the device is mounted (if needed) +.394fa2 c2 20 rep #$20 REP #$20 ; set A long +.394fa4 a0 0e 00 ldy #$000e LDY #FILEDESC.BUFFER ; Get the pointer to the file's cluster buffer +.394fa7 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394fa9 85 1c sta $033c STA DOS_BUFF_PTR +.394fab c8 iny INY +.394fac c8 iny INY +.394fad b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394faf 85 1e sta $033e STA DOS_BUFF_PTR+2 +.394fb1 a0 06 00 ldy #$0006 LDY #FILEDESC.CLUSTER ; Get the file's current cluster +.394fb4 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394fb6 85 10 sta $0330 STA DOS_CLUS_ID +.394fb8 c8 iny INY +.394fb9 c8 iny INY +.394fba b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394fbc 85 12 sta $0332 STA DOS_CLUS_ID+2 +.394fbe d0 1a bne $394fda BNE rewrite_cluster ; If the cluster ID <> 0, overwrite it +.394fc0 a5 10 lda $0330 LDA DOS_CLUS_ID +.394fc2 d0 16 bne $394fda BNE rewrite_cluster +.394fc4 a0 0a 00 ldy #$000a LDY #FILEDESC.FIRST_CLUSTER ; Get the file's first cluster +.394fc7 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394fc9 85 10 sta $0330 STA DOS_CLUS_ID +.394fcb c8 iny INY +.394fcc c8 iny INY +.394fcd b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.394fcf 85 12 sta $0332 STA DOS_CLUS_ID+2 +.394fd1 22 fc 49 39 jsl $3949fc JSL DOS_APPENDCLUS ; Append the cluster +.394fd5 b0 0c bcs $394fe3 BCS ret_success ; If OK: return success +.394fd7 82 ee 04 brl $3954c8 BRL IF_PASSFAILURE ; Otherwise: bubble up the failure +.394fda 22 04 42 39 jsl $394204 rewrite_cluster JSL DOS_PUTCLUSTER ; Over-write the cluster +.394fde b0 03 bcs $394fe3 BCS ret_success ; If ok: return success +.394fe0 82 e5 04 brl $3954c8 pass_failure BRL IF_PASSFAILURE ; Otherwise: bubble up the failure +.394fe3 82 e9 04 brl $3954cf ret_success BRL IF_SUCCESS +.394fe6 IF_DIROPEN +.394fe6 da phx PHX +.394fe7 5a phy PHY +.394fe8 0b phd PHD +.394fe9 8b phb PHB +.394fea 08 php PHP +.394feb 48 pha PHA ; begin setdbr macro +.394fec 08 php PHP +.394fed e2 20 sep #$20 SEP #$20 ; set A short +.394fef a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.394ff1 48 pha PHA +.394ff2 ab plb PLB +.394ff3 28 plp PLP +.394ff4 68 pla PLA ; end setdbr macro +.394ff5 48 pha PHA ; begin setdp macro +.394ff6 08 php PHP +.394ff7 c2 20 rep #$20 REP #$20 ; set A long +.394ff9 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.394ffc 5b tcd TCD +.394ffd 28 plp PLP +.394ffe 68 pla PLA ; end setdp macro +.394fff c2 30 rep #$30 REP #$30 ; set A&X long +.395001 22 5b 4d 39 jsl $394d5b JSL DOS_COPYPATH ; Copy the path from the file descriptor to the path buffer +.395005 22 15 43 39 jsl $394315 JSL DOS_PARSE_PATH ; Parse the path +.395009 22 2f 3f 39 jsl $393f2f JSL DOS_MOUNT ; Make sure we've mounted the SDC. +.39500d b0 03 bcs $395012 BCS get_root_dir ; If successful: get the root directory +.39500f 82 b6 04 brl $3954c8 BRL IF_PASSFAILURE ; Otherwise: pass the error up the chain +.395012 get_root_dir +.395012 c2 30 rep #$30 REP #$30 ; set A&X long +.395014 22 e4 3b 39 jsl $393be4 JSL DOS_DIROPEN +.395018 b0 03 bcs $39501d BCS success +.39501a 82 ab 04 brl $3954c8 BRL IF_PASSFAILURE +.39501d 82 af 04 brl $3954cf success BRL IF_SUCCESS +.395020 IF_DIRNEXT +.395020 5c 7e 3c 39 jmp $393c7e JML DOS_DIRNEXT +.395024 IF_DELETE +.395024 da phx PHX +.395025 5a phy PHY +.395026 0b phd PHD +.395027 8b phb PHB +.395028 08 php PHP +.395029 48 pha PHA ; begin setdbr macro +.39502a 08 php PHP +.39502b e2 20 sep #$20 SEP #$20 ; set A short +.39502d a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.39502f 48 pha PHA +.395030 ab plb PLB +.395031 28 plp PLP +.395032 68 pla PLA ; end setdbr macro +.395033 48 pha PHA ; begin setdp macro +.395034 08 php PHP +.395035 c2 20 rep #$20 REP #$20 ; set A long +.395037 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.39503a 5b tcd TCD +.39503b 28 plp PLP +.39503c 68 pla PLA ; end setdp macro +.39503d c2 30 rep #$30 REP #$30 ; set A&X long +.39503f 22 ad 43 39 jsl $3943ad JSL DOS_FINDFILE +.395043 b0 03 bcs $395048 BCS get_first_clus +.395045 82 80 04 brl $3954c8 BRL IF_PASSFAILURE +.395048 get_first_clus +.395048 a0 1a 00 ldy #$001a LDY #DIRENTRY.CLUSTER_L +.39504b b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y +.39504d 85 10 sta $0330 STA DOS_CLUS_ID +.39504f a0 14 00 ldy #$0014 LDY #DIRENTRY.CLUSTER_H +.395052 b7 18 lda [$0338],y LDA [DOS_DIR_PTR],Y +.395054 85 12 sta $0332 STA DOS_CLUS_ID+2 +.395056 a5 10 lda $0330 LDA DOS_CLUS_ID +.395058 8d 2a a0 sta $38a02a STA DOS_CURR_CLUS +.39505b a5 12 lda $0332 LDA DOS_CLUS_ID+2 +.39505d 8d 2c a0 sta $38a02c STA DOS_CURR_CLUS+2 +.395060 22 db 45 39 jsl $3945db del_loop JSL NEXTCLUSTER +.395064 90 2f bcc $395095 BCC del_one +.395066 a5 10 lda $0330 LDA DOS_CLUS_ID +.395068 8d 2e a0 sta $38a02e STA DOS_NEXT_CLUS +.39506b a5 12 lda $0332 LDA DOS_CLUS_ID+2 +.39506d 8d 30 a0 sta $38a030 STA DOS_NEXT_CLUS+2 +.395070 ad 2a a0 lda $38a02a LDA DOS_CURR_CLUS +.395073 85 10 sta $0330 STA DOS_CLUS_ID +.395075 ad 2c a0 lda $38a02c LDA DOS_CURR_CLUS+2 +.395078 85 12 sta $0332 STA DOS_CLUS_ID+2 +.39507a 22 bc 49 39 jsl $3949bc JSL DELCLUSTER32 +.39507e b0 03 bcs $395083 BCS go_next +.395080 82 45 04 brl $3954c8 BRL IF_PASSFAILURE +.395083 go_next +.395083 ad 2e a0 lda $38a02e LDA DOS_NEXT_CLUS +.395086 85 10 sta $0330 STA DOS_CLUS_ID +.395088 8d 2a a0 sta $38a02a STA DOS_CURR_CLUS +.39508b ad 30 a0 lda $38a030 LDA DOS_NEXT_CLUS+2 +.39508e 85 12 sta $0332 STA DOS_CLUS_ID+2 +.395090 8d 2c a0 sta $38a02c STA DOS_CURR_CLUS+2 +.395093 80 cb bra $395060 BRA del_loop +.395095 del_one +.395095 ad 2a a0 lda $38a02a LDA DOS_CURR_CLUS +.395098 85 10 sta $0330 STA DOS_CLUS_ID +.39509a ad 2c a0 lda $38a02c LDA DOS_CURR_CLUS+2 +.39509d 85 12 sta $0332 STA DOS_CLUS_ID+2 +.39509f 22 16 49 39 jsl $394916 JSL DELCLUSTER +.3950a3 b0 03 bcs $3950a8 BCS free_dir_entry +.3950a5 82 20 04 brl $3954c8 BRL IF_PASSFAILURE +.3950a8 free_dir_entry +.3950a8 e2 20 sep #$20 SEP #$20 ; set A short +.3950aa a0 00 00 ldy #$0000 LDY #DIRENTRY.SHORTNAME ; Flag the directory entry as deleted +.3950ad a9 e5 lda #$e5 LDA #DOS_DIR_ENT_UNUSED +.3950af 97 18 sta [$0338],y STA [DOS_DIR_PTR],Y +.3950b1 22 fd 3d 39 jsl $393dfd JSL DOS_DIRWRITE ; Write the directory entry back +.3950b5 b0 03 bcs $3950ba BCS ret_success +.3950b7 82 0e 04 brl $3954c8 BRL IF_PASSFAILURE +.3950ba 82 12 04 brl $3954cf ret_success BRL IF_SUCCESS +.3950bd IF_DIRREAD +.3950bd da phx PHX +.3950be 5a phy PHY +.3950bf 0b phd PHD +.3950c0 8b phb PHB +.3950c1 08 php PHP +.3950c2 48 pha PHA ; begin setdbr macro +.3950c3 08 php PHP +.3950c4 e2 20 sep #$20 SEP #$20 ; set A short +.3950c6 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.3950c8 48 pha PHA +.3950c9 ab plb PLB +.3950ca 28 plp PLP +.3950cb 68 pla PLA ; end setdbr macro +.3950cc 48 pha PHA ; begin setdp macro +.3950cd 08 php PHP +.3950ce c2 20 rep #$20 REP #$20 ; set A long +.3950d0 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3950d3 5b tcd TCD +.3950d4 28 plp PLP +.3950d5 68 pla PLA ; end setdp macro +.3950d6 c2 30 rep #$30 REP #$30 ; set A&X long +.3950d8 22 ad 43 39 jsl $3943ad JSL DOS_FINDFILE +.3950dc b0 03 bcs $3950e1 BCS success +.3950de 82 e3 03 brl $3954c4 BRL IF_FAILURE +.3950e1 82 eb 03 brl $3954cf success BRL IF_SUCCESS +.3950e4 IF_DIRWRITE +.3950e4 5c fd 3d 39 jmp $393dfd JML DOS_DIRWRITE +.3950e8 IF_LOAD +.3950e8 da phx PHX +.3950e9 5a phy PHY +.3950ea 0b phd PHD +.3950eb 8b phb PHB +.3950ec 08 php PHP +.3950ed 48 pha PHA ; begin setdbr macro +.3950ee 08 php PHP +.3950ef e2 20 sep #$20 SEP #$20 ; set A short +.3950f1 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.3950f3 48 pha PHA +.3950f4 ab plb PLB +.3950f5 28 plp PLP +.3950f6 68 pla PLA ; end setdbr macro +.3950f7 48 pha PHA ; begin setdp macro +.3950f8 08 php PHP +.3950f9 c2 20 rep #$20 REP #$20 ; set A long +.3950fb a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3950fe 5b tcd TCD +.3950ff 28 plp PLP +.395100 68 pla PLA ; end setdp macro +.395101 c2 30 rep #$30 REP #$30 ; set A&X long +.395103 22 14 4e 39 jsl $394e14 JSL IF_OPEN +.395107 b0 03 bcs $39510c BCS setup ; If success: start setting things up +.395109 82 bc 03 brl $3954c8 BRL IF_PASSFAILURE ; Otherwise: pass the failure up the chain +.39510c setup +.39510c c2 20 rep #$20 REP #$20 ; set A long +.39510e a0 12 00 ldy #$0012 LDY #FILEDESC.SIZE ; Record the size of the file in DOS_FILE_SIZE +.395111 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.395113 85 2c sta $034c STA DOS_FILE_SIZE +.395115 c8 iny INY +.395116 c8 iny INY +.395117 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.395119 85 2e sta $034e STA DOS_FILE_SIZE+2 +.39511b a0 0e 00 ldy #$000e LDY #FILEDESC.BUFFER ; Set up the source pointer +.39511e b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.395120 85 30 sta $0350 STA DOS_SRC_PTR +.395122 c8 iny INY +.395123 c8 iny INY +.395124 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.395126 85 32 sta $0352 STA DOS_SRC_PTR+2 +.395128 a5 36 lda $0356 LDA DOS_DST_PTR+2 ; Is there a destination address in RAM? +.39512a c9 40 00 cmp #$0040 CMP #$0040 +.39512d b0 04 bcs $395133 BGE load_by_type ; No: try to load it by type +.39512f 5c 79 53 39 jmp $395379 JML IF_LOADRAW ; Otherwise, load it to the supplied destination +.395133 a0 08 00 ldy #$0008 load_by_type LDY #8 ; Point to the first extension byte +.395136 a2 00 00 ldx #$0000 LDX #0 ; and the first byte of the table +.395139 type_loop +.395139 e2 20 sep #$20 SEP #$20 ; set A short +.39513b bf 7f 51 39 lda $39517f,x LDA LOAD_TYPE_TABLE,X ; Get 1st extension character of the entry +.39513f f0 37 beq $395178 BEQ no_match ; If NULL... we didn't get a match +.395141 d9 3a a0 cmp $38a03a,y CMP DOS_SHORT_NAME,Y ; Get the character of the extension +.395144 d0 28 bne $39516e BNE next_entry ; If they don't match, try the next entry +.395146 bf 80 51 39 lda $395180,x LDA LOAD_TYPE_TABLE+1,X ; Get 2nd extension character of the entry +.39514a d9 3b a0 cmp $38a03b,y CMP DOS_SHORT_NAME+1,Y ; Get the 2nd character of the extension +.39514d d0 1f bne $39516e BNE next_entry ; If they don't match, try the next entry +.39514f bf 81 51 39 lda $395181,x LDA LOAD_TYPE_TABLE+2,X ; Get 3rd extension character of the entry +.395153 d9 3c a0 cmp $38a03c,y CMP DOS_SHORT_NAME+2,Y ; Get the 3rd character of the extension +.395156 d0 16 bne $39516e BNE next_entry ; If they don't match, try the next entry +.395158 c2 20 rep #$20 REP #$20 ; set A long +.39515a bf 82 51 39 lda $395182,x LDA LOAD_TYPE_TABLE+3,X ; Get the low word of the address +.39515e 85 28 sta $0348 STA DOS_TEMP ; Save it to the jump vector +.395160 e2 20 sep #$20 SEP #$20 ; set A short +.395162 bf 84 51 39 lda $395184,x LDA LOAD_TYPE_TABLE+5,X ; Get the high byte of the address +.395166 85 2a sta $034a STA DOS_TEMP+2 ; Save it to the jump vector +.395168 a2 00 00 ldx #$0000 LDX #0 +.39516b dc 48 03 jmp [$0348] JML [DOS_TEMP] ; Jump to the loading routine +.39516e next_entry +.39516e c2 30 rep #$30 REP #$30 ; set A&X long +.395170 8a txa TXA +.395171 18 clc CLC +.395172 69 06 00 adc #$0006 ADC #6 +.395175 aa tax TAX +.395176 80 c1 bra $395139 BRA type_loop ; And check it against the file +.395178 no_match +.395178 e2 20 sep #$20 SEP #$20 ; set A short +.39517a a9 11 lda #$11 LDA #DOS_ERR_NOEXEC ; Return an not-executable error +.39517c 82 45 03 brl $3954c4 BRL IF_FAILURE +>39517f 50 47 58 LOAD_TYPE_TABLE .text "PGX" ; "PGX" --> IF_LOADPGX +>395182 8c 51 .word <>IF_LOADPGX +>395184 39 .byte `IF_LOADPGX +>395185 50 47 5a .text "PGZ" ; "PGZ" --> IF_LOADPGZ +>395188 14 52 .word <>IF_LOADPGZ +>39518a 39 .byte `IF_LOADPGZ +>39518b 00 .byte 0 +.39518c IF_LOADPGX +.39518c c2 10 rep #$10 REP #$10 ; set X long +.39518e e2 20 sep #$20 SEP #$20 ; set A short +.395190 a0 00 00 ldy #$0000 LDY #0 +.395193 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y ; Check for "PGX" signature +.395195 c9 50 cmp #$50 CMP #'P' +.395197 d0 15 bne $3951ae BNE fail_sig ; If not found, fail +.395199 c8 iny INY +.39519a b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y +.39519c c9 47 cmp #$47 CMP #'G' +.39519e d0 0e bne $3951ae BNE fail_sig +.3951a0 c8 iny INY +.3951a1 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y +.3951a3 c9 58 cmp #$58 CMP #'X' +.3951a5 d0 07 bne $3951ae BNE fail_sig +.3951a7 c8 iny INY ; Check for CPU and version code ($01 for 65816) +.3951a8 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y +.3951aa c9 01 cmp #$01 CMP #$01 +.3951ac f0 17 beq $3951c5 BEQ get_dest ; All passes: go to get the destination address +.3951ae a9 10 lda #$10 fail_sig LDA #DOS_ERR_PGXSIG ; Fail with a PGXSIG error code +.3951b0 22 c4 54 39 jsl $3954c4 JSL IF_FAILURE +.3951b4 adjust_size +.3951b4 c2 20 rep #$20 REP #$20 ; set A long +.3951b6 38 sec SEC ; Subtract the 8 bytes of the header from the file size +.3951b7 a5 2c lda $034c LDA DOS_FILE_SIZE +.3951b9 e9 08 00 sbc #$0008 SBC #8 +.3951bc 85 2c sta $034c STA DOS_FILE_SIZE +.3951be a5 2e lda $034e LDA DOS_FILE_SIZE+2 +.3951c0 e9 00 00 sbc #$0000 SBC #0 +.3951c3 85 2e sta $034e STA DOS_FILE_SIZE+2 +.3951c5 get_dest +.3951c5 c2 20 rep #$20 REP #$20 ; set A long +.3951c7 c8 iny INY +.3951c8 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y ; Get low word of destination address +.3951ca 85 34 sta $0354 STA DOS_DST_PTR ; And save it to the destination pointer +.3951cc 85 3c sta $035c STA DOS_RUN_PTR ; And save it to the RUN pointer +.3951ce c8 iny INY .3951cf c8 iny INY -.3951d0 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y ; Get low word of destination address -.3951d2 85 34 sta $0354 STA DOS_DST_PTR ; And save it to the destination pointer -.3951d4 85 3c sta $035c STA DOS_RUN_PTR ; And save it to the RUN pointer -.3951d6 c8 iny INY +.3951d0 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y ; Get high word of destination address +.3951d2 85 36 sta $0356 STA DOS_DST_PTR+2 +.3951d4 85 3e sta $035e STA DOS_RUN_PTR+2 +.3951d6 c8 iny INY ; Point to the first data byte .3951d7 c8 iny INY -.3951d8 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y ; Get high word of destination address -.3951da 85 36 sta $0356 STA DOS_DST_PTR+2 -.3951dc 85 3e sta $035e STA DOS_RUN_PTR+2 -.3951de c8 iny INY ; Point to the first data byte -.3951df c8 iny INY -.3951e0 copy_loop -.3951e0 e2 20 sep #$20 SEP #$20 ; set A short -.3951e2 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y ; Read a byte from the file -.3951e4 87 34 sta [$0354] STA [DOS_DST_PTR] ; Write it to the destination -.3951e6 c2 20 rep #$20 REP #$20 ; set A long -.3951e8 e6 34 inc $0354 INC DOS_DST_PTR ; Move to the next destination location -.3951ea d0 02 bne $3951ee BNE dec_file_size -.3951ec e6 36 inc $0356 INC DOS_DST_PTR+2 -.3951ee 38 sec dec_file_size SEC ; Count down the number of bytes to read -.3951ef a5 2c lda $034c LDA DOS_FILE_SIZE -.3951f1 e9 01 00 sbc #$0001 SBC #1 -.3951f4 85 2c sta $034c STA DOS_FILE_SIZE -.3951f6 a5 2e lda $034e LDA DOS_FILE_SIZE+2 -.3951f8 e9 00 00 sbc #$0000 SBC #0 -.3951fb 85 2e sta $034e STA DOS_FILE_SIZE+2 -.3951fd a5 2c lda $034c LDA DOS_FILE_SIZE ; Are we at the end of the file? -.3951ff d0 04 bne $395205 BNE next_byte -.395201 a5 2e lda $034e LDA DOS_FILE_SIZE+2 -.395203 f0 14 beq $395219 BEQ done ; Yes: we're done -.395205 c8 iny next_byte INY ; Otherwise, move to the next source location -.395206 cc 0e a0 cpy $38a00e CPY CLUSTER_SIZE ; Are we at the end of the cluster? -.395209 d0 d5 bne $3951e0 BNE copy_loop ; No: keep copying -.39520b 22 e7 46 39 jsl $3946e7 JSL DOS_READNEXT ; Yes: Load the next cluster -.39520f b0 03 bcs $395214 BCS next_cluster -.395211 82 bc 02 brl $3954d0 BRL IF_PASSFAILURE ; If failed: pass that up the chain -.395214 a0 00 00 ldy #$0000 next_cluster LDY #0 -.395217 80 c7 bra $3951e0 BRA copy_loop ; Go back to copying -.395219 82 bb 02 brl $3954d7 done BRL IF_SUCCESS -.39521c IF_LOADPGZ -.39521c 48 pha PHA ; begin setdbr macro -.39521d 08 php PHP -.39521e e2 20 sep #$20 SEP #$20 ; set A short -.395220 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.395222 48 pha PHA -.395223 ab plb PLB -.395224 28 plp PLP -.395225 68 pla PLA ; end setdbr macro -.395226 48 pha PHA ; begin setdp macro -.395227 08 php PHP -.395228 c2 20 rep #$20 REP #$20 ; set A long -.39522a a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.39522d 5b tcd TCD -.39522e 28 plp PLP -.39522f 68 pla PLA ; end setdp macro -.395230 c2 30 rep #$30 REP #$30 ; set A&X long -.395232 a0 12 00 ldy #$0012 LDY #FILEDESC.SIZE ; Get the file size -.395235 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.395237 85 2c sta $034c STA DOS_FILE_SIZE ; And save it to DOS_FILE_SIZE -.395239 c8 iny INY -.39523a c8 iny INY -.39523b b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.39523d 85 2e sta $034e STA DOS_FILE_SIZE+2 -.39523f e2 20 sep #$20 SEP #$20 ; set A short -.395241 a0 00 00 ldy #$0000 LDY #0 ; Starting at the beginning of the file -.395244 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y ; Check for "Z" signature -.395246 c9 5a cmp #$5a CMP #'Z' -.395248 f0 06 beq $395250 BEQ start_block ; If found, get the starting address -.39524a a9 19 lda #$19 fail_sig LDA #DOS_ERR_PGZSIG ; Fail with a PGZSIG error code -.39524c 22 cc 54 39 jsl $3954cc JSL IF_FAILURE -.395250 c8 iny start_block INY -.395251 get_addr -.395251 e2 20 sep #$20 SEP #$20 ; set A short -.395253 22 d6 52 39 jsl $3952d6 JSL IF_FILE_EOF ; Check if EOF -.395257 90 03 bcc $39525c BCC get_addr_lo -.395259 82 7b 02 brl $3954d7 done BRL IF_SUCCESS ; If so: we're done -.39525c 22 14 53 39 jsl $395314 get_addr_lo JSL IF_READ_NEXT ; Get the next byte -.395260 90 47 bcc $3952a9 BCC ret_failure ; Got an error: pass it on -.395262 85 34 sta $0354 STA DOS_DST_PTR ; Save it as the low byte of the destination address -.395264 22 14 53 39 jsl $395314 JSL IF_READ_NEXT ; Get the next byte -.395268 90 3f bcc $3952a9 BCC ret_failure ; Got an error: pass it on -.39526a 85 35 sta $0355 STA DOS_DST_PTR+1 ; Save it as the middle byte of the destination address -.39526c 22 14 53 39 jsl $395314 JSL IF_READ_NEXT ; Get the next byte -.395270 90 37 bcc $3952a9 BCC ret_failure ; Got an error: pass it on -.395272 85 36 sta $0356 STA DOS_DST_PTR+2 ; Save it as the high byte of the destination address -.395274 22 14 53 39 jsl $395314 JSL IF_READ_NEXT ; Get the next byte -.395278 90 2f bcc $3952a9 BCC ret_failure ; Got an error: pass it on -.39527a 85 50 sta $0370 STA DOS_BLOCK_SIZE ; Save it as the low byte of the block size -.39527c 22 14 53 39 jsl $395314 JSL IF_READ_NEXT ; Get the next byte -.395280 90 27 bcc $3952a9 BCC ret_failure ; Got an error: pass it on -.395282 85 51 sta $0371 STA DOS_BLOCK_SIZE+1 ; Save it as the middle byte of the block size -.395284 22 14 53 39 jsl $395314 JSL IF_READ_NEXT ; Get the next byte -.395288 90 1f bcc $3952a9 BCC ret_failure ; Got an error: pass it on -.39528a 85 52 sta $0372 STA DOS_BLOCK_SIZE+2 ; Save it as the high byte of the block size -.39528c 64 53 stz $0373 STZ DOS_BLOCK_SIZE+3 ; And MSB is 0 -.39528e a5 50 lda $0370 LDA DOS_BLOCK_SIZE ; If DOS_BLOCK_SIZE <> 0, we have data to load -.395290 d0 1a bne $3952ac BNE read_data -.395292 a5 51 lda $0371 LDA DOS_BLOCK_SIZE+1 -.395294 d0 16 bne $3952ac BNE read_data -.395296 a5 52 lda $0372 LDA DOS_BLOCK_SIZE+2 -.395298 d0 12 bne $3952ac BNE read_data -.39529a a5 34 lda $0354 LDA DOS_DST_PTR ; If DOS_BLOCK_SIZE = 0, we have the run address -.39529c 85 3c sta $035c STA DOS_RUN_PTR -.39529e a5 35 lda $0355 LDA DOS_DST_PTR+1 -.3952a0 85 3d sta $035d STA DOS_RUN_PTR+1 -.3952a2 a5 36 lda $0356 LDA DOS_DST_PTR+2 -.3952a4 85 3e sta $035e STA DOS_RUN_PTR+2 -.3952a6 82 2e 02 brl $3954d7 BRL IF_SUCCESS ; And finish -.3952a9 82 20 02 brl $3954cc ret_failure BRL IF_FAILURE ; If there was an error, pass it up to the caller -.3952ac read_data -.3952ac e2 20 sep #$20 SEP #$20 ; set A short -.3952ae 22 14 53 39 jsl $395314 JSL IF_READ_NEXT ; Get the next byte -.3952b2 90 f5 bcc $3952a9 BCC ret_failure -.3952b4 87 34 sta [$0354] STA [DOS_DST_PTR] ; Save it to the destination address -.3952b6 c2 20 rep #$20 REP #$20 ; set A long -.3952b8 e6 34 inc $0354 INC DOS_DST_PTR ; Increment the destination pointer -.3952ba d0 02 bne $3952be BNE dec_block_size -.3952bc e6 36 inc $0356 INC DOS_DST_PTR+2 -.3952be 38 sec dec_block_size SEC -.3952bf a5 50 lda $0370 LDA DOS_BLOCK_SIZE -.3952c1 e9 01 00 sbc #$0001 SBC #1 -.3952c4 85 50 sta $0370 STA DOS_BLOCK_SIZE -.3952c6 a5 52 lda $0372 LDA DOS_BLOCK_SIZE+2 -.3952c8 e9 00 00 sbc #$0000 SBC #0 -.3952cb 85 52 sta $0372 STA DOS_BLOCK_SIZE+2 -.3952cd d0 dd bne $3952ac BNE read_data -.3952cf a5 50 lda $0370 LDA DOS_BLOCK_SIZE ; Is block size = 0? -.3952d1 d0 d9 bne $3952ac BNE read_data ; No: keep reading data -.3952d3 82 7b ff brl $395251 BRL get_addr ; Yes: check for another block -.3952d6 IF_FILE_EOF -.3952d6 48 pha PHA -.3952d7 5a phy PHY -.3952d8 8b phb PHB -.3952d9 0b phd PHD -.3952da 08 php PHP -.3952db 48 pha PHA ; begin setdbr macro -.3952dc 08 php PHP -.3952dd e2 20 sep #$20 SEP #$20 ; set A short -.3952df a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.3952e1 48 pha PHA -.3952e2 ab plb PLB -.3952e3 28 plp PLP -.3952e4 68 pla PLA ; end setdbr macro -.3952e5 48 pha PHA ; begin setdp macro -.3952e6 08 php PHP -.3952e7 c2 20 rep #$20 REP #$20 ; set A long -.3952e9 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.3952ec 5b tcd TCD -.3952ed 28 plp PLP -.3952ee 68 pla PLA ; end setdp macro -.3952ef e2 20 sep #$20 SEP #$20 ; set A short -.3952f1 c2 10 rep #$10 REP #$10 ; set X long -.3952f3 a0 00 00 ldy #$0000 LDY #FILEDESC.STATUS ; Get the file's status -.3952f6 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y ; Restore the index -.3952f8 89 80 bit #$80 BIT #FD_STAT_EOF ; Check if the file is EOF -.3952fa f0 07 beq $395303 BEQ chk_file_size ; If not: check the file size -.3952fc 28 plp ret_true PLP ; Return true -.3952fd 2b pld PLD -.3952fe ab plb PLB -.3952ff 7a ply PLY -.395300 68 pla PLA -.395301 38 sec SEC -.395302 6b rtl RTL -.395303 chk_file_size -.395303 c2 20 rep #$20 REP #$20 ; set A long -.395305 a5 2c lda $034c LDA DOS_FILE_SIZE ; if DOS_FILE_SIZE = 0 -.395307 d0 04 bne $39530d BNE ret_false -.395309 a5 2e lda $034e LDA DOS_FILE_SIZE+2 -.39530b f0 ef beq $3952fc BEQ ret_true -.39530d 28 plp ret_false PLP ; Return false -.39530e 2b pld PLD -.39530f ab plb PLB -.395310 7a ply PLY -.395311 68 pla PLA -.395312 18 clc CLC -.395313 6b rtl RTL -.395314 IF_READ_NEXT -.395314 8b phb PHB -.395315 0b phd PHD -.395316 08 php PHP -.395317 48 pha PHA ; begin setdbr macro -.395318 08 php PHP -.395319 e2 20 sep #$20 SEP #$20 ; set A short -.39531b a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.39531d 48 pha PHA -.39531e ab plb PLB -.39531f 28 plp PLP -.395320 68 pla PLA ; end setdbr macro -.395321 48 pha PHA ; begin setdp macro -.395322 08 php PHP -.395323 c2 20 rep #$20 REP #$20 ; set A long -.395325 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.395328 5b tcd TCD -.395329 28 plp PLP -.39532a 68 pla PLA ; end setdp macro -.39532b e2 20 sep #$20 SEP #$20 ; set A short -.39532d c2 10 rep #$10 REP #$10 ; set X long -.39532f 22 d6 52 39 jsl $3952d6 JSL IF_FILE_EOF ; Check if the file is EOF -.395333 90 06 bcc $39533b BCC get_byte ; If not: get the next byte -.395335 a9 18 lda #$18 LDA #DOS_ERR_EOF ; If so: return an EOF error -.395337 85 0e sta $032e STA DOS_STATUS -.395339 80 3f bra $39537a BRA ret_failure -.39533b b7 30 lda [$0350],y get_byte LDA [DOS_SRC_PTR],Y ; Read the byte... -.39533d 48 pha PHA ; And save it for the moment -.39533e c2 20 rep #$20 REP #$20 ; set A long -.395340 a5 2c lda $034c LDA DOS_FILE_SIZE ; Decrement the file size... -.395342 d0 02 bne $395346 BNE dec_low -.395344 c6 2e dec $034e DEC DOS_FILE_SIZE+2 -.395346 c6 2c dec $034c dec_low DEC DOS_FILE_SIZE -.395348 a5 2c lda $034c LDA DOS_FILE_SIZE ; Are we at the end of the file? -.39534a d0 04 bne $395350 BNE next_byte -.39534c a5 2e lda $034e LDA DOS_FILE_SIZE+2 -.39534e f0 1b beq $39536b BEQ ret_eof ; Yes: mark the file as EOF -.395350 next_byte -.395350 e2 20 sep #$20 SEP #$20 ; set A short -.395352 c8 iny INY ; Move to the next byte -.395353 c0 00 02 cpy #$0200 CPY #DOS_SECTOR_SIZE ; Have we reached the end of the sector? -.395356 90 0b bcc $395363 BLT ret_success ; No: just return the byte -.395358 22 e7 46 39 jsl $3946e7 JSL DOS_READNEXT ; Yes: read the next sector -.39535c b0 02 bcs $395360 BCS reset_index -.39535e 80 1a bra $39537a BRA ret_failure ; If failure: pass the error up the chain -.395360 a0 00 00 ldy #$0000 reset_index LDY #0 ; Reset the index -.395363 ret_success +.3951d8 copy_loop +.3951d8 e2 20 sep #$20 SEP #$20 ; set A short +.3951da b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y ; Read a byte from the file +.3951dc 87 34 sta [$0354] STA [DOS_DST_PTR] ; Write it to the destination +.3951de c2 20 rep #$20 REP #$20 ; set A long +.3951e0 e6 34 inc $0354 INC DOS_DST_PTR ; Move to the next destination location +.3951e2 d0 02 bne $3951e6 BNE dec_file_size +.3951e4 e6 36 inc $0356 INC DOS_DST_PTR+2 +.3951e6 38 sec dec_file_size SEC ; Count down the number of bytes to read +.3951e7 a5 2c lda $034c LDA DOS_FILE_SIZE +.3951e9 e9 01 00 sbc #$0001 SBC #1 +.3951ec 85 2c sta $034c STA DOS_FILE_SIZE +.3951ee a5 2e lda $034e LDA DOS_FILE_SIZE+2 +.3951f0 e9 00 00 sbc #$0000 SBC #0 +.3951f3 85 2e sta $034e STA DOS_FILE_SIZE+2 +.3951f5 a5 2c lda $034c LDA DOS_FILE_SIZE ; Are we at the end of the file? +.3951f7 d0 04 bne $3951fd BNE next_byte +.3951f9 a5 2e lda $034e LDA DOS_FILE_SIZE+2 +.3951fb f0 14 beq $395211 BEQ done ; Yes: we're done +.3951fd c8 iny next_byte INY ; Otherwise, move to the next source location +.3951fe cc 0e a0 cpy $38a00e CPY CLUSTER_SIZE ; Are we at the end of the cluster? +.395201 d0 d5 bne $3951d8 BNE copy_loop ; No: keep copying +.395203 22 df 46 39 jsl $3946df JSL DOS_READNEXT ; Yes: Load the next cluster +.395207 b0 03 bcs $39520c BCS next_cluster +.395209 82 bc 02 brl $3954c8 BRL IF_PASSFAILURE ; If failed: pass that up the chain +.39520c a0 00 00 ldy #$0000 next_cluster LDY #0 +.39520f 80 c7 bra $3951d8 BRA copy_loop ; Go back to copying +.395211 82 bb 02 brl $3954cf done BRL IF_SUCCESS +.395214 IF_LOADPGZ +.395214 48 pha PHA ; begin setdbr macro +.395215 08 php PHP +.395216 e2 20 sep #$20 SEP #$20 ; set A short +.395218 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.39521a 48 pha PHA +.39521b ab plb PLB +.39521c 28 plp PLP +.39521d 68 pla PLA ; end setdbr macro +.39521e 48 pha PHA ; begin setdp macro +.39521f 08 php PHP +.395220 c2 20 rep #$20 REP #$20 ; set A long +.395222 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.395225 5b tcd TCD +.395226 28 plp PLP +.395227 68 pla PLA ; end setdp macro +.395228 c2 30 rep #$30 REP #$30 ; set A&X long +.39522a a0 12 00 ldy #$0012 LDY #FILEDESC.SIZE ; Get the file size +.39522d b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.39522f 85 2c sta $034c STA DOS_FILE_SIZE ; And save it to DOS_FILE_SIZE +.395231 c8 iny INY +.395232 c8 iny INY +.395233 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.395235 85 2e sta $034e STA DOS_FILE_SIZE+2 +.395237 e2 20 sep #$20 SEP #$20 ; set A short +.395239 a0 00 00 ldy #$0000 LDY #0 ; Starting at the beginning of the file +.39523c b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y ; Check for "Z" signature +.39523e c9 5a cmp #$5a CMP #'Z' +.395240 f0 06 beq $395248 BEQ start_block ; If found, get the starting address +.395242 a9 19 lda #$19 fail_sig LDA #DOS_ERR_PGZSIG ; Fail with a PGZSIG error code +.395244 22 c4 54 39 jsl $3954c4 JSL IF_FAILURE +.395248 c8 iny start_block INY +.395249 get_addr +.395249 e2 20 sep #$20 SEP #$20 ; set A short +.39524b 22 ce 52 39 jsl $3952ce JSL IF_FILE_EOF ; Check if EOF +.39524f 90 03 bcc $395254 BCC get_addr_lo +.395251 82 7b 02 brl $3954cf done BRL IF_SUCCESS ; If so: we're done +.395254 22 0c 53 39 jsl $39530c get_addr_lo JSL IF_READ_NEXT ; Get the next byte +.395258 90 47 bcc $3952a1 BCC ret_failure ; Got an error: pass it on +.39525a 85 34 sta $0354 STA DOS_DST_PTR ; Save it as the low byte of the destination address +.39525c 22 0c 53 39 jsl $39530c JSL IF_READ_NEXT ; Get the next byte +.395260 90 3f bcc $3952a1 BCC ret_failure ; Got an error: pass it on +.395262 85 35 sta $0355 STA DOS_DST_PTR+1 ; Save it as the middle byte of the destination address +.395264 22 0c 53 39 jsl $39530c JSL IF_READ_NEXT ; Get the next byte +.395268 90 37 bcc $3952a1 BCC ret_failure ; Got an error: pass it on +.39526a 85 36 sta $0356 STA DOS_DST_PTR+2 ; Save it as the high byte of the destination address +.39526c 22 0c 53 39 jsl $39530c JSL IF_READ_NEXT ; Get the next byte +.395270 90 2f bcc $3952a1 BCC ret_failure ; Got an error: pass it on +.395272 85 50 sta $0370 STA DOS_BLOCK_SIZE ; Save it as the low byte of the block size +.395274 22 0c 53 39 jsl $39530c JSL IF_READ_NEXT ; Get the next byte +.395278 90 27 bcc $3952a1 BCC ret_failure ; Got an error: pass it on +.39527a 85 51 sta $0371 STA DOS_BLOCK_SIZE+1 ; Save it as the middle byte of the block size +.39527c 22 0c 53 39 jsl $39530c JSL IF_READ_NEXT ; Get the next byte +.395280 90 1f bcc $3952a1 BCC ret_failure ; Got an error: pass it on +.395282 85 52 sta $0372 STA DOS_BLOCK_SIZE+2 ; Save it as the high byte of the block size +.395284 64 53 stz $0373 STZ DOS_BLOCK_SIZE+3 ; And MSB is 0 +.395286 a5 50 lda $0370 LDA DOS_BLOCK_SIZE ; If DOS_BLOCK_SIZE <> 0, we have data to load +.395288 d0 1a bne $3952a4 BNE read_data +.39528a a5 51 lda $0371 LDA DOS_BLOCK_SIZE+1 +.39528c d0 16 bne $3952a4 BNE read_data +.39528e a5 52 lda $0372 LDA DOS_BLOCK_SIZE+2 +.395290 d0 12 bne $3952a4 BNE read_data +.395292 a5 34 lda $0354 LDA DOS_DST_PTR ; If DOS_BLOCK_SIZE = 0, we have the run address +.395294 85 3c sta $035c STA DOS_RUN_PTR +.395296 a5 35 lda $0355 LDA DOS_DST_PTR+1 +.395298 85 3d sta $035d STA DOS_RUN_PTR+1 +.39529a a5 36 lda $0356 LDA DOS_DST_PTR+2 +.39529c 85 3e sta $035e STA DOS_RUN_PTR+2 +.39529e 82 2e 02 brl $3954cf BRL IF_SUCCESS ; And finish +.3952a1 82 20 02 brl $3954c4 ret_failure BRL IF_FAILURE ; If there was an error, pass it up to the caller +.3952a4 read_data +.3952a4 e2 20 sep #$20 SEP #$20 ; set A short +.3952a6 22 0c 53 39 jsl $39530c JSL IF_READ_NEXT ; Get the next byte +.3952aa 90 f5 bcc $3952a1 BCC ret_failure +.3952ac 87 34 sta [$0354] STA [DOS_DST_PTR] ; Save it to the destination address +.3952ae c2 20 rep #$20 REP #$20 ; set A long +.3952b0 e6 34 inc $0354 INC DOS_DST_PTR ; Increment the destination pointer +.3952b2 d0 02 bne $3952b6 BNE dec_block_size +.3952b4 e6 36 inc $0356 INC DOS_DST_PTR+2 +.3952b6 38 sec dec_block_size SEC +.3952b7 a5 50 lda $0370 LDA DOS_BLOCK_SIZE +.3952b9 e9 01 00 sbc #$0001 SBC #1 +.3952bc 85 50 sta $0370 STA DOS_BLOCK_SIZE +.3952be a5 52 lda $0372 LDA DOS_BLOCK_SIZE+2 +.3952c0 e9 00 00 sbc #$0000 SBC #0 +.3952c3 85 52 sta $0372 STA DOS_BLOCK_SIZE+2 +.3952c5 d0 dd bne $3952a4 BNE read_data +.3952c7 a5 50 lda $0370 LDA DOS_BLOCK_SIZE ; Is block size = 0? +.3952c9 d0 d9 bne $3952a4 BNE read_data ; No: keep reading data +.3952cb 82 7b ff brl $395249 BRL get_addr ; Yes: check for another block +.3952ce IF_FILE_EOF +.3952ce 48 pha PHA +.3952cf 5a phy PHY +.3952d0 8b phb PHB +.3952d1 0b phd PHD +.3952d2 08 php PHP +.3952d3 48 pha PHA ; begin setdbr macro +.3952d4 08 php PHP +.3952d5 e2 20 sep #$20 SEP #$20 ; set A short +.3952d7 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.3952d9 48 pha PHA +.3952da ab plb PLB +.3952db 28 plp PLP +.3952dc 68 pla PLA ; end setdbr macro +.3952dd 48 pha PHA ; begin setdp macro +.3952de 08 php PHP +.3952df c2 20 rep #$20 REP #$20 ; set A long +.3952e1 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3952e4 5b tcd TCD +.3952e5 28 plp PLP +.3952e6 68 pla PLA ; end setdp macro +.3952e7 e2 20 sep #$20 SEP #$20 ; set A short +.3952e9 c2 10 rep #$10 REP #$10 ; set X long +.3952eb a0 00 00 ldy #$0000 LDY #FILEDESC.STATUS ; Get the file's status +.3952ee b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y ; Restore the index +.3952f0 89 80 bit #$80 BIT #FD_STAT_EOF ; Check if the file is EOF +.3952f2 f0 07 beq $3952fb BEQ chk_file_size ; If not: check the file size +.3952f4 28 plp ret_true PLP ; Return true +.3952f5 2b pld PLD +.3952f6 ab plb PLB +.3952f7 7a ply PLY +.3952f8 68 pla PLA +.3952f9 38 sec SEC +.3952fa 6b rtl RTL +.3952fb chk_file_size +.3952fb c2 20 rep #$20 REP #$20 ; set A long +.3952fd a5 2c lda $034c LDA DOS_FILE_SIZE ; if DOS_FILE_SIZE = 0 +.3952ff d0 04 bne $395305 BNE ret_false +.395301 a5 2e lda $034e LDA DOS_FILE_SIZE+2 +.395303 f0 ef beq $3952f4 BEQ ret_true +.395305 28 plp ret_false PLP ; Return false +.395306 2b pld PLD +.395307 ab plb PLB +.395308 7a ply PLY +.395309 68 pla PLA +.39530a 18 clc CLC +.39530b 6b rtl RTL +.39530c IF_READ_NEXT +.39530c 8b phb PHB +.39530d 0b phd PHD +.39530e 08 php PHP +.39530f 48 pha PHA ; begin setdbr macro +.395310 08 php PHP +.395311 e2 20 sep #$20 SEP #$20 ; set A short +.395313 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.395315 48 pha PHA +.395316 ab plb PLB +.395317 28 plp PLP +.395318 68 pla PLA ; end setdbr macro +.395319 48 pha PHA ; begin setdp macro +.39531a 08 php PHP +.39531b c2 20 rep #$20 REP #$20 ; set A long +.39531d a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.395320 5b tcd TCD +.395321 28 plp PLP +.395322 68 pla PLA ; end setdp macro +.395323 e2 20 sep #$20 SEP #$20 ; set A short +.395325 c2 10 rep #$10 REP #$10 ; set X long +.395327 22 ce 52 39 jsl $3952ce JSL IF_FILE_EOF ; Check if the file is EOF +.39532b 90 06 bcc $395333 BCC get_byte ; If not: get the next byte +.39532d a9 18 lda #$18 LDA #DOS_ERR_EOF ; If so: return an EOF error +.39532f 85 0e sta $032e STA DOS_STATUS +.395331 80 3f bra $395372 BRA ret_failure +.395333 b7 30 lda [$0350],y get_byte LDA [DOS_SRC_PTR],Y ; Read the byte... +.395335 48 pha PHA ; And save it for the moment +.395336 c2 20 rep #$20 REP #$20 ; set A long +.395338 a5 2c lda $034c LDA DOS_FILE_SIZE ; Decrement the file size... +.39533a d0 02 bne $39533e BNE dec_low +.39533c c6 2e dec $034e DEC DOS_FILE_SIZE+2 +.39533e c6 2c dec $034c dec_low DEC DOS_FILE_SIZE +.395340 a5 2c lda $034c LDA DOS_FILE_SIZE ; Are we at the end of the file? +.395342 d0 04 bne $395348 BNE next_byte +.395344 a5 2e lda $034e LDA DOS_FILE_SIZE+2 +.395346 f0 1b beq $395363 BEQ ret_eof ; Yes: mark the file as EOF +.395348 next_byte +.395348 e2 20 sep #$20 SEP #$20 ; set A short +.39534a c8 iny INY ; Move to the next byte +.39534b c0 00 02 cpy #$0200 CPY #DOS_SECTOR_SIZE ; Have we reached the end of the sector? +.39534e 90 0b bcc $39535b BLT ret_success ; No: just return the byte +.395350 22 df 46 39 jsl $3946df JSL DOS_READNEXT ; Yes: read the next sector +.395354 b0 02 bcs $395358 BCS reset_index +.395356 80 1a bra $395372 BRA ret_failure ; If failure: pass the error up the chain +.395358 a0 00 00 ldy #$0000 reset_index LDY #0 ; Reset the index +.39535b ret_success +.39535b e2 20 sep #$20 SEP #$20 ; set A short +.39535d 68 pla PLA ; Return the byte retrieved +.39535e 28 plp PLP +.39535f 2b pld PLD +.395360 ab plb PLB +.395361 38 sec SEC +.395362 6b rtl RTL +.395363 ret_eof .395363 e2 20 sep #$20 SEP #$20 ; set A short -.395365 68 pla PLA ; Return the byte retrieved -.395366 28 plp PLP -.395367 2b pld PLD -.395368 ab plb PLB -.395369 38 sec SEC -.39536a 6b rtl RTL -.39536b ret_eof -.39536b e2 20 sep #$20 SEP #$20 ; set A short -.39536d 5a phy PHY ; Save the index -.39536e a0 00 00 ldy #$0000 LDY #FILEDESC.STATUS ; Get the file's status -.395371 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.395373 09 80 ora #$80 ORA #FD_STAT_EOF ; Mark it EOF -.395375 97 20 sta [$0340],y STA [DOS_FD_PTR],Y ; And update the status -.395377 7a ply PLY ; Restore the index -.395378 80 e9 bra $395363 BRA ret_success -.39537a ret_failure -.39537a e2 20 sep #$20 SEP #$20 ; set A short -.39537c 28 plp PLP -.39537d 2b pld PLD -.39537e ab plb PLB -.39537f 18 clc CLC -.395380 6b rtl RTL -.395381 IF_LOADRAW -.395381 c2 30 rep #$30 REP #$30 ; set A&X long -.395383 a0 00 00 ldy #$0000 copy_cluster LDY #0 -.395386 copy_loop -.395386 e2 20 sep #$20 SEP #$20 ; set A short -.395388 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y ; Copy byte from cluster to destination -.39538a 97 34 sta [$0354],y STA [DOS_DST_PTR],Y -.39538c c2 20 rep #$20 REP #$20 ; set A long -.39538e 38 sec SEC ; Count down the number of bytes left -.39538f a5 2c lda $034c LDA DOS_FILE_SIZE -.395391 e9 01 00 sbc #$0001 SBC #1 -.395394 85 2c sta $034c STA DOS_FILE_SIZE -.395396 a5 2e lda $034e LDA DOS_FILE_SIZE+2 -.395398 e9 00 00 sbc #$0000 SBC #0 -.39539b 85 2e sta $034e STA DOS_FILE_SIZE+2 -.39539d d0 04 bne $3953a3 BNE continue -.39539f a5 2c lda $034c LDA DOS_FILE_SIZE -.3953a1 f0 1b beq $3953be BEQ close_file ; If not: we're done -.3953a3 c8 iny continue INY -.3953a4 cc 0e a0 cpy $38a00e CPY CLUSTER_SIZE ; Are we done with the cluster? -.3953a7 d0 dd bne $395386 BNE copy_loop ; No: keep processing the bytes -.3953a9 18 clc CLC ; Advance the destination pointer to the next chunk of memory -.3953aa a5 34 lda $0354 LDA DOS_DST_PTR -.3953ac 6d 0e a0 adc $38a00e ADC CLUSTER_SIZE -.3953af 85 34 sta $0354 STA DOS_DST_PTR -.3953b1 a5 36 lda $0356 LDA DOS_DST_PTR+2 -.3953b3 69 00 00 adc #$0000 ADC #0 -.3953b6 85 36 sta $0356 STA DOS_DST_PTR+2 -.3953b8 22 1d 4f 39 jsl $394f1d JSL IF_READ ; Yes: load the next cluster -.3953bc b0 c5 bcs $395383 BCS copy_cluster ; And start copying it -.3953be close_file -.3953be 82 16 01 brl $3954d7 ret_success BRL IF_SUCCESS -.3953c1 IF_NULLBUFFER -.3953c1 5a phy PHY -.3953c2 8b phb PHB -.3953c3 0b phd PHD -.3953c4 08 php PHP -.3953c5 48 pha PHA ; begin setdbr macro -.3953c6 08 php PHP -.3953c7 e2 20 sep #$20 SEP #$20 ; set A short -.3953c9 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.3953cb 48 pha PHA -.3953cc ab plb PLB -.3953cd 28 plp PLP -.3953ce 68 pla PLA ; end setdbr macro -.3953cf 48 pha PHA ; begin setdp macro -.3953d0 08 php PHP -.3953d1 c2 20 rep #$20 REP #$20 ; set A long -.3953d3 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.3953d6 5b tcd TCD -.3953d7 28 plp PLP -.3953d8 68 pla PLA ; end setdp macro -.3953d9 c2 30 rep #$30 REP #$30 ; set A&X long -.3953db a0 0e 00 ldy #$000e LDY #FILEDESC.BUFFER -.3953de b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.3953e0 85 28 sta $0348 STA DOS_TEMP -.3953e2 c8 iny INY -.3953e3 c8 iny INY -.3953e4 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.3953e6 85 2a sta $034a STA DOS_TEMP+2 -.3953e8 a0 00 00 ldy #$0000 LDY #0 -.3953eb a9 00 00 lda #$0000 LDA #0 -.3953ee 97 28 sta [$0348],y loop STA [DOS_TEMP],Y -.3953f0 c8 iny INY -.3953f1 c8 iny INY -.3953f2 c0 00 02 cpy #$0200 CPY #DOS_SECTOR_SIZE -.3953f5 d0 f7 bne $3953ee BNE loop -.3953f7 28 plp PLP -.3953f8 2b pld PLD -.3953f9 ab plb PLB -.3953fa 7a ply PLY -.3953fb 6b rtl RTL -.3953fc IF_COPY2BUFF -.3953fc 5a phy PHY -.3953fd 8b phb PHB -.3953fe 0b phd PHD -.3953ff 08 php PHP -.395400 48 pha PHA ; begin setdbr macro -.395401 08 php PHP -.395402 e2 20 sep #$20 SEP #$20 ; set A short -.395404 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.395406 48 pha PHA -.395407 ab plb PLB -.395408 28 plp PLP -.395409 68 pla PLA ; end setdbr macro -.39540a 48 pha PHA ; begin setdp macro -.39540b 08 php PHP -.39540c c2 20 rep #$20 REP #$20 ; set A long -.39540e a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.395411 5b tcd TCD -.395412 28 plp PLP -.395413 68 pla PLA ; end setdp macro -.395414 c2 30 rep #$30 REP #$30 ; set A&X long -.395416 a0 0e 00 ldy #$000e LDY #FILEDESC.BUFFER -.395419 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.39541b 85 28 sta $0348 STA DOS_TEMP -.39541d c8 iny INY -.39541e c8 iny INY -.39541f b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.395421 85 2a sta $034a STA DOS_TEMP+2 -.395423 a0 00 00 ldy #$0000 LDY #0 -.395426 copy_loop -.395426 e2 20 sep #$20 SEP #$20 ; set A short -.395428 a7 30 lda [$0350] LDA [DOS_SRC_PTR] ; Copy a byte -.39542a 97 28 sta [$0348],y STA [DOS_TEMP],Y -.39542c c2 20 rep #$20 REP #$20 ; set A long -.39542e e6 30 inc $0350 INC DOS_SRC_PTR ; Advance the source pointer -.395430 d0 02 bne $395434 BNE adv_dest -.395432 e6 32 inc $0352 INC DOS_SRC_PTR+2 -.395434 c8 iny adv_dest INY ; Count it -.395435 c0 00 02 cpy #$0200 CPY #DOS_SECTOR_SIZE ; Have we reached the limit? -.395438 f0 0c beq $395446 BEQ done ; Yes: we're done -.39543a a5 30 lda $0350 LDA DOS_SRC_PTR ; Check if we copied the last byte -.39543c c5 38 cmp $0358 CMP DOS_END_PTR -.39543e d0 e6 bne $395426 BNE copy_loop ; No: keep copying -.395440 a5 32 lda $0352 LDA DOS_SRC_PTR+2 -.395442 c5 3a cmp $035a CMP DOS_END_PTR+2 -.395444 d0 e0 bne $395426 BNE copy_loop -.395446 28 plp done PLP -.395447 2b pld PLD -.395448 ab plb PLB -.395449 7a ply PLY -.39544a 6b rtl RTL -.39544b IF_SAVE -.39544b da phx PHX -.39544c 5a phy PHY -.39544d 0b phd PHD -.39544e 8b phb PHB -.39544f 08 php PHP -.395450 48 pha PHA ; begin setdbr macro -.395451 08 php PHP -.395452 e2 20 sep #$20 SEP #$20 ; set A short -.395454 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.395456 48 pha PHA -.395457 ab plb PLB -.395458 28 plp PLP -.395459 68 pla PLA ; end setdbr macro -.39545a 48 pha PHA ; begin setdp macro -.39545b 08 php PHP -.39545c c2 20 rep #$20 REP #$20 ; set A long -.39545e a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.395461 5b tcd TCD -.395462 28 plp PLP -.395463 68 pla PLA ; end setdp macro -.395464 c2 30 rep #$30 REP #$30 ; set A&X long -.395466 a0 12 00 ldy #$0012 LDY #FILEDESC.SIZE ; DOS_FD_PTR->SIZE := DOS_END_PTR - DOS_SRC_PTR -.395469 38 sec SEC -.39546a a5 38 lda $0358 LDA DOS_END_PTR -.39546c e5 30 sbc $0350 SBC DOS_SRC_PTR +.395365 5a phy PHY ; Save the index +.395366 a0 00 00 ldy #$0000 LDY #FILEDESC.STATUS ; Get the file's status +.395369 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.39536b 09 80 ora #$80 ORA #FD_STAT_EOF ; Mark it EOF +.39536d 97 20 sta [$0340],y STA [DOS_FD_PTR],Y ; And update the status +.39536f 7a ply PLY ; Restore the index +.395370 80 e9 bra $39535b BRA ret_success +.395372 ret_failure +.395372 e2 20 sep #$20 SEP #$20 ; set A short +.395374 28 plp PLP +.395375 2b pld PLD +.395376 ab plb PLB +.395377 18 clc CLC +.395378 6b rtl RTL +.395379 IF_LOADRAW +.395379 c2 30 rep #$30 REP #$30 ; set A&X long +.39537b a0 00 00 ldy #$0000 copy_cluster LDY #0 +.39537e copy_loop +.39537e e2 20 sep #$20 SEP #$20 ; set A short +.395380 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y ; Copy byte from cluster to destination +.395382 97 34 sta [$0354],y STA [DOS_DST_PTR],Y +.395384 c2 20 rep #$20 REP #$20 ; set A long +.395386 38 sec SEC ; Count down the number of bytes left +.395387 a5 2c lda $034c LDA DOS_FILE_SIZE +.395389 e9 01 00 sbc #$0001 SBC #1 +.39538c 85 2c sta $034c STA DOS_FILE_SIZE +.39538e a5 2e lda $034e LDA DOS_FILE_SIZE+2 +.395390 e9 00 00 sbc #$0000 SBC #0 +.395393 85 2e sta $034e STA DOS_FILE_SIZE+2 +.395395 d0 04 bne $39539b BNE continue +.395397 a5 2c lda $034c LDA DOS_FILE_SIZE +.395399 f0 1b beq $3953b6 BEQ close_file ; If not: we're done +.39539b c8 iny continue INY +.39539c cc 0e a0 cpy $38a00e CPY CLUSTER_SIZE ; Are we done with the cluster? +.39539f d0 dd bne $39537e BNE copy_loop ; No: keep processing the bytes +.3953a1 18 clc CLC ; Advance the destination pointer to the next chunk of memory +.3953a2 a5 34 lda $0354 LDA DOS_DST_PTR +.3953a4 6d 0e a0 adc $38a00e ADC CLUSTER_SIZE +.3953a7 85 34 sta $0354 STA DOS_DST_PTR +.3953a9 a5 36 lda $0356 LDA DOS_DST_PTR+2 +.3953ab 69 00 00 adc #$0000 ADC #0 +.3953ae 85 36 sta $0356 STA DOS_DST_PTR+2 +.3953b0 22 15 4f 39 jsl $394f15 JSL IF_READ ; Yes: load the next cluster +.3953b4 b0 c5 bcs $39537b BCS copy_cluster ; And start copying it +.3953b6 close_file +.3953b6 82 16 01 brl $3954cf ret_success BRL IF_SUCCESS +.3953b9 IF_NULLBUFFER +.3953b9 5a phy PHY +.3953ba 8b phb PHB +.3953bb 0b phd PHD +.3953bc 08 php PHP +.3953bd 48 pha PHA ; begin setdbr macro +.3953be 08 php PHP +.3953bf e2 20 sep #$20 SEP #$20 ; set A short +.3953c1 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.3953c3 48 pha PHA +.3953c4 ab plb PLB +.3953c5 28 plp PLP +.3953c6 68 pla PLA ; end setdbr macro +.3953c7 48 pha PHA ; begin setdp macro +.3953c8 08 php PHP +.3953c9 c2 20 rep #$20 REP #$20 ; set A long +.3953cb a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3953ce 5b tcd TCD +.3953cf 28 plp PLP +.3953d0 68 pla PLA ; end setdp macro +.3953d1 c2 30 rep #$30 REP #$30 ; set A&X long +.3953d3 a0 0e 00 ldy #$000e LDY #FILEDESC.BUFFER +.3953d6 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.3953d8 85 28 sta $0348 STA DOS_TEMP +.3953da c8 iny INY +.3953db c8 iny INY +.3953dc b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.3953de 85 2a sta $034a STA DOS_TEMP+2 +.3953e0 a0 00 00 ldy #$0000 LDY #0 +.3953e3 a9 00 00 lda #$0000 LDA #0 +.3953e6 97 28 sta [$0348],y loop STA [DOS_TEMP],Y +.3953e8 c8 iny INY +.3953e9 c8 iny INY +.3953ea c0 00 02 cpy #$0200 CPY #DOS_SECTOR_SIZE +.3953ed d0 f7 bne $3953e6 BNE loop +.3953ef 28 plp PLP +.3953f0 2b pld PLD +.3953f1 ab plb PLB +.3953f2 7a ply PLY +.3953f3 6b rtl RTL +.3953f4 IF_COPY2BUFF +.3953f4 5a phy PHY +.3953f5 8b phb PHB +.3953f6 0b phd PHD +.3953f7 08 php PHP +.3953f8 48 pha PHA ; begin setdbr macro +.3953f9 08 php PHP +.3953fa e2 20 sep #$20 SEP #$20 ; set A short +.3953fc a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.3953fe 48 pha PHA +.3953ff ab plb PLB +.395400 28 plp PLP +.395401 68 pla PLA ; end setdbr macro +.395402 48 pha PHA ; begin setdp macro +.395403 08 php PHP +.395404 c2 20 rep #$20 REP #$20 ; set A long +.395406 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.395409 5b tcd TCD +.39540a 28 plp PLP +.39540b 68 pla PLA ; end setdp macro +.39540c c2 30 rep #$30 REP #$30 ; set A&X long +.39540e a0 0e 00 ldy #$000e LDY #FILEDESC.BUFFER +.395411 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.395413 85 28 sta $0348 STA DOS_TEMP +.395415 c8 iny INY +.395416 c8 iny INY +.395417 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.395419 85 2a sta $034a STA DOS_TEMP+2 +.39541b a0 00 00 ldy #$0000 LDY #0 +.39541e copy_loop +.39541e e2 20 sep #$20 SEP #$20 ; set A short +.395420 a7 30 lda [$0350] LDA [DOS_SRC_PTR] ; Copy a byte +.395422 97 28 sta [$0348],y STA [DOS_TEMP],Y +.395424 c2 20 rep #$20 REP #$20 ; set A long +.395426 e6 30 inc $0350 INC DOS_SRC_PTR ; Advance the source pointer +.395428 d0 02 bne $39542c BNE adv_dest +.39542a e6 32 inc $0352 INC DOS_SRC_PTR+2 +.39542c c8 iny adv_dest INY ; Count it +.39542d c0 00 02 cpy #$0200 CPY #DOS_SECTOR_SIZE ; Have we reached the limit? +.395430 f0 0c beq $39543e BEQ done ; Yes: we're done +.395432 a5 30 lda $0350 LDA DOS_SRC_PTR ; Check if we copied the last byte +.395434 c5 38 cmp $0358 CMP DOS_END_PTR +.395436 d0 e6 bne $39541e BNE copy_loop ; No: keep copying +.395438 a5 32 lda $0352 LDA DOS_SRC_PTR+2 +.39543a c5 3a cmp $035a CMP DOS_END_PTR+2 +.39543c d0 e0 bne $39541e BNE copy_loop +.39543e 28 plp done PLP +.39543f 2b pld PLD +.395440 ab plb PLB +.395441 7a ply PLY +.395442 6b rtl RTL +.395443 IF_SAVE +.395443 da phx PHX +.395444 5a phy PHY +.395445 0b phd PHD +.395446 8b phb PHB +.395447 08 php PHP +.395448 48 pha PHA ; begin setdbr macro +.395449 08 php PHP +.39544a e2 20 sep #$20 SEP #$20 ; set A short +.39544c a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.39544e 48 pha PHA +.39544f ab plb PLB +.395450 28 plp PLP +.395451 68 pla PLA ; end setdbr macro +.395452 48 pha PHA ; begin setdp macro +.395453 08 php PHP +.395454 c2 20 rep #$20 REP #$20 ; set A long +.395456 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.395459 5b tcd TCD +.39545a 28 plp PLP +.39545b 68 pla PLA ; end setdp macro +.39545c c2 30 rep #$30 REP #$30 ; set A&X long +.39545e a0 12 00 ldy #$0012 LDY #FILEDESC.SIZE ; DOS_FD_PTR->SIZE := DOS_END_PTR - DOS_SRC_PTR +.395461 38 sec SEC +.395462 a5 38 lda $0358 LDA DOS_END_PTR +.395464 e5 30 sbc $0350 SBC DOS_SRC_PTR +.395466 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.395468 c8 iny INY +.395469 c8 iny INY +.39546a a5 3a lda $035a LDA DOS_END_PTR+2 +.39546c e5 32 sbc $0352 SBC DOS_SRC_PTR+2 .39546e 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.395470 c8 iny INY -.395471 c8 iny INY -.395472 a5 3a lda $035a LDA DOS_END_PTR+2 -.395474 e5 32 sbc $0352 SBC DOS_SRC_PTR+2 -.395476 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.395478 a0 12 00 ldy #$0012 LDY #FILEDESC.SIZE ; DOS_FD_PTR->SIZE++ -.39547b 18 clc CLC -.39547c b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.39547e 69 01 00 adc #$0001 ADC #1 -.395481 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.395483 90 09 bcc $39548e BCC first_block -.395485 c8 iny INY -.395486 c8 iny INY -.395487 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y -.395489 69 00 00 adc #$0000 ADC #0 -.39548c 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.39548e 22 c1 53 39 jsl $3953c1 first_block JSL IF_NULLBUFFER ; Fill FD buffer with NULL -.395492 22 fc 53 39 jsl $3953fc JSL IF_COPY2BUFF ; Copy first (at most) 512 bytes of data to FD buffer -.395496 22 af 4e 39 jsl $394eaf JSL IF_CREATE ; Create file. -.39549a b0 03 bcs $39549f BCS check_for_end -.39549c 82 31 00 brl $3954d0 BRL IF_PASSFAILURE ; If we couldn't create the file, pass the failure up -.39549f a5 30 lda $0350 check_for_end LDA DOS_SRC_PTR ; Check if we copied the last byte -.3954a1 c5 38 cmp $0358 CMP DOS_END_PTR -.3954a3 d0 06 bne $3954ab BNE next_block -.3954a5 a5 32 lda $0352 LDA DOS_SRC_PTR+2 -.3954a7 c5 3a cmp $035a CMP DOS_END_PTR+2 -.3954a9 f0 1d beq $3954c8 BEQ done ; Yes: we're done -.3954ab 22 c1 53 39 jsl $3953c1 next_block JSL IF_NULLBUFFER ; Fill FD buffer with NULL -.3954af 22 fc 53 39 jsl $3953fc JSL IF_COPY2BUFF ; Copy next (at most) 512 bytes of data to FD buffer -.3954b3 a0 06 00 ldy #$0006 LDY #FILEDESC.CLUSTER ; Make sure the CLUSTER is 0 to force an append -.3954b6 a9 00 00 lda #$0000 LDA #0 -.3954b9 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.3954bb c8 iny INY -.3954bc c8 iny INY -.3954bd 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.3954bf 22 82 4f 39 jsl $394f82 JSL IF_WRITE ; Append to the file -.3954c3 b0 da bcs $39549f BCS check_for_end ; And try again -.3954c5 82 08 00 brl $3954d0 BRL IF_PASSFAILURE ; If we couldn't update the file, pass the failure up -.3954c8 5c d7 54 39 jmp $3954d7 done JML IF_SUCCESS -.3954cc IF_FAILURE -.3954cc e2 20 sep #$20 SEP #$20 ; set A short -.3954ce 85 0e sta $032e STA DOS_STATUS -.3954d0 28 plp IF_PASSFAILURE PLP -.3954d1 18 clc CLC -.3954d2 ab plb PLB -.3954d3 2b pld PLD -.3954d4 7a ply PLY -.3954d5 fa plx PLX -.3954d6 6b rtl RTL -.3954d7 IF_SUCCESS -.3954d7 e2 20 sep #$20 SEP #$20 ; set A short -.3954d9 64 00 stz $0320 STZ BIOS_STATUS -.3954db 64 0e stz $032e STZ DOS_STATUS -.3954dd 28 plp PLP -.3954de 38 sec SEC -.3954df ab plb PLB -.3954e0 2b pld PLD -.3954e1 7a ply PLY -.3954e2 fa plx PLX -.3954e3 6b rtl RTL -.3954e4 IF_RUN -.3954e4 da phx PHX -.3954e5 5a phy PHY -.3954e6 0b phd PHD -.3954e7 8b phb PHB -.3954e8 08 php PHP -.3954e9 48 pha PHA ; begin setdbr macro -.3954ea 08 php PHP -.3954eb e2 20 sep #$20 SEP #$20 ; set A short -.3954ed a9 00 lda #$00 LDA #0 -.3954ef 48 pha PHA -.3954f0 ab plb PLB -.3954f1 28 plp PLP -.3954f2 68 pla PLA ; end setdbr macro -.3954f3 48 pha PHA ; begin setdp macro -.3954f4 08 php PHP -.3954f5 c2 20 rep #$20 REP #$20 ; set A long -.3954f7 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.3954fa 5b tcd TCD -.3954fb 28 plp PLP -.3954fc 68 pla PLA ; end setdp macro -.3954fd e2 20 sep #$20 SEP #$20 ; set A short -.3954ff c2 10 rep #$10 REP #$10 ; set X long -.395501 a9 00 lda #$00 LDA #0 ; Zero out the file descriptor -.395503 a2 00 00 ldx #$0000 LDX #0 -.395506 9f 00 ad 38 sta $38ad00,x clr_fd_loop STA @l DOS_SPARE_FD,X -.39550a e8 inx INX -.39550b e0 20 00 cpx #$0020 CPX #SIZE(FILEDESC) -.39550e d0 f6 bne $395506 BNE clr_fd_loop -.395510 c2 20 rep #$20 REP #$20 ; set A long -.395512 a9 00 ab lda #$ab00 LDA #<>DOS_SPARE_SECTOR ; Set the buffer for the file descriptor -.395515 8f 0e ad 38 sta $38ad0e STA @l DOS_SPARE_FD+FILEDESC.BUFFER -.395519 a9 38 00 lda #$0038 LDA #`DOS_SPARE_SECTOR -.39551c 8f 10 ad 38 sta $38ad10 STA @l DOS_SPARE_FD+FILEDESC.BUFFER+2 -.395520 a5 40 lda $0360 LDA DOS_RUN_PARAM ; Set the path for the file descriptor -.395522 8f 02 ad 38 sta $38ad02 STA @l DOS_SPARE_FD+FILEDESC.PATH -.395526 a5 42 lda $0362 LDA DOS_RUN_PARAM+2 -.395528 8f 04 ad 38 sta $38ad04 STA @l DOS_SPARE_FD+FILEDESC.PATH+2 -.39552c a9 00 00 lda #$0000 LDA #0 ; Clear the run pointer -.39552f 85 3c sta $035c STA DOS_RUN_PTR ; This is used to check that we loaded an executable binary -.395531 85 3e sta $035e STA DOS_RUN_PTR+2 -.395533 a9 00 ad lda #$ad00 LDA #<>DOS_SPARE_FD -.395536 85 20 sta $0340 STA DOS_FD_PTR -.395538 a9 38 00 lda #$0038 LDA #`DOS_SPARE_FD -.39553b 85 22 sta $0342 STA DOS_FD_PTR+2 -.39553d a9 ff ff lda #$ffff LDA #$FFFF ; We want to load to the address provided by the file -.395540 8f 54 03 00 sta $000354 STA @l DOS_DST_PTR -.395544 8f 56 03 00 sta $000356 STA @l DOS_DST_PTR+2 -.395548 22 18 11 00 jsl $001118 JSL F_LOAD ; Try to load the file -.39554c b0 03 bcs $395551 BCS chk_execute -.39554e 82 7f ff brl $3954d0 BRL IF_PASSFAILURE ; On error: pass failure up the chain -.395551 chk_execute -.395551 c2 20 rep #$20 REP #$20 ; set A long -.395553 a5 3c lda $035c LDA DOS_RUN_PTR ; Check to see if we got a startup address back -.395555 d0 0b bne $395562 BNE try_execute ; If so: call it -.395557 a5 3e lda $035e LDA DOS_RUN_PTR+2 -.395559 d0 07 bne $395562 BNE try_execute -.39555b e2 20 sep #$20 SEP #$20 ; set A short -.39555d a9 11 lda #$11 LDA #DOS_ERR_NOEXEC ; If not: return an error that it's not executable -.39555f 82 6a ff brl $3954cc BRL IF_FAILURE -.395562 try_execute -.395562 e2 20 sep #$20 SEP #$20 ; set A short -.395564 a5 42 lda $0362 LDA DOS_RUN_PARAM+2 -.395566 48 pha PHA -.395567 a5 41 lda $0361 LDA DOS_RUN_PARAM+1 -.395569 48 pha PHA -.39556a a5 40 lda $0360 LDA DOS_RUN_PARAM -.39556c 48 pha PHA -.39556d a9 5c lda #$5c LDA #$5C ; Write a JML opcode -.39556f 85 3b sta $035b STA DOS_RUN_PTR-1 -.395571 22 5b 03 00 jsl $00035b JSL DOS_RUN_PTR-1 ; And call to it -.395575 e2 20 sep #$20 SEP #$20 ; set A short -.395577 68 pla PLA ; Remove the path and parameters string from the stack -.395578 68 pla PLA -.395579 68 pla PLA -.39557a 82 5a ff brl $3954d7 BRL IF_SUCCESS ; Return success -.39557d IF_ALLOCFD -.39557d da phx PHX -.39557e 5a phy PHY -.39557f 0b phd PHD -.395580 8b phb PHB -.395581 08 php PHP -.395582 48 pha PHA ; begin setdbr macro -.395583 08 php PHP -.395584 e2 20 sep #$20 SEP #$20 ; set A short -.395586 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.395588 48 pha PHA -.395589 ab plb PLB -.39558a 28 plp PLP -.39558b 68 pla PLA ; end setdbr macro -.39558c 48 pha PHA ; begin setdp macro -.39558d 08 php PHP -.39558e c2 20 rep #$20 REP #$20 ; set A long -.395590 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.395593 5b tcd TCD -.395594 28 plp PLP -.395595 68 pla PLA ; end setdp macro -.395596 c2 10 rep #$10 REP #$10 ; set X long -.395598 a2 00 00 ldx #$0000 LDX #0 ; Point to the first file descriptor -.39559b chk_fd -.39559b e2 20 sep #$20 SEP #$20 ; set A short -.39559d bd 20 ad lda $38ad20,x LDA @w DOS_FILE_DESCS,X ; Check the file descriptor's status -.3955a0 89 10 bit #$10 BIT #FD_STAT_ALLOC ; Is the file descriptor allocated? -.3955a2 f0 14 beq $3955b8 BEQ found ; No: flag and return the found descriptor -.3955a4 next_fd -.3955a4 c2 20 rep #$20 REP #$20 ; set A long -.3955a6 8a txa TXA ; Yes: Move to the next file descriptor -.3955a7 18 clc CLC -.3955a8 69 20 00 adc #$0020 ADC #SIZE(FILEDESC) -.3955ab aa tax TAX -.3955ac e0 00 01 cpx #$0100 CPX #SIZE(FILEDESC) * DOS_FD_MAX ; Are we out of file descriptors? -.3955af 90 ea bcc $39559b BLT chk_fd ; No: check this new file descriptor -.3955b1 e2 20 sep #$20 SEP #$20 ; set A short -.3955b3 a9 16 lda #$16 LDA #DOS_ERR_NOFD ; Yes: Return failure (no file descriptors available) -.3955b5 82 14 ff brl $3954cc BRL IF_FAILURE -.3955b8 a9 10 lda #$10 found LDA #FD_STAT_ALLOC ; No: Set the ALLOC bit -.3955ba 9d 20 ad sta $38ad20,x STA @w DOS_FILE_DESCS,X ; And store it in the file descriptor's status -.3955bd c2 20 rep #$20 REP #$20 ; set A long -.3955bf 8a txa TXA -.3955c0 18 clc CLC -.3955c1 69 20 ad adc #$ad20 ADC #<>DOS_FILE_DESCS -.3955c4 85 20 sta $0340 STA @b DOS_FD_PTR -.3955c6 a9 38 00 lda #$0038 LDA #`DOS_FILE_DESCS -.3955c9 69 00 00 adc #$0000 ADC #0 -.3955cc 85 22 sta $0342 STA @b DOS_FD_PTR+2 -.3955ce 82 06 ff brl $3954d7 BRL IF_SUCCESS ; Return this file descriptor -.3955d1 IF_FREEFD -.3955d1 da phx PHX -.3955d2 5a phy PHY -.3955d3 0b phd PHD -.3955d4 8b phb PHB -.3955d5 08 php PHP -.3955d6 48 pha PHA ; begin setdbr macro -.3955d7 08 php PHP -.3955d8 e2 20 sep #$20 SEP #$20 ; set A short -.3955da a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES -.3955dc 48 pha PHA -.3955dd ab plb PLB -.3955de 28 plp PLP -.3955df 68 pla PLA ; end setdbr macro -.3955e0 48 pha PHA ; begin setdp macro -.3955e1 08 php PHP -.3955e2 c2 20 rep #$20 REP #$20 ; set A long -.3955e4 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.3955e7 5b tcd TCD -.3955e8 28 plp PLP -.3955e9 68 pla PLA ; end setdp macro -.3955ea e2 20 sep #$20 SEP #$20 ; set A short -.3955ec c2 10 rep #$10 REP #$10 ; set X long -.3955ee a9 00 lda #$00 LDA #0 -.3955f0 87 20 sta [$0340] STA [DOS_FD_PTR] -.3955f2 82 e2 fe brl $3954d7 BRL IF_SUCCESS -.3955f5 DOS_SRC2DST -.3955f5 da phx PHX -.3955f6 5a phy PHY -.3955f7 0b phd PHD -.3955f8 8b phb PHB -.3955f9 08 php PHP -.3955fa 48 pha PHA ; begin setdp macro -.3955fb 08 php PHP -.3955fc c2 20 rep #$20 REP #$20 ; set A long -.3955fe a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.395601 5b tcd TCD -.395602 28 plp PLP -.395603 68 pla PLA ; end setdp macro -.395604 c2 30 rep #$30 REP #$30 ; set A&X long -.395606 a0 0e 00 ldy #$000e LDY #FILEDESC.BUFFER -.395609 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y -.39560b aa tax TAX ; X := source buffer address -.39560c b7 34 lda [$0354],y LDA [DOS_DST_PTR],Y -.39560e a8 tay TAY ; Y := destination buffer address -.39560f e2 20 sep #$20 SEP #$20 ; set A short -.395611 a9 38 lda #$38 LDA #`DOS_FILE_BUFFS -.395613 48 pha PHA -.395614 ab plb PLB -.395615 c2 20 rep #$20 REP #$20 ; set A long -.395617 a9 00 02 lda #$0200 LDA #DOS_SECTOR_SIZE ; A := the size of the buffers -.39561a f0 11 beq $39562d loop BEQ done -.39561c 48 pha PHA -.39561d e2 20 sep #$20 SEP #$20 ; set A short -.39561f bd 00 00 lda $380000,x LDA #0,B,X -.395622 99 00 00 sta $380000,y STA #0,B,Y -.395625 c2 20 rep #$20 REP #$20 ; set A long -.395627 68 pla PLA -.395628 3a dec a DEC A -.395629 e8 inx INX -.39562a c8 iny INY -.39562b 80 ed bra $39561a BRA loop -.39562d 28 plp done PLP -.39562e ab plb PLB -.39562f 2b pld PLD -.395630 7a ply PLY -.395631 fa plx PLX -.395632 6b rtl RTL -.395633 IF_COPY -.395633 da phx PHX -.395634 5a phy PHY -.395635 0b phd PHD -.395636 8b phb PHB -.395637 08 php PHP -.395638 48 pha PHA ; begin setdbr macro -.395639 08 php PHP -.39563a e2 20 sep #$20 SEP #$20 ; set A short -.39563c a9 00 lda #$00 LDA #0 -.39563e 48 pha PHA -.39563f ab plb PLB -.395640 28 plp PLP -.395641 68 pla PLA ; end setdbr macro -.395642 48 pha PHA ; begin setdp macro -.395643 08 php PHP -.395644 c2 20 rep #$20 REP #$20 ; set A long -.395646 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.395649 5b tcd TCD -.39564a 28 plp PLP -.39564b 68 pla PLA ; end setdp macro -.39564c 22 7d 55 39 jsl $39557d JSL IF_ALLOCFD ; Allocate an FD for the source -.395650 b0 03 bcs $395655 BCS set_src_path -.395652 82 7b fe brl $3954d0 BRL IF_PASSFAILURE ; If failed: pass the failure up the chain -.395655 set_src_path -.395655 c2 30 rep #$30 REP #$30 ; set A&X long -.395657 a0 02 00 ldy #$0002 LDY #FILEDESC.PATH ; Set the source path -.39565a a5 44 lda $0364 LDA @b DOS_STR1_PTR -.39565c 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.39565e c8 iny INY -.39565f c8 iny INY -.395660 a5 46 lda $0366 LDA @b DOS_STR1_PTR+2 -.395662 97 20 sta [$0340],y STA [DOS_FD_PTR],Y -.395664 alloc_dest -.395664 c2 30 rep #$30 REP #$30 ; set A&X long -.395666 a5 20 lda $0340 LDA @b DOS_FD_PTR ; set DOS_SRC_PTR to the file descriptor pointer -.395668 85 30 sta $0350 STA @b DOS_SRC_PTR -.39566a a5 22 lda $0342 LDA @b DOS_FD_PTR+2 -.39566c 85 32 sta $0352 STA @b DOS_SRC_PTR+2 -.39566e 22 7d 55 39 jsl $39557d JSL IF_ALLOCFD ; Allocate an FD for the destination -.395672 b0 0f bcs $395683 BCS set_paths ; If everything is ok... start setting the paths -.395674 a5 30 lda $0350 err_free_src_fd LDA @b DOS_SRC_PTR ; Get the source file descriptor pointer -.395676 85 20 sta $0340 STA @b DOS_FD_PTR -.395678 a5 32 lda $0352 LDA @b DOS_SRC_PTR+2 -.39567a 85 22 sta $0342 STA @b DOS_FD_PTR+2 -.39567c 22 d1 55 39 jsl $3955d1 JSL IF_FREEFD ; And free it -.395680 82 4d fe brl $3954d0 BRL IF_PASSFAILURE ; Pass the failure up the chain -.395683 set_paths -.395683 c2 30 rep #$30 REP #$30 ; set A&X long -.395685 a5 20 lda $0340 LDA @b DOS_FD_PTR ; Set DOS_DST_PTR to the file descriptor pointer for the destination -.395687 85 34 sta $0354 STA @b DOS_DST_PTR -.395689 a5 22 lda $0342 LDA @b DOS_FD_PTR+2 -.39568b 85 36 sta $0356 STA @b DOS_DST_PTR+2 -.39568d a0 02 00 ldy #$0002 LDY #FILEDESC.PATH ; Set the destination path -.395690 a5 48 lda $0368 LDA @b DOS_STR2_PTR -.395692 97 34 sta [$0354],y STA [DOS_DST_PTR],Y -.395694 c8 iny INY -.395695 c8 iny INY -.395696 a5 4a lda $036a LDA @b DOS_STR2_PTR+2 -.395698 97 34 sta [$0354],y STA [DOS_DST_PTR],Y -.39569a a5 30 lda $0350 LDA @b DOS_SRC_PTR ; Get the source file descriptor pointer -.39569c 85 20 sta $0340 STA @b DOS_FD_PTR -.39569e a5 32 lda $0352 LDA @b DOS_SRC_PTR+2 -.3956a0 85 22 sta $0342 STA @b DOS_FD_PTR+2 -.3956a2 22 f0 10 00 jsl $0010f0 JSL F_OPEN ; Try to open the file -.3956a6 b0 10 bcs $3956b8 BCS src_open ; If success, work with the openned file -.3956a8 00 brk # BRK -.3956a9 a5 34 lda $0354 err_free_dst_fd LDA @b DOS_DST_PTR ; Get the destination file descriptor pointer -.3956ab 85 20 sta $0340 STA @b DOS_FD_PTR -.3956ad a5 36 lda $0356 LDA @b DOS_DST_PTR+2 -.3956af 85 22 sta $0342 STA @b DOS_FD_PTR+2 -.3956b1 22 d1 55 39 jsl $3955d1 JSL IF_FREEFD ; And free it -.3956b5 82 bc ff brl $395674 BRL err_free_src_fd ; Free the source file descriptor -.3956b8 a0 12 00 ldy #$0012 src_open LDY #FILEDESC.SIZE ; destination file size := source file size -.3956bb b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y -.3956bd 97 34 sta [$0354],y STA [DOS_DST_PTR],Y -.3956bf c8 iny INY -.3956c0 c8 iny INY -.3956c1 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y -.3956c3 97 34 sta [$0354],y STA [DOS_DST_PTR],Y -.3956c5 22 f5 55 39 jsl $3955f5 JSL DOS_SRC2DST ; Copy the first sector's worth of data -.3956c9 a5 34 lda $0354 LDA @b DOS_DST_PTR ; Get the destination file descriptor pointer -.3956cb 85 20 sta $0340 STA @b DOS_FD_PTR -.3956cd a5 36 lda $0356 LDA @b DOS_DST_PTR+2 -.3956cf 85 22 sta $0342 STA @b DOS_FD_PTR+2 -.3956d1 22 f4 10 00 jsl $0010f4 JSL F_CREATE ; Attempt to create the file -.3956d5 b0 0f bcs $3956e6 BCS read_next ; If sucessful, try to get the next cluster -.3956d7 a5 30 lda $0350 err_src_close LDA @b DOS_SRC_PTR ; Get the source file descriptor pointer -.3956d9 85 20 sta $0340 STA @b DOS_FD_PTR -.3956db a5 32 lda $0352 LDA @b DOS_SRC_PTR+2 -.3956dd 85 22 sta $0342 STA @b DOS_FD_PTR+2 -.3956df 22 f8 10 00 jsl $0010f8 JSL F_CLOSE ; Close the source file (maybe not really necessary) -.3956e3 82 c3 ff brl $3956a9 BRL err_free_dst_fd ; Free the file descriptors and return an error -.3956e6 read_next -.3956e6 a5 30 lda $0350 LDA @b DOS_SRC_PTR ; Get the source file descriptor pointer -.3956e8 85 20 sta $0340 STA @b DOS_FD_PTR -.3956ea a5 32 lda $0352 LDA @b DOS_SRC_PTR+2 -.3956ec 85 22 sta $0342 STA @b DOS_FD_PTR+2 -.3956ee 22 00 11 00 jsl $001100 JSL F_READ ; Attempt to read the next sector of the source -.3956f2 b0 19 bcs $39570d BCS copy2dest ; If successful, copy the sector -.3956f4 e2 20 sep #$20 SEP #$20 ; set A short -.3956f6 a5 0e lda $032e LDA @b DOS_STATUS -.3956f8 c9 0a cmp #$0a CMP #DOS_ERR_NOCLUSTER ; Are there no more clusters in the source file? -.3956fa f0 32 beq $39572e BEQ file_copied ; Yes: we're done copying -.3956fc err_dest_close -.3956fc c2 20 rep #$20 REP #$20 ; set A long -.3956fe a5 34 lda $0354 LDA @b DOS_DST_PTR ; Get the destination file descriptor pointer -.395700 85 20 sta $0340 STA @b DOS_FD_PTR -.395702 a5 36 lda $0356 LDA @b DOS_DST_PTR+2 -.395704 85 22 sta $0342 STA @b DOS_FD_PTR+2 -.395706 22 f8 10 00 jsl $0010f8 JSL F_CLOSE ; Attempt to close the destination -.39570a 82 ca ff brl $3956d7 BRL err_src_close ; Close the source and throw an error -.39570d copy2dest -.39570d 22 f5 55 39 jsl $3955f5 JSL DOS_SRC2DST ; Copy the source sector to the destination sector -.395711 a0 06 00 ldy #$0006 LDY #FILEDESC.CLUSTER ; destination sector cluster ID := 0 to append -.395714 a9 00 00 lda #$0000 LDA #0 -.395717 97 34 sta [$0354],y STA [DOS_DST_PTR],Y -.395719 c8 iny INY -.39571a c8 iny INY -.39571b 97 34 sta [$0354],y STA [DOS_DST_PTR],Y -.39571d a5 34 lda $0354 LDA @b DOS_DST_PTR ; Get the destination file descriptor pointer -.39571f 85 20 sta $0340 STA @b DOS_FD_PTR -.395721 a5 36 lda $0356 LDA @b DOS_DST_PTR+2 -.395723 85 22 sta $0342 STA @b DOS_FD_PTR+2 -.395725 22 fc 10 00 jsl $0010fc JSL F_WRITE ; Attempt to write the destionation sector to the disk -.395729 90 d1 bcc $3956fc BCC err_dest_close ; If error: close all files and throw the error -.39572b 82 b8 ff brl $3956e6 BRL read_next ; Otherwise: repeat the loop -.39572e file_copied -.39572e c2 20 rep #$20 REP #$20 ; set A long -.395730 a5 34 lda $0354 LDA @b DOS_DST_PTR ; Get the destination file descriptor pointer -.395732 85 20 sta $0340 STA @b DOS_FD_PTR -.395734 a5 36 lda $0356 LDA @b DOS_DST_PTR+2 -.395736 85 22 sta $0342 STA @b DOS_FD_PTR+2 -.395738 22 f8 10 00 jsl $0010f8 JSL F_CLOSE ; Close the destination -.39573c a5 30 lda $0350 LDA @b DOS_SRC_PTR ; Get the source file descriptor pointer -.39573e 85 20 sta $0340 STA @b DOS_FD_PTR -.395740 a5 32 lda $0352 LDA @b DOS_SRC_PTR+2 -.395742 85 22 sta $0342 STA @b DOS_FD_PTR+2 -.395744 22 f8 10 00 jsl $0010f8 JSL F_CLOSE ; Close the source -.395748 82 8c fd brl $3954d7 BRL IF_SUCCESS +.395470 a0 12 00 ldy #$0012 LDY #FILEDESC.SIZE ; DOS_FD_PTR->SIZE++ +.395473 18 clc CLC +.395474 b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.395476 69 01 00 adc #$0001 ADC #1 +.395479 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.39547b 90 09 bcc $395486 BCC first_block +.39547d c8 iny INY +.39547e c8 iny INY +.39547f b7 20 lda [$0340],y LDA [DOS_FD_PTR],Y +.395481 69 00 00 adc #$0000 ADC #0 +.395484 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.395486 22 b9 53 39 jsl $3953b9 first_block JSL IF_NULLBUFFER ; Fill FD buffer with NULL +.39548a 22 f4 53 39 jsl $3953f4 JSL IF_COPY2BUFF ; Copy first (at most) 512 bytes of data to FD buffer +.39548e 22 a7 4e 39 jsl $394ea7 JSL IF_CREATE ; Create file. +.395492 b0 03 bcs $395497 BCS check_for_end +.395494 82 31 00 brl $3954c8 BRL IF_PASSFAILURE ; If we couldn't create the file, pass the failure up +.395497 a5 30 lda $0350 check_for_end LDA DOS_SRC_PTR ; Check if we copied the last byte +.395499 c5 38 cmp $0358 CMP DOS_END_PTR +.39549b d0 06 bne $3954a3 BNE next_block +.39549d a5 32 lda $0352 LDA DOS_SRC_PTR+2 +.39549f c5 3a cmp $035a CMP DOS_END_PTR+2 +.3954a1 f0 1d beq $3954c0 BEQ done ; Yes: we're done +.3954a3 22 b9 53 39 jsl $3953b9 next_block JSL IF_NULLBUFFER ; Fill FD buffer with NULL +.3954a7 22 f4 53 39 jsl $3953f4 JSL IF_COPY2BUFF ; Copy next (at most) 512 bytes of data to FD buffer +.3954ab a0 06 00 ldy #$0006 LDY #FILEDESC.CLUSTER ; Make sure the CLUSTER is 0 to force an append +.3954ae a9 00 00 lda #$0000 LDA #0 +.3954b1 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.3954b3 c8 iny INY +.3954b4 c8 iny INY +.3954b5 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.3954b7 22 7a 4f 39 jsl $394f7a JSL IF_WRITE ; Append to the file +.3954bb b0 da bcs $395497 BCS check_for_end ; And try again +.3954bd 82 08 00 brl $3954c8 BRL IF_PASSFAILURE ; If we couldn't update the file, pass the failure up +.3954c0 5c cf 54 39 jmp $3954cf done JML IF_SUCCESS +.3954c4 IF_FAILURE +.3954c4 e2 20 sep #$20 SEP #$20 ; set A short +.3954c6 85 0e sta $032e STA DOS_STATUS +.3954c8 28 plp IF_PASSFAILURE PLP +.3954c9 18 clc CLC +.3954ca ab plb PLB +.3954cb 2b pld PLD +.3954cc 7a ply PLY +.3954cd fa plx PLX +.3954ce 6b rtl RTL +.3954cf IF_SUCCESS +.3954cf e2 20 sep #$20 SEP #$20 ; set A short +.3954d1 64 00 stz $0320 STZ BIOS_STATUS +.3954d3 64 0e stz $032e STZ DOS_STATUS +.3954d5 28 plp PLP +.3954d6 38 sec SEC +.3954d7 ab plb PLB +.3954d8 2b pld PLD +.3954d9 7a ply PLY +.3954da fa plx PLX +.3954db 6b rtl RTL +.3954dc IF_RUN +.3954dc da phx PHX +.3954dd 5a phy PHY +.3954de 0b phd PHD +.3954df 8b phb PHB +.3954e0 08 php PHP +.3954e1 48 pha PHA ; begin setdbr macro +.3954e2 08 php PHP +.3954e3 e2 20 sep #$20 SEP #$20 ; set A short +.3954e5 a9 00 lda #$00 LDA #0 +.3954e7 48 pha PHA +.3954e8 ab plb PLB +.3954e9 28 plp PLP +.3954ea 68 pla PLA ; end setdbr macro +.3954eb 48 pha PHA ; begin setdp macro +.3954ec 08 php PHP +.3954ed c2 20 rep #$20 REP #$20 ; set A long +.3954ef a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3954f2 5b tcd TCD +.3954f3 28 plp PLP +.3954f4 68 pla PLA ; end setdp macro +.3954f5 e2 20 sep #$20 SEP #$20 ; set A short +.3954f7 c2 10 rep #$10 REP #$10 ; set X long +.3954f9 a9 00 lda #$00 LDA #0 ; Zero out the file descriptor +.3954fb a2 00 00 ldx #$0000 LDX #0 +.3954fe 9f 00 ad 38 sta $38ad00,x clr_fd_loop STA @l DOS_SPARE_FD,X +.395502 e8 inx INX +.395503 e0 20 00 cpx #$0020 CPX #SIZE(FILEDESC) +.395506 d0 f6 bne $3954fe BNE clr_fd_loop +.395508 c2 20 rep #$20 REP #$20 ; set A long +.39550a a9 00 ab lda #$ab00 LDA #<>DOS_SPARE_SECTOR ; Set the buffer for the file descriptor +.39550d 8f 0e ad 38 sta $38ad0e STA @l DOS_SPARE_FD+FILEDESC.BUFFER +.395511 a9 38 00 lda #$0038 LDA #`DOS_SPARE_SECTOR +.395514 8f 10 ad 38 sta $38ad10 STA @l DOS_SPARE_FD+FILEDESC.BUFFER+2 +.395518 a5 40 lda $0360 LDA DOS_RUN_PARAM ; Set the path for the file descriptor +.39551a 8f 02 ad 38 sta $38ad02 STA @l DOS_SPARE_FD+FILEDESC.PATH +.39551e a5 42 lda $0362 LDA DOS_RUN_PARAM+2 +.395520 8f 04 ad 38 sta $38ad04 STA @l DOS_SPARE_FD+FILEDESC.PATH+2 +.395524 a9 00 00 lda #$0000 LDA #0 ; Clear the run pointer +.395527 85 3c sta $035c STA DOS_RUN_PTR ; This is used to check that we loaded an executable binary +.395529 85 3e sta $035e STA DOS_RUN_PTR+2 +.39552b a9 00 ad lda #$ad00 LDA #<>DOS_SPARE_FD +.39552e 85 20 sta $0340 STA DOS_FD_PTR +.395530 a9 38 00 lda #$0038 LDA #`DOS_SPARE_FD +.395533 85 22 sta $0342 STA DOS_FD_PTR+2 +.395535 a9 ff ff lda #$ffff LDA #$FFFF ; We want to load to the address provided by the file +.395538 8f 54 03 00 sta $000354 STA @l DOS_DST_PTR +.39553c 8f 56 03 00 sta $000356 STA @l DOS_DST_PTR+2 +.395540 22 18 11 00 jsl $001118 JSL F_LOAD ; Try to load the file +.395544 b0 03 bcs $395549 BCS chk_execute +.395546 82 7f ff brl $3954c8 BRL IF_PASSFAILURE ; On error: pass failure up the chain +.395549 chk_execute +.395549 c2 20 rep #$20 REP #$20 ; set A long +.39554b a5 3c lda $035c LDA DOS_RUN_PTR ; Check to see if we got a startup address back +.39554d d0 0b bne $39555a BNE try_execute ; If so: call it +.39554f a5 3e lda $035e LDA DOS_RUN_PTR+2 +.395551 d0 07 bne $39555a BNE try_execute +.395553 e2 20 sep #$20 SEP #$20 ; set A short +.395555 a9 11 lda #$11 LDA #DOS_ERR_NOEXEC ; If not: return an error that it's not executable +.395557 82 6a ff brl $3954c4 BRL IF_FAILURE +.39555a try_execute +.39555a e2 20 sep #$20 SEP #$20 ; set A short +.39555c a5 42 lda $0362 LDA DOS_RUN_PARAM+2 +.39555e 48 pha PHA +.39555f a5 41 lda $0361 LDA DOS_RUN_PARAM+1 +.395561 48 pha PHA +.395562 a5 40 lda $0360 LDA DOS_RUN_PARAM +.395564 48 pha PHA +.395565 a9 5c lda #$5c LDA #$5C ; Write a JML opcode +.395567 85 3b sta $035b STA DOS_RUN_PTR-1 +.395569 22 5b 03 00 jsl $00035b JSL DOS_RUN_PTR-1 ; And call to it +.39556d e2 20 sep #$20 SEP #$20 ; set A short +.39556f 68 pla PLA ; Remove the path and parameters string from the stack +.395570 68 pla PLA +.395571 68 pla PLA +.395572 82 5a ff brl $3954cf BRL IF_SUCCESS ; Return success +.395575 IF_ALLOCFD +.395575 da phx PHX +.395576 5a phy PHY +.395577 0b phd PHD +.395578 8b phb PHB +.395579 08 php PHP +.39557a 48 pha PHA ; begin setdbr macro +.39557b 08 php PHP +.39557c e2 20 sep #$20 SEP #$20 ; set A short +.39557e a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.395580 48 pha PHA +.395581 ab plb PLB +.395582 28 plp PLP +.395583 68 pla PLA ; end setdbr macro +.395584 48 pha PHA ; begin setdp macro +.395585 08 php PHP +.395586 c2 20 rep #$20 REP #$20 ; set A long +.395588 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.39558b 5b tcd TCD +.39558c 28 plp PLP +.39558d 68 pla PLA ; end setdp macro +.39558e c2 10 rep #$10 REP #$10 ; set X long +.395590 a2 00 00 ldx #$0000 LDX #0 ; Point to the first file descriptor +.395593 chk_fd +.395593 e2 20 sep #$20 SEP #$20 ; set A short +.395595 bd 20 ad lda $38ad20,x LDA @w DOS_FILE_DESCS,X ; Check the file descriptor's status +.395598 89 10 bit #$10 BIT #FD_STAT_ALLOC ; Is the file descriptor allocated? +.39559a f0 14 beq $3955b0 BEQ found ; No: flag and return the found descriptor +.39559c next_fd +.39559c c2 20 rep #$20 REP #$20 ; set A long +.39559e 8a txa TXA ; Yes: Move to the next file descriptor +.39559f 18 clc CLC +.3955a0 69 20 00 adc #$0020 ADC #SIZE(FILEDESC) +.3955a3 aa tax TAX +.3955a4 e0 00 01 cpx #$0100 CPX #SIZE(FILEDESC) * DOS_FD_MAX ; Are we out of file descriptors? +.3955a7 90 ea bcc $395593 BLT chk_fd ; No: check this new file descriptor +.3955a9 e2 20 sep #$20 SEP #$20 ; set A short +.3955ab a9 16 lda #$16 LDA #DOS_ERR_NOFD ; Yes: Return failure (no file descriptors available) +.3955ad 82 14 ff brl $3954c4 BRL IF_FAILURE +.3955b0 a9 10 lda #$10 found LDA #FD_STAT_ALLOC ; No: Set the ALLOC bit +.3955b2 9d 20 ad sta $38ad20,x STA @w DOS_FILE_DESCS,X ; And store it in the file descriptor's status +.3955b5 c2 20 rep #$20 REP #$20 ; set A long +.3955b7 8a txa TXA +.3955b8 18 clc CLC +.3955b9 69 20 ad adc #$ad20 ADC #<>DOS_FILE_DESCS +.3955bc 85 20 sta $0340 STA @b DOS_FD_PTR +.3955be a9 38 00 lda #$0038 LDA #`DOS_FILE_DESCS +.3955c1 69 00 00 adc #$0000 ADC #0 +.3955c4 85 22 sta $0342 STA @b DOS_FD_PTR+2 +.3955c6 82 06 ff brl $3954cf BRL IF_SUCCESS ; Return this file descriptor +.3955c9 IF_FREEFD +.3955c9 da phx PHX +.3955ca 5a phy PHY +.3955cb 0b phd PHD +.3955cc 8b phb PHB +.3955cd 08 php PHP +.3955ce 48 pha PHA ; begin setdbr macro +.3955cf 08 php PHP +.3955d0 e2 20 sep #$20 SEP #$20 ; set A short +.3955d2 a9 38 lda #$38 LDA #`DOS_HIGH_VARIABLES +.3955d4 48 pha PHA +.3955d5 ab plb PLB +.3955d6 28 plp PLP +.3955d7 68 pla PLA ; end setdbr macro +.3955d8 48 pha PHA ; begin setdp macro +.3955d9 08 php PHP +.3955da c2 20 rep #$20 REP #$20 ; set A long +.3955dc a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3955df 5b tcd TCD +.3955e0 28 plp PLP +.3955e1 68 pla PLA ; end setdp macro +.3955e2 e2 20 sep #$20 SEP #$20 ; set A short +.3955e4 c2 10 rep #$10 REP #$10 ; set X long +.3955e6 a9 00 lda #$00 LDA #0 +.3955e8 87 20 sta [$0340] STA [DOS_FD_PTR] +.3955ea 82 e2 fe brl $3954cf BRL IF_SUCCESS +.3955ed DOS_SRC2DST +.3955ed da phx PHX +.3955ee 5a phy PHY +.3955ef 0b phd PHD +.3955f0 8b phb PHB +.3955f1 08 php PHP +.3955f2 48 pha PHA ; begin setdp macro +.3955f3 08 php PHP +.3955f4 c2 20 rep #$20 REP #$20 ; set A long +.3955f6 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3955f9 5b tcd TCD +.3955fa 28 plp PLP +.3955fb 68 pla PLA ; end setdp macro +.3955fc c2 30 rep #$30 REP #$30 ; set A&X long +.3955fe a0 0e 00 ldy #$000e LDY #FILEDESC.BUFFER +.395601 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y +.395603 aa tax TAX ; X := source buffer address +.395604 b7 34 lda [$0354],y LDA [DOS_DST_PTR],Y +.395606 a8 tay TAY ; Y := destination buffer address +.395607 e2 20 sep #$20 SEP #$20 ; set A short +.395609 a9 38 lda #$38 LDA #`DOS_FILE_BUFFS +.39560b 48 pha PHA +.39560c ab plb PLB +.39560d c2 20 rep #$20 REP #$20 ; set A long +.39560f a9 00 02 lda #$0200 LDA #DOS_SECTOR_SIZE ; A := the size of the buffers +.395612 f0 11 beq $395625 loop BEQ done +.395614 48 pha PHA +.395615 e2 20 sep #$20 SEP #$20 ; set A short +.395617 bd 00 00 lda $380000,x LDA #0,B,X +.39561a 99 00 00 sta $380000,y STA #0,B,Y +.39561d c2 20 rep #$20 REP #$20 ; set A long +.39561f 68 pla PLA +.395620 3a dec a DEC A +.395621 e8 inx INX +.395622 c8 iny INY +.395623 80 ed bra $395612 BRA loop +.395625 28 plp done PLP +.395626 ab plb PLB +.395627 2b pld PLD +.395628 7a ply PLY +.395629 fa plx PLX +.39562a 6b rtl RTL +.39562b IF_COPY +.39562b da phx PHX +.39562c 5a phy PHY +.39562d 0b phd PHD +.39562e 8b phb PHB +.39562f 08 php PHP +.395630 48 pha PHA ; begin setdbr macro +.395631 08 php PHP +.395632 e2 20 sep #$20 SEP #$20 ; set A short +.395634 a9 00 lda #$00 LDA #0 +.395636 48 pha PHA +.395637 ab plb PLB +.395638 28 plp PLP +.395639 68 pla PLA ; end setdbr macro +.39563a 48 pha PHA ; begin setdp macro +.39563b 08 php PHP +.39563c c2 20 rep #$20 REP #$20 ; set A long +.39563e a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.395641 5b tcd TCD +.395642 28 plp PLP +.395643 68 pla PLA ; end setdp macro +.395644 22 75 55 39 jsl $395575 JSL IF_ALLOCFD ; Allocate an FD for the source +.395648 b0 03 bcs $39564d BCS set_src_path +.39564a 82 7b fe brl $3954c8 BRL IF_PASSFAILURE ; If failed: pass the failure up the chain +.39564d set_src_path +.39564d c2 30 rep #$30 REP #$30 ; set A&X long +.39564f a0 02 00 ldy #$0002 LDY #FILEDESC.PATH ; Set the source path +.395652 a5 44 lda $0364 LDA @b DOS_STR1_PTR +.395654 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.395656 c8 iny INY +.395657 c8 iny INY +.395658 a5 46 lda $0366 LDA @b DOS_STR1_PTR+2 +.39565a 97 20 sta [$0340],y STA [DOS_FD_PTR],Y +.39565c alloc_dest +.39565c c2 30 rep #$30 REP #$30 ; set A&X long +.39565e a5 20 lda $0340 LDA @b DOS_FD_PTR ; set DOS_SRC_PTR to the file descriptor pointer +.395660 85 30 sta $0350 STA @b DOS_SRC_PTR +.395662 a5 22 lda $0342 LDA @b DOS_FD_PTR+2 +.395664 85 32 sta $0352 STA @b DOS_SRC_PTR+2 +.395666 22 75 55 39 jsl $395575 JSL IF_ALLOCFD ; Allocate an FD for the destination +.39566a b0 0f bcs $39567b BCS set_paths ; If everything is ok... start setting the paths +.39566c a5 30 lda $0350 err_free_src_fd LDA @b DOS_SRC_PTR ; Get the source file descriptor pointer +.39566e 85 20 sta $0340 STA @b DOS_FD_PTR +.395670 a5 32 lda $0352 LDA @b DOS_SRC_PTR+2 +.395672 85 22 sta $0342 STA @b DOS_FD_PTR+2 +.395674 22 c9 55 39 jsl $3955c9 JSL IF_FREEFD ; And free it +.395678 82 4d fe brl $3954c8 BRL IF_PASSFAILURE ; Pass the failure up the chain +.39567b set_paths +.39567b c2 30 rep #$30 REP #$30 ; set A&X long +.39567d a5 20 lda $0340 LDA @b DOS_FD_PTR ; Set DOS_DST_PTR to the file descriptor pointer for the destination +.39567f 85 34 sta $0354 STA @b DOS_DST_PTR +.395681 a5 22 lda $0342 LDA @b DOS_FD_PTR+2 +.395683 85 36 sta $0356 STA @b DOS_DST_PTR+2 +.395685 a0 02 00 ldy #$0002 LDY #FILEDESC.PATH ; Set the destination path +.395688 a5 48 lda $0368 LDA @b DOS_STR2_PTR +.39568a 97 34 sta [$0354],y STA [DOS_DST_PTR],Y +.39568c c8 iny INY +.39568d c8 iny INY +.39568e a5 4a lda $036a LDA @b DOS_STR2_PTR+2 +.395690 97 34 sta [$0354],y STA [DOS_DST_PTR],Y +.395692 a5 30 lda $0350 LDA @b DOS_SRC_PTR ; Get the source file descriptor pointer +.395694 85 20 sta $0340 STA @b DOS_FD_PTR +.395696 a5 32 lda $0352 LDA @b DOS_SRC_PTR+2 +.395698 85 22 sta $0342 STA @b DOS_FD_PTR+2 +.39569a 22 f0 10 00 jsl $0010f0 JSL F_OPEN ; Try to open the file +.39569e b0 10 bcs $3956b0 BCS src_open ; If success, work with the openned file +.3956a0 00 brk # BRK +.3956a1 a5 34 lda $0354 err_free_dst_fd LDA @b DOS_DST_PTR ; Get the destination file descriptor pointer +.3956a3 85 20 sta $0340 STA @b DOS_FD_PTR +.3956a5 a5 36 lda $0356 LDA @b DOS_DST_PTR+2 +.3956a7 85 22 sta $0342 STA @b DOS_FD_PTR+2 +.3956a9 22 c9 55 39 jsl $3955c9 JSL IF_FREEFD ; And free it +.3956ad 82 bc ff brl $39566c BRL err_free_src_fd ; Free the source file descriptor +.3956b0 a0 12 00 ldy #$0012 src_open LDY #FILEDESC.SIZE ; destination file size := source file size +.3956b3 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y +.3956b5 97 34 sta [$0354],y STA [DOS_DST_PTR],Y +.3956b7 c8 iny INY +.3956b8 c8 iny INY +.3956b9 b7 30 lda [$0350],y LDA [DOS_SRC_PTR],Y +.3956bb 97 34 sta [$0354],y STA [DOS_DST_PTR],Y +.3956bd 22 ed 55 39 jsl $3955ed JSL DOS_SRC2DST ; Copy the first sector's worth of data +.3956c1 a5 34 lda $0354 LDA @b DOS_DST_PTR ; Get the destination file descriptor pointer +.3956c3 85 20 sta $0340 STA @b DOS_FD_PTR +.3956c5 a5 36 lda $0356 LDA @b DOS_DST_PTR+2 +.3956c7 85 22 sta $0342 STA @b DOS_FD_PTR+2 +.3956c9 22 f4 10 00 jsl $0010f4 JSL F_CREATE ; Attempt to create the file +.3956cd b0 0f bcs $3956de BCS read_next ; If sucessful, try to get the next cluster +.3956cf a5 30 lda $0350 err_src_close LDA @b DOS_SRC_PTR ; Get the source file descriptor pointer +.3956d1 85 20 sta $0340 STA @b DOS_FD_PTR +.3956d3 a5 32 lda $0352 LDA @b DOS_SRC_PTR+2 +.3956d5 85 22 sta $0342 STA @b DOS_FD_PTR+2 +.3956d7 22 f8 10 00 jsl $0010f8 JSL F_CLOSE ; Close the source file (maybe not really necessary) +.3956db 82 c3 ff brl $3956a1 BRL err_free_dst_fd ; Free the file descriptors and return an error +.3956de read_next +.3956de a5 30 lda $0350 LDA @b DOS_SRC_PTR ; Get the source file descriptor pointer +.3956e0 85 20 sta $0340 STA @b DOS_FD_PTR +.3956e2 a5 32 lda $0352 LDA @b DOS_SRC_PTR+2 +.3956e4 85 22 sta $0342 STA @b DOS_FD_PTR+2 +.3956e6 22 00 11 00 jsl $001100 JSL F_READ ; Attempt to read the next sector of the source +.3956ea b0 19 bcs $395705 BCS copy2dest ; If successful, copy the sector +.3956ec e2 20 sep #$20 SEP #$20 ; set A short +.3956ee a5 0e lda $032e LDA @b DOS_STATUS +.3956f0 c9 0a cmp #$0a CMP #DOS_ERR_NOCLUSTER ; Are there no more clusters in the source file? +.3956f2 f0 32 beq $395726 BEQ file_copied ; Yes: we're done copying +.3956f4 err_dest_close +.3956f4 c2 20 rep #$20 REP #$20 ; set A long +.3956f6 a5 34 lda $0354 LDA @b DOS_DST_PTR ; Get the destination file descriptor pointer +.3956f8 85 20 sta $0340 STA @b DOS_FD_PTR +.3956fa a5 36 lda $0356 LDA @b DOS_DST_PTR+2 +.3956fc 85 22 sta $0342 STA @b DOS_FD_PTR+2 +.3956fe 22 f8 10 00 jsl $0010f8 JSL F_CLOSE ; Attempt to close the destination +.395702 82 ca ff brl $3956cf BRL err_src_close ; Close the source and throw an error +.395705 copy2dest +.395705 22 ed 55 39 jsl $3955ed JSL DOS_SRC2DST ; Copy the source sector to the destination sector +.395709 a0 06 00 ldy #$0006 LDY #FILEDESC.CLUSTER ; destination sector cluster ID := 0 to append +.39570c a9 00 00 lda #$0000 LDA #0 +.39570f 97 34 sta [$0354],y STA [DOS_DST_PTR],Y +.395711 c8 iny INY +.395712 c8 iny INY +.395713 97 34 sta [$0354],y STA [DOS_DST_PTR],Y +.395715 a5 34 lda $0354 LDA @b DOS_DST_PTR ; Get the destination file descriptor pointer +.395717 85 20 sta $0340 STA @b DOS_FD_PTR +.395719 a5 36 lda $0356 LDA @b DOS_DST_PTR+2 +.39571b 85 22 sta $0342 STA @b DOS_FD_PTR+2 +.39571d 22 fc 10 00 jsl $0010fc JSL F_WRITE ; Attempt to write the destionation sector to the disk +.395721 90 d1 bcc $3956f4 BCC err_dest_close ; If error: close all files and throw the error +.395723 82 b8 ff brl $3956de BRL read_next ; Otherwise: repeat the loop +.395726 file_copied +.395726 c2 20 rep #$20 REP #$20 ; set A long +.395728 a5 34 lda $0354 LDA @b DOS_DST_PTR ; Get the destination file descriptor pointer +.39572a 85 20 sta $0340 STA @b DOS_FD_PTR +.39572c a5 36 lda $0356 LDA @b DOS_DST_PTR+2 +.39572e 85 22 sta $0342 STA @b DOS_FD_PTR+2 +.395730 22 f8 10 00 jsl $0010f8 JSL F_CLOSE ; Close the destination +.395734 a5 30 lda $0350 LDA @b DOS_SRC_PTR ; Get the source file descriptor pointer +.395736 85 20 sta $0340 STA @b DOS_FD_PTR +.395738 a5 32 lda $0352 LDA @b DOS_SRC_PTR+2 +.39573a 85 22 sta $0342 STA @b DOS_FD_PTR+2 +.39573c 22 f8 10 00 jsl $0010f8 JSL F_CLOSE ; Close the source +.395740 82 8c fd brl $3954cf BRL IF_SUCCESS ;****** Return to file: src\kernel.asm -;****** Processing file: src\uart.asm +;****** Processing file: src\Libraries/uart.asm =$af13f8 UART1_BASE = $AF13F8 ; Base address for UART 1 (COM1) =$af12f8 UART2_BASE = $AF12F8 ; Base address for UART 2 (COM2) @@ -10829,493 +10830,442 @@ =3 UART_38400 = 3 ; Code for 28400 bps =2 UART_57600 = 2 ; Code for 57600 bps =1 UART_115200 = 1 ; Code for 115200 bps -.39574b UART_SELECT -.39574b 08 php PHP -.39574c c2 20 rep #$20 REP #$20 ; set A long -.39574e c9 02 00 cmp #$0002 CMP #2 -.395751 f0 07 beq $39575a BEQ is_COM2 -.395753 c2 20 rep #$20 REP #$20 ; set A long -.395755 a9 f8 13 lda #$13f8 LDA #<>UART1_BASE -.395758 80 05 bra $39575f BRA setaddr -.39575a is_COM2 -.39575a c2 20 rep #$20 REP #$20 ; set A long -.39575c a9 f8 12 lda #$12f8 LDA #<>UART2_BASE -.39575f 8f 00 07 00 sta $000700 setaddr STA @lCURRUART -.395763 e2 20 sep #$20 SEP #$20 ; set A short -.395765 a9 af lda #$af LDA #`UART1_BASE -.395767 8f 02 07 00 sta $000702 STA @lCURRUART+2 -.39576b 28 plp PLP -.39576c 6b rtl RTL -.39576d UART_SETBPS -.39576d 08 php PHP -.39576e 0b phd PHD -.39576f 48 pha PHA ; begin setdp macro -.395770 08 php PHP -.395771 c2 20 rep #$20 REP #$20 ; set A long -.395773 a9 00 07 lda #$0700 LDA #CURRUART ; set DP to page 0 -.395776 5b tcd TCD -.395777 28 plp PLP -.395778 68 pla PLA ; end setdp macro -.395779 c2 30 rep #$30 REP #$30 ; set A&X long -.39577b 48 pha PHA -.39577c e2 20 sep #$20 SEP #$20 ; set A short -.39577e a0 03 00 ldy #$0003 LDY #UART_LCR ; Enable divisor latch -.395781 b7 00 lda [$0700],y LDA [CURRUART],Y -.395783 09 80 ora #$80 ORA #LCR_DLB -.395785 97 00 sta [$0700],y STA [CURRUART],Y -.395787 c2 20 rep #$20 REP #$20 ; set A long -.395789 68 pla PLA -.39578a a0 00 00 ldy #$0000 LDY #UART_DLL -.39578d 97 00 sta [$0700],y STA [CURRUART],Y ; Save the divisor to the UART -.39578f e2 20 sep #$20 SEP #$20 ; set A short -.395791 a0 03 00 ldy #$0003 LDY #UART_LCR ; Disable divisor latch -.395794 b7 00 lda [$0700],y LDA [CURRUART],Y -.395796 49 80 eor #$80 EOR #LCR_DLB -.395798 97 00 sta [$0700],y STA [CURRUART],Y -.39579a 2b pld PLD -.39579b 28 plp PLP -.39579c 6b rtl RTL -.39579d UART_SETLCR -.39579d 08 php PHP -.39579e 0b phd PHD -.39579f 48 pha PHA ; begin setdp macro -.3957a0 08 php PHP -.3957a1 c2 20 rep #$20 REP #$20 ; set A long -.3957a3 a9 00 07 lda #$0700 LDA #CURRUART ; set DP to page 0 -.3957a6 5b tcd TCD -.3957a7 28 plp PLP -.3957a8 68 pla PLA ; end setdp macro -.3957a9 e2 20 sep #$20 SEP #$20 ; set A short -.3957ab c2 10 rep #$10 REP #$10 ; set X long -.3957ad 29 7f and #$7f AND #$7F ; We don't want to alter divisor latch -.3957af a0 03 00 ldy #$0003 LDY #UART_LCR -.3957b2 97 00 sta [$0700],y STA [CURRUART],Y -.3957b4 2b pld PLD -.3957b5 28 plp PLP -.3957b6 6b rtl RTL -.3957b7 UART_INIT -.3957b7 08 php PHP -.3957b8 0b phd PHD -.3957b9 c2 30 rep #$30 REP #$30 ; set A&X long -.3957bb 48 pha PHA ; begin setdp macro -.3957bc 08 php PHP -.3957bd c2 20 rep #$20 REP #$20 ; set A long -.3957bf a9 00 07 lda #$0700 LDA #CURRUART ; set DP to page 0 -.3957c2 5b tcd TCD -.3957c3 28 plp PLP -.3957c4 68 pla PLA ; end setdp macro -.3957c5 a9 01 00 lda #$0001 LDA #UART_115200 -.3957c8 22 6d 57 39 jsl $39576d JSL UART_SETBPS -.3957cc e2 20 sep #$20 SEP #$20 ; set A short -.3957ce a9 03 lda #$03 LDA #LCR_PARITY_NONE | LCR_STOPBIT_1 | LCR_DATABITS_8 -.3957d0 22 9d 57 39 jsl $39579d JSL UART_SETLCR -.3957d4 a9 e1 lda #$e1 LDA #%11100001 -.3957d6 a0 02 00 ldy #$0002 LDY #UART_FCR -.3957d9 97 00 sta [$0700],y STA [CURRUART],Y -.3957db 2b pld PLD -.3957dc 28 plp PLP -.3957dd 6b rtl RTL -.3957de UART_HASBYT -.3957de 08 php PHP -.3957df 0b phd PHD -.3957e0 c2 30 rep #$30 REP #$30 ; set A&X long -.3957e2 48 pha PHA ; begin setdp macro -.3957e3 08 php PHP -.3957e4 c2 20 rep #$20 REP #$20 ; set A long -.3957e6 a9 00 07 lda #$0700 LDA #CURRUART ; set DP to page 0 -.3957e9 5b tcd TCD -.3957ea 28 plp PLP -.3957eb 68 pla PLA ; end setdp macro -.3957ec e2 20 sep #$20 SEP #$20 ; set A short -.3957ee a0 05 00 ldy #$0005 LDY #UART_LSR ; Check the receive FIFO -.3957f1 b7 00 lda [$0700],y wait_putc LDA [CURRUART],Y -.3957f3 29 01 and #$01 AND #LSR_DATA_AVAIL -.3957f5 d0 04 bne $3957fb BNE ret_true ; If flag is set, return true -.3957f7 2b pld ret_false PLD ; Return false -.3957f8 28 plp PLP -.3957f9 18 clc CLC -.3957fa 6b rtl RTL -.3957fb 2b pld ret_true PLD ; Return true -.3957fc 28 plp PLP -.3957fd 38 sec SEC -.3957fe 6b rtl RTL -.3957ff UART_GETC -.3957ff 08 php PHP -.395800 0b phd PHD -.395801 c2 30 rep #$30 REP #$30 ; set A&X long -.395803 48 pha PHA ; begin setdp macro -.395804 08 php PHP -.395805 c2 20 rep #$20 REP #$20 ; set A long -.395807 a9 00 07 lda #$0700 LDA #CURRUART ; set DP to page 0 -.39580a 5b tcd TCD -.39580b 28 plp PLP -.39580c 68 pla PLA ; end setdp macro -.39580d e2 20 sep #$20 SEP #$20 ; set A short -.39580f a0 05 00 ldy #$0005 LDY #UART_LSR ; Check the receive FIFO -.395812 b7 00 lda [$0700],y wait_getc LDA [CURRUART],Y -.395814 29 01 and #$01 AND #LSR_DATA_AVAIL -.395816 f0 fa beq $395812 BEQ wait_getc ; If the flag is clear, wait -.395818 a0 00 00 ldy #$0000 LDY #UART_TRHB ; Get the byte from the receive FIFO -.39581b b7 00 lda [$0700],y LDA [CURRUART],Y -.39581d 2b pld PLD -.39581e 28 plp PLP -.39581f 6b rtl RTL -.395820 UART_PUTC -.395820 08 php PHP -.395821 0b phd PHD -.395822 c2 30 rep #$30 REP #$30 ; set A&X long -.395824 48 pha PHA ; begin setdp macro -.395825 08 php PHP -.395826 c2 20 rep #$20 REP #$20 ; set A long -.395828 a9 00 07 lda #$0700 LDA #CURRUART ; set DP to page 0 -.39582b 5b tcd TCD -.39582c 28 plp PLP -.39582d 68 pla PLA ; end setdp macro -.39582e e2 20 sep #$20 SEP #$20 ; set A short -.395830 48 pha PHA ; Wait for the transmit FIFO to free up -.395831 a0 05 00 ldy #$0005 LDY #UART_LSR -.395834 b7 00 lda [$0700],y wait_putc LDA [CURRUART],Y -.395836 29 20 and #$20 AND #LSR_XMIT_EMPTY -.395838 f0 fa beq $395834 BEQ wait_putc -.39583a 68 pla PLA -.39583b a0 00 00 ldy #$0000 LDY #UART_TRHB -.39583e 97 00 sta [$0700],y STA [CURRUART],Y -.395840 2b pld PLD -.395841 28 plp PLP -.395842 6b rtl RTL -.395843 UART_PUTS -.395843 08 php PHP -.395844 e2 20 sep #$20 SEP #$20 ; set A short -.395846 bd 00 00 lda $0000,x put_loop LDA #0,B,X -.395849 f0 07 beq $395852 BEQ done -.39584b 22 20 58 39 jsl $395820 JSL UART_PUTC -.39584f e8 inx INX -.395850 80 f4 bra $395846 BRA put_loop -.395852 28 plp done PLP -.395853 6b rtl RTL +.395743 UART_SELECT +.395743 08 php PHP +.395744 c2 20 rep #$20 REP #$20 ; set A long +.395746 c9 02 00 cmp #$0002 CMP #2 +.395749 f0 07 beq $395752 BEQ is_COM2 +.39574b c2 20 rep #$20 REP #$20 ; set A long +.39574d a9 f8 13 lda #$13f8 LDA #<>UART1_BASE +.395750 80 05 bra $395757 BRA setaddr +.395752 is_COM2 +.395752 c2 20 rep #$20 REP #$20 ; set A long +.395754 a9 f8 12 lda #$12f8 LDA #<>UART2_BASE +.395757 8f 00 07 00 sta $000700 setaddr STA @lCURRUART +.39575b e2 20 sep #$20 SEP #$20 ; set A short +.39575d a9 af lda #$af LDA #`UART1_BASE +.39575f 8f 02 07 00 sta $000702 STA @lCURRUART+2 +.395763 28 plp PLP +.395764 6b rtl RTL +.395765 UART_SETBPS +.395765 08 php PHP +.395766 0b phd PHD +.395767 48 pha PHA ; begin setdp macro +.395768 08 php PHP +.395769 c2 20 rep #$20 REP #$20 ; set A long +.39576b a9 00 07 lda #$0700 LDA #CURRUART ; set DP to page 0 +.39576e 5b tcd TCD +.39576f 28 plp PLP +.395770 68 pla PLA ; end setdp macro +.395771 c2 30 rep #$30 REP #$30 ; set A&X long +.395773 48 pha PHA +.395774 e2 20 sep #$20 SEP #$20 ; set A short +.395776 a0 03 00 ldy #$0003 LDY #UART_LCR ; Enable divisor latch +.395779 b7 00 lda [$0700],y LDA [CURRUART],Y +.39577b 09 80 ora #$80 ORA #LCR_DLB +.39577d 97 00 sta [$0700],y STA [CURRUART],Y +.39577f c2 20 rep #$20 REP #$20 ; set A long +.395781 68 pla PLA +.395782 a0 00 00 ldy #$0000 LDY #UART_DLL +.395785 97 00 sta [$0700],y STA [CURRUART],Y ; Save the divisor to the UART +.395787 e2 20 sep #$20 SEP #$20 ; set A short +.395789 a0 03 00 ldy #$0003 LDY #UART_LCR ; Disable divisor latch +.39578c b7 00 lda [$0700],y LDA [CURRUART],Y +.39578e 49 80 eor #$80 EOR #LCR_DLB +.395790 97 00 sta [$0700],y STA [CURRUART],Y +.395792 2b pld PLD +.395793 28 plp PLP +.395794 6b rtl RTL +.395795 UART_SETLCR +.395795 08 php PHP +.395796 0b phd PHD +.395797 48 pha PHA ; begin setdp macro +.395798 08 php PHP +.395799 c2 20 rep #$20 REP #$20 ; set A long +.39579b a9 00 07 lda #$0700 LDA #CURRUART ; set DP to page 0 +.39579e 5b tcd TCD +.39579f 28 plp PLP +.3957a0 68 pla PLA ; end setdp macro +.3957a1 e2 20 sep #$20 SEP #$20 ; set A short +.3957a3 c2 10 rep #$10 REP #$10 ; set X long +.3957a5 29 7f and #$7f AND #$7F ; We don't want to alter divisor latch +.3957a7 a0 03 00 ldy #$0003 LDY #UART_LCR +.3957aa 97 00 sta [$0700],y STA [CURRUART],Y +.3957ac 2b pld PLD +.3957ad 28 plp PLP +.3957ae 6b rtl RTL +.3957af UART_INIT +.3957af 08 php PHP +.3957b0 0b phd PHD +.3957b1 c2 30 rep #$30 REP #$30 ; set A&X long +.3957b3 48 pha PHA ; begin setdp macro +.3957b4 08 php PHP +.3957b5 c2 20 rep #$20 REP #$20 ; set A long +.3957b7 a9 00 07 lda #$0700 LDA #CURRUART ; set DP to page 0 +.3957ba 5b tcd TCD +.3957bb 28 plp PLP +.3957bc 68 pla PLA ; end setdp macro +.3957bd a9 01 00 lda #$0001 LDA #UART_115200 +.3957c0 22 65 57 39 jsl $395765 JSL UART_SETBPS +.3957c4 e2 20 sep #$20 SEP #$20 ; set A short +.3957c6 a9 03 lda #$03 LDA #LCR_PARITY_NONE | LCR_STOPBIT_1 | LCR_DATABITS_8 +.3957c8 22 95 57 39 jsl $395795 JSL UART_SETLCR +.3957cc a9 e1 lda #$e1 LDA #%11100001 +.3957ce a0 02 00 ldy #$0002 LDY #UART_FCR +.3957d1 97 00 sta [$0700],y STA [CURRUART],Y +.3957d3 2b pld PLD +.3957d4 28 plp PLP +.3957d5 6b rtl RTL +.3957d6 UART_HASBYT +.3957d6 08 php PHP +.3957d7 0b phd PHD +.3957d8 c2 30 rep #$30 REP #$30 ; set A&X long +.3957da 48 pha PHA ; begin setdp macro +.3957db 08 php PHP +.3957dc c2 20 rep #$20 REP #$20 ; set A long +.3957de a9 00 07 lda #$0700 LDA #CURRUART ; set DP to page 0 +.3957e1 5b tcd TCD +.3957e2 28 plp PLP +.3957e3 68 pla PLA ; end setdp macro +.3957e4 e2 20 sep #$20 SEP #$20 ; set A short +.3957e6 a0 05 00 ldy #$0005 LDY #UART_LSR ; Check the receive FIFO +.3957e9 b7 00 lda [$0700],y wait_putc LDA [CURRUART],Y +.3957eb 29 01 and #$01 AND #LSR_DATA_AVAIL +.3957ed d0 04 bne $3957f3 BNE ret_true ; If flag is set, return true +.3957ef 2b pld ret_false PLD ; Return false +.3957f0 28 plp PLP +.3957f1 18 clc CLC +.3957f2 6b rtl RTL +.3957f3 2b pld ret_true PLD ; Return true +.3957f4 28 plp PLP +.3957f5 38 sec SEC +.3957f6 6b rtl RTL +.3957f7 UART_GETC +.3957f7 08 php PHP +.3957f8 0b phd PHD +.3957f9 c2 30 rep #$30 REP #$30 ; set A&X long +.3957fb 48 pha PHA ; begin setdp macro +.3957fc 08 php PHP +.3957fd c2 20 rep #$20 REP #$20 ; set A long +.3957ff a9 00 07 lda #$0700 LDA #CURRUART ; set DP to page 0 +.395802 5b tcd TCD +.395803 28 plp PLP +.395804 68 pla PLA ; end setdp macro +.395805 e2 20 sep #$20 SEP #$20 ; set A short +.395807 a0 05 00 ldy #$0005 LDY #UART_LSR ; Check the receive FIFO +.39580a b7 00 lda [$0700],y wait_getc LDA [CURRUART],Y +.39580c 29 01 and #$01 AND #LSR_DATA_AVAIL +.39580e f0 fa beq $39580a BEQ wait_getc ; If the flag is clear, wait +.395810 a0 00 00 ldy #$0000 LDY #UART_TRHB ; Get the byte from the receive FIFO +.395813 b7 00 lda [$0700],y LDA [CURRUART],Y +.395815 2b pld PLD +.395816 28 plp PLP +.395817 6b rtl RTL +.395818 UART_PUTC +.395818 08 php PHP +.395819 0b phd PHD +.39581a c2 30 rep #$30 REP #$30 ; set A&X long +.39581c 48 pha PHA ; begin setdp macro +.39581d 08 php PHP +.39581e c2 20 rep #$20 REP #$20 ; set A long +.395820 a9 00 07 lda #$0700 LDA #CURRUART ; set DP to page 0 +.395823 5b tcd TCD +.395824 28 plp PLP +.395825 68 pla PLA ; end setdp macro +.395826 e2 20 sep #$20 SEP #$20 ; set A short +.395828 48 pha PHA ; Wait for the transmit FIFO to free up +.395829 a0 05 00 ldy #$0005 LDY #UART_LSR +.39582c b7 00 lda [$0700],y wait_putc LDA [CURRUART],Y +.39582e 29 20 and #$20 AND #LSR_XMIT_EMPTY +.395830 f0 fa beq $39582c BEQ wait_putc +.395832 68 pla PLA +.395833 a0 00 00 ldy #$0000 LDY #UART_TRHB +.395836 97 00 sta [$0700],y STA [CURRUART],Y +.395838 2b pld PLD +.395839 28 plp PLP +.39583a 6b rtl RTL +.39583b UART_PUTS +.39583b 08 php PHP +.39583c e2 20 sep #$20 SEP #$20 ; set A short +.39583e bd 00 00 lda $0000,x put_loop LDA #0,B,X +.395841 f0 07 beq $39584a BEQ done +.395843 22 18 58 39 jsl $395818 JSL UART_PUTC +.395847 e8 inx INX +.395848 80 f4 bra $39583e BRA put_loop +.39584a 28 plp done PLP +.39584b 6b rtl RTL ;****** Return to file: src\kernel.asm -;****** Processing file: src\joystick.asm +;****** Processing file: src\Joystick.asm -.395854 JOYSTICK_SET_NES_MODE -.395854 e2 20 sep #$20 SEP #$20 ; set A short -.395856 af 04 e8 af lda $afe804 LDA JOYSTICK_MODE -.39585a 29 fb and #$fb AND #~NES_SNES_JOY ; 0 = NES (8 bit shift) -.39585c 8f 04 e8 af sta $afe804 STA JOYSTICK_MODE -.395860 6b rtl RTL -.395861 JOYSTICK_SET_SNES_MODE -.395861 e2 20 sep #$20 SEP #$20 ; set A short -.395863 af 04 e8 af lda $afe804 LDA JOYSTICK_MODE -.395867 29 fb and #$fb AND #~NES_SNES_JOY -.395869 09 04 ora #$04 ORA #NES_SNES_JOY ; 1 = SNES (12 Bit Shift) -.39586b 8f 04 e8 af sta $afe804 STA JOYSTICK_MODE -.39586f 6b rtl RTL -.395870 JOYSTICK_ENABLE_NES_SNES_PORT0 -.395870 e2 20 sep #$20 SEP #$20 ; set A short -.395872 af 04 e8 af lda $afe804 LDA JOYSTICK_MODE -.395876 29 fe and #$fe AND #~NES_SNES_EN0 -.395878 09 01 ora #$01 ORA #NES_SNES_EN0 -.39587a 8f 04 e8 af sta $afe804 STA JOYSTICK_MODE -.39587e 6b rtl RTL -.39587f JOYSTICK_ENABLE_NES_SNES_PORT1 -.39587f e2 20 sep #$20 SEP #$20 ; set A short -.395881 af 04 e8 af lda $afe804 LDA JOYSTICK_MODE -.395885 29 fd and #$fd AND #~NES_SNES_EN1 -.395887 09 02 ora #$02 ORA #NES_SNES_EN1 -.395889 8f 04 e8 af sta $afe804 STA JOYSTICK_MODE -.39588d 6b rtl RTL -.39588e JOYSTICK_DISABLE_NES_SNES_PORT0 -.39588e e2 20 sep #$20 SEP #$20 ; set A short -.395890 af 04 e8 af lda $afe804 LDA JOYSTICK_MODE -.395894 29 fe and #$fe AND #~NES_SNES_EN0 -.395896 8f 04 e8 af sta $afe804 STA JOYSTICK_MODE -.39589a 6b rtl RTL -.39589b JOYSTICK_DISABLE_NES_SNES_PORT1 -.39589b e2 20 sep #$20 SEP #$20 ; set A short -.39589d af 04 e8 af lda $afe804 LDA JOYSTICK_MODE -.3958a1 29 fd and #$fd AND #~NES_SNES_EN1 -.3958a3 8f 04 e8 af sta $afe804 STA JOYSTICK_MODE -.3958a7 6b rtl RTL -.3958a8 JOYSTICK_NES_SNES_TRIG_WITH_POLL -.3958a8 e2 20 sep #$20 SEP #$20 ; set A short -.3958aa af 04 e8 af lda $afe804 LDA JOYSTICK_MODE -.3958ae 29 03 and #$03 AND #(NES_SNES_EN0 | NES_SNES_EN1) -.3958b0 c9 00 cmp #$00 CMP #$00 -.3958b2 f0 14 beq $3958c8 BEQ END_OF_JOYSTICK_POLL -.3958b4 af 04 e8 af lda $afe804 LDA JOYSTICK_MODE -.3958b8 09 80 ora #$80 ORA #NES_SNES_TRIG ; Set to 1 (Will auto Clear) -.3958ba 8f 04 e8 af sta $afe804 STA JOYSTICK_MODE -.3958be JOYSTICK_POLLING_ISNOTOVER -.3958be af 04 e8 af lda $afe804 LDA JOYSTICK_MODE ; -.3958c2 29 40 and #$40 AND #NES_SNES_DONE -.3958c4 c9 40 cmp #$40 CMP #NES_SNES_DONE -.3958c6 d0 f6 bne $3958be BNE JOYSTICK_POLLING_ISNOTOVER -.3958c8 END_OF_JOYSTICK_POLL -.3958c8 6b rtl RTL +.39584c JOYSTICK_SET_NES_MODE +.39584c e2 20 sep #$20 SEP #$20 ; set A short +.39584e af 04 e8 af lda $afe804 LDA JOYSTICK_MODE +.395852 29 fb and #$fb AND #~NES_SNES_JOY ; 0 = NES (8 bit shift) +.395854 8f 04 e8 af sta $afe804 STA JOYSTICK_MODE +.395858 6b rtl RTL +.395859 JOYSTICK_SET_SNES_MODE +.395859 e2 20 sep #$20 SEP #$20 ; set A short +.39585b af 04 e8 af lda $afe804 LDA JOYSTICK_MODE +.39585f 29 fb and #$fb AND #~NES_SNES_JOY +.395861 09 04 ora #$04 ORA #NES_SNES_JOY ; 1 = SNES (12 Bit Shift) +.395863 8f 04 e8 af sta $afe804 STA JOYSTICK_MODE +.395867 6b rtl RTL +.395868 JOYSTICK_ENABLE_NES_SNES_PORT0 +.395868 e2 20 sep #$20 SEP #$20 ; set A short +.39586a af 04 e8 af lda $afe804 LDA JOYSTICK_MODE +.39586e 29 fe and #$fe AND #~NES_SNES_EN0 +.395870 09 01 ora #$01 ORA #NES_SNES_EN0 +.395872 8f 04 e8 af sta $afe804 STA JOYSTICK_MODE +.395876 6b rtl RTL +.395877 JOYSTICK_ENABLE_NES_SNES_PORT1 +.395877 e2 20 sep #$20 SEP #$20 ; set A short +.395879 af 04 e8 af lda $afe804 LDA JOYSTICK_MODE +.39587d 29 fd and #$fd AND #~NES_SNES_EN1 +.39587f 09 02 ora #$02 ORA #NES_SNES_EN1 +.395881 8f 04 e8 af sta $afe804 STA JOYSTICK_MODE +.395885 6b rtl RTL +.395886 JOYSTICK_DISABLE_NES_SNES_PORT0 +.395886 e2 20 sep #$20 SEP #$20 ; set A short +.395888 af 04 e8 af lda $afe804 LDA JOYSTICK_MODE +.39588c 29 fe and #$fe AND #~NES_SNES_EN0 +.39588e 8f 04 e8 af sta $afe804 STA JOYSTICK_MODE +.395892 6b rtl RTL +.395893 JOYSTICK_DISABLE_NES_SNES_PORT1 +.395893 e2 20 sep #$20 SEP #$20 ; set A short +.395895 af 04 e8 af lda $afe804 LDA JOYSTICK_MODE +.395899 29 fd and #$fd AND #~NES_SNES_EN1 +.39589b 8f 04 e8 af sta $afe804 STA JOYSTICK_MODE +.39589f 6b rtl RTL +.3958a0 JOYSTICK_NES_SNES_TRIG_WITH_POLL +.3958a0 e2 20 sep #$20 SEP #$20 ; set A short +.3958a2 af 04 e8 af lda $afe804 LDA JOYSTICK_MODE +.3958a6 29 03 and #$03 AND #(NES_SNES_EN0 | NES_SNES_EN1) +.3958a8 c9 00 cmp #$00 CMP #$00 +.3958aa f0 14 beq $3958c0 BEQ END_OF_JOYSTICK_POLL +.3958ac af 04 e8 af lda $afe804 LDA JOYSTICK_MODE +.3958b0 09 80 ora #$80 ORA #NES_SNES_TRIG ; Set to 1 (Will auto Clear) +.3958b2 8f 04 e8 af sta $afe804 STA JOYSTICK_MODE +.3958b6 JOYSTICK_POLLING_ISNOTOVER +.3958b6 af 04 e8 af lda $afe804 LDA JOYSTICK_MODE ; +.3958ba 29 40 and #$40 AND #NES_SNES_DONE +.3958bc c9 40 cmp #$40 CMP #NES_SNES_DONE +.3958be d0 f6 bne $3958b6 BNE JOYSTICK_POLLING_ISNOTOVER +.3958c0 END_OF_JOYSTICK_POLL +.3958c0 6b rtl RTL ;****** Return to file: src\kernel.asm ;****** Processing file: src\Libraries/sdc_library.asm -.3958c9 SDC_TEST -.3958c9 8b phb PHB -.3958ca 0b phd PHD -.3958cb 08 php PHP -.3958cc 48 pha PHA ; begin setdbr macro -.3958cd 08 php PHP -.3958ce e2 20 sep #$20 SEP #$20 ; set A short -.3958d0 a9 00 lda #$00 LDA #0 -.3958d2 48 pha PHA -.3958d3 ab plb PLB -.3958d4 28 plp PLP -.3958d5 68 pla PLA ; end setdbr macro -.3958d6 48 pha PHA ; begin setdp macro -.3958d7 08 php PHP -.3958d8 c2 20 rep #$20 REP #$20 ; set A long -.3958da a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.3958dd 5b tcd TCD -.3958de 28 plp PLP -.3958df 68 pla PLA ; end setdp macro +.3958c1 SDC_WAITBUSY +.3958c1 08 php PHP +.3958c2 e2 20 sep #$20 SEP #$20 ; set A short +.3958c4 af 04 ea af lda $afea04 wait_xact LDA @l SDC_TRANS_STATUS_REG ; Wait for the transaction to complete +.3958c8 29 01 and #$01 AND #SDC_TRANS_BUSY +.3958ca c9 01 cmp #$01 CMP #SDC_TRANS_BUSY +.3958cc f0 f6 beq $3958c4 BEQ wait_xact +.3958ce 28 plp PLP +.3958cf 6b rtl RTL +.3958d0 SDC_RESET +.3958d0 08 php PHP +.3958d1 e2 20 sep #$20 SEP #$20 ; set A short +.3958d3 a9 01 lda #$01 LDA #1 +.3958d5 8f 01 ea af sta $afea01 STA @l SDC_CONTROL_REG +.3958d9 28 plp PLP +.3958da 6b rtl RTL +.3958db SDC_INIT +.3958db 0b phd PHD +.3958dc 8b phb PHB +.3958dd 08 php PHP +.3958de 48 pha PHA ; begin setdbr macro +.3958df 08 php PHP .3958e0 e2 20 sep #$20 SEP #$20 ; set A short -.3958e2 a9 f0 lda #$f0 LDA #$F0 ; Set white on black background -.3958e4 8d 1e 00 sta $001e STA @w CURCOLOR -.3958e7 22 a8 10 00 jsl $0010a8 JSL CLRSCREEN -.3958eb 22 a0 10 00 jsl $0010a0 JSL CSRHOME -.3958ef 22 2f 59 39 jsl $39592f JSL SDC_INIT ; Attempt to initilize the SDC interface -.3958f3 b0 03 bcs $3958f8 BCS init_ok -.3958f5 82 15 00 brl $39590d BRL done -.3958f8 a9 02 lda #$02 init_ok LDA #BIOS_DEV_SD -.3958fa 85 01 sta $0321 STA BIOS_DEV -.3958fc 22 37 3f 39 jsl $393f37 JSL DOS_MOUNT ; Attempt to mount the SDC -.395900 b0 03 bcs $395905 BCS mount_ok -.395902 82 08 00 brl $39590d BRL done -.395905 22 ee 4f 39 jsl $394fee mount_ok JSL IF_DIROPEN -.395909 b0 02 bcs $39590d BCS all_ok -.39590b 80 00 bra $39590d BRA done -.39590d all_ok -.39590d 22 6c 10 00 jsl $00106c done JSL PRINTCR -.395911 28 plp PLP -.395912 2b pld PLD -.395913 ab plb PLB -.395914 6b rtl RTL -.395915 SDC_WAITBUSY -.395915 08 php PHP -.395916 e2 20 sep #$20 SEP #$20 ; set A short -.395918 af 04 ea af lda $afea04 wait_xact LDA @l SDC_TRANS_STATUS_REG ; Wait for the transaction to complete -.39591c 29 01 and #$01 AND #SDC_TRANS_BUSY -.39591e c9 01 cmp #$01 CMP #SDC_TRANS_BUSY -.395920 f0 f6 beq $395918 BEQ wait_xact -.395922 28 plp PLP -.395923 6b rtl RTL -.395924 SDC_RESET -.395924 08 php PHP -.395925 e2 20 sep #$20 SEP #$20 ; set A short -.395927 a9 01 lda #$01 LDA #1 -.395929 8f 01 ea af sta $afea01 STA @l SDC_CONTROL_REG -.39592d 28 plp PLP -.39592e 6b rtl RTL -.39592f SDC_INIT -.39592f 0b phd PHD -.395930 8b phb PHB -.395931 08 php PHP -.395932 48 pha PHA ; begin setdbr macro -.395933 08 php PHP +.3958e2 a9 00 lda #$00 LDA #0 +.3958e4 48 pha PHA +.3958e5 ab plb PLB +.3958e6 28 plp PLP +.3958e7 68 pla PLA ; end setdbr macro +.3958e8 48 pha PHA ; begin setdp macro +.3958e9 08 php PHP +.3958ea c2 20 rep #$20 REP #$20 ; set A long +.3958ec a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3958ef 5b tcd TCD +.3958f0 28 plp PLP +.3958f1 68 pla PLA ; end setdp macro +.3958f2 e2 20 sep #$20 SEP #$20 ; set A short +.3958f4 a9 01 lda #$01 start_trans LDA #SDC_TRANS_INIT_SD +.3958f6 8f 02 ea af sta $afea02 STA @l SDC_TRANS_TYPE_REG ; Set Init SD +.3958fa a9 01 lda #$01 LDA #SDC_TRANS_START ; Set the transaction to start +.3958fc 8f 03 ea af sta $afea03 STA @l SDC_TRANS_CONTROL_REG +.395900 22 c1 58 39 jsl $3958c1 JSL SDC_WAITBUSY ; Wait for initialization to complete +.395904 af 05 ea af lda $afea05 LDA @l SDC_TRANS_ERROR_REG ; Check for errors +.395908 d0 07 bne $395911 BNE ret_error ; Is there one? Process the error +.39590a 64 00 stz $0320 ret_success STZ BIOS_STATUS +.39590c 28 plp PLP +.39590d ab plb PLB +.39590e 2b pld PLD +.39590f 38 sec SEC +.395910 6b rtl RTL +.395911 8d 06 03 sta $0306 ret_error STA @w FDC_ST0 +.395914 a9 8b lda #$8b LDA #BIOS_ERR_NOTINIT +.395916 85 00 sta $0320 set_error STA BIOS_STATUS +.395918 28 plp PLP +.395919 ab plb PLB +.39591a 2b pld PLD +.39591b 18 clc CLC +.39591c 6b rtl RTL +.39591d SDC_GETBLOCK +.39591d 0b phd PHD +.39591e 8b phb PHB +.39591f 08 php PHP +.395920 48 pha PHA ; begin setdbr macro +.395921 08 php PHP +.395922 e2 20 sep #$20 SEP #$20 ; set A short +.395924 a9 00 lda #$00 LDA #0 +.395926 48 pha PHA +.395927 ab plb PLB +.395928 28 plp PLP +.395929 68 pla PLA ; end setdbr macro +.39592a 48 pha PHA ; begin setdp macro +.39592b 08 php PHP +.39592c c2 20 rep #$20 REP #$20 ; set A long +.39592e a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.395931 5b tcd TCD +.395932 28 plp PLP +.395933 68 pla PLA ; end setdp macro .395934 e2 20 sep #$20 SEP #$20 ; set A short -.395936 a9 00 lda #$00 LDA #0 -.395938 48 pha PHA -.395939 ab plb PLB -.39593a 28 plp PLP -.39593b 68 pla PLA ; end setdbr macro -.39593c 48 pha PHA ; begin setdp macro -.39593d 08 php PHP -.39593e c2 20 rep #$20 REP #$20 ; set A long -.395940 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.395943 5b tcd TCD -.395944 28 plp PLP -.395945 68 pla PLA ; end setdp macro -.395946 e2 20 sep #$20 SEP #$20 ; set A short -.395948 af 12 e8 af lda $afe812 LDA @l SDCARD_STAT ; Check the SDC status -.39594c 89 01 bit #$01 BIT #SDC_DETECTED ; Is a card present -.39594e f0 04 beq $395954 BEQ start_trans ; Yes: start the transaction -.395950 a9 87 lda #$87 LDA #BIOS_ERR_NOMEDIA ; No: return a NO MEDIA error -.395952 80 22 bra $395976 BRA set_error -.395954 a9 01 lda #$01 start_trans LDA #SDC_TRANS_INIT_SD -.395956 8f 02 ea af sta $afea02 STA @l SDC_TRANS_TYPE_REG ; Set Init SD -.39595a a9 01 lda #$01 LDA #SDC_TRANS_START ; Set the transaction to start -.39595c 8f 03 ea af sta $afea03 STA @l SDC_TRANS_CONTROL_REG -.395960 22 15 59 39 jsl $395915 JSL SDC_WAITBUSY ; Wait for initialization to complete -.395964 af 05 ea af lda $afea05 LDA @l SDC_TRANS_ERROR_REG ; Check for errors -.395968 d0 07 bne $395971 BNE ret_error ; Is there one? Process the error -.39596a 64 00 stz $0320 ret_success STZ BIOS_STATUS -.39596c 28 plp PLP -.39596d ab plb PLB -.39596e 2b pld PLD -.39596f 38 sec SEC -.395970 6b rtl RTL -.395971 8d 06 03 sta $0306 ret_error STA @w FDC_ST0 -.395974 a9 8b lda #$8b LDA #BIOS_ERR_NOTINIT -.395976 85 00 sta $0320 set_error STA BIOS_STATUS -.395978 28 plp PLP -.395979 ab plb PLB -.39597a 2b pld PLD -.39597b 18 clc CLC -.39597c 6b rtl RTL -.39597d SDC_GETBLOCK -.39597d 0b phd PHD -.39597e 8b phb PHB -.39597f 08 php PHP -.395980 48 pha PHA ; begin setdbr macro -.395981 08 php PHP -.395982 e2 20 sep #$20 SEP #$20 ; set A short -.395984 a9 00 lda #$00 LDA #0 -.395986 48 pha PHA -.395987 ab plb PLB -.395988 28 plp PLP -.395989 68 pla PLA ; end setdbr macro -.39598a 48 pha PHA ; begin setdp macro -.39598b 08 php PHP -.39598c c2 20 rep #$20 REP #$20 ; set A long -.39598e a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.395991 5b tcd TCD -.395992 28 plp PLP -.395993 68 pla PLA ; end setdp macro -.395994 e2 20 sep #$20 SEP #$20 ; set A short -.395996 af 12 e8 af lda $afe812 LDA @l SDCARD_STAT ; Check the SDC status -.39599a 89 01 bit #$01 BIT #SDC_DETECTED ; Is a card present -.39599c f0 04 beq $3959a2 BEQ led_on ; Yes: turn on the LED -.39599e a9 87 lda #$87 LDA #BIOS_ERR_NOMEDIA ; No: return a NO MEDIA error -.3959a0 80 71 bra $395a13 BRA ret_error -.3959a2 af 80 e8 af lda $afe880 led_on LDA @l GABE_MSTR_CTRL ; Turn on the SDC activity light -.3959a6 09 02 ora #$02 ORA #GABE_CTRL_SDC_LED -.3959a8 8f 80 e8 af sta $afe880 STA @l GABE_MSTR_CTRL -.3959ac a9 00 lda #$00 LDA #0 -.3959ae 8f 07 ea af sta $afea07 STA @l SDC_SD_ADDR_7_0_REG -.3959b2 a5 02 lda $0322 LDA BIOS_LBA ; Set the LBA to read -.3959b4 0a asl a ASL A -.3959b5 8f 08 ea af sta $afea08 STA @l SDC_SD_ADDR_15_8_REG -.3959b9 a5 03 lda $0323 LDA BIOS_LBA+1 -.3959bb 2a rol a ROL A -.3959bc 8f 09 ea af sta $afea09 STA @l SDC_SD_ADDR_23_16_REG -.3959c0 a5 04 lda $0324 LDA BIOS_LBA+2 -.3959c2 2a rol a ROL A -.3959c3 8f 0a ea af sta $afea0a STA @l SDC_SD_ADDR_31_24_REG -.3959c7 a9 02 lda #$02 LDA #SDC_TRANS_READ_BLK ; Set the transaction to READ -.3959c9 8f 02 ea af sta $afea02 STA @l SDC_TRANS_TYPE_REG -.3959cd a9 01 lda #$01 LDA #SDC_TRANS_START ; Set the transaction to start -.3959cf 8f 03 ea af sta $afea03 STA @l SDC_TRANS_CONTROL_REG -.3959d3 22 15 59 39 jsl $395915 JSL SDC_WAITBUSY ; Wait for transaction to complete -.3959d7 af 05 ea af lda $afea05 LDA @l SDC_TRANS_ERROR_REG ; Check for errors -.3959db d0 36 bne $395a13 BNE ret_error ; Is there one? Process the error -.3959dd e2 20 sep #$20 SEP #$20 ; set A short -.3959df af 13 ea af lda $afea13 LDA @l SDC_RX_FIFO_DATA_CNT_LO ; Record the number of bytes read -.3959e3 85 0a sta $032a STA BIOS_FIFO_COUNT -.3959e5 af 12 ea af lda $afea12 LDA @l SDC_RX_FIFO_DATA_CNT_HI -.3959e9 85 0b sta $032b STA BIOS_FIFO_COUNT+1 -.3959eb c2 10 rep #$10 REP #$10 ; set X long -.3959ed a0 00 00 ldy #$0000 LDY #0 -.3959f0 af 10 ea af lda $afea10 loop_rd LDA @l SDC_RX_FIFO_DATA_REG ; Get the byte... -.3959f4 97 06 sta [$0326],y STA [BIOS_BUFF_PTR],Y ; Save it to the buffer -.3959f6 c8 iny INY ; Advance to the next byte -.3959f7 c0 00 02 cpy #$0200 CPY #512 ; Have we read all the bytes? -.3959fa d0 f4 bne $3959f0 BNE loop_rd ; No: keep reading -.3959fc af 05 ea af lda $afea05 LDA @l SDC_TRANS_ERROR_REG ; Check for errors -.395a00 d0 11 bne $395a13 BNE ret_error ; Is there one? Process the error -.395a02 64 00 stz $0320 ret_success STZ BIOS_STATUS ; Return success -.395a04 af 80 e8 af lda $afe880 LDA @l GABE_MSTR_CTRL ; Turn off the SDC activity light -.395a08 29 fd and #$fd AND #~GABE_CTRL_SDC_LED -.395a0a 8f 80 e8 af sta $afe880 STA @l GABE_MSTR_CTRL -.395a0e 28 plp PLP -.395a0f ab plb PLB -.395a10 2b pld PLD -.395a11 38 sec SEC -.395a12 6b rtl RTL -.395a13 85 00 sta $0320 ret_error STA BIOS_STATUS -.395a15 af 80 e8 af lda $afe880 LDA @l GABE_MSTR_CTRL ; Turn off the SDC activity light -.395a19 29 fd and #$fd AND #~GABE_CTRL_SDC_LED -.395a1b 8f 80 e8 af sta $afe880 STA @l GABE_MSTR_CTRL -.395a1f 28 plp PLP -.395a20 ab plb PLB -.395a21 2b pld PLD -.395a22 18 clc CLC -.395a23 6b rtl RTL -.395a24 SDC_PUTBLOCK -.395a24 0b phd PHD -.395a25 8b phb PHB -.395a26 08 php PHP -.395a27 48 pha PHA ; begin setdbr macro -.395a28 08 php PHP -.395a29 e2 20 sep #$20 SEP #$20 ; set A short -.395a2b a9 00 lda #$00 LDA #0 -.395a2d 48 pha PHA -.395a2e ab plb PLB -.395a2f 28 plp PLP -.395a30 68 pla PLA ; end setdbr macro -.395a31 48 pha PHA ; begin setdp macro -.395a32 08 php PHP -.395a33 c2 20 rep #$20 REP #$20 ; set A long -.395a35 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.395a38 5b tcd TCD -.395a39 28 plp PLP -.395a3a 68 pla PLA ; end setdp macro -.395a3b e2 20 sep #$20 SEP #$20 ; set A short -.395a3d af 12 e8 af lda $afe812 LDA @l SDCARD_STAT ; Check the SDC status -.395a41 89 01 bit #$01 BIT #SDC_DETECTED ; Is a card present -.395a43 f0 04 beq $395a49 BEQ check_wp ; Yes: check for write protect -.395a45 a9 87 lda #$87 LDA #BIOS_ERR_NOMEDIA ; No: return a NO MEDIA error -.395a47 80 65 bra $395aae BRA ret_error -.395a49 89 02 bit #$02 check_wp BIT #SDC_WRITEPROT ; Is card writable? -.395a4b f0 04 beq $395a51 BEQ led_on ; Yes: start the transaction -.395a4d a9 86 lda #$86 LDA #BIOS_ERR_WRITEPROT ; No: return a WRITE PROTECT error -.395a4f 80 5d bra $395aae BRA ret_error -.395a51 af 80 e8 af lda $afe880 led_on LDA @l GABE_MSTR_CTRL ; Turn on the SDC activity light -.395a55 09 02 ora #$02 ORA #GABE_CTRL_SDC_LED -.395a57 8f 80 e8 af sta $afe880 STA @l GABE_MSTR_CTRL -.395a5b c2 10 rep #$10 REP #$10 ; set X long -.395a5d a0 00 00 ldy #$0000 LDY #0 -.395a60 b7 06 lda [$0326],y loop_wr LDA [BIOS_BUFF_PTR],Y ; Get the byte... -.395a62 8f 20 ea af sta $afea20 STA @l SDC_TX_FIFO_DATA_REG ; Save it to the SDC -.395a66 c8 iny INY ; Advance to the next byte -.395a67 c0 00 02 cpy #$0200 CPY #512 ; Have we read all the bytes? -.395a6a d0 f4 bne $395a60 BNE loop_wr ; No: keep writing -.395a6c a9 00 lda #$00 LDA #0 -.395a6e 8f 07 ea af sta $afea07 STA @l SDC_SD_ADDR_7_0_REG -.395a72 a5 02 lda $0322 LDA BIOS_LBA ; Set the LBA to write -.395a74 0a asl a ASL A -.395a75 8f 08 ea af sta $afea08 STA @l SDC_SD_ADDR_15_8_REG -.395a79 a5 03 lda $0323 LDA BIOS_LBA+1 -.395a7b 2a rol a ROL A -.395a7c 8f 09 ea af sta $afea09 STA @l SDC_SD_ADDR_23_16_REG -.395a80 a5 04 lda $0324 LDA BIOS_LBA+2 -.395a82 2a rol a ROL A -.395a83 8f 0a ea af sta $afea0a STA @l SDC_SD_ADDR_31_24_REG -.395a87 a9 03 lda #$03 LDA #SDC_TRANS_WRITE_BLK ; Set the transaction to WRITE -.395a89 8f 02 ea af sta $afea02 STA @l SDC_TRANS_TYPE_REG -.395a8d a9 01 lda #$01 LDA #SDC_TRANS_START ; Set the transaction to start -.395a8f 8f 03 ea af sta $afea03 STA @l SDC_TRANS_CONTROL_REG -.395a93 22 15 59 39 jsl $395915 JSL SDC_WAITBUSY ; Wait for transaction to complete -.395a97 af 05 ea af lda $afea05 LDA @l SDC_TRANS_ERROR_REG ; Check for errors -.395a9b d0 11 bne $395aae BNE ret_error ; Is there one? Process the error -.395a9d 64 00 stz $0320 ret_success STZ BIOS_STATUS ; Return success -.395a9f af 80 e8 af lda $afe880 LDA @l GABE_MSTR_CTRL ; Turn off the SDC activity light -.395aa3 29 fd and #$fd AND #~GABE_CTRL_SDC_LED -.395aa5 8f 80 e8 af sta $afe880 STA @l GABE_MSTR_CTRL -.395aa9 28 plp PLP -.395aaa ab plb PLB -.395aab 2b pld PLD -.395aac 38 sec SEC -.395aad 6b rtl RTL -.395aae 85 00 sta $0320 ret_error STA BIOS_STATUS -.395ab0 af 80 e8 af lda $afe880 LDA @l GABE_MSTR_CTRL ; Turn off the SDC activity light -.395ab4 29 fd and #$fd AND #~GABE_CTRL_SDC_LED -.395ab6 8f 80 e8 af sta $afe880 STA @l GABE_MSTR_CTRL -.395aba 28 plp PLP -.395abb ab plb PLB -.395abc 2b pld PLD -.395abd 18 clc CLC -.395abe 6b rtl RTL +.395936 af 80 e8 af lda $afe880 led_on LDA @l GABE_MSTR_CTRL ; Turn on the SDC activity light +.39593a 09 02 ora #$02 ORA #GABE_CTRL_SDC_LED +.39593c 8f 80 e8 af sta $afe880 STA @l GABE_MSTR_CTRL +.395940 a9 00 lda #$00 LDA #0 +.395942 8f 07 ea af sta $afea07 STA @l SDC_SD_ADDR_7_0_REG +.395946 a5 02 lda $0322 LDA BIOS_LBA ; Set the LBA to read +.395948 0a asl a ASL A +.395949 8f 08 ea af sta $afea08 STA @l SDC_SD_ADDR_15_8_REG +.39594d a5 03 lda $0323 LDA BIOS_LBA+1 +.39594f 2a rol a ROL A +.395950 8f 09 ea af sta $afea09 STA @l SDC_SD_ADDR_23_16_REG +.395954 a5 04 lda $0324 LDA BIOS_LBA+2 +.395956 2a rol a ROL A +.395957 8f 0a ea af sta $afea0a STA @l SDC_SD_ADDR_31_24_REG +.39595b a9 02 lda #$02 LDA #SDC_TRANS_READ_BLK ; Set the transaction to READ +.39595d 8f 02 ea af sta $afea02 STA @l SDC_TRANS_TYPE_REG +.395961 a9 01 lda #$01 LDA #SDC_TRANS_START ; Set the transaction to start +.395963 8f 03 ea af sta $afea03 STA @l SDC_TRANS_CONTROL_REG +.395967 22 c1 58 39 jsl $3958c1 JSL SDC_WAITBUSY ; Wait for transaction to complete +.39596b af 05 ea af lda $afea05 LDA @l SDC_TRANS_ERROR_REG ; Check for errors +.39596f d0 36 bne $3959a7 BNE ret_error ; Is there one? Process the error +.395971 e2 20 sep #$20 SEP #$20 ; set A short +.395973 af 13 ea af lda $afea13 LDA @l SDC_RX_FIFO_DATA_CNT_LO ; Record the number of bytes read +.395977 85 0a sta $032a STA BIOS_FIFO_COUNT +.395979 af 12 ea af lda $afea12 LDA @l SDC_RX_FIFO_DATA_CNT_HI +.39597d 85 0b sta $032b STA BIOS_FIFO_COUNT+1 +.39597f c2 10 rep #$10 REP #$10 ; set X long +.395981 a0 00 00 ldy #$0000 LDY #0 +.395984 af 10 ea af lda $afea10 loop_rd LDA @l SDC_RX_FIFO_DATA_REG ; Get the byte... +.395988 97 06 sta [$0326],y STA [BIOS_BUFF_PTR],Y ; Save it to the buffer +.39598a c8 iny INY ; Advance to the next byte +.39598b c0 00 02 cpy #$0200 CPY #512 ; Have we read all the bytes? +.39598e d0 f4 bne $395984 BNE loop_rd ; No: keep reading +.395990 af 05 ea af lda $afea05 LDA @l SDC_TRANS_ERROR_REG ; Check for errors +.395994 d0 11 bne $3959a7 BNE ret_error ; Is there one? Process the error +.395996 64 00 stz $0320 ret_success STZ BIOS_STATUS ; Return success +.395998 af 80 e8 af lda $afe880 LDA @l GABE_MSTR_CTRL ; Turn off the SDC activity light +.39599c 29 fd and #$fd AND #~GABE_CTRL_SDC_LED +.39599e 8f 80 e8 af sta $afe880 STA @l GABE_MSTR_CTRL +.3959a2 28 plp PLP +.3959a3 ab plb PLB +.3959a4 2b pld PLD +.3959a5 38 sec SEC +.3959a6 6b rtl RTL +.3959a7 a9 82 lda #$82 ret_error LDA #BIOS_ERR_READ ; Return a read error +.3959a9 85 00 sta $0320 STA BIOS_STATUS +.3959ab af 80 e8 af lda $afe880 LDA @l GABE_MSTR_CTRL ; Turn off the SDC activity light +.3959af 29 fd and #$fd AND #~GABE_CTRL_SDC_LED +.3959b1 8f 80 e8 af sta $afe880 STA @l GABE_MSTR_CTRL +.3959b5 28 plp PLP +.3959b6 ab plb PLB +.3959b7 2b pld PLD +.3959b8 18 clc CLC +.3959b9 6b rtl RTL +.3959ba SDC_PUTBLOCK +.3959ba 0b phd PHD +.3959bb 8b phb PHB +.3959bc 08 php PHP +.3959bd 48 pha PHA ; begin setdbr macro +.3959be 08 php PHP +.3959bf e2 20 sep #$20 SEP #$20 ; set A short +.3959c1 a9 00 lda #$00 LDA #0 +.3959c3 48 pha PHA +.3959c4 ab plb PLB +.3959c5 28 plp PLP +.3959c6 68 pla PLA ; end setdbr macro +.3959c7 48 pha PHA ; begin setdp macro +.3959c8 08 php PHP +.3959c9 c2 20 rep #$20 REP #$20 ; set A long +.3959cb a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3959ce 5b tcd TCD +.3959cf 28 plp PLP +.3959d0 68 pla PLA ; end setdp macro +.3959d1 e2 20 sep #$20 SEP #$20 ; set A short +.3959d3 af 12 e8 af lda $afe812 LDA @l SDCARD_STAT ; Check the SDC status +.3959d7 89 02 bit #$02 check_wp BIT #SDC_WRITEPROT ; Is card writable? +.3959d9 f0 04 beq $3959df BEQ led_on ; Yes: start the transaction +.3959db a9 86 lda #$86 LDA #BIOS_ERR_WRITEPROT ; No: return a WRITE PROTECT error +.3959dd 80 65 bra $395a44 BRA save_error +.3959df af 80 e8 af lda $afe880 led_on LDA @l GABE_MSTR_CTRL ; Turn on the SDC activity light +.3959e3 09 02 ora #$02 ORA #GABE_CTRL_SDC_LED +.3959e5 8f 80 e8 af sta $afe880 STA @l GABE_MSTR_CTRL +.3959e9 c2 10 rep #$10 REP #$10 ; set X long +.3959eb a0 00 00 ldy #$0000 LDY #0 +.3959ee b7 06 lda [$0326],y loop_wr LDA [BIOS_BUFF_PTR],Y ; Get the byte... +.3959f0 8f 20 ea af sta $afea20 STA @l SDC_TX_FIFO_DATA_REG ; Save it to the SDC +.3959f4 c8 iny INY ; Advance to the next byte +.3959f5 c0 00 02 cpy #$0200 CPY #512 ; Have we read all the bytes? +.3959f8 d0 f4 bne $3959ee BNE loop_wr ; No: keep writing +.3959fa a9 00 lda #$00 LDA #0 +.3959fc 8f 07 ea af sta $afea07 STA @l SDC_SD_ADDR_7_0_REG +.395a00 a5 02 lda $0322 LDA BIOS_LBA ; Set the LBA to write +.395a02 0a asl a ASL A +.395a03 8f 08 ea af sta $afea08 STA @l SDC_SD_ADDR_15_8_REG +.395a07 a5 03 lda $0323 LDA BIOS_LBA+1 +.395a09 2a rol a ROL A +.395a0a 8f 09 ea af sta $afea09 STA @l SDC_SD_ADDR_23_16_REG +.395a0e a5 04 lda $0324 LDA BIOS_LBA+2 +.395a10 2a rol a ROL A +.395a11 8f 0a ea af sta $afea0a STA @l SDC_SD_ADDR_31_24_REG +.395a15 a9 03 lda #$03 LDA #SDC_TRANS_WRITE_BLK ; Set the transaction to WRITE +.395a17 8f 02 ea af sta $afea02 STA @l SDC_TRANS_TYPE_REG +.395a1b a9 01 lda #$01 LDA #SDC_TRANS_START ; Set the transaction to start +.395a1d 8f 03 ea af sta $afea03 STA @l SDC_TRANS_CONTROL_REG +.395a21 22 c1 58 39 jsl $3958c1 JSL SDC_WAITBUSY ; Wait for transaction to complete +.395a25 af 05 ea af lda $afea05 LDA @l SDC_TRANS_ERROR_REG ; Check for errors +.395a29 8d 06 03 sta $0306 STA FDC_ST0 ; Save any to the hardware status byte +.395a2c d0 14 bne $395a42 BNE ret_error ; Is there one? Process the error +.395a2e 64 00 stz $0320 ret_success STZ BIOS_STATUS ; Return success +.395a30 9c 06 03 stz $0306 STZ FDC_ST0 +.395a33 af 80 e8 af lda $afe880 LDA @l GABE_MSTR_CTRL ; Turn off the SDC activity light +.395a37 29 fd and #$fd AND #~GABE_CTRL_SDC_LED +.395a39 8f 80 e8 af sta $afe880 STA @l GABE_MSTR_CTRL +.395a3d 28 plp PLP +.395a3e ab plb PLB +.395a3f 2b pld PLD +.395a40 38 sec SEC +.395a41 6b rtl RTL +.395a42 a9 83 lda #$83 ret_error LDA #BIOS_ERR_WRITE ; Return a write error +.395a44 85 00 sta $0320 save_error STA BIOS_STATUS +.395a46 af 80 e8 af lda $afe880 LDA @l GABE_MSTR_CTRL ; Turn off the SDC activity light +.395a4a 29 fd and #$fd AND #~GABE_CTRL_SDC_LED +.395a4c 8f 80 e8 af sta $afe880 STA @l GABE_MSTR_CTRL +.395a50 28 plp PLP +.395a51 ab plb PLB +.395a52 2b pld PLD +.395a53 18 clc CLC +.395a54 6b rtl RTL ;****** Return to file: src\kernel.asm @@ -11329,1544 +11279,1544 @@ =13 BPB_SECPERCLUS12_OFF = 13 ; Offset to sectors per cluster in a FAT12 boot sector =17 BPB_ROOT_MAX_ENTRY12_OFF = 17 ; Offset to the maximum number of entries in the root directory in FAT12 boot sector =22 BPB_SECPERFAT12_OFF = 22 ; Offset to sectors per FAT on a FAT12 boot sector -.395abf FDC_TEST -.395abf 8b phb PHB -.395ac0 0b phd PHD -.395ac1 08 php PHP -.395ac2 48 pha PHA ; begin setdbr macro -.395ac3 08 php PHP -.395ac4 e2 20 sep #$20 SEP #$20 ; set A short -.395ac6 a9 00 lda #$00 LDA #0 -.395ac8 48 pha PHA -.395ac9 ab plb PLB -.395aca 28 plp PLP -.395acb 68 pla PLA ; end setdbr macro -.395acc 48 pha PHA ; begin setdp macro -.395acd 08 php PHP -.395ace c2 20 rep #$20 REP #$20 ; set A long -.395ad0 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.395ad3 5b tcd TCD -.395ad4 28 plp PLP -.395ad5 68 pla PLA ; end setdp macro -.395ad6 e2 20 sep #$20 SEP #$20 ; set A short -.395ad8 a9 f0 lda #$f0 LDA #$F0 -.395ada 8d 1e 00 sta $001e STA @w CURCOLOR -.395add 22 a8 10 00 jsl $0010a8 JSL CLRSCREEN -.395ae1 22 a0 10 00 jsl $0010a0 JSL CSRHOME -.395ae5 c2 30 rep #$30 REP #$30 ; set A&X long -.395ae7 22 b5 5d 39 jsl $395db5 JSL FDC_Init -.395aeb b0 03 bcs $395af0 BCS init_ok -.395aed 82 20 00 brl $395b10 BRL motor_off -.395af0 22 b4 64 39 jsl $3964b4 init_ok JSL FDC_CHK_MEDIA -.395af4 90 03 bcc $395af9 BCC no_media -.395af6 82 03 00 brl $395afc BRL is_ok1 -.395af9 no_media -.395af9 82 14 00 brl $395b10 BRL motor_off -.395afc 22 47 63 39 jsl $396347 is_ok1 JSL FDC_MOUNT -.395b00 90 03 bcc $395b05 BCC mount_err -.395b02 82 03 00 brl $395b08 BRL is_ok2 -.395b05 mount_err -.395b05 82 08 00 brl $395b10 BRL motor_off -.395b08 22 1c 5b 39 jsl $395b1c is_ok2 JSL FDC_TEST_PUTBLOCK -.395b0c b0 02 bcs $395b10 BCS all_ok -.395b0e 80 00 bra $395b10 BRA motor_off -.395b10 all_ok -.395b10 22 6c 10 00 jsl $00106c motor_off JSL PRINTCR -.395b14 22 65 5e 39 jsl $395e65 JSL FDC_Motor_Off -.395b18 28 plp PLP -.395b19 2b pld PLD -.395b1a ab plb PLB -.395b1b 6b rtl RTL -.395b1c FDC_TEST_PUTBLOCK -.395b1c e2 20 sep #$20 SEP #$20 ; set A short -.395b1e a9 00 lda #$00 LDA #0 ; Initialize the data to write to the drive -.395b20 a2 00 00 ldx #$0000 LDX #0 -.395b23 9f 00 00 03 sta $030000,x init_loop STA @l TEST_BUFFER,X -.395b27 1a inc a INC A -.395b28 e8 inx INX -.395b29 e0 00 02 cpx #$0200 CPX #512 -.395b2c d0 f5 bne $395b23 BNE init_loop -.395b2e c2 20 rep #$20 REP #$20 ; set A long -.395b30 a9 00 00 lda #$0000 LDA #<>TEST_BUFFER ; Set BIOS_BUFF_PTR -.395b33 8f 26 03 00 sta $000326 STA @l BIOS_BUFF_PTR -.395b37 a9 03 00 lda #$0003 LDA #`TEST_BUFFER -.395b3a 8f 28 03 00 sta $000328 STA @l BIOS_BUFF_PTR+2 -.395b3e a9 64 00 lda #$0064 LDA #100 ; Set LBA = 100 -.395b41 8f 22 03 00 sta $000322 STA @l BIOS_LBA -.395b45 a9 00 00 lda #$0000 LDA #0 -.395b48 8f 24 03 00 sta $000324 STA @l BIOS_LBA+2 -.395b4c 22 db 62 39 jsl $3962db JSL FDC_PUTBLOCK ; Try to write the data -.395b50 6b rtl RTL ->395b51 40 46 3a 53 41 4d 50 4c BOOT_FILE .null "@F:SAMPLE.PGX Hello, world!" ->395b59 45 2e 50 47 58 20 48 65 6c 6c 6f 2c 20 77 6f 72 ->395b69 6c 64 21 00 +.395a55 FDC_TEST +.395a55 8b phb PHB +.395a56 0b phd PHD +.395a57 08 php PHP +.395a58 48 pha PHA ; begin setdbr macro +.395a59 08 php PHP +.395a5a e2 20 sep #$20 SEP #$20 ; set A short +.395a5c a9 00 lda #$00 LDA #0 +.395a5e 48 pha PHA +.395a5f ab plb PLB +.395a60 28 plp PLP +.395a61 68 pla PLA ; end setdbr macro +.395a62 48 pha PHA ; begin setdp macro +.395a63 08 php PHP +.395a64 c2 20 rep #$20 REP #$20 ; set A long +.395a66 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.395a69 5b tcd TCD +.395a6a 28 plp PLP +.395a6b 68 pla PLA ; end setdp macro +.395a6c e2 20 sep #$20 SEP #$20 ; set A short +.395a6e a9 f0 lda #$f0 LDA #$F0 +.395a70 8d 1e 00 sta $001e STA @w CURCOLOR +.395a73 22 a8 10 00 jsl $0010a8 JSL CLRSCREEN +.395a77 22 a0 10 00 jsl $0010a0 JSL CSRHOME +.395a7b c2 30 rep #$30 REP #$30 ; set A&X long +.395a7d 22 4b 5d 39 jsl $395d4b JSL FDC_Init +.395a81 b0 03 bcs $395a86 BCS init_ok +.395a83 82 20 00 brl $395aa6 BRL motor_off +.395a86 22 4a 64 39 jsl $39644a init_ok JSL FDC_CHK_MEDIA +.395a8a 90 03 bcc $395a8f BCC no_media +.395a8c 82 03 00 brl $395a92 BRL is_ok1 +.395a8f no_media +.395a8f 82 14 00 brl $395aa6 BRL motor_off +.395a92 22 dd 62 39 jsl $3962dd is_ok1 JSL FDC_MOUNT +.395a96 90 03 bcc $395a9b BCC mount_err +.395a98 82 03 00 brl $395a9e BRL is_ok2 +.395a9b mount_err +.395a9b 82 08 00 brl $395aa6 BRL motor_off +.395a9e 22 b2 5a 39 jsl $395ab2 is_ok2 JSL FDC_TEST_PUTBLOCK +.395aa2 b0 02 bcs $395aa6 BCS all_ok +.395aa4 80 00 bra $395aa6 BRA motor_off +.395aa6 all_ok +.395aa6 22 6c 10 00 jsl $00106c motor_off JSL PRINTCR +.395aaa 22 fb 5d 39 jsl $395dfb JSL FDC_Motor_Off +.395aae 28 plp PLP +.395aaf 2b pld PLD +.395ab0 ab plb PLB +.395ab1 6b rtl RTL +.395ab2 FDC_TEST_PUTBLOCK +.395ab2 e2 20 sep #$20 SEP #$20 ; set A short +.395ab4 a9 00 lda #$00 LDA #0 ; Initialize the data to write to the drive +.395ab6 a2 00 00 ldx #$0000 LDX #0 +.395ab9 9f 00 00 03 sta $030000,x init_loop STA @l TEST_BUFFER,X +.395abd 1a inc a INC A +.395abe e8 inx INX +.395abf e0 00 02 cpx #$0200 CPX #512 +.395ac2 d0 f5 bne $395ab9 BNE init_loop +.395ac4 c2 20 rep #$20 REP #$20 ; set A long +.395ac6 a9 00 00 lda #$0000 LDA #<>TEST_BUFFER ; Set BIOS_BUFF_PTR +.395ac9 8f 26 03 00 sta $000326 STA @l BIOS_BUFF_PTR +.395acd a9 03 00 lda #$0003 LDA #`TEST_BUFFER +.395ad0 8f 28 03 00 sta $000328 STA @l BIOS_BUFF_PTR+2 +.395ad4 a9 64 00 lda #$0064 LDA #100 ; Set LBA = 100 +.395ad7 8f 22 03 00 sta $000322 STA @l BIOS_LBA +.395adb a9 00 00 lda #$0000 LDA #0 +.395ade 8f 24 03 00 sta $000324 STA @l BIOS_LBA+2 +.395ae2 22 71 62 39 jsl $396271 JSL FDC_PUTBLOCK ; Try to write the data +.395ae6 6b rtl RTL +>395ae7 40 46 3a 53 41 4d 50 4c BOOT_FILE .null "@F:SAMPLE.PGX Hello, world!" +>395aef 45 2e 50 47 58 20 48 65 6c 6c 6f 2c 20 77 6f 72 +>395aff 6c 64 21 00 =$020000 TEST_LOCATION = $020000 ; Location to try to load it =$030000 TEST_BUFFER = $030000 ; Temporary location for a cluster buffer -.395b6d FDC_Check_RQM -.395b6d 0b phd PHD -.395b6e 08 php PHP -.395b6f 48 pha PHA ; begin setdp macro -.395b70 08 php PHP -.395b71 c2 20 rep #$20 REP #$20 ; set A long -.395b73 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.395b76 5b tcd TCD -.395b77 28 plp PLP -.395b78 68 pla PLA ; end setdp macro -.395b79 e2 20 sep #$20 SEP #$20 ; set A short -.395b7b a9 1e lda #$1e LDA #FDC_WAIT_TIME ; Set a time out for the loop -.395b7d 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT -.395b81 a5 2c lda $032c loop LDA @b BIOS_FLAGS ; Check if there was a time out -.395b83 30 12 bmi $395b97 BMI time_out ; If so: signal a time out -.395b85 af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR -.395b89 89 80 bit #$80 BIT #FDC_MSR_RQM -.395b8b f0 f4 beq $395b81 BEQ loop -.395b8d a9 00 lda #$00 LDA #0 ; Clear the time out -.395b8f 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT -.395b93 28 plp PLP -.395b94 2b pld PLD -.395b95 38 sec SEC -.395b96 60 rts RTS -.395b97 28 plp time_out PLP -.395b98 2b pld PLD -.395b99 18 clc CLC -.395b9a 60 rts RTS -.395b9b FDC_Check_DRV0_BSY -.395b9b 0b phd PHD -.395b9c 08 php PHP -.395b9d 48 pha PHA ; begin setdp macro -.395b9e 08 php PHP -.395b9f c2 20 rep #$20 REP #$20 ; set A long -.395ba1 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.395ba4 5b tcd TCD -.395ba5 28 plp PLP -.395ba6 68 pla PLA ; end setdp macro -.395ba7 e2 20 sep #$20 SEP #$20 ; set A short -.395ba9 a9 1e lda #$1e LDA #FDC_WAIT_TIME ; Set a time out for the loop -.395bab 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT -.395baf a5 2c lda $032c loop LDA @b BIOS_FLAGS ; Check if there was a time out -.395bb1 30 12 bmi $395bc5 BMI time_out ; If so: signal a time out -.395bb3 af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR -.395bb7 89 01 bit #$01 BIT #FDC_MSR_DRV0BSY -.395bb9 d0 f4 bne $395baf BNE loop -.395bbb a9 00 lda #$00 LDA #0 ; Clear the time out -.395bbd 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT -.395bc1 28 plp PLP -.395bc2 2b pld PLD -.395bc3 38 sec SEC -.395bc4 60 rts RTS -.395bc5 28 plp time_out PLP -.395bc6 2b pld PLD -.395bc7 18 clc CLC -.395bc8 60 rts RTS -.395bc9 FDC_Check_CMD_BSY -.395bc9 0b phd PHD -.395bca 08 php PHP -.395bcb 48 pha PHA ; begin setdp macro -.395bcc 08 php PHP -.395bcd c2 20 rep #$20 REP #$20 ; set A long -.395bcf a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.395bd2 5b tcd TCD -.395bd3 28 plp PLP -.395bd4 68 pla PLA ; end setdp macro -.395bd5 e2 20 sep #$20 SEP #$20 ; set A short -.395bd7 a9 1e lda #$1e LDA #FDC_WAIT_TIME ; Set a time out for the loop -.395bd9 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT -.395bdd a5 2c lda $032c loop LDA @b BIOS_FLAGS ; Check if there was a time out -.395bdf 30 12 bmi $395bf3 BMI time_out ; If so: signal a time out -.395be1 af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR -.395be5 89 10 bit #$10 BIT #FDC_MSR_CMDBSY -.395be7 d0 f4 bne $395bdd BNE loop -.395be9 a9 00 lda #$00 LDA #0 ; Clear the time out -.395beb 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT -.395bef 28 plp PLP -.395bf0 2b pld PLD -.395bf1 38 sec SEC -.395bf2 60 rts RTS -.395bf3 28 plp time_out PLP -.395bf4 2b pld PLD -.395bf5 18 clc CLC -.395bf6 60 rts RTS -.395bf7 FDC_Can_Read_Data -.395bf7 0b phd PHD -.395bf8 08 php PHP -.395bf9 48 pha PHA ; begin setdp macro -.395bfa 08 php PHP -.395bfb c2 20 rep #$20 REP #$20 ; set A long -.395bfd a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.395c00 5b tcd TCD -.395c01 28 plp PLP -.395c02 68 pla PLA ; end setdp macro -.395c03 e2 20 sep #$20 SEP #$20 ; set A short -.395c05 a9 1e lda #$1e LDA #FDC_WAIT_TIME ; Set a time out for the loop -.395c07 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT -.395c0b a5 2c lda $032c loop LDA @b BIOS_FLAGS ; Check if there was a time out -.395c0d 30 14 bmi $395c23 BMI time_out ; If so: signal a time out -.395c0f af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR -.395c13 29 40 and #$40 AND #FDC_MSR_DIO -.395c15 c9 40 cmp #$40 CMP #FDC_MSR_DIO -.395c17 d0 f2 bne $395c0b BNE loop -.395c19 a9 00 lda #$00 LDA #0 ; Clear the time out -.395c1b 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT -.395c1f 28 plp PLP -.395c20 2b pld PLD -.395c21 38 sec SEC -.395c22 60 rts RTS -.395c23 28 plp time_out PLP -.395c24 2b pld PLD -.395c25 18 clc CLC -.395c26 60 rts RTS -.395c27 FDC_CAN_WRITE -.395c27 0b phd PHD -.395c28 08 php PHP -.395c29 48 pha PHA ; begin setdp macro -.395c2a 08 php PHP -.395c2b c2 20 rep #$20 REP #$20 ; set A long -.395c2d a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.395c30 5b tcd TCD -.395c31 28 plp PLP -.395c32 68 pla PLA ; end setdp macro -.395c33 e2 20 sep #$20 SEP #$20 ; set A short -.395c35 a9 1e lda #$1e LDA #FDC_WAIT_TIME ; Set a time out for the loop -.395c37 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT -.395c3b a5 2c lda $032c loop LDA @b BIOS_FLAGS ; Check if there was a time out -.395c3d 30 14 bmi $395c53 BMI time_out ; If so: signal a time out -.395c3f af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR -.395c43 29 c0 and #$c0 AND #FDC_MSR_RQM | FDC_MSR_DIO -.395c45 c9 80 cmp #$80 CMP #FDC_MSR_RQM -.395c47 d0 f2 bne $395c3b BNE loop -.395c49 a9 00 lda #$00 LDA #0 ; Clear the time out -.395c4b 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT -.395c4f 28 plp PLP -.395c50 2b pld PLD -.395c51 38 sec SEC -.395c52 60 rts RTS -.395c53 28 plp time_out PLP -.395c54 2b pld PLD -.395c55 18 clc CLC -.395c56 60 rts RTS -.395c57 FDC_DELAY_10MS -.395c57 da phx PHX -.395c58 08 php PHP -.395c59 c2 10 rep #$10 REP #$10 ; set X long -.395c5b a2 80 3e ldx #$3e80 LDX #16000 ; Wait for around 10ms -.395c5e ea nop loop NOP ; Each iteration should take 9 cycles -.395c5f ca dex DEX -.395c60 e0 00 00 cpx #$0000 CPX #0 -.395c63 d0 f9 bne $395c5e BNE loop -.395c65 28 plp PLP -.395c66 fa plx PLX -.395c67 6b rtl RTL -.395c68 FDC_COMMAND -.395c68 da phx PHX -.395c69 8b phb PHB -.395c6a 0b phd PHD -.395c6b 08 php PHP -.395c6c 48 pha PHA ; begin setdbr macro -.395c6d 08 php PHP -.395c6e e2 20 sep #$20 SEP #$20 ; set A short -.395c70 a9 00 lda #$00 LDA #0 -.395c72 48 pha PHA -.395c73 ab plb PLB -.395c74 28 plp PLP -.395c75 68 pla PLA ; end setdbr macro -.395c76 48 pha PHA ; begin setdp macro -.395c77 08 php PHP -.395c78 c2 20 rep #$20 REP #$20 ; set A long -.395c7a a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.395c7d 5b tcd TCD -.395c7e 28 plp PLP -.395c7f 68 pla PLA ; end setdp macro -.395c80 22 57 5c 39 jsl $395c57 JSL FDC_DELAY_10MS ; Wait around 10ms -.395c84 e2 30 sep #$30 SEP #$30 ; set A&X short -.395c86 a2 00 ldx #$00 LDX #0 -.395c88 a9 00 lda #$00 LDA #0 -.395c8a 9d 10 05 sta $0510,x clr_results STA FDC_RESULTS,X ; Clear the result buffer -.395c8d e8 inx INX -.395c8e e0 10 cpx #$10 CPX #16 -.395c90 d0 f8 bne $395c8a BNE clr_results -.395c92 af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR ; Validate we can send a command -.395c96 29 c0 and #$c0 AND #FDC_MSR_RQM | FDC_MSR_DIO -.395c98 c9 80 cmp #$80 CMP #FDC_MSR_RQM -.395c9a f0 04 beq $395ca0 BEQ start_send ; If so, start sending -.395c9c 22 b5 5d 39 jsl $395db5 fdc_reset JSL FDC_INIT ; Reset the FDC -.395ca0 start_send -.395ca0 e2 10 sep #$10 SEP #$10 ; set X short -.395ca2 a2 00 ldx #$00 LDX #0 -.395ca4 20 6d 5b jsr $395b6d send_loop JSR FDC_Check_RQM ; Wait until we can write -.395ca7 b0 03 bcs $395cac BCS send_param -.395ca9 82 5e 00 brl $395d0a BRL time_out ; If there was a timeout, flag the time out -.395cac bd 00 05 lda $0500,x send_param LDA FDC_PARAMETERS,X ; Get the parameter/command byte to write -.395caf 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA ; Send it -.395cb3 22 57 5c 39 jsl $395c57 JSL FDC_DELAY_10MS ; Wait around 10ms for things to settle -.395cb7 e8 inx INX ; Advance to the next byte -.395cb8 ec 30 05 cpx $0530 CPX FDC_PARAM_NUM -.395cbb d0 e7 bne $395ca4 BNE send_loop ; Keep sending until we've sent them all -.395cbd ad 33 05 lda $0533 LDA FDC_EXPECT_DAT ; Check the data expectation byte -.395cc0 d0 03 bne $395cc5 BNE chk_data_dir -.395cc2 82 80 00 brl $395d45 BRL result_phase ; If 0: we just want a result -.395cc5 10 3c bpl $395d03 chk_data_dir BPL rd_data ; If >0: we want to read data -.395cc7 wr_data -.395cc7 a5 0b lda $030b wr_data_rdy LDA FDC_STATUS ; Check that the motor is still spinning -.395cc9 30 03 bmi $395cce BMI wr_chk_rqm -.395ccb 82 3c 00 brl $395d0a BRL time_out ; If not, raise an error -.395cce af f4 13 af lda $af13f4 wr_chk_rqm LDA @l SIO_FDC_MSR ; Wait for ready to write -.395cd2 89 80 bit #$80 BIT #FDC_MSR_RQM -.395cd4 f0 f1 beq $395cc7 BEQ wr_data_rdy -.395cd6 89 20 bit #$20 BIT #FDC_MSR_NONDMA ; Check if in execution mode -.395cd8 d0 03 bne $395cdd BNE wr_data_phase ; If so: transfer the data -.395cda 82 68 00 brl $395d45 BRL result_phase ; If not: it's an error -.395cdd wr_data_phase -.395cdd c2 10 rep #$10 REP #$10 ; set X long -.395cdf a0 00 00 ldy #$0000 LDY #0 -.395ce2 a5 0b lda $030b wr_data_loop LDA FDC_STATUS ; Check that the motor is still spinning -.395ce4 30 03 bmi $395ce9 BMI wr_chk_nondma -.395ce6 82 21 00 brl $395d0a BRL time_out ; If not, raise an error -.395ce9 af f4 13 af lda $af13f4 wr_chk_nondma LDA @l SIO_FDC_MSR ; Check to see if the FDC is in execution phase -.395ced 89 20 bit #$20 BIT #FDC_MSR_NONDMA -.395cef f0 54 beq $395d45 BEQ result_phase ; If not: break out to result phase -.395cf1 89 80 bit #$80 BIT #FDC_MSR_RQM ; Check if we can read data -.395cf3 f0 ed beq $395ce2 BEQ wr_data_loop ; No: keep waiting -.395cf5 b7 26 lda [$0326],y LDA [BIOS_BUFF_PTR],Y ; Get the data byte -.395cf7 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA ; And save it to the buffer -.395cfb c8 iny INY ; Move to the next position -.395cfc c0 00 02 cpy #$0200 CPY #512 ; TODO: set this from the parameters? -.395cff d0 e1 bne $395ce2 BNE wr_data_loop ; If not at the end, keep fetching -.395d01 80 42 bra $395d45 BRA result_phase ; ready for the result phase -.395d03 20 f7 5b jsr $395bf7 rd_data JSR FDC_Can_Read_Data -.395d06 a5 0b lda $030b rd_data_rdy LDA FDC_STATUS ; Check that the motor is still spinning -.395d08 30 07 bmi $395d11 BMI chk_rd_rdy ; If so, check to see if the data is ready -.395d0a time_out -.395d0a e2 20 sep #$20 SEP #$20 ; set A short -.395d0c a9 8c lda #$8c LDA #BIOS_ERR_TIMEOUT ; Otherwise: throw a BIOS_ERR_TIMEOUT error -.395d0e 82 9c 00 brl $395dad BRL pass_error -.395d11 af f4 13 af lda $af13f4 chk_rd_rdy LDA @l SIO_FDC_MSR ; Wait for data to be ready -.395d15 29 c0 and #$c0 AND #FDC_MSR_RQM | FDC_MSR_DIO -.395d17 c9 c0 cmp #$c0 CMP #FDC_MSR_RQM | FDC_MSR_DIO -.395d19 d0 eb bne $395d06 BNE rd_data_rdy -.395d1b af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR ; Check to see if the FDC is in execution phase -.395d1f 89 20 bit #$20 BIT #FDC_MSR_NONDMA -.395d21 d0 03 bne $395d26 BNE rd_data_phase ; If so: transfer the data -.395d23 82 83 00 brl $395da9 BRL error ; If not: it's an error -.395d26 rd_data_phase -.395d26 c2 10 rep #$10 REP #$10 ; set X long -.395d28 a0 00 00 ldy #$0000 LDY #0 -.395d2b a5 0b lda $030b rd_data_loop LDA FDC_STATUS ; Check that the motor is still spinning -.395d2d 10 db bpl $395d0a BPL time_out ; If not: throw a timeout error -.395d2f af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR ; Wait for the next byte to be ready -.395d33 29 c0 and #$c0 AND #FDC_MSR_RQM | FDC_MSR_DIO -.395d35 c9 c0 cmp #$c0 CMP #FDC_MSR_RQM | FDC_MSR_DIO -.395d37 d0 f2 bne $395d2b BNE rd_data_loop -.395d39 af f5 13 af lda $af13f5 LDA @l SIO_FDC_DTA ; Get the data byte -.395d3d 97 26 sta [$0326],y STA [BIOS_BUFF_PTR],Y ; And save it to the buffer -.395d3f c8 iny INY ; Move to the next position -.395d40 c0 00 02 cpy #$0200 CPY #512 ; TODO: set this from the parameters? -.395d43 d0 e6 bne $395d2b BNE rd_data_loop ; If not at the end, keep fetching -.395d45 ad 32 05 lda $0532 result_phase LDA FDC_RESULT_NUM ; If no results are expected... -.395d48 f0 34 beq $395d7e BEQ chk_busy ; Then we're done -.395d4a e2 10 sep #$10 SEP #$10 ; set X short -.395d4c a2 00 ldx #$00 LDX #0 -.395d4e a9 1e lda #$1e LDA #FDC_WAIT_TIME ; Set the watchdog timer -.395d50 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT -.395d54 20 f7 5b jsr $395bf7 result_loop JSR FDC_Can_Read_Data ; Wait until we can read -.395d57 90 b1 bcc $395d0a BCC time_out ; If there was a time out, raise an error -.395d59 af f5 13 af lda $af13f5 LDA @l SIO_FDC_DTA ; Yes: get the data -.395d5d 20 f7 5b jsr $395bf7 JSR FDC_Can_Read_Data ; Wait until we can read -.395d60 90 a8 bcc $395d0a BCC time_out ; If there was a time out, raise an error -.395d62 af f5 13 af lda $af13f5 read_result LDA @l SIO_FDC_DTA ; Yes: get the data -.395d66 9d 10 05 sta $0510,x STA FDC_RESULTS,X ; Save it to the result buffer -.395d69 20 6d 5b jsr $395b6d JSR FDC_Check_RQM -.395d6c 90 9c bcc $395d0a BCC time_out ; If there was a time out, flag the error -.395d6e af f4 13 af lda $af13f4 rd_chk_1 LDA @l SIO_FDC_MSR -.395d72 29 50 and #$50 AND #FDC_MSR_DIO | FDC_MSR_CMDBSY -.395d74 c9 50 cmp #$50 CMP #FDC_MSR_DIO | FDC_MSR_CMDBSY -.395d76 d0 06 bne $395d7e BNE chk_busy -.395d78 e8 inx INX ; Move to the next result positions -.395d79 ec 32 05 cpx $0532 CPX FDC_RESULT_NUM -.395d7c d0 e4 bne $395d62 BNE read_result ; And keep looping until we've read all -.395d7e chk_busy -.395d7e c2 10 rep #$10 REP #$10 ; set X long -.395d80 a2 0a 00 ldx #$000a LDX #10 ; Wait 10ms (I guess?) -.395d83 22 e7 0f 39 jsl $390fe7 JSL ILOOP_MS -.395d87 af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR ; Check the command busy bit -.395d8b 89 10 bit #$10 BIT #FDC_MSR_CMDBSY -.395d8d f0 12 beq $395da1 BEQ done ; If not set: we're done -.395d8f 20 f7 5b jsr $395bf7 JSR FDC_Can_Read_Data ; Wait until we can read -.395d92 b0 03 bcs $395d97 BCS get_result_byte -.395d94 82 73 ff brl $395d0a BRL time_out ; If there was a time out, flag the error -.395d97 af f5 13 af lda $af13f5 get_result_byte LDA @l SIO_FDC_DTA ; Read the data -.395d9b 9d 10 05 sta $0510,x STA FDC_RESULTS,X -.395d9e e8 inx INX -.395d9f 80 dd bra $395d7e BRA chk_busy ; And keep checking -.395da1 done -.395da1 64 20 stz $0320 STZ BIOS_STATUS -.395da3 28 plp PLP -.395da4 2b pld PLD -.395da5 ab plb PLB -.395da6 fa plx PLX -.395da7 38 sec SEC -.395da8 6b rtl RTL -.395da9 error -.395da9 e2 20 sep #$20 SEP #$20 ; set A short -.395dab a9 85 lda #$85 LDA #BIOS_ERR_CMD -.395dad 85 20 sta $0320 pass_error STA BIOS_STATUS -.395daf 28 plp PLP -.395db0 2b pld PLD -.395db1 ab plb PLB -.395db2 fa plx PLX -.395db3 18 clc CLC -.395db4 6b rtl RTL -.395db5 FDC_Init -.395db5 08 php PHP -.395db6 c2 10 rep #$10 REP #$10 ; set X long -.395db8 e2 20 sep #$20 SEP #$20 ; set A short -.395dba a9 00 lda #$00 LDA #0 -.395dbc 8f f2 13 af sta $af13f2 STA @l SIO_FDC_DOR -.395dc0 a2 e8 03 ldx #$03e8 LDX #1000 ; Wait -.395dc3 a0 00 00 ldy #$0000 LDY #0 -.395dc6 22 f4 0f 39 jsl $390ff4 JSL IDELAY -.395dca a9 04 lda #$04 LDA #FDC_DOR_NRESET ; Reset the FDC -.395dcc 8f f2 13 af sta $af13f2 STA @l SIO_FDC_DOR -.395dd0 ea nop NOP -.395dd1 ea nop NOP -.395dd2 ea nop NOP -.395dd3 ea nop NOP -.395dd4 a9 00 lda #$00 LDA #$00 ; Make sure the Speed and Compensation has been set -.395dd6 8f f4 13 af sta $af13f4 STA @l SIO_FDC_DSR -.395dda a9 00 lda #$00 LDA #$00 ; Precompensation set to 0 -.395ddc 8f f7 13 af sta $af13f7 STA @l SIO_FDC_CCR -.395de0 a2 8f c5 ldx #$c58f LDX #<>FDC_SEEK_TIME -.395de3 a0 20 00 ldy #$0020 LDY #`FDC_SEEK_TIME -.395de6 22 f4 0f 39 jsl $390ff4 JSL IDELAY -.395dea 22 c5 5e 39 jsl $395ec5 JSL FDC_Sense_Int_Status -.395dee 90 25 bcc $395e15 BCC pass_failure -.395df0 22 c5 5e 39 jsl $395ec5 JSL FDC_Sense_Int_Status -.395df4 90 1f bcc $395e15 BCC pass_failure -.395df6 22 c5 5e 39 jsl $395ec5 JSL FDC_Sense_Int_Status -.395dfa 90 19 bcc $395e15 BCC pass_failure -.395dfc 22 c5 5e 39 jsl $395ec5 JSL FDC_Sense_Int_Status -.395e00 90 13 bcc $395e15 BCC pass_failure -.395e02 22 87 5f 39 jsl $395f87 JSL FDC_Configure_Command -.395e06 90 0d bcc $395e15 BCC pass_failure -.395e08 22 2e 5f 39 jsl $395f2e JSL FDC_Specify_Command -.395e0c 90 07 bcc $395e15 BCC pass_failure -.395e0e 22 31 5e 39 jsl $395e31 JSL FDC_Motor_On -.395e12 28 plp PLP -.395e13 38 sec SEC -.395e14 6b rtl RTL -.395e15 28 plp pass_failure PLP -.395e16 18 clc CLC -.395e17 6b rtl RTL -.395e18 FDC_MOTOR_NEEDED -.395e18 08 php PHP -.395e19 c2 20 rep #$20 REP #$20 ; set A long -.395e1b 78 sei SEI ; Turn off interrupts -.395e1c a9 84 03 lda #$0384 LDA #FDC_MOTOR_ON_TIME ; Reset the FDC timeout clock -.395e1f 8f 4e a0 38 sta $38a04e STA @l FDC_MOTOR_TIMER -.395e23 e2 20 sep #$20 SEP #$20 ; set A short -.395e25 af 4c 01 00 lda $00014c LDA @l INT_MASK_REG0 -.395e29 29 fe and #$fe AND #~FNX0_INT00_SOF ; Enable the SOF interrupt -.395e2b 8f 4c 01 00 sta $00014c STA @l INT_MASK_REG0 -.395e2f 28 plp PLP -.395e30 6b rtl RTL -.395e31 FDC_Motor_On -.395e31 08 php PHP -.395e32 22 18 5e 39 jsl $395e18 JSL FDC_MOTOR_NEEDED ; Reset the spindle motor timeout clock +.395b03 FDC_Check_RQM +.395b03 0b phd PHD +.395b04 08 php PHP +.395b05 48 pha PHA ; begin setdp macro +.395b06 08 php PHP +.395b07 c2 20 rep #$20 REP #$20 ; set A long +.395b09 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.395b0c 5b tcd TCD +.395b0d 28 plp PLP +.395b0e 68 pla PLA ; end setdp macro +.395b0f e2 20 sep #$20 SEP #$20 ; set A short +.395b11 a9 1e lda #$1e LDA #FDC_WAIT_TIME ; Set a time out for the loop +.395b13 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT +.395b17 a5 2c lda $032c loop LDA @b BIOS_FLAGS ; Check if there was a time out +.395b19 30 12 bmi $395b2d BMI time_out ; If so: signal a time out +.395b1b af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR +.395b1f 89 80 bit #$80 BIT #FDC_MSR_RQM +.395b21 f0 f4 beq $395b17 BEQ loop +.395b23 a9 00 lda #$00 LDA #0 ; Clear the time out +.395b25 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT +.395b29 28 plp PLP +.395b2a 2b pld PLD +.395b2b 38 sec SEC +.395b2c 60 rts RTS +.395b2d 28 plp time_out PLP +.395b2e 2b pld PLD +.395b2f 18 clc CLC +.395b30 60 rts RTS +.395b31 FDC_Check_DRV0_BSY +.395b31 0b phd PHD +.395b32 08 php PHP +.395b33 48 pha PHA ; begin setdp macro +.395b34 08 php PHP +.395b35 c2 20 rep #$20 REP #$20 ; set A long +.395b37 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.395b3a 5b tcd TCD +.395b3b 28 plp PLP +.395b3c 68 pla PLA ; end setdp macro +.395b3d e2 20 sep #$20 SEP #$20 ; set A short +.395b3f a9 1e lda #$1e LDA #FDC_WAIT_TIME ; Set a time out for the loop +.395b41 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT +.395b45 a5 2c lda $032c loop LDA @b BIOS_FLAGS ; Check if there was a time out +.395b47 30 12 bmi $395b5b BMI time_out ; If so: signal a time out +.395b49 af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR +.395b4d 89 01 bit #$01 BIT #FDC_MSR_DRV0BSY +.395b4f d0 f4 bne $395b45 BNE loop +.395b51 a9 00 lda #$00 LDA #0 ; Clear the time out +.395b53 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT +.395b57 28 plp PLP +.395b58 2b pld PLD +.395b59 38 sec SEC +.395b5a 60 rts RTS +.395b5b 28 plp time_out PLP +.395b5c 2b pld PLD +.395b5d 18 clc CLC +.395b5e 60 rts RTS +.395b5f FDC_Check_CMD_BSY +.395b5f 0b phd PHD +.395b60 08 php PHP +.395b61 48 pha PHA ; begin setdp macro +.395b62 08 php PHP +.395b63 c2 20 rep #$20 REP #$20 ; set A long +.395b65 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.395b68 5b tcd TCD +.395b69 28 plp PLP +.395b6a 68 pla PLA ; end setdp macro +.395b6b e2 20 sep #$20 SEP #$20 ; set A short +.395b6d a9 1e lda #$1e LDA #FDC_WAIT_TIME ; Set a time out for the loop +.395b6f 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT +.395b73 a5 2c lda $032c loop LDA @b BIOS_FLAGS ; Check if there was a time out +.395b75 30 12 bmi $395b89 BMI time_out ; If so: signal a time out +.395b77 af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR +.395b7b 89 10 bit #$10 BIT #FDC_MSR_CMDBSY +.395b7d d0 f4 bne $395b73 BNE loop +.395b7f a9 00 lda #$00 LDA #0 ; Clear the time out +.395b81 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT +.395b85 28 plp PLP +.395b86 2b pld PLD +.395b87 38 sec SEC +.395b88 60 rts RTS +.395b89 28 plp time_out PLP +.395b8a 2b pld PLD +.395b8b 18 clc CLC +.395b8c 60 rts RTS +.395b8d FDC_Can_Read_Data +.395b8d 0b phd PHD +.395b8e 08 php PHP +.395b8f 48 pha PHA ; begin setdp macro +.395b90 08 php PHP +.395b91 c2 20 rep #$20 REP #$20 ; set A long +.395b93 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.395b96 5b tcd TCD +.395b97 28 plp PLP +.395b98 68 pla PLA ; end setdp macro +.395b99 e2 20 sep #$20 SEP #$20 ; set A short +.395b9b a9 1e lda #$1e LDA #FDC_WAIT_TIME ; Set a time out for the loop +.395b9d 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT +.395ba1 a5 2c lda $032c loop LDA @b BIOS_FLAGS ; Check if there was a time out +.395ba3 30 14 bmi $395bb9 BMI time_out ; If so: signal a time out +.395ba5 af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR +.395ba9 29 40 and #$40 AND #FDC_MSR_DIO +.395bab c9 40 cmp #$40 CMP #FDC_MSR_DIO +.395bad d0 f2 bne $395ba1 BNE loop +.395baf a9 00 lda #$00 LDA #0 ; Clear the time out +.395bb1 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT +.395bb5 28 plp PLP +.395bb6 2b pld PLD +.395bb7 38 sec SEC +.395bb8 60 rts RTS +.395bb9 28 plp time_out PLP +.395bba 2b pld PLD +.395bbb 18 clc CLC +.395bbc 60 rts RTS +.395bbd FDC_CAN_WRITE +.395bbd 0b phd PHD +.395bbe 08 php PHP +.395bbf 48 pha PHA ; begin setdp macro +.395bc0 08 php PHP +.395bc1 c2 20 rep #$20 REP #$20 ; set A long +.395bc3 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.395bc6 5b tcd TCD +.395bc7 28 plp PLP +.395bc8 68 pla PLA ; end setdp macro +.395bc9 e2 20 sep #$20 SEP #$20 ; set A short +.395bcb a9 1e lda #$1e LDA #FDC_WAIT_TIME ; Set a time out for the loop +.395bcd 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT +.395bd1 a5 2c lda $032c loop LDA @b BIOS_FLAGS ; Check if there was a time out +.395bd3 30 14 bmi $395be9 BMI time_out ; If so: signal a time out +.395bd5 af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR +.395bd9 29 c0 and #$c0 AND #FDC_MSR_RQM | FDC_MSR_DIO +.395bdb c9 80 cmp #$80 CMP #FDC_MSR_RQM +.395bdd d0 f2 bne $395bd1 BNE loop +.395bdf a9 00 lda #$00 LDA #0 ; Clear the time out +.395be1 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT +.395be5 28 plp PLP +.395be6 2b pld PLD +.395be7 38 sec SEC +.395be8 60 rts RTS +.395be9 28 plp time_out PLP +.395bea 2b pld PLD +.395beb 18 clc CLC +.395bec 60 rts RTS +.395bed FDC_DELAY_10MS +.395bed da phx PHX +.395bee 08 php PHP +.395bef c2 10 rep #$10 REP #$10 ; set X long +.395bf1 a2 80 3e ldx #$3e80 LDX #16000 ; Wait for around 10ms +.395bf4 ea nop loop NOP ; Each iteration should take 9 cycles +.395bf5 ca dex DEX +.395bf6 e0 00 00 cpx #$0000 CPX #0 +.395bf9 d0 f9 bne $395bf4 BNE loop +.395bfb 28 plp PLP +.395bfc fa plx PLX +.395bfd 6b rtl RTL +.395bfe FDC_COMMAND +.395bfe da phx PHX +.395bff 8b phb PHB +.395c00 0b phd PHD +.395c01 08 php PHP +.395c02 48 pha PHA ; begin setdbr macro +.395c03 08 php PHP +.395c04 e2 20 sep #$20 SEP #$20 ; set A short +.395c06 a9 00 lda #$00 LDA #0 +.395c08 48 pha PHA +.395c09 ab plb PLB +.395c0a 28 plp PLP +.395c0b 68 pla PLA ; end setdbr macro +.395c0c 48 pha PHA ; begin setdp macro +.395c0d 08 php PHP +.395c0e c2 20 rep #$20 REP #$20 ; set A long +.395c10 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.395c13 5b tcd TCD +.395c14 28 plp PLP +.395c15 68 pla PLA ; end setdp macro +.395c16 22 ed 5b 39 jsl $395bed JSL FDC_DELAY_10MS ; Wait around 10ms +.395c1a e2 30 sep #$30 SEP #$30 ; set A&X short +.395c1c a2 00 ldx #$00 LDX #0 +.395c1e a9 00 lda #$00 LDA #0 +.395c20 9d 10 05 sta $0510,x clr_results STA FDC_RESULTS,X ; Clear the result buffer +.395c23 e8 inx INX +.395c24 e0 10 cpx #$10 CPX #16 +.395c26 d0 f8 bne $395c20 BNE clr_results +.395c28 af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR ; Validate we can send a command +.395c2c 29 c0 and #$c0 AND #FDC_MSR_RQM | FDC_MSR_DIO +.395c2e c9 80 cmp #$80 CMP #FDC_MSR_RQM +.395c30 f0 04 beq $395c36 BEQ start_send ; If so, start sending +.395c32 22 4b 5d 39 jsl $395d4b fdc_reset JSL FDC_INIT ; Reset the FDC +.395c36 start_send +.395c36 e2 10 sep #$10 SEP #$10 ; set X short +.395c38 a2 00 ldx #$00 LDX #0 +.395c3a 20 03 5b jsr $395b03 send_loop JSR FDC_Check_RQM ; Wait until we can write +.395c3d b0 03 bcs $395c42 BCS send_param +.395c3f 82 5e 00 brl $395ca0 BRL time_out ; If there was a timeout, flag the time out +.395c42 bd 00 05 lda $0500,x send_param LDA FDC_PARAMETERS,X ; Get the parameter/command byte to write +.395c45 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA ; Send it +.395c49 22 ed 5b 39 jsl $395bed JSL FDC_DELAY_10MS ; Wait around 10ms for things to settle +.395c4d e8 inx INX ; Advance to the next byte +.395c4e ec 30 05 cpx $0530 CPX FDC_PARAM_NUM +.395c51 d0 e7 bne $395c3a BNE send_loop ; Keep sending until we've sent them all +.395c53 ad 33 05 lda $0533 LDA FDC_EXPECT_DAT ; Check the data expectation byte +.395c56 d0 03 bne $395c5b BNE chk_data_dir +.395c58 82 80 00 brl $395cdb BRL result_phase ; If 0: we just want a result +.395c5b 10 3c bpl $395c99 chk_data_dir BPL rd_data ; If >0: we want to read data +.395c5d wr_data +.395c5d a5 0b lda $030b wr_data_rdy LDA FDC_STATUS ; Check that the motor is still spinning +.395c5f 30 03 bmi $395c64 BMI wr_chk_rqm +.395c61 82 3c 00 brl $395ca0 BRL time_out ; If not, raise an error +.395c64 af f4 13 af lda $af13f4 wr_chk_rqm LDA @l SIO_FDC_MSR ; Wait for ready to write +.395c68 89 80 bit #$80 BIT #FDC_MSR_RQM +.395c6a f0 f1 beq $395c5d BEQ wr_data_rdy +.395c6c 89 20 bit #$20 BIT #FDC_MSR_NONDMA ; Check if in execution mode +.395c6e d0 03 bne $395c73 BNE wr_data_phase ; If so: transfer the data +.395c70 82 68 00 brl $395cdb BRL result_phase ; If not: it's an error +.395c73 wr_data_phase +.395c73 c2 10 rep #$10 REP #$10 ; set X long +.395c75 a0 00 00 ldy #$0000 LDY #0 +.395c78 a5 0b lda $030b wr_data_loop LDA FDC_STATUS ; Check that the motor is still spinning +.395c7a 30 03 bmi $395c7f BMI wr_chk_nondma +.395c7c 82 21 00 brl $395ca0 BRL time_out ; If not, raise an error +.395c7f af f4 13 af lda $af13f4 wr_chk_nondma LDA @l SIO_FDC_MSR ; Check to see if the FDC is in execution phase +.395c83 89 20 bit #$20 BIT #FDC_MSR_NONDMA +.395c85 f0 54 beq $395cdb BEQ result_phase ; If not: break out to result phase +.395c87 89 80 bit #$80 BIT #FDC_MSR_RQM ; Check if we can read data +.395c89 f0 ed beq $395c78 BEQ wr_data_loop ; No: keep waiting +.395c8b b7 26 lda [$0326],y LDA [BIOS_BUFF_PTR],Y ; Get the data byte +.395c8d 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA ; And save it to the buffer +.395c91 c8 iny INY ; Move to the next position +.395c92 c0 00 02 cpy #$0200 CPY #512 ; TODO: set this from the parameters? +.395c95 d0 e1 bne $395c78 BNE wr_data_loop ; If not at the end, keep fetching +.395c97 80 42 bra $395cdb BRA result_phase ; ready for the result phase +.395c99 20 8d 5b jsr $395b8d rd_data JSR FDC_Can_Read_Data +.395c9c a5 0b lda $030b rd_data_rdy LDA FDC_STATUS ; Check that the motor is still spinning +.395c9e 30 07 bmi $395ca7 BMI chk_rd_rdy ; If so, check to see if the data is ready +.395ca0 time_out +.395ca0 e2 20 sep #$20 SEP #$20 ; set A short +.395ca2 a9 8c lda #$8c LDA #BIOS_ERR_TIMEOUT ; Otherwise: throw a BIOS_ERR_TIMEOUT error +.395ca4 82 9c 00 brl $395d43 BRL pass_error +.395ca7 af f4 13 af lda $af13f4 chk_rd_rdy LDA @l SIO_FDC_MSR ; Wait for data to be ready +.395cab 29 c0 and #$c0 AND #FDC_MSR_RQM | FDC_MSR_DIO +.395cad c9 c0 cmp #$c0 CMP #FDC_MSR_RQM | FDC_MSR_DIO +.395caf d0 eb bne $395c9c BNE rd_data_rdy +.395cb1 af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR ; Check to see if the FDC is in execution phase +.395cb5 89 20 bit #$20 BIT #FDC_MSR_NONDMA +.395cb7 d0 03 bne $395cbc BNE rd_data_phase ; If so: transfer the data +.395cb9 82 83 00 brl $395d3f BRL error ; If not: it's an error +.395cbc rd_data_phase +.395cbc c2 10 rep #$10 REP #$10 ; set X long +.395cbe a0 00 00 ldy #$0000 LDY #0 +.395cc1 a5 0b lda $030b rd_data_loop LDA FDC_STATUS ; Check that the motor is still spinning +.395cc3 10 db bpl $395ca0 BPL time_out ; If not: throw a timeout error +.395cc5 af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR ; Wait for the next byte to be ready +.395cc9 29 c0 and #$c0 AND #FDC_MSR_RQM | FDC_MSR_DIO +.395ccb c9 c0 cmp #$c0 CMP #FDC_MSR_RQM | FDC_MSR_DIO +.395ccd d0 f2 bne $395cc1 BNE rd_data_loop +.395ccf af f5 13 af lda $af13f5 LDA @l SIO_FDC_DTA ; Get the data byte +.395cd3 97 26 sta [$0326],y STA [BIOS_BUFF_PTR],Y ; And save it to the buffer +.395cd5 c8 iny INY ; Move to the next position +.395cd6 c0 00 02 cpy #$0200 CPY #512 ; TODO: set this from the parameters? +.395cd9 d0 e6 bne $395cc1 BNE rd_data_loop ; If not at the end, keep fetching +.395cdb ad 32 05 lda $0532 result_phase LDA FDC_RESULT_NUM ; If no results are expected... +.395cde f0 34 beq $395d14 BEQ chk_busy ; Then we're done +.395ce0 e2 10 sep #$10 SEP #$10 ; set X short +.395ce2 a2 00 ldx #$00 LDX #0 +.395ce4 a9 1e lda #$1e LDA #FDC_WAIT_TIME ; Set the watchdog timer +.395ce6 22 e6 3a 39 jsl $393ae6 JSL ISETTIMEOUT +.395cea 20 8d 5b jsr $395b8d result_loop JSR FDC_Can_Read_Data ; Wait until we can read +.395ced 90 b1 bcc $395ca0 BCC time_out ; If there was a time out, raise an error +.395cef af f5 13 af lda $af13f5 LDA @l SIO_FDC_DTA ; Yes: get the data +.395cf3 20 8d 5b jsr $395b8d JSR FDC_Can_Read_Data ; Wait until we can read +.395cf6 90 a8 bcc $395ca0 BCC time_out ; If there was a time out, raise an error +.395cf8 af f5 13 af lda $af13f5 read_result LDA @l SIO_FDC_DTA ; Yes: get the data +.395cfc 9d 10 05 sta $0510,x STA FDC_RESULTS,X ; Save it to the result buffer +.395cff 20 03 5b jsr $395b03 JSR FDC_Check_RQM +.395d02 90 9c bcc $395ca0 BCC time_out ; If there was a time out, flag the error +.395d04 af f4 13 af lda $af13f4 rd_chk_1 LDA @l SIO_FDC_MSR +.395d08 29 50 and #$50 AND #FDC_MSR_DIO | FDC_MSR_CMDBSY +.395d0a c9 50 cmp #$50 CMP #FDC_MSR_DIO | FDC_MSR_CMDBSY +.395d0c d0 06 bne $395d14 BNE chk_busy +.395d0e e8 inx INX ; Move to the next result positions +.395d0f ec 32 05 cpx $0532 CPX FDC_RESULT_NUM +.395d12 d0 e4 bne $395cf8 BNE read_result ; And keep looping until we've read all +.395d14 chk_busy +.395d14 c2 10 rep #$10 REP #$10 ; set X long +.395d16 a2 0a 00 ldx #$000a LDX #10 ; Wait 10ms (I guess?) +.395d19 22 e7 0f 39 jsl $390fe7 JSL ILOOP_MS +.395d1d af f4 13 af lda $af13f4 LDA @l SIO_FDC_MSR ; Check the command busy bit +.395d21 89 10 bit #$10 BIT #FDC_MSR_CMDBSY +.395d23 f0 12 beq $395d37 BEQ done ; If not set: we're done +.395d25 20 8d 5b jsr $395b8d JSR FDC_Can_Read_Data ; Wait until we can read +.395d28 b0 03 bcs $395d2d BCS get_result_byte +.395d2a 82 73 ff brl $395ca0 BRL time_out ; If there was a time out, flag the error +.395d2d af f5 13 af lda $af13f5 get_result_byte LDA @l SIO_FDC_DTA ; Read the data +.395d31 9d 10 05 sta $0510,x STA FDC_RESULTS,X +.395d34 e8 inx INX +.395d35 80 dd bra $395d14 BRA chk_busy ; And keep checking +.395d37 done +.395d37 64 20 stz $0320 STZ BIOS_STATUS +.395d39 28 plp PLP +.395d3a 2b pld PLD +.395d3b ab plb PLB +.395d3c fa plx PLX +.395d3d 38 sec SEC +.395d3e 6b rtl RTL +.395d3f error +.395d3f e2 20 sep #$20 SEP #$20 ; set A short +.395d41 a9 85 lda #$85 LDA #BIOS_ERR_CMD +.395d43 85 20 sta $0320 pass_error STA BIOS_STATUS +.395d45 28 plp PLP +.395d46 2b pld PLD +.395d47 ab plb PLB +.395d48 fa plx PLX +.395d49 18 clc CLC +.395d4a 6b rtl RTL +.395d4b FDC_Init +.395d4b 08 php PHP +.395d4c c2 10 rep #$10 REP #$10 ; set X long +.395d4e e2 20 sep #$20 SEP #$20 ; set A short +.395d50 a9 00 lda #$00 LDA #0 +.395d52 8f f2 13 af sta $af13f2 STA @l SIO_FDC_DOR +.395d56 a2 e8 03 ldx #$03e8 LDX #1000 ; Wait +.395d59 a0 00 00 ldy #$0000 LDY #0 +.395d5c 22 f4 0f 39 jsl $390ff4 JSL IDELAY +.395d60 a9 04 lda #$04 LDA #FDC_DOR_NRESET ; Reset the FDC +.395d62 8f f2 13 af sta $af13f2 STA @l SIO_FDC_DOR +.395d66 ea nop NOP +.395d67 ea nop NOP +.395d68 ea nop NOP +.395d69 ea nop NOP +.395d6a a9 00 lda #$00 LDA #$00 ; Make sure the Speed and Compensation has been set +.395d6c 8f f4 13 af sta $af13f4 STA @l SIO_FDC_DSR +.395d70 a9 00 lda #$00 LDA #$00 ; Precompensation set to 0 +.395d72 8f f8 13 af sta $af13f8 STA @l SIO_FDC_CCR +.395d76 a2 8f c5 ldx #$c58f LDX #<>FDC_SEEK_TIME +.395d79 a0 20 00 ldy #$0020 LDY #`FDC_SEEK_TIME +.395d7c 22 f4 0f 39 jsl $390ff4 JSL IDELAY +.395d80 22 5b 5e 39 jsl $395e5b JSL FDC_Sense_Int_Status +.395d84 90 25 bcc $395dab BCC pass_failure +.395d86 22 5b 5e 39 jsl $395e5b JSL FDC_Sense_Int_Status +.395d8a 90 1f bcc $395dab BCC pass_failure +.395d8c 22 5b 5e 39 jsl $395e5b JSL FDC_Sense_Int_Status +.395d90 90 19 bcc $395dab BCC pass_failure +.395d92 22 5b 5e 39 jsl $395e5b JSL FDC_Sense_Int_Status +.395d96 90 13 bcc $395dab BCC pass_failure +.395d98 22 1d 5f 39 jsl $395f1d JSL FDC_Configure_Command +.395d9c 90 0d bcc $395dab BCC pass_failure +.395d9e 22 c4 5e 39 jsl $395ec4 JSL FDC_Specify_Command +.395da2 90 07 bcc $395dab BCC pass_failure +.395da4 22 c7 5d 39 jsl $395dc7 JSL FDC_Motor_On +.395da8 28 plp PLP +.395da9 38 sec SEC +.395daa 6b rtl RTL +.395dab 28 plp pass_failure PLP +.395dac 18 clc CLC +.395dad 6b rtl RTL +.395dae FDC_MOTOR_NEEDED +.395dae 08 php PHP +.395daf c2 20 rep #$20 REP #$20 ; set A long +.395db1 78 sei SEI ; Turn off interrupts +.395db2 a9 84 03 lda #$0384 LDA #FDC_MOTOR_ON_TIME ; Reset the FDC timeout clock +.395db5 8f 4e a0 38 sta $38a04e STA @l FDC_MOTOR_TIMER +.395db9 e2 20 sep #$20 SEP #$20 ; set A short +.395dbb af 4c 01 00 lda $00014c LDA @l INT_MASK_REG0 +.395dbf 29 fe and #$fe AND #~FNX0_INT00_SOF ; Enable the SOF interrupt +.395dc1 8f 4c 01 00 sta $00014c STA @l INT_MASK_REG0 +.395dc5 28 plp PLP +.395dc6 6b rtl RTL +.395dc7 FDC_Motor_On +.395dc7 08 php PHP +.395dc8 22 ae 5d 39 jsl $395dae JSL FDC_MOTOR_NEEDED ; Reset the spindle motor timeout clock +.395dcc e2 20 sep #$20 SEP #$20 ; set A short +.395dce af f2 13 af lda $af13f2 LDA @l SIO_FDC_DOR ; Check to see if the motor is already on +.395dd2 89 10 bit #$10 BIT #FDC_DOR_MOT0 +.395dd4 d0 1f bne $395df5 BNE done ; If so: skip +.395dd6 a9 14 lda #$14 LDA #FDC_DOR_MOT0 | FDC_DOR_NRESET +.395dd8 8f f2 13 af sta $af13f2 STA @l SIO_FDC_DOR +.395ddc 20 03 5b jsr $395b03 JSR FDC_Check_RQM ; Make sure we can leave knowing that everything set properly +.395ddf 90 17 bcc $395df8 BCC time_out +.395de1 a2 1e 8b ldx #$8b1e LDX #<>FDC_MOTOR_TIME ; Wait a suitable time for the motor to spin up +.395de4 a0 41 00 ldy #$0041 LDY #`FDC_MOTOR_TIME +.395de7 22 f4 0f 39 jsl $390ff4 JSL IDELAY +.395deb af 0b 03 00 lda $00030b LDA @l FDC_STATUS +.395def 09 80 ora #$80 ORA #$80 ; Flag that the motor should be on +.395df1 8f 0b 03 00 sta $00030b STA @l FDC_STATUS +.395df5 28 plp done PLP +.395df6 38 sec SEC +.395df7 6b rtl RTL +.395df8 28 plp time_out PLP ; Return a timeout error +.395df9 18 clc CLC +.395dfa 6b rtl RTL +.395dfb FDC_Motor_Off +.395dfb 08 php PHP +.395dfc e2 20 sep #$20 SEP #$20 ; set A short +.395dfe a9 04 lda #$04 LDA #FDC_DOR_NRESET +.395e00 8f f2 13 af sta $af13f2 STA @L SIO_FDC_DOR +.395e04 c2 20 rep #$20 REP #$20 ; set A long +.395e06 78 sei SEI ; Turn off interrupts +.395e07 a9 00 00 lda #$0000 LDA #0 ; Set FDC motor timeout counter to 0 to disable it +.395e0a 8f 4e a0 38 sta $38a04e STA @l FDC_MOTOR_TIMER +.395e0e e2 20 sep #$20 SEP #$20 ; set A short +.395e10 af 4c 01 00 lda $00014c LDA @l INT_MASK_REG0 +.395e14 09 01 ora #$01 ORA #FNX0_INT00_SOF ; Disable the SOF interrupt +.395e16 8f 4c 01 00 sta $00014c STA @l INT_MASK_REG0 +.395e1a af 0b 03 00 lda $00030b LDA @l FDC_STATUS +.395e1e 29 7f and #$7f AND #$7F ; Flag that the motor should be off +.395e20 8f 0b 03 00 sta $00030b STA @l FDC_STATUS +.395e24 28 plp PLP +.395e25 6b rtl RTL +.395e26 FDC_Recalibrate_Command +.395e26 0b phd PHD +.395e27 08 php PHP +.395e28 48 pha PHA ; begin setdp macro +.395e29 08 php PHP +.395e2a c2 20 rep #$20 REP #$20 ; set A long +.395e2c a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.395e2f 5b tcd TCD +.395e30 28 plp PLP +.395e31 68 pla PLA ; end setdp macro +.395e32 22 ae 5d 39 jsl $395dae JSL FDC_MOTOR_NEEDED ; Reset the spindle motor timeout clock .395e36 e2 20 sep #$20 SEP #$20 ; set A short -.395e38 af f2 13 af lda $af13f2 LDA @l SIO_FDC_DOR ; Check to see if the motor is already on -.395e3c 89 10 bit #$10 BIT #FDC_DOR_MOT0 -.395e3e d0 1f bne $395e5f BNE done ; If so: skip -.395e40 a9 14 lda #$14 LDA #FDC_DOR_MOT0 | FDC_DOR_NRESET -.395e42 8f f2 13 af sta $af13f2 STA @l SIO_FDC_DOR -.395e46 20 6d 5b jsr $395b6d JSR FDC_Check_RQM ; Make sure we can leave knowing that everything set properly -.395e49 90 17 bcc $395e62 BCC time_out -.395e4b a2 1e 8b ldx #$8b1e LDX #<>FDC_MOTOR_TIME ; Wait a suitable time for the motor to spin up -.395e4e a0 41 00 ldy #$0041 LDY #`FDC_MOTOR_TIME -.395e51 22 f4 0f 39 jsl $390ff4 JSL IDELAY -.395e55 af 0b 03 00 lda $00030b LDA @l FDC_STATUS -.395e59 09 80 ora #$80 ORA #$80 ; Flag that the motor should be on -.395e5b 8f 0b 03 00 sta $00030b STA @l FDC_STATUS -.395e5f 28 plp done PLP -.395e60 38 sec SEC -.395e61 6b rtl RTL -.395e62 28 plp time_out PLP ; Return a timeout error -.395e63 18 clc CLC -.395e64 6b rtl RTL -.395e65 FDC_Motor_Off -.395e65 08 php PHP -.395e66 e2 20 sep #$20 SEP #$20 ; set A short -.395e68 a9 04 lda #$04 LDA #FDC_DOR_NRESET -.395e6a 8f f2 13 af sta $af13f2 STA @L SIO_FDC_DOR -.395e6e c2 20 rep #$20 REP #$20 ; set A long -.395e70 78 sei SEI ; Turn off interrupts -.395e71 a9 00 00 lda #$0000 LDA #0 ; Set FDC motor timeout counter to 0 to disable it -.395e74 8f 4e a0 38 sta $38a04e STA @l FDC_MOTOR_TIMER -.395e78 e2 20 sep #$20 SEP #$20 ; set A short -.395e7a af 4c 01 00 lda $00014c LDA @l INT_MASK_REG0 -.395e7e 09 01 ora #$01 ORA #FNX0_INT00_SOF ; Disable the SOF interrupt -.395e80 8f 4c 01 00 sta $00014c STA @l INT_MASK_REG0 -.395e84 af 0b 03 00 lda $00030b LDA @l FDC_STATUS -.395e88 29 7f and #$7f AND #$7F ; Flag that the motor should be off -.395e8a 8f 0b 03 00 sta $00030b STA @l FDC_STATUS -.395e8e 28 plp PLP -.395e8f 6b rtl RTL -.395e90 FDC_Recalibrate_Command -.395e90 0b phd PHD -.395e91 08 php PHP -.395e92 48 pha PHA ; begin setdp macro -.395e93 08 php PHP -.395e94 c2 20 rep #$20 REP #$20 ; set A long -.395e96 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.395e99 5b tcd TCD -.395e9a 28 plp PLP -.395e9b 68 pla PLA ; end setdp macro -.395e9c 22 18 5e 39 jsl $395e18 JSL FDC_MOTOR_NEEDED ; Reset the spindle motor timeout clock -.395ea0 e2 20 sep #$20 SEP #$20 ; set A short -.395ea2 a9 07 lda #$07 LDA #FDC_CMD_RECALIBRATE ; RECALIBRATE Command -.395ea4 8d 00 05 sta $0500 STA FDC_PARAMETERS -.395ea7 a5 00 lda $0300 LDA FDC_DRIVE -.395ea9 8d 01 05 sta $0501 STA FDC_PARAMETERS+1 -.395eac a9 02 lda #$02 LDA #2 -.395eae 8d 30 05 sta $0530 STA FDC_PARAM_NUM ; 2 parameters -.395eb1 9c 33 05 stz $0533 STZ FDC_EXPECT_DAT ; 0 data -.395eb4 9c 32 05 stz $0532 STZ FDC_RESULT_NUM ; 0 results -.395eb7 22 68 5c 39 jsl $395c68 JSL FDC_COMMAND ; Issue the command -.395ebb 90 04 bcc $395ec1 BCC pass_failure ; If failure, pass the failure up -.395ebd 28 plp PLP -.395ebe 2b pld PLD -.395ebf 38 sec SEC -.395ec0 6b rtl RTL -.395ec1 28 plp pass_failure PLP -.395ec2 2b pld PLD -.395ec3 18 clc CLC -.395ec4 6b rtl RTL -.395ec5 FDC_Sense_Int_Status -.395ec5 8b phb PHB -.395ec6 0b phd PHD -.395ec7 08 php PHP -.395ec8 48 pha PHA ; begin setdbr macro -.395ec9 08 php PHP -.395eca e2 20 sep #$20 SEP #$20 ; set A short -.395ecc a9 00 lda #$00 LDA #0 -.395ece 48 pha PHA -.395ecf ab plb PLB -.395ed0 28 plp PLP -.395ed1 68 pla PLA ; end setdbr macro -.395ed2 48 pha PHA ; begin setdp macro -.395ed3 08 php PHP -.395ed4 c2 20 rep #$20 REP #$20 ; set A long -.395ed6 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.395ed9 5b tcd TCD -.395eda 28 plp PLP -.395edb 68 pla PLA ; end setdp macro -.395edc c2 30 rep #$30 REP #$30 ; set A&X long -.395ede a2 0a 00 ldx #$000a LDX #10 ; Wait for 10ms -.395ee1 22 e7 0f 39 jsl $390fe7 JSL ILOOP_MS -.395ee5 e2 20 sep #$20 SEP #$20 ; set A short -.395ee7 64 06 stz $0306 STZ FDC_ST0 ; Clear ST0 -.395ee9 a9 ff lda #$ff LDA #$FF -.395eeb 85 0a sta $030a STA FDC_PCN ; Set PCN to some obviously bad value -.395eed 20 c9 5b jsr $395bc9 JSR FDC_Check_CMD_BSY ; Check I can send a command -.395ef0 90 30 bcc $395f22 BCC time_out ; If there was a time out, raise an error -.395ef2 20 6d 5b jsr $395b6d JSR FDC_Check_RQM ; Check if I can transfer data -.395ef5 90 2b bcc $395f22 BCC time_out ; If there was a time out, raise an error -.395ef7 a9 08 lda #$08 LDA #FDC_CMD_SENSE_INTERRUPT -.395ef9 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA -.395efd 20 f7 5b jsr $395bf7 JSR FDC_Can_Read_Data -.395f00 90 20 bcc $395f22 BCC time_out ; If there was a time out, raise an error -.395f02 20 6d 5b jsr $395b6d JSR FDC_Check_RQM ; Check if I can transfer data -.395f05 90 1b bcc $395f22 BCC time_out ; If there was a time out, raise an error -.395f07 af f5 13 af lda $af13f5 LDA @l SIO_FDC_DTA -.395f0b 85 06 sta $0306 STA FDC_ST0 ; --- ST0 --- -.395f0d 20 6d 5b jsr $395b6d JSR FDC_Check_RQM ; Check if I can transfer data -.395f10 90 10 bcc $395f22 BCC time_out ; If there was a time out, raise an error -.395f12 af f5 13 af lda $af13f5 LDA @l SIO_FDC_DTA -.395f16 85 0a sta $030a STA FDC_PCN ; --- Cylinder --- -.395f18 e2 20 sep #$20 SEP #$20 ; set A short -.395f1a 9c 20 03 stz $0320 STZ @w BIOS_STATUS -.395f1d 28 plp PLP -.395f1e 2b pld PLD -.395f1f ab plb PLB -.395f20 38 sec SEC -.395f21 6b rtl RTL -.395f22 time_out +.395e38 a9 07 lda #$07 LDA #FDC_CMD_RECALIBRATE ; RECALIBRATE Command +.395e3a 8d 00 05 sta $0500 STA FDC_PARAMETERS +.395e3d a5 00 lda $0300 LDA FDC_DRIVE +.395e3f 8d 01 05 sta $0501 STA FDC_PARAMETERS+1 +.395e42 a9 02 lda #$02 LDA #2 +.395e44 8d 30 05 sta $0530 STA FDC_PARAM_NUM ; 2 parameters +.395e47 9c 33 05 stz $0533 STZ FDC_EXPECT_DAT ; 0 data +.395e4a 9c 32 05 stz $0532 STZ FDC_RESULT_NUM ; 0 results +.395e4d 22 fe 5b 39 jsl $395bfe JSL FDC_COMMAND ; Issue the command +.395e51 90 04 bcc $395e57 BCC pass_failure ; If failure, pass the failure up +.395e53 28 plp PLP +.395e54 2b pld PLD +.395e55 38 sec SEC +.395e56 6b rtl RTL +.395e57 28 plp pass_failure PLP +.395e58 2b pld PLD +.395e59 18 clc CLC +.395e5a 6b rtl RTL +.395e5b FDC_Sense_Int_Status +.395e5b 8b phb PHB +.395e5c 0b phd PHD +.395e5d 08 php PHP +.395e5e 48 pha PHA ; begin setdbr macro +.395e5f 08 php PHP +.395e60 e2 20 sep #$20 SEP #$20 ; set A short +.395e62 a9 00 lda #$00 LDA #0 +.395e64 48 pha PHA +.395e65 ab plb PLB +.395e66 28 plp PLP +.395e67 68 pla PLA ; end setdbr macro +.395e68 48 pha PHA ; begin setdp macro +.395e69 08 php PHP +.395e6a c2 20 rep #$20 REP #$20 ; set A long +.395e6c a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.395e6f 5b tcd TCD +.395e70 28 plp PLP +.395e71 68 pla PLA ; end setdp macro +.395e72 c2 30 rep #$30 REP #$30 ; set A&X long +.395e74 a2 0a 00 ldx #$000a LDX #10 ; Wait for 10ms +.395e77 22 e7 0f 39 jsl $390fe7 JSL ILOOP_MS +.395e7b e2 20 sep #$20 SEP #$20 ; set A short +.395e7d 64 06 stz $0306 STZ FDC_ST0 ; Clear ST0 +.395e7f a9 ff lda #$ff LDA #$FF +.395e81 85 0a sta $030a STA FDC_PCN ; Set PCN to some obviously bad value +.395e83 20 5f 5b jsr $395b5f JSR FDC_Check_CMD_BSY ; Check I can send a command +.395e86 90 30 bcc $395eb8 BCC time_out ; If there was a time out, raise an error +.395e88 20 03 5b jsr $395b03 JSR FDC_Check_RQM ; Check if I can transfer data +.395e8b 90 2b bcc $395eb8 BCC time_out ; If there was a time out, raise an error +.395e8d a9 08 lda #$08 LDA #FDC_CMD_SENSE_INTERRUPT +.395e8f 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA +.395e93 20 8d 5b jsr $395b8d JSR FDC_Can_Read_Data +.395e96 90 20 bcc $395eb8 BCC time_out ; If there was a time out, raise an error +.395e98 20 03 5b jsr $395b03 JSR FDC_Check_RQM ; Check if I can transfer data +.395e9b 90 1b bcc $395eb8 BCC time_out ; If there was a time out, raise an error +.395e9d af f5 13 af lda $af13f5 LDA @l SIO_FDC_DTA +.395ea1 85 06 sta $0306 STA FDC_ST0 ; --- ST0 --- +.395ea3 20 03 5b jsr $395b03 JSR FDC_Check_RQM ; Check if I can transfer data +.395ea6 90 10 bcc $395eb8 BCC time_out ; If there was a time out, raise an error +.395ea8 af f5 13 af lda $af13f5 LDA @l SIO_FDC_DTA +.395eac 85 0a sta $030a STA FDC_PCN ; --- Cylinder --- +.395eae e2 20 sep #$20 SEP #$20 ; set A short +.395eb0 9c 20 03 stz $0320 STZ @w BIOS_STATUS +.395eb3 28 plp PLP +.395eb4 2b pld PLD +.395eb5 ab plb PLB +.395eb6 38 sec SEC +.395eb7 6b rtl RTL +.395eb8 time_out +.395eb8 e2 20 sep #$20 SEP #$20 ; set A short +.395eba a9 8c lda #$8c LDA #BIOS_ERR_TIMEOUT ; Return a time out error +.395ebc 8d 20 03 sta $0320 STA @w BIOS_STATUS +.395ebf 28 plp PLP +.395ec0 2b pld PLD +.395ec1 ab plb PLB +.395ec2 18 clc CLC +.395ec3 6b rtl RTL +.395ec4 FDC_Specify_Command +.395ec4 8b phb PHB +.395ec5 0b phd PHD +.395ec6 08 php PHP +.395ec7 48 pha PHA ; begin setdbr macro +.395ec8 08 php PHP +.395ec9 e2 20 sep #$20 SEP #$20 ; set A short +.395ecb a9 00 lda #$00 LDA #0 +.395ecd 48 pha PHA +.395ece ab plb PLB +.395ecf 28 plp PLP +.395ed0 68 pla PLA ; end setdbr macro +.395ed1 48 pha PHA ; begin setdp macro +.395ed2 08 php PHP +.395ed3 c2 20 rep #$20 REP #$20 ; set A long +.395ed5 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.395ed8 5b tcd TCD +.395ed9 28 plp PLP +.395eda 68 pla PLA ; end setdp macro +.395edb c2 30 rep #$30 REP #$30 ; set A&X long +.395edd a2 0a 00 ldx #$000a LDX #10 ; Wait for 10ms +.395ee0 22 e7 0f 39 jsl $390fe7 JSL ILOOP_MS +.395ee4 e2 20 sep #$20 SEP #$20 ; set A short +.395ee6 20 5f 5b jsr $395b5f JSR FDC_Check_CMD_BSY ; Check I can send a command +.395ee9 90 26 bcc $395f11 BCC time_out ; If there was a time out, raise an error +.395eeb 20 03 5b jsr $395b03 JSR FDC_Check_RQM ; Check if I can transfer data +.395eee 90 21 bcc $395f11 BCC time_out ; If there was a time out, raise an error +.395ef0 a9 03 lda #$03 LDA #FDC_CMD_SPECIFY ; Specify Command +.395ef2 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA +.395ef6 20 03 5b jsr $395b03 JSR FDC_Check_RQM ; Check if I can transfer data +.395ef9 90 16 bcc $395f11 BCC time_out ; If there was a time out, raise an error +.395efb a9 cf lda #$cf LDA #$CF +.395efd 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA +.395f01 20 03 5b jsr $395b03 JSR FDC_Check_RQM ; Check if I can transfer data +.395f04 90 0b bcc $395f11 BCC time_out ; If there was a time out, raise an error +.395f06 a9 01 lda #$01 LDA #$01 ; 1 = Non-DMA +.395f08 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA +.395f0c 28 plp PLP +.395f0d 2b pld PLD +.395f0e ab plb PLB +.395f0f 38 sec SEC +.395f10 6b rtl RTL +.395f11 time_out +.395f11 e2 20 sep #$20 SEP #$20 ; set A short +.395f13 a9 8c lda #$8c LDA #BIOS_ERR_TIMEOUT ; Return a time out error +.395f15 8d 20 03 sta $0320 STA @w BIOS_STATUS +.395f18 28 plp PLP +.395f19 2b pld PLD +.395f1a ab plb PLB +.395f1b 18 clc CLC +.395f1c 6b rtl RTL +.395f1d FDC_Configure_Command +.395f1d 8b phb PHB +.395f1e 0b phd PHD +.395f1f 08 php PHP +.395f20 48 pha PHA ; begin setdbr macro +.395f21 08 php PHP .395f22 e2 20 sep #$20 SEP #$20 ; set A short -.395f24 a9 8c lda #$8c LDA #BIOS_ERR_TIMEOUT ; Return a time out error -.395f26 8d 20 03 sta $0320 STA @w BIOS_STATUS -.395f29 28 plp PLP -.395f2a 2b pld PLD -.395f2b ab plb PLB -.395f2c 18 clc CLC -.395f2d 6b rtl RTL -.395f2e FDC_Specify_Command -.395f2e 8b phb PHB -.395f2f 0b phd PHD -.395f30 08 php PHP -.395f31 48 pha PHA ; begin setdbr macro -.395f32 08 php PHP -.395f33 e2 20 sep #$20 SEP #$20 ; set A short -.395f35 a9 00 lda #$00 LDA #0 -.395f37 48 pha PHA -.395f38 ab plb PLB -.395f39 28 plp PLP -.395f3a 68 pla PLA ; end setdbr macro -.395f3b 48 pha PHA ; begin setdp macro -.395f3c 08 php PHP -.395f3d c2 20 rep #$20 REP #$20 ; set A long -.395f3f a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.395f42 5b tcd TCD -.395f43 28 plp PLP -.395f44 68 pla PLA ; end setdp macro -.395f45 c2 30 rep #$30 REP #$30 ; set A&X long -.395f47 a2 0a 00 ldx #$000a LDX #10 ; Wait for 10ms -.395f4a 22 e7 0f 39 jsl $390fe7 JSL ILOOP_MS -.395f4e e2 20 sep #$20 SEP #$20 ; set A short -.395f50 20 c9 5b jsr $395bc9 JSR FDC_Check_CMD_BSY ; Check I can send a command -.395f53 90 26 bcc $395f7b BCC time_out ; If there was a time out, raise an error -.395f55 20 6d 5b jsr $395b6d JSR FDC_Check_RQM ; Check if I can transfer data -.395f58 90 21 bcc $395f7b BCC time_out ; If there was a time out, raise an error -.395f5a a9 03 lda #$03 LDA #FDC_CMD_SPECIFY ; Specify Command -.395f5c 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA -.395f60 20 6d 5b jsr $395b6d JSR FDC_Check_RQM ; Check if I can transfer data -.395f63 90 16 bcc $395f7b BCC time_out ; If there was a time out, raise an error -.395f65 a9 cf lda #$cf LDA #$CF -.395f67 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA -.395f6b 20 6d 5b jsr $395b6d JSR FDC_Check_RQM ; Check if I can transfer data -.395f6e 90 0b bcc $395f7b BCC time_out ; If there was a time out, raise an error -.395f70 a9 01 lda #$01 LDA #$01 ; 1 = Non-DMA -.395f72 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA -.395f76 28 plp PLP -.395f77 2b pld PLD -.395f78 ab plb PLB -.395f79 38 sec SEC -.395f7a 6b rtl RTL -.395f7b time_out -.395f7b e2 20 sep #$20 SEP #$20 ; set A short -.395f7d a9 8c lda #$8c LDA #BIOS_ERR_TIMEOUT ; Return a time out error -.395f7f 8d 20 03 sta $0320 STA @w BIOS_STATUS -.395f82 28 plp PLP -.395f83 2b pld PLD -.395f84 ab plb PLB -.395f85 18 clc CLC -.395f86 6b rtl RTL -.395f87 FDC_Configure_Command -.395f87 8b phb PHB -.395f88 0b phd PHD -.395f89 08 php PHP -.395f8a 48 pha PHA ; begin setdbr macro -.395f8b 08 php PHP -.395f8c e2 20 sep #$20 SEP #$20 ; set A short -.395f8e a9 00 lda #$00 LDA #0 -.395f90 48 pha PHA -.395f91 ab plb PLB -.395f92 28 plp PLP -.395f93 68 pla PLA ; end setdbr macro -.395f94 48 pha PHA ; begin setdp macro -.395f95 08 php PHP -.395f96 c2 20 rep #$20 REP #$20 ; set A long -.395f98 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.395f9b 5b tcd TCD -.395f9c 28 plp PLP -.395f9d 68 pla PLA ; end setdp macro -.395f9e c2 30 rep #$30 REP #$30 ; set A&X long -.395fa0 a2 0a 00 ldx #$000a LDX #10 ; Wait for 10ms -.395fa3 22 e7 0f 39 jsl $390fe7 JSL ILOOP_MS -.395fa7 e2 20 sep #$20 SEP #$20 ; set A short -.395fa9 20 c9 5b jsr $395bc9 JSR FDC_Check_CMD_BSY ; Check I can send a command -.395fac 90 36 bcc $395fe4 BCC time_out ; If there was a time out, raise an error -.395fae 20 6d 5b jsr $395b6d JSR FDC_Check_RQM ; Check if I can transfer data -.395fb1 90 31 bcc $395fe4 BCC time_out ; If there was a time out, raise an error -.395fb3 a9 13 lda #$13 LDA #FDC_CMD_CONFIGURE ; Specify Command -.395fb5 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA -.395fb9 20 6d 5b jsr $395b6d JSR FDC_Check_RQM ; Check if I can transfer data -.395fbc 90 26 bcc $395fe4 BCC time_out ; If there was a time out, raise an error -.395fbe a9 00 lda #$00 LDA #$00 -.395fc0 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA -.395fc4 20 6d 5b jsr $395b6d JSR FDC_Check_RQM ; Check if I can transfer data -.395fc7 90 1b bcc $395fe4 BCC time_out ; If there was a time out, raise an error -.395fc9 a9 44 lda #$44 LDA #$44 ; Implied Seek, FIFOTHR = 4 byte -.395fcb 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA -.395fcf 20 6d 5b jsr $395b6d JSR FDC_Check_RQM ; Check if I can transfer data -.395fd2 90 10 bcc $395fe4 BCC time_out ; If there was a time out, raise an error -.395fd4 a9 00 lda #$00 LDA #$00 -.395fd6 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA -.395fda 20 c9 5b jsr $395bc9 JSR FDC_Check_CMD_BSY ; Check I can send a command -.395fdd 90 05 bcc $395fe4 BCC time_out ; If there was a time out, raise an error -.395fdf 28 plp PLP -.395fe0 2b pld PLD -.395fe1 ab plb PLB -.395fe2 38 sec SEC -.395fe3 6b rtl RTL -.395fe4 time_out -.395fe4 e2 20 sep #$20 SEP #$20 ; set A short -.395fe6 a9 8c lda #$8c LDA #BIOS_ERR_TIMEOUT ; Return a time out error -.395fe8 8d 20 03 sta $0320 STA @w BIOS_STATUS -.395feb 28 plp PLP -.395fec 2b pld PLD -.395fed ab plb PLB -.395fee 18 clc CLC -.395fef 6b rtl RTL -.395ff0 FDC_Read_ID_Command -.395ff0 8b phb PHB -.395ff1 0b phd PHD -.395ff2 08 php PHP -.395ff3 48 pha PHA ; begin setdbr macro -.395ff4 08 php PHP -.395ff5 e2 20 sep #$20 SEP #$20 ; set A short -.395ff7 a9 00 lda #$00 LDA #0 -.395ff9 48 pha PHA -.395ffa ab plb PLB -.395ffb 28 plp PLP -.395ffc 68 pla PLA ; end setdbr macro -.395ffd 48 pha PHA ; begin setdp macro -.395ffe 08 php PHP -.395fff c2 20 rep #$20 REP #$20 ; set A long -.396001 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.396004 5b tcd TCD -.396005 28 plp PLP -.396006 68 pla PLA ; end setdp macro -.396007 e2 20 sep #$20 SEP #$20 ; set A short -.396009 a9 0a lda #$0a LDA #FDC_CMD_READ_ID ; READID Command -.39600b 8d 00 05 sta $0500 STA FDC_PARAMETERS -.39600e a9 01 lda #$01 LDA #1 -.396010 8d 30 05 sta $0530 STA FDC_PARAM_NUM ; 4 parameter (the command) -.396013 9c 33 05 stz $0533 STZ FDC_EXPECT_DAT ; 0 data -.396016 a9 07 lda #$07 LDA #7 -.396018 8d 32 05 sta $0532 STA FDC_RESULT_NUM ; 7 results -.39601b 22 68 5c 39 jsl $395c68 JSL FDC_COMMAND ; Issue the command -.39601f 90 27 bcc $396048 BCC pass_failure -.396021 ad 10 05 lda $0510 LDA FDC_RESULTS -.396024 85 06 sta $0306 STA FDC_ST0 ; Get ST0 -.396026 ad 11 05 lda $0511 LDA FDC_RESULTS+1 -.396029 85 07 sta $0307 STA FDC_ST1 ; Get ST1 -.39602b ad 12 05 lda $0512 LDA FDC_RESULTS+2 -.39602e 85 08 sta $0308 STA FDC_ST2 ; Get ST2 -.396030 ad 13 05 lda $0513 LDA FDC_RESULTS+3 -.396033 85 02 sta $0302 STA FDC_CYLINDER ; Get the cylinder -.396035 ad 14 05 lda $0514 LDA FDC_RESULTS+4 -.396038 85 01 sta $0301 STA FDC_HEAD ; Get the head -.39603a ad 15 05 lda $0515 LDA FDC_RESULTS+5 -.39603d 85 0a sta $030a STA FDC_PCN ; Get the sector -.39603f ad 16 05 lda $0516 LDA FDC_RESULTS+6 -.396042 85 04 sta $0304 STA FDC_SECTOR_SIZE ; Get the sector size code -.396044 28 plp PLP -.396045 2b pld PLD -.396046 ab plb PLB -.396047 6b rtl RTL -.396048 28 plp pass_failure PLP -.396049 2b pld PLD -.39604a ab plb PLB -.39604b 18 clc CLC -.39604c 6b rtl RTL -.39604d FDC_DumpReg_Command -.39604d 0b phd PHD -.39604e 08 php PHP -.39604f e2 20 sep #$20 SEP #$20 ; set A short -.396051 a9 0e lda #$0e LDA #FDC_CMD_DUMPREG ; DUMPREG Command -.396053 8d 00 05 sta $0500 STA FDC_PARAMETERS -.396056 a9 01 lda #$01 LDA #1 -.396058 8d 30 05 sta $0530 STA FDC_PARAM_NUM ; 4 parameter (the command) -.39605b 9c 33 05 stz $0533 STZ FDC_EXPECT_DAT ; 0 data -.39605e a9 0a lda #$0a LDA #10 -.396060 8d 32 05 sta $0532 STA FDC_RESULT_NUM ; 10 results -.396063 22 68 5c 39 jsl $395c68 JSL FDC_COMMAND ; Issue the command -.396067 90 03 bcc $39606c BCC pass_failure -.396069 28 plp PLP -.39606a 2b pld PLD -.39606b 6b rtl RTL -.39606c 28 plp pass_failure PLP -.39606d 2b pld PLD -.39606e 18 clc CLC -.39606f 6b rtl RTL -.396070 FDC_Seek_Track -.396070 8b phb PHB -.396071 0b phd PHD -.396072 08 php PHP -.396073 48 pha PHA ; begin setdbr macro -.396074 08 php PHP -.396075 e2 20 sep #$20 SEP #$20 ; set A short -.396077 a9 00 lda #$00 LDA #0 -.396079 48 pha PHA -.39607a ab plb PLB -.39607b 28 plp PLP -.39607c 68 pla PLA ; end setdbr macro -.39607d 48 pha PHA ; begin setdp macro -.39607e 08 php PHP -.39607f c2 20 rep #$20 REP #$20 ; set A long -.396081 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.396084 5b tcd TCD -.396085 28 plp PLP -.396086 68 pla PLA ; end setdp macro -.396087 22 18 5e 39 jsl $395e18 JSL FDC_MOTOR_NEEDED ; Reset the spindle motor timeout clock -.39608b e2 20 sep #$20 SEP #$20 ; set A short -.39608d a9 0f lda #$0f LDA #FDC_CMD_SEEK ; Seek Command -.39608f 8d 00 05 sta $0500 STA FDC_PARAMETERS -.396092 a5 01 lda $0301 LDA FDC_HEAD ; Get the head -.396094 29 01 and #$01 AND #$01 -.396096 0a asl a ASL A -.396097 0a asl a ASL A -.396098 05 00 ora $0300 ORA FDC_DRIVE ; And the drive number -.39609a 8d 01 05 sta $0501 STA FDC_PARAMETERS+1 -.39609d a5 02 lda $0302 LDA FDC_CYLINDER ; And the track -.39609f 8d 02 05 sta $0502 STA FDC_PARAMETERS+2 -.3960a2 a9 03 lda #$03 LDA #3 -.3960a4 8d 30 05 sta $0530 STA FDC_PARAM_NUM ; 3 parameter (the command) -.3960a7 9c 33 05 stz $0533 STZ FDC_EXPECT_DAT ; 0 data -.3960aa 9c 32 05 stz $0532 STZ FDC_RESULT_NUM ; 0 results -.3960ad 22 68 5c 39 jsl $395c68 JSL FDC_COMMAND ; Issue the command -.3960b1 90 05 bcc $3960b8 BCC pass_failure -.3960b3 28 plp PLP -.3960b4 2b pld PLD -.3960b5 ab plb PLB -.3960b6 38 sec SEC -.3960b7 6b rtl RTL -.3960b8 28 plp pass_failure PLP -.3960b9 2b pld PLD -.3960ba ab plb PLB -.3960bb 18 clc CLC -.3960bc 6b rtl RTL -.3960bd FDC_Read_Sector -.3960bd 8b phb PHB -.3960be 0b phd PHD -.3960bf 08 php PHP -.3960c0 48 pha PHA ; begin setdbr macro -.3960c1 08 php PHP -.3960c2 e2 20 sep #$20 SEP #$20 ; set A short -.3960c4 a9 00 lda #$00 LDA #0 -.3960c6 48 pha PHA -.3960c7 ab plb PLB -.3960c8 28 plp PLP -.3960c9 68 pla PLA ; end setdbr macro -.3960ca 48 pha PHA ; begin setdp macro -.3960cb 08 php PHP -.3960cc c2 20 rep #$20 REP #$20 ; set A long -.3960ce a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.3960d1 5b tcd TCD -.3960d2 28 plp PLP -.3960d3 68 pla PLA ; end setdp macro -.3960d4 22 18 5e 39 jsl $395e18 JSL FDC_MOTOR_NEEDED ; Reset the spindle motor timeout clock -.3960d8 e2 20 sep #$20 SEP #$20 ; set A short -.3960da a9 06 lda #$06 LDA #FDC_CMD_READ_DATA ; The READ_DATA command -.3960dc 09 40 ora #$40 ORA #FDC_CMD_MFM ; Turn on MFM mode -.3960de 8d 00 05 sta $0500 STA FDC_PARAMETERS -.3960e1 a5 01 lda $0301 LDA FDC_HEAD ; Get the head -.3960e3 29 01 and #$01 AND #$01 -.3960e5 0a asl a ASL A -.3960e6 0a asl a ASL A -.3960e7 05 00 ora $0300 ORA FDC_DRIVE ; And the drive number -.3960e9 8d 01 05 sta $0501 STA FDC_PARAMETERS+1 -.3960ec a5 02 lda $0302 LDA FDC_CYLINDER ; Send the cylinder number -.3960ee 8d 02 05 sta $0502 STA FDC_PARAMETERS+2 -.3960f1 a5 01 lda $0301 LDA FDC_HEAD ; Send the head number -.3960f3 8d 03 05 sta $0503 STA FDC_PARAMETERS+3 -.3960f6 a5 03 lda $0303 LDA FDC_SECTOR ; Send the sector number -.3960f8 8d 04 05 sta $0504 STA FDC_PARAMETERS+4 -.3960fb a9 02 lda #$02 LDA #$02 ; --- N ---- Sector Size (2 = 512Bytes) -.3960fd 8d 05 05 sta $0505 STA FDC_PARAMETERS+5 -.396100 a9 12 lda #$12 LDA #18 ; --- EOT ---- End of Track -.396102 8d 06 05 sta $0506 STA FDC_PARAMETERS+6 -.396105 a9 1b lda #$1b LDA #$1B ; --- GPL ---- End of Track -.396107 8d 07 05 sta $0507 STA FDC_PARAMETERS+7 -.39610a a9 ff lda #$ff LDA #$FF ; --- DTL ---- Special sector size -.39610c 8d 08 05 sta $0508 STA FDC_PARAMETERS+8 -.39610f a9 09 lda #$09 LDA #9 -.396111 8d 30 05 sta $0530 STA FDC_PARAM_NUM ; 9 parameter (the command) -.396114 a9 01 lda #$01 LDA #1 -.396116 8d 33 05 sta $0533 STA FDC_EXPECT_DAT ; Expect data -.396119 a9 07 lda #$07 LDA #7 -.39611b 8d 32 05 sta $0532 STA FDC_RESULT_NUM ; 7 results -.39611e 22 68 5c 39 jsl $395c68 command JSL FDC_COMMAND ; Issue the command -.396122 08 php PHP -.396123 ad 10 05 lda $0510 get_results LDA FDC_RESULTS -.396126 85 06 sta $0306 STA FDC_ST0 ; --- ST0 ---- -.396128 ad 11 05 lda $0511 LDA FDC_RESULTS+1 -.39612b 85 07 sta $0307 STA FDC_ST1 ; --- ST1 ---- -.39612d ad 12 05 lda $0512 LDA FDC_RESULTS+2 -.396130 85 08 sta $0308 STA FDC_ST2 ; --- ST2 ---- -.396132 ad 13 05 lda $0513 LDA FDC_RESULTS+3 -.396135 85 02 sta $0302 STA FDC_CYLINDER ; -- C --- -.396137 ad 14 05 lda $0514 LDA FDC_RESULTS+4 -.39613a 85 01 sta $0301 STA FDC_HEAD ; --- H --- -.39613c ad 15 05 lda $0515 LDA FDC_RESULTS+5 -.39613f 85 0a sta $030a STA FDC_PCN ; --- R --- -.396141 ad 16 05 lda $0516 LDA FDC_RESULTS+6 -.396144 85 04 sta $0304 STA FDC_SECTOR_SIZE ; --- N --- -.396146 28 plp PLP -.396147 90 04 bcc $39614d BCC pass_failure -.396149 28 plp done PLP -.39614a 2b pld PLD -.39614b ab plb PLB -.39614c 6b rtl RTL -.39614d 28 plp pass_failure PLP -.39614e 2b pld PLD -.39614f ab plb PLB -.396150 18 clc CLC -.396151 6b rtl RTL -.396152 FDC_Write_Sector -.396152 8b phb PHB -.396153 0b phd PHD -.396154 08 php PHP -.396155 48 pha PHA ; begin setdbr macro -.396156 08 php PHP -.396157 e2 20 sep #$20 SEP #$20 ; set A short -.396159 a9 00 lda #$00 LDA #0 -.39615b 48 pha PHA -.39615c ab plb PLB -.39615d 28 plp PLP -.39615e 68 pla PLA ; end setdbr macro -.39615f 48 pha PHA ; begin setdp macro -.396160 08 php PHP -.396161 c2 20 rep #$20 REP #$20 ; set A long -.396163 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.396166 5b tcd TCD -.396167 28 plp PLP -.396168 68 pla PLA ; end setdp macro -.396169 e2 20 sep #$20 SEP #$20 ; set A short -.39616b 22 18 5e 39 jsl $395e18 JSL FDC_MOTOR_NEEDED ; Reset the spindle motor timeout clock -.39616f a9 05 lda #$05 LDA #FDC_CMD_WRITE_DATA ; The WRITE_DATA command -.396171 09 40 ora #$40 ORA #FDC_CMD_MFM ; Turn on MFM mode -.396173 8d 00 05 sta $0500 STA FDC_PARAMETERS -.396176 a5 01 lda $0301 LDA FDC_HEAD ; Get the head -.396178 29 01 and #$01 AND #$01 -.39617a 0a asl a ASL A -.39617b 0a asl a ASL A -.39617c 05 00 ora $0300 ORA FDC_DRIVE ; And the drive number -.39617e 8d 01 05 sta $0501 STA FDC_PARAMETERS+1 -.396181 a5 02 lda $0302 LDA FDC_CYLINDER ; Send the cylinder number -.396183 8d 02 05 sta $0502 STA FDC_PARAMETERS+2 -.396186 a5 01 lda $0301 LDA FDC_HEAD ; Send the head number -.396188 8d 03 05 sta $0503 STA FDC_PARAMETERS+3 -.39618b a5 03 lda $0303 LDA FDC_SECTOR ; Send the sector number -.39618d 8d 04 05 sta $0504 STA FDC_PARAMETERS+4 -.396190 a9 02 lda #$02 LDA #$02 ; --- N ---- Sector Size (2 = 512Bytes) -.396192 8d 05 05 sta $0505 STA FDC_PARAMETERS+5 -.396195 a9 12 lda #$12 LDA #18 ; --- EOT ---- End of Track -.396197 8d 06 05 sta $0506 STA FDC_PARAMETERS+6 -.39619a a9 1b lda #$1b LDA #$1B ; --- GPL ---- End of Track -.39619c 8d 07 05 sta $0507 STA FDC_PARAMETERS+7 -.39619f a9 ff lda #$ff LDA #$FF ; --- DTL ---- Special sector size -.3961a1 8d 08 05 sta $0508 STA FDC_PARAMETERS+8 -.3961a4 a9 09 lda #$09 LDA #9 -.3961a6 8d 30 05 sta $0530 STA FDC_PARAM_NUM ; 9 parameter (the command) -.3961a9 a9 ff lda #$ff LDA #$FF -.3961ab 8d 33 05 sta $0533 STA FDC_EXPECT_DAT ; Expect to write data -.3961ae a9 07 lda #$07 LDA #7 -.3961b0 8d 32 05 sta $0532 STA FDC_RESULT_NUM ; 7 results -.3961b3 22 68 5c 39 jsl $395c68 command JSL FDC_COMMAND ; Issue the command -.3961b7 08 php PHP -.3961b8 ad 10 05 lda $0510 get_results LDA FDC_RESULTS -.3961bb 85 06 sta $0306 STA FDC_ST0 ; --- ST0 --- -.3961bd ad 11 05 lda $0511 LDA FDC_RESULTS+1 -.3961c0 85 07 sta $0307 STA FDC_ST1 ; --- ST1 --- -.3961c2 ad 12 05 lda $0512 LDA FDC_RESULTS+2 -.3961c5 85 08 sta $0308 STA FDC_ST2 ; --- ST2 --- -.3961c7 ad 13 05 lda $0513 LDA FDC_RESULTS+3 -.3961ca 85 02 sta $0302 STA FDC_CYLINDER ; --- C --- -.3961cc ad 14 05 lda $0514 LDA FDC_RESULTS+4 -.3961cf 85 01 sta $0301 STA FDC_HEAD ; --- H --- -.3961d1 ad 15 05 lda $0515 LDA FDC_RESULTS+5 -.3961d4 85 0a sta $030a STA FDC_PCN ; --- R --- -.3961d6 ad 16 05 lda $0516 LDA FDC_RESULTS+6 -.3961d9 85 04 sta $0304 STA FDC_SECTOR_SIZE ; --- N --- -.3961db 28 plp check_status PLP -.3961dc 90 04 bcc $3961e2 BCC pass_failure -.3961de 28 plp done PLP -.3961df 2b pld PLD -.3961e0 ab plb PLB -.3961e1 6b rtl RTL -.3961e2 28 plp pass_failure PLP -.3961e3 2b pld PLD -.3961e4 ab plb PLB -.3961e5 18 clc CLC -.3961e6 6b rtl RTL -.3961e7 DIVIDE32 -.3961e7 da phx PHX -.3961e8 5a phy PHY -.3961e9 0b phd PHD -.3961ea 08 php PHP -.3961eb 48 pha PHA ; begin setdp macro -.3961ec 08 php PHP -.3961ed c2 20 rep #$20 REP #$20 ; set A long -.3961ef a9 0c 03 lda #$030c LDA #DIVIDEND ; set DP to page 0 -.3961f2 5b tcd TCD -.3961f3 28 plp PLP -.3961f4 68 pla PLA ; end setdp macro -.3961f5 c2 30 rep #$30 REP #$30 ; set A&X long -.3961f7 64 08 stz $0314 STZ REMAINDER ; Initialize the remainder -.3961f9 64 0a stz $0316 STZ REMAINDER+2 -.3961fb a2 20 00 ldx #$0020 LDX #32 ; Set the number of bits to process -.3961fe 06 00 asl $030c loop ASL DIVIDEND -.396200 26 02 rol $030e ROL DIVIDEND+2 -.396202 26 08 rol $0314 ROL REMAINDER -.396204 26 0a rol $0316 ROL REMAINDER+2 -.396206 a5 08 lda $0314 LDA REMAINDER -.396208 38 sec SEC -.396209 e5 04 sbc $0310 SBC DIVISOR -.39620b a8 tay TAY -.39620c a5 0a lda $0316 LDA REMAINDER+2 -.39620e e5 06 sbc $0312 SBC DIVISOR+2 -.396210 90 06 bcc $396218 BCC skip -.396212 85 0a sta $0316 STA REMAINDER+2 -.396214 84 08 sty $0314 STY REMAINDER -.396216 e6 00 inc $030c INC DIVIDEND -.396218 ca dex skip DEX -.396219 d0 e3 bne $3961fe BNE loop -.39621b 28 plp PLP -.39621c 2b pld PLD -.39621d 7a ply PLY -.39621e fa plx PLX -.39621f 60 rts RTS -.396220 LBA2CHS -.396220 8b phb PHB -.396221 0b phd PHD -.396222 08 php PHP -.396223 48 pha PHA ; begin setdbr macro -.396224 08 php PHP -.396225 e2 20 sep #$20 SEP #$20 ; set A short -.396227 a9 00 lda #$00 LDA #0 -.396229 48 pha PHA -.39622a ab plb PLB -.39622b 28 plp PLP -.39622c 68 pla PLA ; end setdbr macro -.39622d 48 pha PHA ; begin setdp macro -.39622e 08 php PHP -.39622f c2 20 rep #$20 REP #$20 ; set A long -.396231 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.396234 5b tcd TCD -.396235 28 plp PLP -.396236 68 pla PLA ; end setdp macro -.396237 c2 30 rep #$30 REP #$30 ; set A&X long -.396239 a5 22 lda $0322 LDA BIOS_LBA -.39623b 85 0c sta $030c STA DIVIDEND -.39623d a5 24 lda $0324 LDA BIOS_LBA+2 -.39623f 85 0e sta $030e STA DIVIDEND+2 -.396241 a9 24 00 lda #$0024 LDA #36 -.396244 85 10 sta $0310 STA DIVISOR -.396246 64 12 stz $0312 STZ DIVISOR+2 -.396248 20 e7 61 jsr $3961e7 JSR DIVIDE32 -.39624b e2 20 sep #$20 SEP #$20 ; set A short -.39624d a5 0c lda $030c LDA DIVIDEND -.39624f 85 02 sta $0302 STA FDC_CYLINDER -.396251 c2 20 rep #$20 REP #$20 ; set A long -.396253 a5 14 lda $0314 LDA REMAINDER -.396255 85 0c sta $030c STA DIVIDEND -.396257 a5 16 lda $0316 LDA REMAINDER+2 -.396259 85 0e sta $030e STA DIVIDEND+2 -.39625b a9 12 00 lda #$0012 LDA #18 -.39625e 85 10 sta $0310 STA DIVISOR -.396260 64 12 stz $0312 STZ DIVISOR+2 -.396262 20 e7 61 jsr $3961e7 JSR DIVIDE32 +.395f24 a9 00 lda #$00 LDA #0 +.395f26 48 pha PHA +.395f27 ab plb PLB +.395f28 28 plp PLP +.395f29 68 pla PLA ; end setdbr macro +.395f2a 48 pha PHA ; begin setdp macro +.395f2b 08 php PHP +.395f2c c2 20 rep #$20 REP #$20 ; set A long +.395f2e a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.395f31 5b tcd TCD +.395f32 28 plp PLP +.395f33 68 pla PLA ; end setdp macro +.395f34 c2 30 rep #$30 REP #$30 ; set A&X long +.395f36 a2 0a 00 ldx #$000a LDX #10 ; Wait for 10ms +.395f39 22 e7 0f 39 jsl $390fe7 JSL ILOOP_MS +.395f3d e2 20 sep #$20 SEP #$20 ; set A short +.395f3f 20 5f 5b jsr $395b5f JSR FDC_Check_CMD_BSY ; Check I can send a command +.395f42 90 36 bcc $395f7a BCC time_out ; If there was a time out, raise an error +.395f44 20 03 5b jsr $395b03 JSR FDC_Check_RQM ; Check if I can transfer data +.395f47 90 31 bcc $395f7a BCC time_out ; If there was a time out, raise an error +.395f49 a9 13 lda #$13 LDA #FDC_CMD_CONFIGURE ; Specify Command +.395f4b 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA +.395f4f 20 03 5b jsr $395b03 JSR FDC_Check_RQM ; Check if I can transfer data +.395f52 90 26 bcc $395f7a BCC time_out ; If there was a time out, raise an error +.395f54 a9 00 lda #$00 LDA #$00 +.395f56 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA +.395f5a 20 03 5b jsr $395b03 JSR FDC_Check_RQM ; Check if I can transfer data +.395f5d 90 1b bcc $395f7a BCC time_out ; If there was a time out, raise an error +.395f5f a9 44 lda #$44 LDA #$44 ; Implied Seek, FIFOTHR = 4 byte +.395f61 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA +.395f65 20 03 5b jsr $395b03 JSR FDC_Check_RQM ; Check if I can transfer data +.395f68 90 10 bcc $395f7a BCC time_out ; If there was a time out, raise an error +.395f6a a9 00 lda #$00 LDA #$00 +.395f6c 8f f5 13 af sta $af13f5 STA @l SIO_FDC_DTA +.395f70 20 5f 5b jsr $395b5f JSR FDC_Check_CMD_BSY ; Check I can send a command +.395f73 90 05 bcc $395f7a BCC time_out ; If there was a time out, raise an error +.395f75 28 plp PLP +.395f76 2b pld PLD +.395f77 ab plb PLB +.395f78 38 sec SEC +.395f79 6b rtl RTL +.395f7a time_out +.395f7a e2 20 sep #$20 SEP #$20 ; set A short +.395f7c a9 8c lda #$8c LDA #BIOS_ERR_TIMEOUT ; Return a time out error +.395f7e 8d 20 03 sta $0320 STA @w BIOS_STATUS +.395f81 28 plp PLP +.395f82 2b pld PLD +.395f83 ab plb PLB +.395f84 18 clc CLC +.395f85 6b rtl RTL +.395f86 FDC_Read_ID_Command +.395f86 8b phb PHB +.395f87 0b phd PHD +.395f88 08 php PHP +.395f89 48 pha PHA ; begin setdbr macro +.395f8a 08 php PHP +.395f8b e2 20 sep #$20 SEP #$20 ; set A short +.395f8d a9 00 lda #$00 LDA #0 +.395f8f 48 pha PHA +.395f90 ab plb PLB +.395f91 28 plp PLP +.395f92 68 pla PLA ; end setdbr macro +.395f93 48 pha PHA ; begin setdp macro +.395f94 08 php PHP +.395f95 c2 20 rep #$20 REP #$20 ; set A long +.395f97 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.395f9a 5b tcd TCD +.395f9b 28 plp PLP +.395f9c 68 pla PLA ; end setdp macro +.395f9d e2 20 sep #$20 SEP #$20 ; set A short +.395f9f a9 0a lda #$0a LDA #FDC_CMD_READ_ID ; READID Command +.395fa1 8d 00 05 sta $0500 STA FDC_PARAMETERS +.395fa4 a9 01 lda #$01 LDA #1 +.395fa6 8d 30 05 sta $0530 STA FDC_PARAM_NUM ; 4 parameter (the command) +.395fa9 9c 33 05 stz $0533 STZ FDC_EXPECT_DAT ; 0 data +.395fac a9 07 lda #$07 LDA #7 +.395fae 8d 32 05 sta $0532 STA FDC_RESULT_NUM ; 7 results +.395fb1 22 fe 5b 39 jsl $395bfe JSL FDC_COMMAND ; Issue the command +.395fb5 90 27 bcc $395fde BCC pass_failure +.395fb7 ad 10 05 lda $0510 LDA FDC_RESULTS +.395fba 85 06 sta $0306 STA FDC_ST0 ; Get ST0 +.395fbc ad 11 05 lda $0511 LDA FDC_RESULTS+1 +.395fbf 85 07 sta $0307 STA FDC_ST1 ; Get ST1 +.395fc1 ad 12 05 lda $0512 LDA FDC_RESULTS+2 +.395fc4 85 08 sta $0308 STA FDC_ST2 ; Get ST2 +.395fc6 ad 13 05 lda $0513 LDA FDC_RESULTS+3 +.395fc9 85 02 sta $0302 STA FDC_CYLINDER ; Get the cylinder +.395fcb ad 14 05 lda $0514 LDA FDC_RESULTS+4 +.395fce 85 01 sta $0301 STA FDC_HEAD ; Get the head +.395fd0 ad 15 05 lda $0515 LDA FDC_RESULTS+5 +.395fd3 85 0a sta $030a STA FDC_PCN ; Get the sector +.395fd5 ad 16 05 lda $0516 LDA FDC_RESULTS+6 +.395fd8 85 04 sta $0304 STA FDC_SECTOR_SIZE ; Get the sector size code +.395fda 28 plp PLP +.395fdb 2b pld PLD +.395fdc ab plb PLB +.395fdd 6b rtl RTL +.395fde 28 plp pass_failure PLP +.395fdf 2b pld PLD +.395fe0 ab plb PLB +.395fe1 18 clc CLC +.395fe2 6b rtl RTL +.395fe3 FDC_DumpReg_Command +.395fe3 0b phd PHD +.395fe4 08 php PHP +.395fe5 e2 20 sep #$20 SEP #$20 ; set A short +.395fe7 a9 0e lda #$0e LDA #FDC_CMD_DUMPREG ; DUMPREG Command +.395fe9 8d 00 05 sta $0500 STA FDC_PARAMETERS +.395fec a9 01 lda #$01 LDA #1 +.395fee 8d 30 05 sta $0530 STA FDC_PARAM_NUM ; 4 parameter (the command) +.395ff1 9c 33 05 stz $0533 STZ FDC_EXPECT_DAT ; 0 data +.395ff4 a9 0a lda #$0a LDA #10 +.395ff6 8d 32 05 sta $0532 STA FDC_RESULT_NUM ; 10 results +.395ff9 22 fe 5b 39 jsl $395bfe JSL FDC_COMMAND ; Issue the command +.395ffd 90 03 bcc $396002 BCC pass_failure +.395fff 28 plp PLP +.396000 2b pld PLD +.396001 6b rtl RTL +.396002 28 plp pass_failure PLP +.396003 2b pld PLD +.396004 18 clc CLC +.396005 6b rtl RTL +.396006 FDC_Seek_Track +.396006 8b phb PHB +.396007 0b phd PHD +.396008 08 php PHP +.396009 48 pha PHA ; begin setdbr macro +.39600a 08 php PHP +.39600b e2 20 sep #$20 SEP #$20 ; set A short +.39600d a9 00 lda #$00 LDA #0 +.39600f 48 pha PHA +.396010 ab plb PLB +.396011 28 plp PLP +.396012 68 pla PLA ; end setdbr macro +.396013 48 pha PHA ; begin setdp macro +.396014 08 php PHP +.396015 c2 20 rep #$20 REP #$20 ; set A long +.396017 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.39601a 5b tcd TCD +.39601b 28 plp PLP +.39601c 68 pla PLA ; end setdp macro +.39601d 22 ae 5d 39 jsl $395dae JSL FDC_MOTOR_NEEDED ; Reset the spindle motor timeout clock +.396021 e2 20 sep #$20 SEP #$20 ; set A short +.396023 a9 0f lda #$0f LDA #FDC_CMD_SEEK ; Seek Command +.396025 8d 00 05 sta $0500 STA FDC_PARAMETERS +.396028 a5 01 lda $0301 LDA FDC_HEAD ; Get the head +.39602a 29 01 and #$01 AND #$01 +.39602c 0a asl a ASL A +.39602d 0a asl a ASL A +.39602e 05 00 ora $0300 ORA FDC_DRIVE ; And the drive number +.396030 8d 01 05 sta $0501 STA FDC_PARAMETERS+1 +.396033 a5 02 lda $0302 LDA FDC_CYLINDER ; And the track +.396035 8d 02 05 sta $0502 STA FDC_PARAMETERS+2 +.396038 a9 03 lda #$03 LDA #3 +.39603a 8d 30 05 sta $0530 STA FDC_PARAM_NUM ; 3 parameter (the command) +.39603d 9c 33 05 stz $0533 STZ FDC_EXPECT_DAT ; 0 data +.396040 9c 32 05 stz $0532 STZ FDC_RESULT_NUM ; 0 results +.396043 22 fe 5b 39 jsl $395bfe JSL FDC_COMMAND ; Issue the command +.396047 90 05 bcc $39604e BCC pass_failure +.396049 28 plp PLP +.39604a 2b pld PLD +.39604b ab plb PLB +.39604c 38 sec SEC +.39604d 6b rtl RTL +.39604e 28 plp pass_failure PLP +.39604f 2b pld PLD +.396050 ab plb PLB +.396051 18 clc CLC +.396052 6b rtl RTL +.396053 FDC_Read_Sector +.396053 8b phb PHB +.396054 0b phd PHD +.396055 08 php PHP +.396056 48 pha PHA ; begin setdbr macro +.396057 08 php PHP +.396058 e2 20 sep #$20 SEP #$20 ; set A short +.39605a a9 00 lda #$00 LDA #0 +.39605c 48 pha PHA +.39605d ab plb PLB +.39605e 28 plp PLP +.39605f 68 pla PLA ; end setdbr macro +.396060 48 pha PHA ; begin setdp macro +.396061 08 php PHP +.396062 c2 20 rep #$20 REP #$20 ; set A long +.396064 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.396067 5b tcd TCD +.396068 28 plp PLP +.396069 68 pla PLA ; end setdp macro +.39606a 22 ae 5d 39 jsl $395dae JSL FDC_MOTOR_NEEDED ; Reset the spindle motor timeout clock +.39606e e2 20 sep #$20 SEP #$20 ; set A short +.396070 a9 06 lda #$06 LDA #FDC_CMD_READ_DATA ; The READ_DATA command +.396072 09 40 ora #$40 ORA #FDC_CMD_MFM ; Turn on MFM mode +.396074 8d 00 05 sta $0500 STA FDC_PARAMETERS +.396077 a5 01 lda $0301 LDA FDC_HEAD ; Get the head +.396079 29 01 and #$01 AND #$01 +.39607b 0a asl a ASL A +.39607c 0a asl a ASL A +.39607d 05 00 ora $0300 ORA FDC_DRIVE ; And the drive number +.39607f 8d 01 05 sta $0501 STA FDC_PARAMETERS+1 +.396082 a5 02 lda $0302 LDA FDC_CYLINDER ; Send the cylinder number +.396084 8d 02 05 sta $0502 STA FDC_PARAMETERS+2 +.396087 a5 01 lda $0301 LDA FDC_HEAD ; Send the head number +.396089 8d 03 05 sta $0503 STA FDC_PARAMETERS+3 +.39608c a5 03 lda $0303 LDA FDC_SECTOR ; Send the sector number +.39608e 8d 04 05 sta $0504 STA FDC_PARAMETERS+4 +.396091 a9 02 lda #$02 LDA #$02 ; --- N ---- Sector Size (2 = 512Bytes) +.396093 8d 05 05 sta $0505 STA FDC_PARAMETERS+5 +.396096 a9 12 lda #$12 LDA #18 ; --- EOT ---- End of Track +.396098 8d 06 05 sta $0506 STA FDC_PARAMETERS+6 +.39609b a9 1b lda #$1b LDA #$1B ; --- GPL ---- End of Track +.39609d 8d 07 05 sta $0507 STA FDC_PARAMETERS+7 +.3960a0 a9 ff lda #$ff LDA #$FF ; --- DTL ---- Special sector size +.3960a2 8d 08 05 sta $0508 STA FDC_PARAMETERS+8 +.3960a5 a9 09 lda #$09 LDA #9 +.3960a7 8d 30 05 sta $0530 STA FDC_PARAM_NUM ; 9 parameter (the command) +.3960aa a9 01 lda #$01 LDA #1 +.3960ac 8d 33 05 sta $0533 STA FDC_EXPECT_DAT ; Expect data +.3960af a9 07 lda #$07 LDA #7 +.3960b1 8d 32 05 sta $0532 STA FDC_RESULT_NUM ; 7 results +.3960b4 22 fe 5b 39 jsl $395bfe command JSL FDC_COMMAND ; Issue the command +.3960b8 08 php PHP +.3960b9 ad 10 05 lda $0510 get_results LDA FDC_RESULTS +.3960bc 85 06 sta $0306 STA FDC_ST0 ; --- ST0 ---- +.3960be ad 11 05 lda $0511 LDA FDC_RESULTS+1 +.3960c1 85 07 sta $0307 STA FDC_ST1 ; --- ST1 ---- +.3960c3 ad 12 05 lda $0512 LDA FDC_RESULTS+2 +.3960c6 85 08 sta $0308 STA FDC_ST2 ; --- ST2 ---- +.3960c8 ad 13 05 lda $0513 LDA FDC_RESULTS+3 +.3960cb 85 02 sta $0302 STA FDC_CYLINDER ; -- C --- +.3960cd ad 14 05 lda $0514 LDA FDC_RESULTS+4 +.3960d0 85 01 sta $0301 STA FDC_HEAD ; --- H --- +.3960d2 ad 15 05 lda $0515 LDA FDC_RESULTS+5 +.3960d5 85 0a sta $030a STA FDC_PCN ; --- R --- +.3960d7 ad 16 05 lda $0516 LDA FDC_RESULTS+6 +.3960da 85 04 sta $0304 STA FDC_SECTOR_SIZE ; --- N --- +.3960dc 28 plp PLP +.3960dd 90 04 bcc $3960e3 BCC pass_failure +.3960df 28 plp done PLP +.3960e0 2b pld PLD +.3960e1 ab plb PLB +.3960e2 6b rtl RTL +.3960e3 28 plp pass_failure PLP +.3960e4 2b pld PLD +.3960e5 ab plb PLB +.3960e6 18 clc CLC +.3960e7 6b rtl RTL +.3960e8 FDC_Write_Sector +.3960e8 8b phb PHB +.3960e9 0b phd PHD +.3960ea 08 php PHP +.3960eb 48 pha PHA ; begin setdbr macro +.3960ec 08 php PHP +.3960ed e2 20 sep #$20 SEP #$20 ; set A short +.3960ef a9 00 lda #$00 LDA #0 +.3960f1 48 pha PHA +.3960f2 ab plb PLB +.3960f3 28 plp PLP +.3960f4 68 pla PLA ; end setdbr macro +.3960f5 48 pha PHA ; begin setdp macro +.3960f6 08 php PHP +.3960f7 c2 20 rep #$20 REP #$20 ; set A long +.3960f9 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.3960fc 5b tcd TCD +.3960fd 28 plp PLP +.3960fe 68 pla PLA ; end setdp macro +.3960ff e2 20 sep #$20 SEP #$20 ; set A short +.396101 22 ae 5d 39 jsl $395dae JSL FDC_MOTOR_NEEDED ; Reset the spindle motor timeout clock +.396105 a9 05 lda #$05 LDA #FDC_CMD_WRITE_DATA ; The WRITE_DATA command +.396107 09 40 ora #$40 ORA #FDC_CMD_MFM ; Turn on MFM mode +.396109 8d 00 05 sta $0500 STA FDC_PARAMETERS +.39610c a5 01 lda $0301 LDA FDC_HEAD ; Get the head +.39610e 29 01 and #$01 AND #$01 +.396110 0a asl a ASL A +.396111 0a asl a ASL A +.396112 05 00 ora $0300 ORA FDC_DRIVE ; And the drive number +.396114 8d 01 05 sta $0501 STA FDC_PARAMETERS+1 +.396117 a5 02 lda $0302 LDA FDC_CYLINDER ; Send the cylinder number +.396119 8d 02 05 sta $0502 STA FDC_PARAMETERS+2 +.39611c a5 01 lda $0301 LDA FDC_HEAD ; Send the head number +.39611e 8d 03 05 sta $0503 STA FDC_PARAMETERS+3 +.396121 a5 03 lda $0303 LDA FDC_SECTOR ; Send the sector number +.396123 8d 04 05 sta $0504 STA FDC_PARAMETERS+4 +.396126 a9 02 lda #$02 LDA #$02 ; --- N ---- Sector Size (2 = 512Bytes) +.396128 8d 05 05 sta $0505 STA FDC_PARAMETERS+5 +.39612b a9 12 lda #$12 LDA #18 ; --- EOT ---- End of Track +.39612d 8d 06 05 sta $0506 STA FDC_PARAMETERS+6 +.396130 a9 1b lda #$1b LDA #$1B ; --- GPL ---- End of Track +.396132 8d 07 05 sta $0507 STA FDC_PARAMETERS+7 +.396135 a9 ff lda #$ff LDA #$FF ; --- DTL ---- Special sector size +.396137 8d 08 05 sta $0508 STA FDC_PARAMETERS+8 +.39613a a9 09 lda #$09 LDA #9 +.39613c 8d 30 05 sta $0530 STA FDC_PARAM_NUM ; 9 parameter (the command) +.39613f a9 ff lda #$ff LDA #$FF +.396141 8d 33 05 sta $0533 STA FDC_EXPECT_DAT ; Expect to write data +.396144 a9 07 lda #$07 LDA #7 +.396146 8d 32 05 sta $0532 STA FDC_RESULT_NUM ; 7 results +.396149 22 fe 5b 39 jsl $395bfe command JSL FDC_COMMAND ; Issue the command +.39614d 08 php PHP +.39614e ad 10 05 lda $0510 get_results LDA FDC_RESULTS +.396151 85 06 sta $0306 STA FDC_ST0 ; --- ST0 --- +.396153 ad 11 05 lda $0511 LDA FDC_RESULTS+1 +.396156 85 07 sta $0307 STA FDC_ST1 ; --- ST1 --- +.396158 ad 12 05 lda $0512 LDA FDC_RESULTS+2 +.39615b 85 08 sta $0308 STA FDC_ST2 ; --- ST2 --- +.39615d ad 13 05 lda $0513 LDA FDC_RESULTS+3 +.396160 85 02 sta $0302 STA FDC_CYLINDER ; --- C --- +.396162 ad 14 05 lda $0514 LDA FDC_RESULTS+4 +.396165 85 01 sta $0301 STA FDC_HEAD ; --- H --- +.396167 ad 15 05 lda $0515 LDA FDC_RESULTS+5 +.39616a 85 0a sta $030a STA FDC_PCN ; --- R --- +.39616c ad 16 05 lda $0516 LDA FDC_RESULTS+6 +.39616f 85 04 sta $0304 STA FDC_SECTOR_SIZE ; --- N --- +.396171 28 plp check_status PLP +.396172 90 04 bcc $396178 BCC pass_failure +.396174 28 plp done PLP +.396175 2b pld PLD +.396176 ab plb PLB +.396177 6b rtl RTL +.396178 28 plp pass_failure PLP +.396179 2b pld PLD +.39617a ab plb PLB +.39617b 18 clc CLC +.39617c 6b rtl RTL +.39617d DIVIDE32 +.39617d da phx PHX +.39617e 5a phy PHY +.39617f 0b phd PHD +.396180 08 php PHP +.396181 48 pha PHA ; begin setdp macro +.396182 08 php PHP +.396183 c2 20 rep #$20 REP #$20 ; set A long +.396185 a9 0c 03 lda #$030c LDA #DIVIDEND ; set DP to page 0 +.396188 5b tcd TCD +.396189 28 plp PLP +.39618a 68 pla PLA ; end setdp macro +.39618b c2 30 rep #$30 REP #$30 ; set A&X long +.39618d 64 08 stz $0314 STZ REMAINDER ; Initialize the remainder +.39618f 64 0a stz $0316 STZ REMAINDER+2 +.396191 a2 20 00 ldx #$0020 LDX #32 ; Set the number of bits to process +.396194 06 00 asl $030c loop ASL DIVIDEND +.396196 26 02 rol $030e ROL DIVIDEND+2 +.396198 26 08 rol $0314 ROL REMAINDER +.39619a 26 0a rol $0316 ROL REMAINDER+2 +.39619c a5 08 lda $0314 LDA REMAINDER +.39619e 38 sec SEC +.39619f e5 04 sbc $0310 SBC DIVISOR +.3961a1 a8 tay TAY +.3961a2 a5 0a lda $0316 LDA REMAINDER+2 +.3961a4 e5 06 sbc $0312 SBC DIVISOR+2 +.3961a6 90 06 bcc $3961ae BCC skip +.3961a8 85 0a sta $0316 STA REMAINDER+2 +.3961aa 84 08 sty $0314 STY REMAINDER +.3961ac e6 00 inc $030c INC DIVIDEND +.3961ae ca dex skip DEX +.3961af d0 e3 bne $396194 BNE loop +.3961b1 28 plp PLP +.3961b2 2b pld PLD +.3961b3 7a ply PLY +.3961b4 fa plx PLX +.3961b5 60 rts RTS +.3961b6 LBA2CHS +.3961b6 8b phb PHB +.3961b7 0b phd PHD +.3961b8 08 php PHP +.3961b9 48 pha PHA ; begin setdbr macro +.3961ba 08 php PHP +.3961bb e2 20 sep #$20 SEP #$20 ; set A short +.3961bd a9 00 lda #$00 LDA #0 +.3961bf 48 pha PHA +.3961c0 ab plb PLB +.3961c1 28 plp PLP +.3961c2 68 pla PLA ; end setdbr macro +.3961c3 48 pha PHA ; begin setdp macro +.3961c4 08 php PHP +.3961c5 c2 20 rep #$20 REP #$20 ; set A long +.3961c7 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.3961ca 5b tcd TCD +.3961cb 28 plp PLP +.3961cc 68 pla PLA ; end setdp macro +.3961cd c2 30 rep #$30 REP #$30 ; set A&X long +.3961cf a5 22 lda $0322 LDA BIOS_LBA +.3961d1 85 0c sta $030c STA DIVIDEND +.3961d3 a5 24 lda $0324 LDA BIOS_LBA+2 +.3961d5 85 0e sta $030e STA DIVIDEND+2 +.3961d7 a9 24 00 lda #$0024 LDA #36 +.3961da 85 10 sta $0310 STA DIVISOR +.3961dc 64 12 stz $0312 STZ DIVISOR+2 +.3961de 20 7d 61 jsr $39617d JSR DIVIDE32 +.3961e1 e2 20 sep #$20 SEP #$20 ; set A short +.3961e3 a5 0c lda $030c LDA DIVIDEND +.3961e5 85 02 sta $0302 STA FDC_CYLINDER +.3961e7 c2 20 rep #$20 REP #$20 ; set A long +.3961e9 a5 14 lda $0314 LDA REMAINDER +.3961eb 85 0c sta $030c STA DIVIDEND +.3961ed a5 16 lda $0316 LDA REMAINDER+2 +.3961ef 85 0e sta $030e STA DIVIDEND+2 +.3961f1 a9 12 00 lda #$0012 LDA #18 +.3961f4 85 10 sta $0310 STA DIVISOR +.3961f6 64 12 stz $0312 STZ DIVISOR+2 +.3961f8 20 7d 61 jsr $39617d JSR DIVIDE32 +.3961fb e2 20 sep #$20 SEP #$20 ; set A short +.3961fd a5 0c lda $030c LDA DIVIDEND +.3961ff 29 01 and #$01 AND #$01 +.396201 85 01 sta $0301 STA FDC_HEAD +.396203 a5 14 lda $0314 LDA REMAINDER +.396205 1a inc a INC A +.396206 85 03 sta $0303 STA FDC_SECTOR +.396208 28 plp PLP +.396209 2b pld PLD +.39620a ab plb PLB +.39620b 6b rtl RTL +.39620c FDC_GETBLOCK +.39620c 8b phb PHB +.39620d 0b phd PHD +.39620e 08 php PHP +.39620f 48 pha PHA ; begin setdbr macro +.396210 08 php PHP +.396211 e2 20 sep #$20 SEP #$20 ; set A short +.396213 a9 00 lda #$00 LDA #0 +.396215 48 pha PHA +.396216 ab plb PLB +.396217 28 plp PLP +.396218 68 pla PLA ; end setdbr macro +.396219 48 pha PHA ; begin setdp macro +.39621a 08 php PHP +.39621b c2 20 rep #$20 REP #$20 ; set A long +.39621d a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.396220 5b tcd TCD +.396221 28 plp PLP +.396222 68 pla PLA ; end setdp macro +.396223 e2 20 sep #$20 SEP #$20 ; set A short +.396225 a9 03 lda #$03 LDA #3 ; We can retry 3 times +.396227 8d 34 05 sta $0534 STA FDC_CMD_RETRY +.39622a c2 30 rep #$30 REP #$30 ; set A&X long +.39622c 22 b6 61 39 jsl $3961b6 JSL LBA2CHS ; Convert the LBA to CHS +.396230 e2 20 sep #$20 SEP #$20 ; set A short +.396232 a5 03 lda $0303 LDA FDC_SECTOR ; Just make sure the sector is ok +.396234 f0 29 beq $39625f BEQ read_failure +.396236 try_read +.396236 c2 20 rep #$20 REP #$20 ; set A long +.396238 22 53 60 39 jsl $396053 JSL FDC_Read_Sector ; Read the sector +.39623c 90 14 bcc $396252 BCC retry +.39623e e2 20 sep #$20 SEP #$20 ; set A short +.396240 a5 06 lda $0306 LDA FDC_ST0 +.396242 29 d0 and #$d0 AND #%11010000 ; Check the error bits +.396244 d0 19 bne $39625f BNE read_failure +.396246 ret_success +.396246 e2 20 sep #$20 SEP #$20 ; set A short +.396248 a9 00 lda #$00 LDA #0 +.39624a 8d 20 03 sta $0320 STA @w BIOS_STATUS +.39624d 28 plp PLP +.39624e 2b pld PLD +.39624f ab plb PLB +.396250 38 sec SEC +.396251 6b rtl RTL +.396252 retry +.396252 e2 20 sep #$20 SEP #$20 ; set A short +.396254 ce 34 05 dec $0534 DEC FDC_CMD_RETRY ; Decrement the retry counter +.396257 30 13 bmi $39626c BMI pass_failure ; If it's gone negative, we should quit with an error +.396259 22 4b 5d 39 jsl $395d4b JSL FDC_INIT ; Otherwise, reinitialize the FDC +.39625d 80 d7 bra $396236 BRA try_read ; And try the read again +.39625f read_failure +.39625f e2 20 sep #$20 SEP #$20 ; set A short +.396261 a9 82 lda #$82 LDA #BIOS_ERR_READ +.396263 80 04 bra $396269 BRA ret_failure +.396265 seek_failure .396265 e2 20 sep #$20 SEP #$20 ; set A short -.396267 a5 0c lda $030c LDA DIVIDEND -.396269 29 01 and #$01 AND #$01 -.39626b 85 01 sta $0301 STA FDC_HEAD -.39626d a5 14 lda $0314 LDA REMAINDER -.39626f 1a inc a INC A -.396270 85 03 sta $0303 STA FDC_SECTOR -.396272 28 plp PLP -.396273 2b pld PLD -.396274 ab plb PLB -.396275 6b rtl RTL -.396276 FDC_GETBLOCK -.396276 8b phb PHB -.396277 0b phd PHD -.396278 08 php PHP -.396279 48 pha PHA ; begin setdbr macro -.39627a 08 php PHP -.39627b e2 20 sep #$20 SEP #$20 ; set A short -.39627d a9 00 lda #$00 LDA #0 -.39627f 48 pha PHA -.396280 ab plb PLB -.396281 28 plp PLP -.396282 68 pla PLA ; end setdbr macro -.396283 48 pha PHA ; begin setdp macro -.396284 08 php PHP -.396285 c2 20 rep #$20 REP #$20 ; set A long -.396287 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.39628a 5b tcd TCD -.39628b 28 plp PLP -.39628c 68 pla PLA ; end setdp macro -.39628d e2 20 sep #$20 SEP #$20 ; set A short -.39628f a9 03 lda #$03 LDA #3 ; We can retry 3 times -.396291 8d 34 05 sta $0534 STA FDC_CMD_RETRY -.396294 c2 30 rep #$30 REP #$30 ; set A&X long -.396296 22 20 62 39 jsl $396220 JSL LBA2CHS ; Convert the LBA to CHS -.39629a e2 20 sep #$20 SEP #$20 ; set A short -.39629c a5 03 lda $0303 LDA FDC_SECTOR ; Just make sure the sector is ok -.39629e f0 29 beq $3962c9 BEQ read_failure -.3962a0 try_read -.3962a0 c2 20 rep #$20 REP #$20 ; set A long -.3962a2 22 bd 60 39 jsl $3960bd JSL FDC_Read_Sector ; Read the sector -.3962a6 90 14 bcc $3962bc BCC retry -.3962a8 e2 20 sep #$20 SEP #$20 ; set A short -.3962aa a5 06 lda $0306 LDA FDC_ST0 -.3962ac 29 d0 and #$d0 AND #%11010000 ; Check the error bits -.3962ae d0 19 bne $3962c9 BNE read_failure -.3962b0 ret_success -.3962b0 e2 20 sep #$20 SEP #$20 ; set A short -.3962b2 a9 00 lda #$00 LDA #0 -.3962b4 8d 20 03 sta $0320 STA @w BIOS_STATUS -.3962b7 28 plp PLP -.3962b8 2b pld PLD -.3962b9 ab plb PLB -.3962ba 38 sec SEC -.3962bb 6b rtl RTL -.3962bc retry -.3962bc e2 20 sep #$20 SEP #$20 ; set A short -.3962be ce 34 05 dec $0534 DEC FDC_CMD_RETRY ; Decrement the retry counter -.3962c1 30 13 bmi $3962d6 BMI pass_failure ; If it's gone negative, we should quit with an error -.3962c3 22 b5 5d 39 jsl $395db5 JSL FDC_INIT ; Otherwise, reinitialize the FDC -.3962c7 80 d7 bra $3962a0 BRA try_read ; And try the read again -.3962c9 read_failure -.3962c9 e2 20 sep #$20 SEP #$20 ; set A short -.3962cb a9 82 lda #$82 LDA #BIOS_ERR_READ -.3962cd 80 04 bra $3962d3 BRA ret_failure -.3962cf seek_failure -.3962cf e2 20 sep #$20 SEP #$20 ; set A short -.3962d1 a9 84 lda #$84 LDA #BIOS_ERR_TRACK -.3962d3 8d 20 03 sta $0320 ret_failure STA @w BIOS_STATUS -.3962d6 28 plp pass_failure PLP -.3962d7 2b pld PLD -.3962d8 ab plb PLB -.3962d9 18 clc CLC -.3962da 6b rtl RTL -.3962db FDC_PUTBLOCK -.3962db 8b phb PHB -.3962dc 0b phd PHD -.3962dd 08 php PHP -.3962de 48 pha PHA ; begin setdbr macro -.3962df 08 php PHP -.3962e0 e2 20 sep #$20 SEP #$20 ; set A short -.3962e2 a9 00 lda #$00 LDA #0 -.3962e4 48 pha PHA -.3962e5 ab plb PLB -.3962e6 28 plp PLP -.3962e7 68 pla PLA ; end setdbr macro -.3962e8 48 pha PHA ; begin setdp macro -.3962e9 08 php PHP -.3962ea c2 20 rep #$20 REP #$20 ; set A long -.3962ec a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.3962ef 5b tcd TCD -.3962f0 28 plp PLP -.3962f1 68 pla PLA ; end setdp macro -.3962f2 e2 20 sep #$20 SEP #$20 ; set A short -.3962f4 a9 03 lda #$03 LDA #3 ; Set the number of retries we're willing to do -.3962f6 8d 34 05 sta $0534 STA @w FDC_CMD_RETRY -.3962f9 c2 30 rep #$30 REP #$30 ; set A&X long -.3962fb 22 20 62 39 jsl $396220 JSL LBA2CHS ; Convert the LBA to CHS -.3962ff 22 52 61 39 jsl $396152 retry JSL FDC_Write_Sector ; Write the sector -.396303 b0 03 bcs $396308 BCS chk_st0 -.396305 82 28 00 brl $396330 BRL attempt_retry -.396308 chk_st0 -.396308 e2 20 sep #$20 SEP #$20 ; set A short -.39630a a5 06 lda $0306 LDA FDC_ST0 -.39630c 29 d0 and #$d0 AND #%11010000 ; Check the error bits -.39630e d0 0c bne $39631c BNE write_failure -.396310 ret_success -.396310 e2 20 sep #$20 SEP #$20 ; set A short -.396312 a9 00 lda #$00 LDA #0 -.396314 8d 20 03 sta $0320 STA @w BIOS_STATUS -.396317 28 plp PLP -.396318 2b pld PLD -.396319 ab plb PLB -.39631a 38 sec SEC -.39631b 6b rtl RTL -.39631c write_failure -.39631c e2 20 sep #$20 SEP #$20 ; set A short -.39631e a5 07 lda $0307 LDA FDC_ST1 ; Check ST1 for write protect -.396320 89 02 bit #$02 BIT #FDC_ST1_NW -.396322 f0 04 beq $396328 BEQ generic_err -.396324 a9 86 lda #$86 LDA #BIOS_ERR_WRITEPROT ; Yes: return a write-protect error -.396326 80 17 bra $39633f BRA ret_failure -.396328 89 10 bit #$10 generic_err BIT #FDC_ST1_OR ; TODO: properly handle over/under run errors -.39632a d0 e4 bne $396310 BNE ret_success -.39632c 89 80 bit #$80 BIT #FDC_ST1_EN ; TODO: properly handle end-of-track -.39632e d0 e0 bne $396310 BNE ret_success -.396330 attempt_retry -.396330 e2 20 sep #$20 SEP #$20 ; set A short -.396332 ce 34 05 dec $0534 DEC @w FDC_CMD_RETRY ; Count down the retries -.396335 d0 c8 bne $3962ff BNE retry ; And retry unless we have none left -.396337 a9 83 lda #$83 LDA #BIOS_ERR_WRITE ; Otherwise: return a generic write error -.396339 80 04 bra $39633f BRA ret_failure -.39633b seek_failure -.39633b e2 20 sep #$20 SEP #$20 ; set A short -.39633d a9 84 lda #$84 LDA #BIOS_ERR_TRACK -.39633f ret_failure -.39633f 8d 20 03 sta $0320 STA @w BIOS_STATUS -.396342 28 plp pass_failure PLP -.396343 2b pld PLD -.396344 ab plb PLB -.396345 18 clc CLC -.396346 6b rtl RTL -.396347 FDC_MOUNT -.396347 8b phb PHB -.396348 0b phd PHD -.396349 08 php PHP -.39634a 48 pha PHA ; begin setdbr macro -.39634b 08 php PHP -.39634c e2 20 sep #$20 SEP #$20 ; set A short -.39634e a9 00 lda #$00 LDA #0 -.396350 48 pha PHA -.396351 ab plb PLB -.396352 28 plp PLP -.396353 68 pla PLA ; end setdbr macro -.396354 48 pha PHA ; begin setdp macro -.396355 08 php PHP -.396356 c2 20 rep #$20 REP #$20 ; set A long -.396358 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.39635b 5b tcd TCD -.39635c 28 plp PLP -.39635d 68 pla PLA ; end setdp macro -.39635e 22 b5 5d 39 jsl $395db5 JSL FDC_INIT -.396362 e2 20 sep #$20 SEP #$20 ; set A short -.396364 c2 10 rep #$10 REP #$10 ; set X long -.396366 a9 00 lda #$00 LDA #0 -.396368 a2 00 00 ldx #$0000 LDX #0 -.39636b 9f 00 a3 38 sta $38a300,x zero_loop STA DOS_SECTOR,X -.39636f e8 inx INX -.396370 e0 00 02 cpx #$0200 CPX #512 -.396373 d0 f6 bne $39636b BNE zero_loop -.396375 a9 00 lda #$00 LDA #0 ; We only support drive 0 -.396377 85 00 sta $0300 STA FDC_DRIVE -.396379 22 31 5e 39 jsl $395e31 JSL FDC_Motor_On ; Turn the motor on -.39637d c2 30 rep #$30 REP #$30 ; set A&X long -.39637f a9 00 00 lda #$0000 LDA #0 ; We want sector 0 -.396382 85 22 sta $0322 STA BIOS_LBA -.396384 85 24 sta $0324 STA BIOS_LBA+2 -.396386 a9 00 a3 lda #$a300 LDA #<>DOS_SECTOR ; And load it into DOS_SECTOR -.396389 85 26 sta $0326 STA BIOS_BUFF_PTR -.39638b a9 38 00 lda #$0038 LDA #`DOS_SECTOR -.39638e 85 28 sta $0328 STA BIOS_BUFF_PTR+2 -.396390 22 76 62 39 jsl $396276 JSL FDC_GETBLOCK ; Attempt to read the data -.396394 b0 03 bcs $396399 BCS parse_boot ; If ok: start parsing the boot record -.396396 82 d3 00 brl $39646c BRL pass_failure ; Pass the error up the chain -.396399 parse_boot -.396399 e2 20 sep #$20 SEP #$20 ; set A short -.39639b a9 00 lda #$00 LDA #PART_TYPE_FAT12 ; Set the file system to FAT12 -.39639d 8f 01 a0 38 sta $38a001 STA @l FILE_SYSTEM -.3963a1 a9 00 lda #$00 LDA #0 ; There are no partitions on the disk -.3963a3 8f 02 a0 38 sta $38a002 STA @l PARTITION -.3963a7 e2 20 sep #$20 SEP #$20 ; set A short -.3963a9 af 0d a3 38 lda $38a30d LDA DOS_SECTOR+BPB_SECPERCLUS12_OFF ; Get the # of sectors per cluster (usually 1) -.3963ad 8f 03 a0 38 sta $38a003 STA @l SECTORS_PER_CLUSTER -.3963b1 c2 20 rep #$20 REP #$20 ; set A long -.3963b3 a9 00 00 lda #$0000 LDA #0 ; First sector of the "partition" is 0 -.3963b6 8f 04 a0 38 sta $38a004 STA @l FIRSTSECTOR -.3963ba 8f 06 a0 38 sta $38a006 STA @l FIRSTSECTOR+2 -.3963be af 16 a3 38 lda $38a316 LDA DOS_SECTOR+BPB_SECPERFAT12_OFF ; Get the number of sectors per FAT -.3963c2 8f 10 a0 38 sta $38a010 STA @l SEC_PER_FAT -.3963c6 a9 00 00 lda #$0000 LDA #0 -.3963c9 8f 12 a0 38 sta $38a012 STA @l SEC_PER_FAT+2 -.3963cd a9 01 00 lda #$0001 LDA #1 ; FAT#1 begins at sector 1 -.3963d0 8f 14 a0 38 sta $38a014 STA @l FAT_BEGIN_LBA -.3963d4 18 clc CLC -.3963d5 6f 10 a0 38 adc $38a010 ADC @l SEC_PER_FAT -.3963d9 8f 18 a0 38 sta $38a018 STA @l FAT2_BEGIN_LBA ; FAT#2 begins SEC_PER_FAT sectors later -.3963dd a9 00 00 lda #$0000 LDA #0 -.3963e0 8f 16 a0 38 sta $38a016 STA @l FAT_BEGIN_LBA+2 -.3963e4 8f 1a a0 38 sta $38a01a STA @L FAT2_BEGIN_LBA+2 -.3963e8 18 clc CLC ; Calculate the root directory's starting sector -.3963e9 af 18 a0 38 lda $38a018 LDA @l FAT2_BEGIN_LBA -.3963ed 6f 10 a0 38 adc $38a010 ADC @l SEC_PER_FAT -.3963f1 8f 20 a0 38 sta $38a020 STA @l ROOT_DIR_FIRST_CLUSTER ; ROOT_DIR_FIRST_CLUSTER will be a sector LBA for FAT12! -.3963f5 a9 00 00 lda #$0000 LDA #0 -.3963f8 8f 22 a0 38 sta $38a022 STA @l ROOT_DIR_FIRST_CLUSTER+2 -.3963fc af 11 a3 38 lda $38a311 LDA DOS_SECTOR+BPB_ROOT_MAX_ENTRY12_OFF ; Get the maximum number of directory entries for the root dir -.396400 8f 24 a0 38 sta $38a024 STA @l ROOT_DIR_MAX_ENTRY -.396404 4a lsr a LSR A ; 16 entries per sector -.396405 4a lsr a LSR A -.396406 4a lsr a LSR A -.396407 4a lsr a LSR A ; So now A is the number of sectors in the root directory -.396408 18 clc CLC -.396409 6f 20 a0 38 adc $38a020 ADC @L ROOT_DIR_FIRST_CLUSTER ; Add that to the first sector LBA for the root directory -.39640d 8f 1c a0 38 sta $38a01c STA @l CLUSTER_BEGIN_LBA ; And that is the LBA for the first cluster -.396411 a9 00 00 lda #$0000 LDA #0 -.396414 8f 1e a0 38 sta $38a01e STA @l CLUSTER_BEGIN_LBA+2 -.396418 af 13 a3 38 lda $38a313 LDA DOS_SECTOR+BPB_TOTAL_SECTORS ; Set the sector limit -.39641c 8f 08 a0 38 sta $38a008 STA @l SECTORCOUNT -.396420 a9 00 00 lda #$0000 LDA #0 -.396423 8f 0a a0 38 sta $38a00a STA @l SECTORCOUNT+2 -.396427 af 0e a3 38 lda $38a30e LDA DOS_SECTOR+BPB_RSRVCLUS_OFF ; Get the number of reserved clusters -.39642b 8f 0c a0 38 sta $38a00c STA @l NUM_RSRV_SEC -.39642f a9 00 02 lda #$0200 LDA #DOS_SECTOR_SIZE ; Set the size of a FAT12 cluster -.396432 8f 0e a0 38 sta $38a00e STA @l CLUSTER_SIZE -.396436 e2 20 sep #$20 SEP #$20 ; set A short -.396438 af 26 a3 38 lda $38a326 LDA DOS_SECTOR+BPB_SIGNATUREB ; Is signature B $29? -.39643c c9 29 cmp #$29 CMP #BPB_EXTENDED_RECORD -.39643e 80 14 bra $396454 BRA no_volume_id ; No: there is no volume ID -.396440 is_extended -.396440 c2 20 rep #$20 REP #$20 ; set A long -.396442 af 27 a3 38 lda $38a327 LDA DOS_SECTOR+BPB_VOLUMEID ; Yes: set the volume ID -.396446 8f 26 a0 38 sta $38a026 STA @l VOLUME_ID -.39644a af 29 a3 38 lda $38a329 LDA DOS_SECTOR+BPB_VOLUMEID+2 -.39644e 8f 28 a0 38 sta $38a028 STA @l VOLUME_ID+2 -.396452 80 0d bra $396461 BRA ret_success -.396454 no_volume_id -.396454 c2 20 rep #$20 REP #$20 ; set A long -.396456 a9 00 00 lda #$0000 LDA #0 ; No: blank the Volume ID -.396459 8f 26 a0 38 sta $38a026 STA @l VOLUME_ID -.39645d 8f 28 a0 38 sta $38a028 STA @L VOLUME_ID+2 -.396461 ret_success -.396461 e2 20 sep #$20 SEP #$20 ; set A short -.396463 a9 00 lda #$00 LDA #0 -.396465 85 20 sta $0320 STA BIOS_STATUS -.396467 28 plp PLP -.396468 2b pld PLD -.396469 ab plb PLB -.39646a 38 sec SEC -.39646b 6b rtl RTL -.39646c 28 plp pass_failure PLP -.39646d 2b pld PLD -.39646e ab plb PLB -.39646f 18 clc CLC -.396470 6b rtl RTL -.396471 FDC_CMDBLOCK -.396471 8b phb PHB -.396472 0b phd PHD -.396473 08 php PHP -.396474 48 pha PHA ; begin setdbr macro -.396475 08 php PHP -.396476 e2 20 sep #$20 SEP #$20 ; set A short -.396478 a9 00 lda #$00 LDA #0 -.39647a 48 pha PHA -.39647b ab plb PLB -.39647c 28 plp PLP -.39647d 68 pla PLA ; end setdbr macro -.39647e 48 pha PHA ; begin setdp macro -.39647f 08 php PHP -.396480 c2 20 rep #$20 REP #$20 ; set A long -.396482 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.396485 5b tcd TCD -.396486 28 plp PLP -.396487 68 pla PLA ; end setdp macro -.396488 e2 30 sep #$30 SEP #$30 ; set A&X short -.39648a e0 01 cpx #$01 CPX #FDC_DEVCMD_MOTOR_ON -.39648c f0 0f beq $39649d BEQ motor_on -.39648e e0 02 cpx #$02 CPX #FDC_DEVCMD_MOTOR_OFF -.396490 f0 11 beq $3964a3 BEQ motor_off -.396492 e0 03 cpx #$03 CPX #FDC_DEVCMD_RECAL -.396494 f0 13 beq $3964a9 BEQ recalibrate -.396496 64 20 stz $0320 ret_success STZ BIOS_STATUS -.396498 28 plp PLP -.396499 2b pld PLD -.39649a ab plb PLB -.39649b 38 sec SEC -.39649c 6b rtl RTL -.39649d 22 31 5e 39 jsl $395e31 motor_on JSL FDC_Motor_On -.3964a1 80 f3 bra $396496 BRA ret_success -.3964a3 22 65 5e 39 jsl $395e65 motor_off JSL FDC_Motor_Off -.3964a7 80 ed bra $396496 BRA ret_success -.3964a9 22 90 5e 39 jsl $395e90 recalibrate JSL FDC_Recalibrate_Command -.3964ad b0 e7 bcs $396496 BCS ret_success -.3964af 28 plp pass_failure PLP -.3964b0 2b pld PLD -.3964b1 ab plb PLB -.3964b2 18 clc CLC -.3964b3 6b rtl RTL -.3964b4 FDC_CHK_MEDIA -.3964b4 0b phd PHD -.3964b5 08 php PHP -.3964b6 48 pha PHA ; begin setdp macro -.3964b7 08 php PHP -.3964b8 c2 20 rep #$20 REP #$20 ; set A long -.3964ba a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 -.3964bd 5b tcd TCD -.3964be 28 plp PLP -.3964bf 68 pla PLA ; end setdp macro -.3964c0 22 31 5e 39 jsl $395e31 JSL FDC_Motor_On ; Turn on the motor -.3964c4 e2 20 sep #$20 SEP #$20 ; set A short -.3964c6 af f7 13 af lda $af13f7 LDA @l SIO_FDC_DIR ; Check if the DSKCHG bit is set -.3964ca 89 80 bit #$80 BIT #FDC_DIR_DSKCHG -.3964cc f0 42 beq $396510 BEQ ret_true ; If not: assume the disk is present -.3964ce a9 00 lda #$00 LDA #0 -.3964d0 85 00 sta $0300 STA FDC_DRIVE -.3964d2 a9 00 lda #$00 LDA #0 -.3964d4 85 01 sta $0301 STA FDC_HEAD -.3964d6 a9 50 lda #$50 LDA #80 -.3964d8 85 02 sta $0302 STA FDC_CYLINDER -.3964da 22 70 60 39 jsl $396070 JSL FDC_Seek_Track ; Attempt to seek to track 80 -.3964de 90 34 bcc $396514 BCC ret_false ; If fail: return false -.3964e0 c2 10 rep #$10 REP #$10 ; set X long -.3964e2 a2 1e 8b ldx #$8b1e LDX #<>FDC_MOTOR_TIME ; Wait a suitable time for the motor to spin up -.3964e5 a0 41 00 ldy #$0041 LDY #`FDC_MOTOR_TIME -.3964e8 22 f4 0f 39 jsl $390ff4 JSL IDELAY -.3964ec 22 c5 5e 39 jsl $395ec5 JSL FDC_Sense_Int_Status -.3964f0 a5 06 lda $0306 LDA FDC_ST0 -.3964f2 29 d0 and #$d0 AND #%11010000 -.3964f4 d0 1e bne $396514 BNE ret_false -.3964f6 22 90 5e 39 jsl $395e90 JSL FDC_Recalibrate_Command ; Attempt to recalibrate -.3964fa 90 18 bcc $396514 BCC ret_false ; If fail: return false -.3964fc a2 1e 8b ldx #$8b1e LDX #<>FDC_MOTOR_TIME ; Wait a suitable time for the motor to spin up -.3964ff a0 41 00 ldy #$0041 LDY #`FDC_MOTOR_TIME -.396502 22 f4 0f 39 jsl $390ff4 JSL IDELAY -.396506 22 c5 5e 39 jsl $395ec5 JSL FDC_Sense_Int_Status -.39650a a5 06 lda $0306 LDA FDC_ST0 -.39650c 29 d0 and #$d0 AND #%11010000 -.39650e d0 04 bne $396514 BNE ret_false -.396510 ret_true -.396510 28 plp PLP -.396511 2b pld PLD -.396512 38 sec SEC -.396513 6b rtl RTL -.396514 ret_false -.396514 28 plp PLP -.396515 2b pld PLD -.396516 18 clc CLC -.396517 6b rtl RTL -.396518 FDC_WRITEVBR -.396518 8b phb PHB -.396519 0b phd PHD -.39651a 08 php PHP -.39651b 48 pha PHA ; begin setdbr macro -.39651c 08 php PHP -.39651d e2 20 sep #$20 SEP #$20 ; set A short -.39651f a9 00 lda #$00 LDA #0 -.396521 48 pha PHA -.396522 ab plb PLB -.396523 28 plp PLP -.396524 68 pla PLA ; end setdbr macro -.396525 48 pha PHA ; begin setdp macro -.396526 08 php PHP -.396527 c2 20 rep #$20 REP #$20 ; set A long -.396529 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.39652c 5b tcd TCD -.39652d 28 plp PLP -.39652e 68 pla PLA ; end setdp macro -.39652f 22 47 63 39 jsl $396347 JSL FDC_MOUNT ; Mount the floppy disk -.396533 c2 30 rep #$30 REP #$30 ; set A&X long -.396535 a9 00 00 lda #$0000 LDA #0 ; Clear the sector buffer -.396538 a2 00 00 ldx #$0000 LDX #0 -.39653b 9f 00 a3 38 sta $38a300,x clr_loop STA DOS_SECTOR,X -.39653f e8 inx INX -.396540 e8 inx INX -.396541 e0 00 02 cpx #$0200 CPX #512 -.396544 d0 f5 bne $39653b BNE clr_loop -.396546 e2 20 sep #$20 SEP #$20 ; set A short -.396548 a2 00 00 ldx #$0000 LDX #0 ; Copy the prototype VBR to the sector buffer -.39654b bf 00 66 39 lda $396600,x copy_loop LDA FDC_VBR_BEGIN,X -.39654f 9f 00 a3 38 sta $38a300,x STA DOS_SECTOR,X -.396553 e8 inx INX -.396554 e0 c9 00 cpx #$00c9 CPX #<>(FDC_VBR_END - FDC_VBR_BEGIN + 1) -.396557 d0 f2 bne $39654b BNE copy_loop -.396559 a0 00 00 ldy #$0000 LDY #0 ; Copy the boot binary path to the VBR -.39655c a2 40 00 ldx #$0040 LDX #FDC_VBR_PATH -.39655f b7 3c lda [$035c],y path_copy_loop LDA [DOS_RUN_PTR],Y -.396561 9f 00 a3 38 sta $38a300,x STA DOS_SECTOR,X -.396565 f0 07 beq $39656e BEQ path_copy_done -.396567 e8 inx INX -.396568 c8 iny INY -.396569 c0 80 00 cpy #$0080 CPY #128 -.39656c d0 f1 bne $39655f BNE path_copy_loop -.39656e path_copy_done -.39656e c2 20 rep #$20 REP #$20 ; set A long -.396570 a9 55 aa lda #$aa55 LDA #$AA55 ; Set the VBR signature bytes at the end -.396573 8f fe a4 38 sta $38a4fe STA DOS_SECTOR+BPB_SIGNATURE -.396577 c2 20 rep #$20 REP #$20 ; set A long -.396579 a9 00 a3 lda #$a300 LDA #<>DOS_SECTOR ; Point to the BIOS buffer -.39657c 85 06 sta $0326 STA BIOS_BUFF_PTR -.39657e a9 38 00 lda #$0038 LDA #`DOS_SECTOR -.396581 85 08 sta $0328 STA BIOS_BUFF_PTR+2 -.396583 a9 00 00 lda #$0000 LDA #0 ; Set the sector to #0 (boot record) -.396586 85 02 sta $0322 STA BIOS_LBA -.396588 85 04 sta $0324 STA BIOS_LBA+2 -.39658a e2 20 sep #$20 SEP #$20 ; set A short -.39658c a9 00 lda #$00 LDA #BIOS_DEV_FDC -.39658e 85 01 sta $0321 STA BIOS_DEV -.396590 22 24 10 00 jsl $001024 JSL PUTBLOCK ; Attempt to write the boot record -.396594 b0 09 bcs $39659f BCS ret_success -.396596 22 65 5e 39 jsl $395e65 JSL FDC_Motor_Off -.39659a 28 plp PLP ; Return the failure -.39659b 2b pld PLD -.39659c ab plb PLB -.39659d 18 clc CLC -.39659e 6b rtl RTL -.39659f 22 65 5e 39 jsl $395e65 ret_success JSL FDC_Motor_Off -.3965a3 e2 20 sep #$20 SEP #$20 ; set A short -.3965a5 a9 00 lda #$00 LDA #0 -.3965a7 85 00 sta $0320 STA BIOS_STATUS -.3965a9 28 plp PLP -.3965aa 2b pld PLD -.3965ab ab plb PLB -.3965ac 38 sec SEC -.3965ad 6b rtl RTL -.3965ae FDC_TIME_HANDLE -.3965ae 08 php PHP -.3965af e2 20 sep #$20 SEP #$20 ; set A short -.3965b1 af 4e a0 38 lda $38a04e LDA @l FDC_MOTOR_TIMER ; Check the FDC motor count-down timer -.3965b5 d0 06 bne $3965bd BNE dec_motor ; If not zero: decrement the timer -.3965b7 af 4f a0 38 lda $38a04f LDA @l FDC_MOTOR_TIMER+1 ; Check the high byte -.3965bb f0 28 beq $3965e5 BEQ sof_timeout ; If zero: move on to the next timer -.3965bd af 4e a0 38 lda $38a04e dec_motor LDA @l FDC_MOTOR_TIMER ; Decrement the low byte -.3965c1 3a dec a DEC A -.3965c2 8f 4e a0 38 sta $38a04e STA @l FDC_MOTOR_TIMER -.3965c6 c9 ff cmp #$ff CMP #$FF ; Did it roll over? -.3965c8 d0 0b bne $3965d5 BNE chk_motor_end ; No: check to see if we're a the end -.3965ca af 4f a0 38 lda $38a04f LDA @l FDC_MOTOR_TIMER+1 ; Decrement the high byte -.3965ce 3a dec a DEC A -.3965cf 8f 4f a0 38 sta $38a04f STA @l FDC_MOTOR_TIMER+1 -.3965d3 80 10 bra $3965e5 BRA sof_timeout ; And move on to the next timer -.3965d5 af 4e a0 38 lda $38a04e chk_motor_end LDA @l FDC_MOTOR_TIMER ; Check timer -.3965d9 d0 0a bne $3965e5 BNE sof_timeout ; if it's <>0, move on to the next timer -.3965db af 4f a0 38 lda $38a04f LDA @l FDC_MOTOR_TIMER+1 -.3965df d0 04 bne $3965e5 BNE sof_timeout -.3965e1 22 65 5e 39 jsl $395e65 JSL FDC_Motor_Off ; Otherwise, turn off the motor -.3965e5 sof_timeout -.3965e5 e2 20 sep #$20 SEP #$20 ; set A short -.3965e7 af 2d 03 00 lda $00032d LDA @l BIOS_TIMER ; Check the BIOS_TIMER -.3965eb f0 11 beq $3965fe BEQ sof_int_done ; If it's 0, we don't do anything -.3965ed 3a dec a DEC A ; Count down one tick -.3965ee 8f 2d 03 00 sta $00032d STA @l BIOS_TIMER -.3965f2 d0 0a bne $3965fe BNE sof_int_done ; If not 0, we're done -.3965f4 af 2c 03 00 lda $00032c LDA @l BIOS_FLAGS ; Otherwise: flag a time out event -.3965f8 09 80 ora #$80 ORA #BIOS_TIMEOUT -.3965fa 8f 2c 03 00 sta $00032c STA @l BIOS_FLAGS -.3965fe 28 plp sof_int_done PLP -.3965ff 6b rtl RTL +.396267 a9 84 lda #$84 LDA #BIOS_ERR_TRACK +.396269 8d 20 03 sta $0320 ret_failure STA @w BIOS_STATUS +.39626c 28 plp pass_failure PLP +.39626d 2b pld PLD +.39626e ab plb PLB +.39626f 18 clc CLC +.396270 6b rtl RTL +.396271 FDC_PUTBLOCK +.396271 8b phb PHB +.396272 0b phd PHD +.396273 08 php PHP +.396274 48 pha PHA ; begin setdbr macro +.396275 08 php PHP +.396276 e2 20 sep #$20 SEP #$20 ; set A short +.396278 a9 00 lda #$00 LDA #0 +.39627a 48 pha PHA +.39627b ab plb PLB +.39627c 28 plp PLP +.39627d 68 pla PLA ; end setdbr macro +.39627e 48 pha PHA ; begin setdp macro +.39627f 08 php PHP +.396280 c2 20 rep #$20 REP #$20 ; set A long +.396282 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.396285 5b tcd TCD +.396286 28 plp PLP +.396287 68 pla PLA ; end setdp macro +.396288 e2 20 sep #$20 SEP #$20 ; set A short +.39628a a9 03 lda #$03 LDA #3 ; Set the number of retries we're willing to do +.39628c 8d 34 05 sta $0534 STA @w FDC_CMD_RETRY +.39628f c2 30 rep #$30 REP #$30 ; set A&X long +.396291 22 b6 61 39 jsl $3961b6 JSL LBA2CHS ; Convert the LBA to CHS +.396295 22 e8 60 39 jsl $3960e8 retry JSL FDC_Write_Sector ; Write the sector +.396299 b0 03 bcs $39629e BCS chk_st0 +.39629b 82 28 00 brl $3962c6 BRL attempt_retry +.39629e chk_st0 +.39629e e2 20 sep #$20 SEP #$20 ; set A short +.3962a0 a5 06 lda $0306 LDA FDC_ST0 +.3962a2 29 d0 and #$d0 AND #%11010000 ; Check the error bits +.3962a4 d0 0c bne $3962b2 BNE write_failure +.3962a6 ret_success +.3962a6 e2 20 sep #$20 SEP #$20 ; set A short +.3962a8 a9 00 lda #$00 LDA #0 +.3962aa 8d 20 03 sta $0320 STA @w BIOS_STATUS +.3962ad 28 plp PLP +.3962ae 2b pld PLD +.3962af ab plb PLB +.3962b0 38 sec SEC +.3962b1 6b rtl RTL +.3962b2 write_failure +.3962b2 e2 20 sep #$20 SEP #$20 ; set A short +.3962b4 a5 07 lda $0307 LDA FDC_ST1 ; Check ST1 for write protect +.3962b6 89 02 bit #$02 BIT #FDC_ST1_NW +.3962b8 f0 04 beq $3962be BEQ generic_err +.3962ba a9 86 lda #$86 LDA #BIOS_ERR_WRITEPROT ; Yes: return a write-protect error +.3962bc 80 17 bra $3962d5 BRA ret_failure +.3962be 89 10 bit #$10 generic_err BIT #FDC_ST1_OR ; TODO: properly handle over/under run errors +.3962c0 d0 e4 bne $3962a6 BNE ret_success +.3962c2 89 80 bit #$80 BIT #FDC_ST1_EN ; TODO: properly handle end-of-track +.3962c4 d0 e0 bne $3962a6 BNE ret_success +.3962c6 attempt_retry +.3962c6 e2 20 sep #$20 SEP #$20 ; set A short +.3962c8 ce 34 05 dec $0534 DEC @w FDC_CMD_RETRY ; Count down the retries +.3962cb d0 c8 bne $396295 BNE retry ; And retry unless we have none left +.3962cd a9 83 lda #$83 LDA #BIOS_ERR_WRITE ; Otherwise: return a generic write error +.3962cf 80 04 bra $3962d5 BRA ret_failure +.3962d1 seek_failure +.3962d1 e2 20 sep #$20 SEP #$20 ; set A short +.3962d3 a9 84 lda #$84 LDA #BIOS_ERR_TRACK +.3962d5 ret_failure +.3962d5 8d 20 03 sta $0320 STA @w BIOS_STATUS +.3962d8 28 plp pass_failure PLP +.3962d9 2b pld PLD +.3962da ab plb PLB +.3962db 18 clc CLC +.3962dc 6b rtl RTL +.3962dd FDC_MOUNT +.3962dd 8b phb PHB +.3962de 0b phd PHD +.3962df 08 php PHP +.3962e0 48 pha PHA ; begin setdbr macro +.3962e1 08 php PHP +.3962e2 e2 20 sep #$20 SEP #$20 ; set A short +.3962e4 a9 00 lda #$00 LDA #0 +.3962e6 48 pha PHA +.3962e7 ab plb PLB +.3962e8 28 plp PLP +.3962e9 68 pla PLA ; end setdbr macro +.3962ea 48 pha PHA ; begin setdp macro +.3962eb 08 php PHP +.3962ec c2 20 rep #$20 REP #$20 ; set A long +.3962ee a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.3962f1 5b tcd TCD +.3962f2 28 plp PLP +.3962f3 68 pla PLA ; end setdp macro +.3962f4 22 4b 5d 39 jsl $395d4b JSL FDC_INIT +.3962f8 e2 20 sep #$20 SEP #$20 ; set A short +.3962fa c2 10 rep #$10 REP #$10 ; set X long +.3962fc a9 00 lda #$00 LDA #0 +.3962fe a2 00 00 ldx #$0000 LDX #0 +.396301 9f 00 a3 38 sta $38a300,x zero_loop STA DOS_SECTOR,X +.396305 e8 inx INX +.396306 e0 00 02 cpx #$0200 CPX #512 +.396309 d0 f6 bne $396301 BNE zero_loop +.39630b a9 00 lda #$00 LDA #0 ; We only support drive 0 +.39630d 85 00 sta $0300 STA FDC_DRIVE +.39630f 22 c7 5d 39 jsl $395dc7 JSL FDC_Motor_On ; Turn the motor on +.396313 c2 30 rep #$30 REP #$30 ; set A&X long +.396315 a9 00 00 lda #$0000 LDA #0 ; We want sector 0 +.396318 85 22 sta $0322 STA BIOS_LBA +.39631a 85 24 sta $0324 STA BIOS_LBA+2 +.39631c a9 00 a3 lda #$a300 LDA #<>DOS_SECTOR ; And load it into DOS_SECTOR +.39631f 85 26 sta $0326 STA BIOS_BUFF_PTR +.396321 a9 38 00 lda #$0038 LDA #`DOS_SECTOR +.396324 85 28 sta $0328 STA BIOS_BUFF_PTR+2 +.396326 22 0c 62 39 jsl $39620c JSL FDC_GETBLOCK ; Attempt to read the data +.39632a b0 03 bcs $39632f BCS parse_boot ; If ok: start parsing the boot record +.39632c 82 d3 00 brl $396402 BRL pass_failure ; Pass the error up the chain +.39632f parse_boot +.39632f e2 20 sep #$20 SEP #$20 ; set A short +.396331 a9 00 lda #$00 LDA #PART_TYPE_FAT12 ; Set the file system to FAT12 +.396333 8f 01 a0 38 sta $38a001 STA @l FILE_SYSTEM +.396337 a9 00 lda #$00 LDA #0 ; There are no partitions on the disk +.396339 8f 02 a0 38 sta $38a002 STA @l PARTITION +.39633d e2 20 sep #$20 SEP #$20 ; set A short +.39633f af 0d a3 38 lda $38a30d LDA DOS_SECTOR+BPB_SECPERCLUS12_OFF ; Get the # of sectors per cluster (usually 1) +.396343 8f 03 a0 38 sta $38a003 STA @l SECTORS_PER_CLUSTER +.396347 c2 20 rep #$20 REP #$20 ; set A long +.396349 a9 00 00 lda #$0000 LDA #0 ; First sector of the "partition" is 0 +.39634c 8f 04 a0 38 sta $38a004 STA @l FIRSTSECTOR +.396350 8f 06 a0 38 sta $38a006 STA @l FIRSTSECTOR+2 +.396354 af 16 a3 38 lda $38a316 LDA DOS_SECTOR+BPB_SECPERFAT12_OFF ; Get the number of sectors per FAT +.396358 8f 10 a0 38 sta $38a010 STA @l SEC_PER_FAT +.39635c a9 00 00 lda #$0000 LDA #0 +.39635f 8f 12 a0 38 sta $38a012 STA @l SEC_PER_FAT+2 +.396363 a9 01 00 lda #$0001 LDA #1 ; FAT#1 begins at sector 1 +.396366 8f 14 a0 38 sta $38a014 STA @l FAT_BEGIN_LBA +.39636a 18 clc CLC +.39636b 6f 10 a0 38 adc $38a010 ADC @l SEC_PER_FAT +.39636f 8f 18 a0 38 sta $38a018 STA @l FAT2_BEGIN_LBA ; FAT#2 begins SEC_PER_FAT sectors later +.396373 a9 00 00 lda #$0000 LDA #0 +.396376 8f 16 a0 38 sta $38a016 STA @l FAT_BEGIN_LBA+2 +.39637a 8f 1a a0 38 sta $38a01a STA @L FAT2_BEGIN_LBA+2 +.39637e 18 clc CLC ; Calculate the root directory's starting sector +.39637f af 18 a0 38 lda $38a018 LDA @l FAT2_BEGIN_LBA +.396383 6f 10 a0 38 adc $38a010 ADC @l SEC_PER_FAT +.396387 8f 20 a0 38 sta $38a020 STA @l ROOT_DIR_FIRST_CLUSTER ; ROOT_DIR_FIRST_CLUSTER will be a sector LBA for FAT12! +.39638b a9 00 00 lda #$0000 LDA #0 +.39638e 8f 22 a0 38 sta $38a022 STA @l ROOT_DIR_FIRST_CLUSTER+2 +.396392 af 11 a3 38 lda $38a311 LDA DOS_SECTOR+BPB_ROOT_MAX_ENTRY12_OFF ; Get the maximum number of directory entries for the root dir +.396396 8f 24 a0 38 sta $38a024 STA @l ROOT_DIR_MAX_ENTRY +.39639a 4a lsr a LSR A ; 16 entries per sector +.39639b 4a lsr a LSR A +.39639c 4a lsr a LSR A +.39639d 4a lsr a LSR A ; So now A is the number of sectors in the root directory +.39639e 18 clc CLC +.39639f 6f 20 a0 38 adc $38a020 ADC @L ROOT_DIR_FIRST_CLUSTER ; Add that to the first sector LBA for the root directory +.3963a3 8f 1c a0 38 sta $38a01c STA @l CLUSTER_BEGIN_LBA ; And that is the LBA for the first cluster +.3963a7 a9 00 00 lda #$0000 LDA #0 +.3963aa 8f 1e a0 38 sta $38a01e STA @l CLUSTER_BEGIN_LBA+2 +.3963ae af 13 a3 38 lda $38a313 LDA DOS_SECTOR+BPB_TOTAL_SECTORS ; Set the sector limit +.3963b2 8f 08 a0 38 sta $38a008 STA @l SECTORCOUNT +.3963b6 a9 00 00 lda #$0000 LDA #0 +.3963b9 8f 0a a0 38 sta $38a00a STA @l SECTORCOUNT+2 +.3963bd af 0e a3 38 lda $38a30e LDA DOS_SECTOR+BPB_RSRVCLUS_OFF ; Get the number of reserved clusters +.3963c1 8f 0c a0 38 sta $38a00c STA @l NUM_RSRV_SEC +.3963c5 a9 00 02 lda #$0200 LDA #DOS_SECTOR_SIZE ; Set the size of a FAT12 cluster +.3963c8 8f 0e a0 38 sta $38a00e STA @l CLUSTER_SIZE +.3963cc e2 20 sep #$20 SEP #$20 ; set A short +.3963ce af 26 a3 38 lda $38a326 LDA DOS_SECTOR+BPB_SIGNATUREB ; Is signature B $29? +.3963d2 c9 29 cmp #$29 CMP #BPB_EXTENDED_RECORD +.3963d4 80 14 bra $3963ea BRA no_volume_id ; No: there is no volume ID +.3963d6 is_extended +.3963d6 c2 20 rep #$20 REP #$20 ; set A long +.3963d8 af 27 a3 38 lda $38a327 LDA DOS_SECTOR+BPB_VOLUMEID ; Yes: set the volume ID +.3963dc 8f 26 a0 38 sta $38a026 STA @l VOLUME_ID +.3963e0 af 29 a3 38 lda $38a329 LDA DOS_SECTOR+BPB_VOLUMEID+2 +.3963e4 8f 28 a0 38 sta $38a028 STA @l VOLUME_ID+2 +.3963e8 80 0d bra $3963f7 BRA ret_success +.3963ea no_volume_id +.3963ea c2 20 rep #$20 REP #$20 ; set A long +.3963ec a9 00 00 lda #$0000 LDA #0 ; No: blank the Volume ID +.3963ef 8f 26 a0 38 sta $38a026 STA @l VOLUME_ID +.3963f3 8f 28 a0 38 sta $38a028 STA @L VOLUME_ID+2 +.3963f7 ret_success +.3963f7 e2 20 sep #$20 SEP #$20 ; set A short +.3963f9 a9 00 lda #$00 LDA #0 +.3963fb 85 20 sta $0320 STA BIOS_STATUS +.3963fd 28 plp PLP +.3963fe 2b pld PLD +.3963ff ab plb PLB +.396400 38 sec SEC +.396401 6b rtl RTL +.396402 28 plp pass_failure PLP +.396403 2b pld PLD +.396404 ab plb PLB +.396405 18 clc CLC +.396406 6b rtl RTL +.396407 FDC_CMDBLOCK +.396407 8b phb PHB +.396408 0b phd PHD +.396409 08 php PHP +.39640a 48 pha PHA ; begin setdbr macro +.39640b 08 php PHP +.39640c e2 20 sep #$20 SEP #$20 ; set A short +.39640e a9 00 lda #$00 LDA #0 +.396410 48 pha PHA +.396411 ab plb PLB +.396412 28 plp PLP +.396413 68 pla PLA ; end setdbr macro +.396414 48 pha PHA ; begin setdp macro +.396415 08 php PHP +.396416 c2 20 rep #$20 REP #$20 ; set A long +.396418 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.39641b 5b tcd TCD +.39641c 28 plp PLP +.39641d 68 pla PLA ; end setdp macro +.39641e e2 30 sep #$30 SEP #$30 ; set A&X short +.396420 e0 01 cpx #$01 CPX #FDC_DEVCMD_MOTOR_ON +.396422 f0 0f beq $396433 BEQ motor_on +.396424 e0 02 cpx #$02 CPX #FDC_DEVCMD_MOTOR_OFF +.396426 f0 11 beq $396439 BEQ motor_off +.396428 e0 03 cpx #$03 CPX #FDC_DEVCMD_RECAL +.39642a f0 13 beq $39643f BEQ recalibrate +.39642c 64 20 stz $0320 ret_success STZ BIOS_STATUS +.39642e 28 plp PLP +.39642f 2b pld PLD +.396430 ab plb PLB +.396431 38 sec SEC +.396432 6b rtl RTL +.396433 22 c7 5d 39 jsl $395dc7 motor_on JSL FDC_Motor_On +.396437 80 f3 bra $39642c BRA ret_success +.396439 22 fb 5d 39 jsl $395dfb motor_off JSL FDC_Motor_Off +.39643d 80 ed bra $39642c BRA ret_success +.39643f 22 26 5e 39 jsl $395e26 recalibrate JSL FDC_Recalibrate_Command +.396443 b0 e7 bcs $39642c BCS ret_success +.396445 28 plp pass_failure PLP +.396446 2b pld PLD +.396447 ab plb PLB +.396448 18 clc CLC +.396449 6b rtl RTL +.39644a FDC_CHK_MEDIA +.39644a 0b phd PHD +.39644b 08 php PHP +.39644c 48 pha PHA ; begin setdp macro +.39644d 08 php PHP +.39644e c2 20 rep #$20 REP #$20 ; set A long +.396450 a9 00 03 lda #$0300 LDA #FDC_DRIVE ; set DP to page 0 +.396453 5b tcd TCD +.396454 28 plp PLP +.396455 68 pla PLA ; end setdp macro +.396456 22 c7 5d 39 jsl $395dc7 JSL FDC_Motor_On ; Turn on the motor +.39645a e2 20 sep #$20 SEP #$20 ; set A short +.39645c af f7 13 af lda $af13f7 LDA @l SIO_FDC_DIR ; Check if the DSKCHG bit is set +.396460 89 80 bit #$80 BIT #FDC_DIR_DSKCHG +.396462 f0 42 beq $3964a6 BEQ ret_true ; If not: assume the disk is present +.396464 a9 00 lda #$00 LDA #0 +.396466 85 00 sta $0300 STA FDC_DRIVE +.396468 a9 00 lda #$00 LDA #0 +.39646a 85 01 sta $0301 STA FDC_HEAD +.39646c a9 50 lda #$50 LDA #80 +.39646e 85 02 sta $0302 STA FDC_CYLINDER +.396470 22 06 60 39 jsl $396006 JSL FDC_Seek_Track ; Attempt to seek to track 80 +.396474 90 34 bcc $3964aa BCC ret_false ; If fail: return false +.396476 c2 10 rep #$10 REP #$10 ; set X long +.396478 a2 1e 8b ldx #$8b1e LDX #<>FDC_MOTOR_TIME ; Wait a suitable time for the motor to spin up +.39647b a0 41 00 ldy #$0041 LDY #`FDC_MOTOR_TIME +.39647e 22 f4 0f 39 jsl $390ff4 JSL IDELAY +.396482 22 5b 5e 39 jsl $395e5b JSL FDC_Sense_Int_Status +.396486 a5 06 lda $0306 LDA FDC_ST0 +.396488 29 d0 and #$d0 AND #%11010000 +.39648a d0 1e bne $3964aa BNE ret_false +.39648c 22 26 5e 39 jsl $395e26 JSL FDC_Recalibrate_Command ; Attempt to recalibrate +.396490 90 18 bcc $3964aa BCC ret_false ; If fail: return false +.396492 a2 1e 8b ldx #$8b1e LDX #<>FDC_MOTOR_TIME ; Wait a suitable time for the motor to spin up +.396495 a0 41 00 ldy #$0041 LDY #`FDC_MOTOR_TIME +.396498 22 f4 0f 39 jsl $390ff4 JSL IDELAY +.39649c 22 5b 5e 39 jsl $395e5b JSL FDC_Sense_Int_Status +.3964a0 a5 06 lda $0306 LDA FDC_ST0 +.3964a2 29 d0 and #$d0 AND #%11010000 +.3964a4 d0 04 bne $3964aa BNE ret_false +.3964a6 ret_true +.3964a6 28 plp PLP +.3964a7 2b pld PLD +.3964a8 38 sec SEC +.3964a9 6b rtl RTL +.3964aa ret_false +.3964aa 28 plp PLP +.3964ab 2b pld PLD +.3964ac 18 clc CLC +.3964ad 6b rtl RTL +.3964ae FDC_WRITEVBR +.3964ae 8b phb PHB +.3964af 0b phd PHD +.3964b0 08 php PHP +.3964b1 48 pha PHA ; begin setdbr macro +.3964b2 08 php PHP +.3964b3 e2 20 sep #$20 SEP #$20 ; set A short +.3964b5 a9 00 lda #$00 LDA #0 +.3964b7 48 pha PHA +.3964b8 ab plb PLB +.3964b9 28 plp PLP +.3964ba 68 pla PLA ; end setdbr macro +.3964bb 48 pha PHA ; begin setdp macro +.3964bc 08 php PHP +.3964bd c2 20 rep #$20 REP #$20 ; set A long +.3964bf a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3964c2 5b tcd TCD +.3964c3 28 plp PLP +.3964c4 68 pla PLA ; end setdp macro +.3964c5 22 dd 62 39 jsl $3962dd JSL FDC_MOUNT ; Mount the floppy disk +.3964c9 c2 30 rep #$30 REP #$30 ; set A&X long +.3964cb a9 00 00 lda #$0000 LDA #0 ; Clear the sector buffer +.3964ce a2 00 00 ldx #$0000 LDX #0 +.3964d1 9f 00 a3 38 sta $38a300,x clr_loop STA DOS_SECTOR,X +.3964d5 e8 inx INX +.3964d6 e8 inx INX +.3964d7 e0 00 02 cpx #$0200 CPX #512 +.3964da d0 f5 bne $3964d1 BNE clr_loop +.3964dc e2 20 sep #$20 SEP #$20 ; set A short +.3964de a2 00 00 ldx #$0000 LDX #0 ; Copy the prototype VBR to the sector buffer +.3964e1 bf 96 65 39 lda $396596,x copy_loop LDA FDC_VBR_BEGIN,X +.3964e5 9f 00 a3 38 sta $38a300,x STA DOS_SECTOR,X +.3964e9 e8 inx INX +.3964ea e0 c9 00 cpx #$00c9 CPX #<>(FDC_VBR_END - FDC_VBR_BEGIN + 1) +.3964ed d0 f2 bne $3964e1 BNE copy_loop +.3964ef a0 00 00 ldy #$0000 LDY #0 ; Copy the boot binary path to the VBR +.3964f2 a2 40 00 ldx #$0040 LDX #FDC_VBR_PATH +.3964f5 b7 3c lda [$035c],y path_copy_loop LDA [DOS_RUN_PTR],Y +.3964f7 9f 00 a3 38 sta $38a300,x STA DOS_SECTOR,X +.3964fb f0 07 beq $396504 BEQ path_copy_done +.3964fd e8 inx INX +.3964fe c8 iny INY +.3964ff c0 80 00 cpy #$0080 CPY #128 +.396502 d0 f1 bne $3964f5 BNE path_copy_loop +.396504 path_copy_done +.396504 c2 20 rep #$20 REP #$20 ; set A long +.396506 a9 55 aa lda #$aa55 LDA #$AA55 ; Set the VBR signature bytes at the end +.396509 8f fe a4 38 sta $38a4fe STA DOS_SECTOR+BPB_SIGNATURE +.39650d c2 20 rep #$20 REP #$20 ; set A long +.39650f a9 00 a3 lda #$a300 LDA #<>DOS_SECTOR ; Point to the BIOS buffer +.396512 85 06 sta $0326 STA BIOS_BUFF_PTR +.396514 a9 38 00 lda #$0038 LDA #`DOS_SECTOR +.396517 85 08 sta $0328 STA BIOS_BUFF_PTR+2 +.396519 a9 00 00 lda #$0000 LDA #0 ; Set the sector to #0 (boot record) +.39651c 85 02 sta $0322 STA BIOS_LBA +.39651e 85 04 sta $0324 STA BIOS_LBA+2 +.396520 e2 20 sep #$20 SEP #$20 ; set A short +.396522 a9 00 lda #$00 LDA #BIOS_DEV_FDC +.396524 85 01 sta $0321 STA BIOS_DEV +.396526 22 24 10 00 jsl $001024 JSL PUTBLOCK ; Attempt to write the boot record +.39652a b0 09 bcs $396535 BCS ret_success +.39652c 22 fb 5d 39 jsl $395dfb JSL FDC_Motor_Off +.396530 28 plp PLP ; Return the failure +.396531 2b pld PLD +.396532 ab plb PLB +.396533 18 clc CLC +.396534 6b rtl RTL +.396535 22 fb 5d 39 jsl $395dfb ret_success JSL FDC_Motor_Off +.396539 e2 20 sep #$20 SEP #$20 ; set A short +.39653b a9 00 lda #$00 LDA #0 +.39653d 85 00 sta $0320 STA BIOS_STATUS +.39653f 28 plp PLP +.396540 2b pld PLD +.396541 ab plb PLB +.396542 38 sec SEC +.396543 6b rtl RTL +.396544 FDC_TIME_HANDLE +.396544 08 php PHP +.396545 e2 20 sep #$20 SEP #$20 ; set A short +.396547 af 4e a0 38 lda $38a04e LDA @l FDC_MOTOR_TIMER ; Check the FDC motor count-down timer +.39654b d0 06 bne $396553 BNE dec_motor ; If not zero: decrement the timer +.39654d af 4f a0 38 lda $38a04f LDA @l FDC_MOTOR_TIMER+1 ; Check the high byte +.396551 f0 28 beq $39657b BEQ sof_timeout ; If zero: move on to the next timer +.396553 af 4e a0 38 lda $38a04e dec_motor LDA @l FDC_MOTOR_TIMER ; Decrement the low byte +.396557 3a dec a DEC A +.396558 8f 4e a0 38 sta $38a04e STA @l FDC_MOTOR_TIMER +.39655c c9 ff cmp #$ff CMP #$FF ; Did it roll over? +.39655e d0 0b bne $39656b BNE chk_motor_end ; No: check to see if we're a the end +.396560 af 4f a0 38 lda $38a04f LDA @l FDC_MOTOR_TIMER+1 ; Decrement the high byte +.396564 3a dec a DEC A +.396565 8f 4f a0 38 sta $38a04f STA @l FDC_MOTOR_TIMER+1 +.396569 80 10 bra $39657b BRA sof_timeout ; And move on to the next timer +.39656b af 4e a0 38 lda $38a04e chk_motor_end LDA @l FDC_MOTOR_TIMER ; Check timer +.39656f d0 0a bne $39657b BNE sof_timeout ; if it's <>0, move on to the next timer +.396571 af 4f a0 38 lda $38a04f LDA @l FDC_MOTOR_TIMER+1 +.396575 d0 04 bne $39657b BNE sof_timeout +.396577 22 fb 5d 39 jsl $395dfb JSL FDC_Motor_Off ; Otherwise, turn off the motor +.39657b sof_timeout +.39657b e2 20 sep #$20 SEP #$20 ; set A short +.39657d af 2d 03 00 lda $00032d LDA @l BIOS_TIMER ; Check the BIOS_TIMER +.396581 f0 11 beq $396594 BEQ sof_int_done ; If it's 0, we don't do anything +.396583 3a dec a DEC A ; Count down one tick +.396584 8f 2d 03 00 sta $00032d STA @l BIOS_TIMER +.396588 d0 0a bne $396594 BNE sof_int_done ; If not 0, we're done +.39658a af 2c 03 00 lda $00032c LDA @l BIOS_FLAGS ; Otherwise: flag a time out event +.39658e 09 80 ora #$80 ORA #BIOS_TIMEOUT +.396590 8f 2c 03 00 sta $00032c STA @l BIOS_FLAGS +.396594 28 plp sof_int_done PLP +.396595 6b rtl RTL =62 FDC_BOOT_START = 62 ; Entry point to the boot code =64 FDC_VBR_PATH = 64 ; Offset to the path in the VBR -.396600 FDC_VBR_BEGIN ->396600 eb 00 90 start .byte $EB, $00, $90 ; Entry point ->396603 43 32 35 36 44 4f 53 20 magic .text "C256DOS " ; OEM name / magic text for booting ->39660b 00 02 bytes_per_sec .word 512 ; How many bytes per sector ->39660d 01 sec_per_cluster .byte 1 ; How many sectors per cluster ->39660e 01 00 rsrv_sectors .word 1 ; Number of reserved sectors ->396610 02 num_fat .byte 2 ; Number of FATs ->396611 e0 00 max_dir_entry .word (32-18)*16 ; Total number of root dir entries ->396613 40 0b total_sectors .word 2880 ; Total sectors ->396615 f0 media_descriptor .byte $F0 ; 3.5" 1.44 MB floppy 80 tracks, 18 tracks per sector ->396616 09 00 sec_per_fat .word 9 ; Sectors per FAT ->396618 12 00 sec_per_track .word 18 ; Sectors per track ->39661a 02 00 num_head .word 2 ; Number of heads ->39661c 00 00 00 00 ignore2 .dword 0 ->396620 00 00 00 00 fat32_sector .dword 0 ; # of sectors in FAT32 ->396624 00 00 ignore3 .word 0 ->396626 29 boot_signature .byte $29 ->396627 78 56 34 12 volume_id .dword $12345678 ; Replaced by code ->39662b 55 4e 54 49 54 4c 45 44 volume_name .text "UNTITLED " ; Replace by code ->396633 20 20 20 ->396636 46 41 54 31 32 20 20 20 fs_type .text "FAT12 " -.39663e 80 40 bra $396680 BRA vbr_start ->396640 file_path .fill 64 ; Reserve 64 bytes for a path and any options -.396680 vbr_start -.396680 c2 20 rep #$20 REP #$20 ; set A long -.396682 a9 40 a3 lda #$a340 LDA #<>(DOS_SECTOR + (file_path - FDC_VBR_BEGIN)) -.396685 8f 60 03 00 sta $000360 STA @l DOS_RUN_PARAM -.396689 a9 38 00 lda #$0038 LDA #`(DOS_SECTOR + (file_path - FDC_VBR_BEGIN)) -.39668c 8f 62 03 00 sta $000362 STA @l DOS_RUN_PARAM+2 -.396690 22 24 11 00 jsl $001124 JSL F_RUN ; And try to execute the binary file -.396694 b0 0c bcs $3966a2 BCS lock ; If it returned success... lock up... I guess? -.396696 error -.396696 e2 20 sep #$20 SEP #$20 ; set A short -.396698 4b phk PHK ; Otherwise, print an error message -.396699 ab plb PLB -.39669a 62 08 00 per $3966a5 PER message -.39669d fa plx PLX -.39669e 22 1c 10 00 jsl $00101c JSL PUTS -.3966a2 ea nop lock NOP ; And lock up -.3966a3 80 fd bra $3966a2 BRA lock ->3966a5 43 6f 75 6c 64 20 6e 6f message .null "Could not find a bootable binary.",13 ->3966ad 74 20 66 69 6e 64 20 61 20 62 6f 6f 74 61 62 6c ->3966bd 65 20 62 69 6e 61 72 79 2e 0d 00 -.3966c8 FDC_VBR_END +.396596 FDC_VBR_BEGIN +>396596 eb 00 90 start .byte $EB, $00, $90 ; Entry point +>396599 43 32 35 36 44 4f 53 20 magic .text "C256DOS " ; OEM name / magic text for booting +>3965a1 00 02 bytes_per_sec .word 512 ; How many bytes per sector +>3965a3 01 sec_per_cluster .byte 1 ; How many sectors per cluster +>3965a4 01 00 rsrv_sectors .word 1 ; Number of reserved sectors +>3965a6 02 num_fat .byte 2 ; Number of FATs +>3965a7 e0 00 max_dir_entry .word (32-18)*16 ; Total number of root dir entries +>3965a9 40 0b total_sectors .word 2880 ; Total sectors +>3965ab f0 media_descriptor .byte $F0 ; 3.5" 1.44 MB floppy 80 tracks, 18 tracks per sector +>3965ac 09 00 sec_per_fat .word 9 ; Sectors per FAT +>3965ae 12 00 sec_per_track .word 18 ; Sectors per track +>3965b0 02 00 num_head .word 2 ; Number of heads +>3965b2 00 00 00 00 ignore2 .dword 0 +>3965b6 00 00 00 00 fat32_sector .dword 0 ; # of sectors in FAT32 +>3965ba 00 00 ignore3 .word 0 +>3965bc 29 boot_signature .byte $29 +>3965bd 78 56 34 12 volume_id .dword $12345678 ; Replaced by code +>3965c1 55 4e 54 49 54 4c 45 44 volume_name .text "UNTITLED " ; Replace by code +>3965c9 20 20 20 +>3965cc 46 41 54 31 32 20 20 20 fs_type .text "FAT12 " +.3965d4 80 40 bra $396616 BRA vbr_start +>3965d6 file_path .fill 64 ; Reserve 64 bytes for a path and any options +.396616 vbr_start +.396616 c2 20 rep #$20 REP #$20 ; set A long +.396618 a9 40 a3 lda #$a340 LDA #<>(DOS_SECTOR + (file_path - FDC_VBR_BEGIN)) +.39661b 8f 60 03 00 sta $000360 STA @l DOS_RUN_PARAM +.39661f a9 38 00 lda #$0038 LDA #`(DOS_SECTOR + (file_path - FDC_VBR_BEGIN)) +.396622 8f 62 03 00 sta $000362 STA @l DOS_RUN_PARAM+2 +.396626 22 24 11 00 jsl $001124 JSL F_RUN ; And try to execute the binary file +.39662a b0 0c bcs $396638 BCS lock ; If it returned success... lock up... I guess? +.39662c error +.39662c e2 20 sep #$20 SEP #$20 ; set A short +.39662e 4b phk PHK ; Otherwise, print an error message +.39662f ab plb PLB +.396630 62 08 00 per $39663b PER message +.396633 fa plx PLX +.396634 22 1c 10 00 jsl $00101c JSL PUTS +.396638 ea nop lock NOP ; And lock up +.396639 80 fd bra $396638 BRA lock +>39663b 43 6f 75 6c 64 20 6e 6f message .null "Could not find a bootable binary.",13 +>396643 74 20 66 69 6e 64 20 61 20 62 6f 6f 74 61 62 6c +>396653 65 20 62 69 6e 61 72 79 2e 0d 00 +.39665e FDC_VBR_END ;****** Return to file: src\kernel.asm @@ -12933,426 +12883,426 @@ >00c8 00 00 00 00 00 00 00 00 Tot_Num_Add_Logic_Sec .word $0000, $0000, $0000, $0000 >00d0 00 00 Streaming_Trf_Time .word $0000 ; Word 104 >00d2 00 00 Reserved5 .word $0000 ; Word 105 -.3966c8 IDE_TEST -.3966c8 08 php PHP -.3966c9 c2 20 rep #$20 REP #$20 ; set A long -.3966cb a9 00 a3 lda #$a300 LDA #<>DOS_SECTOR -.3966ce 8f 26 03 00 sta $000326 STA @l BIOS_BUFF_PTR -.3966d2 a9 38 00 lda #$0038 LDA #`DOS_SECTOR -.3966d5 8f 28 03 00 sta $000328 STA @l BIOS_BUFF_PTR+2 -.3966d9 22 c4 67 39 jsl $3967c4 JSL IDE_IDENTIFY -.3966dd b0 03 bcs $3966e2 BCS id_ok -.3966df 82 73 00 brl $396755 BRL done -.3966e2 id_ok -.3966e2 c2 10 rep #$10 REP #$10 ; set X long -.3966e4 e2 20 sep #$20 SEP #$20 ; set A short -.3966e6 a0 28 00 ldy #$0028 LDY #40 -.3966e9 a2 36 00 ldx #$0036 LDX #27*2 -.3966ec bf 01 a3 38 lda $38a301,x pr_model LDA DOS_SECTOR+1,X -.3966f0 22 18 10 00 jsl $001018 JSL PUTC -.3966f4 bf 00 a3 38 lda $38a300,x LDA DOS_SECTOR,X -.3966f8 22 18 10 00 jsl $001018 JSL PUTC -.3966fc e8 inx INX -.3966fd e8 inx INX -.3966fe 88 dey DEY -.3966ff 88 dey DEY -.396700 d0 ea bne $3966ec BNE pr_model -.396702 c2 10 rep #$10 REP #$10 ; set X long -.396704 e2 20 sep #$20 SEP #$20 ; set A short -.396706 a0 14 00 ldy #$0014 LDY #20 -.396709 a2 14 00 ldx #$0014 LDX #10*2 -.39670c bf 01 a3 38 lda $38a301,x pr_serial LDA DOS_SECTOR+1,X -.396710 22 18 10 00 jsl $001018 JSL PUTC -.396714 bf 00 a3 38 lda $38a300,x LDA DOS_SECTOR,X -.396718 22 18 10 00 jsl $001018 JSL PUTC -.39671c e8 inx INX -.39671d e8 inx INX -.39671e 88 dey DEY -.39671f 88 dey DEY -.396720 d0 ea bne $39670c BNE pr_serial -.396722 22 6c 10 00 jsl $00106c JSL PRINTCR -.396726 read_sect1 -.396726 c2 20 rep #$20 REP #$20 ; set A long -.396728 a9 00 00 lda #$0000 LDA #0 ; Set LBA = 0 -.39672b 8f 22 03 00 sta $000322 STA @l BIOS_LBA -.39672f a9 00 00 lda #$0000 LDA #0 -.396732 8f 24 03 00 sta $000324 STA @l BIOS_LBA+2 -.396736 a9 00 a9 lda #$a900 LDA #<>DOS_BOOT_SECTOR -.396739 8f 26 03 00 sta $000326 STA @l BIOS_BUFF_PTR -.39673d a9 38 00 lda #$0038 LDA #`DOS_BOOT_SECTOR -.396740 8f 28 03 00 sta $000328 STA @l BIOS_BUFF_PTR+2 -.396744 22 52 68 39 jsl $396852 JSL IDE_GETBLOCK ; Attempt to read the block -.396748 b0 06 bcs $396750 BCS all_ok -.39674a 22 6c 10 00 jsl $00106c JSL PRINTCR -.39674e 80 05 bra $396755 BRA done -.396750 all_ok -.396750 22 6c 10 00 jsl $00106c JSL PRINTCR -.396754 00 brk # BRK -.396755 28 plp done PLP -.396756 6b rtl RTL -.396757 IDE_INIT -.396757 e2 20 sep #$20 SEP #$20 ; set A short -.396759 a9 00 lda #$00 LDA #$00 -.39675b 8f 37 e8 af sta $afe837 STA IDE_CMD_STAT -.39675f 20 80 67 jsr $396780 JSR IDE_DRIVE_BSY ; Check to see if drive is busy -.396762 a9 e0 lda #$e0 LDA #$E0 ; HEAD 0 - Select Master Drive -.396764 8f 36 e8 af sta $afe836 STA IDE_HEAD -.396768 a9 01 lda #$01 LDA #$01 -.39676a 8f 32 e8 af sta $afe832 STA IDE_SECT_CNT -.39676e a9 00 lda #$00 LDA #$00 -.396770 8f 33 e8 af sta $afe833 STA IDE_SECT_SRT -.396774 8f 34 e8 af sta $afe834 STA IDE_CLDR_LO -.396778 8f 35 e8 af sta $afe835 STA IDE_CLDR_HI -.39677c 20 9e 67 jsr $39679e JSR IDE_DRV_READY_NOTBUSY -.39677f 6b rtl RTL -.396780 IDE_DRIVE_BSY -.396780 08 php PHP -.396781 e2 20 sep #$20 SEP #$20 ; set A short -.396783 af 37 e8 af lda $afe837 loop LDA @l IDE_CMD_STAT -.396787 29 80 and #$80 AND #IDE_STAT_BSY ; Check for RDY Bit, this needs to be 1'b1 -.396789 c9 80 cmp #$80 CMP #IDE_STAT_BSY ; If not go read again -.39678b f0 f6 beq $396783 BEQ loop -.39678d 28 plp PLP -.39678e 60 rts RTS -.39678f IDE_DRIVE_READY -.39678f 08 php PHP -.396790 e2 20 sep #$20 SEP #$20 ; set A short -.396792 af 37 e8 af lda $afe837 loop LDA @l IDE_CMD_STAT -.396796 29 40 and #$40 AND #IDE_STAT_DRDY ; Check to see if the Busy Signal is Cleared -.396798 c9 40 cmp #$40 CMP #IDE_STAT_DRDY ; if it is still one, then go back to read again. -.39679a d0 f6 bne $396792 BNE loop -.39679c 28 plp PLP -.39679d 60 rts RTS -.39679e IDE_DRV_READY_NOTBUSY -.39679e 08 php PHP -.39679f e2 20 sep #$20 SEP #$20 ; set A short -.3967a1 af 37 e8 af lda $afe837 loop LDA @l IDE_CMD_STAT ; Check the status -.3967a5 29 c0 and #$c0 AND #IDE_STAT_BSY | IDE_STAT_DRDY -.3967a7 c9 40 cmp #$40 CMP #IDE_STAT_DRDY ; Is it READY but not BUSY? -.3967a9 d0 f6 bne $3967a1 BNE loop ; No: keep waiting -.3967ab 28 plp ret_success PLP ; Return success -.3967ac 38 sec SEC -.3967ad 60 rts RTS -.3967ae 8f 07 03 00 sta $000307 ret_failure STA @l FDC_ST1 ; Save the status code to FDC_ST1 -.3967b2 28 plp PLP ; Return failure -.3967b3 18 clc CLC -.3967b4 60 rts RTS -.3967b5 IDE_NOT_DRQ -.3967b5 08 php PHP -.3967b6 e2 20 sep #$20 SEP #$20 ; set A short -.3967b8 af 37 e8 af lda $afe837 loop LDA @l IDE_CMD_STAT ; Get the status -.3967bc 29 08 and #$08 AND #IDE_STAT_DRQ -.3967be c9 08 cmp #$08 CMP #IDE_STAT_DRQ ; Is the DRQ bit set? -.3967c0 d0 f6 bne $3967b8 BNE loop ; No: keep waiting -.3967c2 28 plp PLP -.3967c3 60 rts RTS -.3967c4 IDE_IDENTIFY -.3967c4 5a phy PHY -.3967c5 8b phb PHB -.3967c6 0b phd PHD -.3967c7 08 php PHP -.3967c8 48 pha PHA ; begin setdbr macro -.3967c9 08 php PHP -.3967ca e2 20 sep #$20 SEP #$20 ; set A short -.3967cc a9 00 lda #$00 LDA #0 -.3967ce 48 pha PHA -.3967cf ab plb PLB -.3967d0 28 plp PLP -.3967d1 68 pla PLA ; end setdbr macro -.3967d2 48 pha PHA ; begin setdp macro -.3967d3 08 php PHP -.3967d4 c2 20 rep #$20 REP #$20 ; set A long -.3967d6 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.3967d9 5b tcd TCD -.3967da 28 plp PLP -.3967db 68 pla PLA ; end setdp macro -.3967dc e2 20 sep #$20 SEP #$20 ; set A short -.3967de 20 9e 67 jsr $39679e JSR IDE_DRV_READY_NOTBUSY ; Wait until the IDE is clear to accept commands -.3967e1 a5 05 lda $0325 LDA BIOS_LBA+3 ; Get the high bits of the LBA -.3967e3 29 07 and #$07 AND #$07 -.3967e5 09 a0 ora #$a0 ORA #%10100000 ; Select DEV=0 and LBA mode = 1 -.3967e7 8f 36 e8 af sta $afe836 STA @l IDE_HEAD ; Ensure master is selected -.3967eb 20 9e 67 jsr $39679e JSR IDE_DRV_READY_NOTBUSY ; And wait for it to take effect +.39665e IDE_TEST +.39665e 08 php PHP +.39665f c2 20 rep #$20 REP #$20 ; set A long +.396661 a9 00 a3 lda #$a300 LDA #<>DOS_SECTOR +.396664 8f 26 03 00 sta $000326 STA @l BIOS_BUFF_PTR +.396668 a9 38 00 lda #$0038 LDA #`DOS_SECTOR +.39666b 8f 28 03 00 sta $000328 STA @l BIOS_BUFF_PTR+2 +.39666f 22 5a 67 39 jsl $39675a JSL IDE_IDENTIFY +.396673 b0 03 bcs $396678 BCS id_ok +.396675 82 73 00 brl $3966eb BRL done +.396678 id_ok +.396678 c2 10 rep #$10 REP #$10 ; set X long +.39667a e2 20 sep #$20 SEP #$20 ; set A short +.39667c a0 28 00 ldy #$0028 LDY #40 +.39667f a2 36 00 ldx #$0036 LDX #27*2 +.396682 bf 01 a3 38 lda $38a301,x pr_model LDA DOS_SECTOR+1,X +.396686 22 18 10 00 jsl $001018 JSL PUTC +.39668a bf 00 a3 38 lda $38a300,x LDA DOS_SECTOR,X +.39668e 22 18 10 00 jsl $001018 JSL PUTC +.396692 e8 inx INX +.396693 e8 inx INX +.396694 88 dey DEY +.396695 88 dey DEY +.396696 d0 ea bne $396682 BNE pr_model +.396698 c2 10 rep #$10 REP #$10 ; set X long +.39669a e2 20 sep #$20 SEP #$20 ; set A short +.39669c a0 14 00 ldy #$0014 LDY #20 +.39669f a2 14 00 ldx #$0014 LDX #10*2 +.3966a2 bf 01 a3 38 lda $38a301,x pr_serial LDA DOS_SECTOR+1,X +.3966a6 22 18 10 00 jsl $001018 JSL PUTC +.3966aa bf 00 a3 38 lda $38a300,x LDA DOS_SECTOR,X +.3966ae 22 18 10 00 jsl $001018 JSL PUTC +.3966b2 e8 inx INX +.3966b3 e8 inx INX +.3966b4 88 dey DEY +.3966b5 88 dey DEY +.3966b6 d0 ea bne $3966a2 BNE pr_serial +.3966b8 22 6c 10 00 jsl $00106c JSL PRINTCR +.3966bc read_sect1 +.3966bc c2 20 rep #$20 REP #$20 ; set A long +.3966be a9 00 00 lda #$0000 LDA #0 ; Set LBA = 0 +.3966c1 8f 22 03 00 sta $000322 STA @l BIOS_LBA +.3966c5 a9 00 00 lda #$0000 LDA #0 +.3966c8 8f 24 03 00 sta $000324 STA @l BIOS_LBA+2 +.3966cc a9 00 a9 lda #$a900 LDA #<>DOS_BOOT_SECTOR +.3966cf 8f 26 03 00 sta $000326 STA @l BIOS_BUFF_PTR +.3966d3 a9 38 00 lda #$0038 LDA #`DOS_BOOT_SECTOR +.3966d6 8f 28 03 00 sta $000328 STA @l BIOS_BUFF_PTR+2 +.3966da 22 e8 67 39 jsl $3967e8 JSL IDE_GETBLOCK ; Attempt to read the block +.3966de b0 06 bcs $3966e6 BCS all_ok +.3966e0 22 6c 10 00 jsl $00106c JSL PRINTCR +.3966e4 80 05 bra $3966eb BRA done +.3966e6 all_ok +.3966e6 22 6c 10 00 jsl $00106c JSL PRINTCR +.3966ea 00 brk # BRK +.3966eb 28 plp done PLP +.3966ec 6b rtl RTL +.3966ed IDE_INIT +.3966ed e2 20 sep #$20 SEP #$20 ; set A short +.3966ef a9 00 lda #$00 LDA #$00 +.3966f1 8f 37 e8 af sta $afe837 STA IDE_CMD_STAT +.3966f5 20 16 67 jsr $396716 JSR IDE_DRIVE_BSY ; Check to see if drive is busy +.3966f8 a9 e0 lda #$e0 LDA #$E0 ; HEAD 0 - Select Master Drive +.3966fa 8f 36 e8 af sta $afe836 STA IDE_HEAD +.3966fe a9 01 lda #$01 LDA #$01 +.396700 8f 32 e8 af sta $afe832 STA IDE_SECT_CNT +.396704 a9 00 lda #$00 LDA #$00 +.396706 8f 33 e8 af sta $afe833 STA IDE_SECT_SRT +.39670a 8f 34 e8 af sta $afe834 STA IDE_CLDR_LO +.39670e 8f 35 e8 af sta $afe835 STA IDE_CLDR_HI +.396712 20 34 67 jsr $396734 JSR IDE_DRV_READY_NOTBUSY +.396715 6b rtl RTL +.396716 IDE_DRIVE_BSY +.396716 08 php PHP +.396717 e2 20 sep #$20 SEP #$20 ; set A short +.396719 af 37 e8 af lda $afe837 loop LDA @l IDE_CMD_STAT +.39671d 29 80 and #$80 AND #IDE_STAT_BSY ; Check for RDY Bit, this needs to be 1'b1 +.39671f c9 80 cmp #$80 CMP #IDE_STAT_BSY ; If not go read again +.396721 f0 f6 beq $396719 BEQ loop +.396723 28 plp PLP +.396724 60 rts RTS +.396725 IDE_DRIVE_READY +.396725 08 php PHP +.396726 e2 20 sep #$20 SEP #$20 ; set A short +.396728 af 37 e8 af lda $afe837 loop LDA @l IDE_CMD_STAT +.39672c 29 40 and #$40 AND #IDE_STAT_DRDY ; Check to see if the Busy Signal is Cleared +.39672e c9 40 cmp #$40 CMP #IDE_STAT_DRDY ; if it is still one, then go back to read again. +.396730 d0 f6 bne $396728 BNE loop +.396732 28 plp PLP +.396733 60 rts RTS +.396734 IDE_DRV_READY_NOTBUSY +.396734 08 php PHP +.396735 e2 20 sep #$20 SEP #$20 ; set A short +.396737 af 37 e8 af lda $afe837 loop LDA @l IDE_CMD_STAT ; Check the status +.39673b 29 c0 and #$c0 AND #IDE_STAT_BSY | IDE_STAT_DRDY +.39673d c9 40 cmp #$40 CMP #IDE_STAT_DRDY ; Is it READY but not BUSY? +.39673f d0 f6 bne $396737 BNE loop ; No: keep waiting +.396741 28 plp ret_success PLP ; Return success +.396742 38 sec SEC +.396743 60 rts RTS +.396744 8f 07 03 00 sta $000307 ret_failure STA @l FDC_ST1 ; Save the status code to FDC_ST1 +.396748 28 plp PLP ; Return failure +.396749 18 clc CLC +.39674a 60 rts RTS +.39674b IDE_NOT_DRQ +.39674b 08 php PHP +.39674c e2 20 sep #$20 SEP #$20 ; set A short +.39674e af 37 e8 af lda $afe837 loop LDA @l IDE_CMD_STAT ; Get the status +.396752 29 08 and #$08 AND #IDE_STAT_DRQ +.396754 c9 08 cmp #$08 CMP #IDE_STAT_DRQ ; Is the DRQ bit set? +.396756 d0 f6 bne $39674e BNE loop ; No: keep waiting +.396758 28 plp PLP +.396759 60 rts RTS +.39675a IDE_IDENTIFY +.39675a 5a phy PHY +.39675b 8b phb PHB +.39675c 0b phd PHD +.39675d 08 php PHP +.39675e 48 pha PHA ; begin setdbr macro +.39675f 08 php PHP +.396760 e2 20 sep #$20 SEP #$20 ; set A short +.396762 a9 00 lda #$00 LDA #0 +.396764 48 pha PHA +.396765 ab plb PLB +.396766 28 plp PLP +.396767 68 pla PLA ; end setdbr macro +.396768 48 pha PHA ; begin setdp macro +.396769 08 php PHP +.39676a c2 20 rep #$20 REP #$20 ; set A long +.39676c a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.39676f 5b tcd TCD +.396770 28 plp PLP +.396771 68 pla PLA ; end setdp macro +.396772 e2 20 sep #$20 SEP #$20 ; set A short +.396774 20 34 67 jsr $396734 JSR IDE_DRV_READY_NOTBUSY ; Wait until the IDE is clear to accept commands +.396777 a5 05 lda $0325 LDA BIOS_LBA+3 ; Get the high bits of the LBA +.396779 29 07 and #$07 AND #$07 +.39677b 09 a0 ora #$a0 ORA #%10100000 ; Select DEV=0 and LBA mode = 1 +.39677d 8f 36 e8 af sta $afe836 STA @l IDE_HEAD ; Ensure master is selected +.396781 20 34 67 jsr $396734 JSR IDE_DRV_READY_NOTBUSY ; And wait for it to take effect +.396784 e2 20 sep #$20 SEP #$20 ; set A short +.396786 a9 00 lda #$00 LDA #0 ; Clear sector count and LBA +.396788 8f 32 e8 af sta $afe832 STA @l IDE_SECT_CNT +.39678c 8f 33 e8 af sta $afe833 STA @l IDE_SECT_SRT +.396790 8f 34 e8 af sta $afe834 STA @l IDE_CLDR_LO +.396794 8f 35 e8 af sta $afe835 STA @l IDE_CLDR_HI +.396798 a9 ec lda #$ec LDA #IDE_CMD_IDENTIFY ; The IDENTIFY command +.39679a 8f 37 e8 af sta $afe837 STA @l IDE_CMD_STAT ; Check the status +.39679e f0 29 beq $3967c9 BEQ no_media ; If 0: there is no drive +.3967a0 20 16 67 jsr $396716 JSR IDE_DRIVE_BSY ; Othewise: wait for drive to not be busy +.3967a3 20 34 67 jsr $396734 JSR IDE_DRV_READY_NOTBUSY ; Wait for the device to be ready +.3967a6 90 2d bcc $3967d5 BCC ret_failure ; If an error occurred, return it +.3967a8 c2 30 rep #$30 REP #$30 ; set A&X long +.3967aa a0 00 00 ldy #$0000 LDY #0 +.3967ad af 38 e8 af lda $afe838 read_loop LDA @l IDE_DATA_LO ; Get the word of data from the device +.3967b1 97 06 sta [$0326],y STA [BIOS_BUFF_PTR],Y ; Save it to the buffer +.3967b3 c8 iny INY ; Move to the next position +.3967b4 c8 iny INY +.3967b5 c0 00 02 cpy #$0200 CPY #512 +.3967b8 d0 f3 bne $3967ad BNE read_loop +.3967ba ret_success +.3967ba e2 20 sep #$20 SEP #$20 ; set A short +.3967bc a9 00 lda #$00 LDA #0 +.3967be 85 00 sta $0320 STA BIOS_STATUS +.3967c0 8d 06 03 sta $0306 STA @w FDC_ST0 +.3967c3 28 plp PLP ; Return success +.3967c4 2b pld PLD +.3967c5 ab plb PLB +.3967c6 7a ply PLY +.3967c7 38 sec SEC +.3967c8 6b rtl RTL +.3967c9 no_media +.3967c9 e2 20 sep #$20 SEP #$20 ; set A short +.3967cb a9 87 lda #$87 LDA #BIOS_ERR_NOMEDIA +.3967cd 80 0a bra $3967d9 BRA pass_failure +.3967cf not_ata +.3967cf e2 20 sep #$20 SEP #$20 ; set A short +.3967d1 a9 8a lda #$8a LDA #BIOS_ERR_NOTATA +.3967d3 80 04 bra $3967d9 BRA pass_failure +.3967d5 ret_failure +.3967d5 e2 20 sep #$20 SEP #$20 ; set A short +.3967d7 a9 82 lda #$82 LDA #BIOS_ERR_READ +.3967d9 85 00 sta $0320 pass_failure STA BIOS_STATUS +.3967db af 31 e8 af lda $afe831 LDA @l IDE_ERROR +.3967df 8d 06 03 sta $0306 STA @w FDC_ST0 +.3967e2 28 plp PLP +.3967e3 2b pld PLD +.3967e4 ab plb PLB +.3967e5 7a ply PLY +.3967e6 18 clc CLC +.3967e7 6b rtl RTL +.3967e8 IDE_GETBLOCK +.3967e8 5a phy PHY +.3967e9 8b phb PHB +.3967ea 0b phd PHD +.3967eb 08 php PHP +.3967ec 48 pha PHA ; begin setdbr macro +.3967ed 08 php PHP .3967ee e2 20 sep #$20 SEP #$20 ; set A short -.3967f0 a9 00 lda #$00 LDA #0 ; Clear sector count and LBA -.3967f2 8f 32 e8 af sta $afe832 STA @l IDE_SECT_CNT -.3967f6 8f 33 e8 af sta $afe833 STA @l IDE_SECT_SRT -.3967fa 8f 34 e8 af sta $afe834 STA @l IDE_CLDR_LO -.3967fe 8f 35 e8 af sta $afe835 STA @l IDE_CLDR_HI -.396802 a9 ec lda #$ec LDA #IDE_CMD_IDENTIFY ; The IDENTIFY command -.396804 8f 37 e8 af sta $afe837 STA @l IDE_CMD_STAT ; Check the status -.396808 f0 29 beq $396833 BEQ no_media ; If 0: there is no drive -.39680a 20 80 67 jsr $396780 JSR IDE_DRIVE_BSY ; Othewise: wait for drive to not be busy -.39680d 20 9e 67 jsr $39679e JSR IDE_DRV_READY_NOTBUSY ; Wait for the device to be ready -.396810 90 2d bcc $39683f BCC ret_failure ; If an error occurred, return it -.396812 c2 30 rep #$30 REP #$30 ; set A&X long -.396814 a0 00 00 ldy #$0000 LDY #0 -.396817 af 38 e8 af lda $afe838 read_loop LDA @l IDE_DATA_LO ; Get the word of data from the device -.39681b 97 06 sta [$0326],y STA [BIOS_BUFF_PTR],Y ; Save it to the buffer -.39681d c8 iny INY ; Move to the next position -.39681e c8 iny INY -.39681f c0 00 02 cpy #$0200 CPY #512 -.396822 d0 f3 bne $396817 BNE read_loop -.396824 ret_success -.396824 e2 20 sep #$20 SEP #$20 ; set A short -.396826 a9 00 lda #$00 LDA #0 -.396828 85 00 sta $0320 STA BIOS_STATUS -.39682a 8d 06 03 sta $0306 STA @w FDC_ST0 -.39682d 28 plp PLP ; Return success -.39682e 2b pld PLD -.39682f ab plb PLB -.396830 7a ply PLY -.396831 38 sec SEC -.396832 6b rtl RTL -.396833 no_media -.396833 e2 20 sep #$20 SEP #$20 ; set A short -.396835 a9 87 lda #$87 LDA #BIOS_ERR_NOMEDIA -.396837 80 0a bra $396843 BRA pass_failure -.396839 not_ata -.396839 e2 20 sep #$20 SEP #$20 ; set A short -.39683b a9 8a lda #$8a LDA #BIOS_ERR_NOTATA -.39683d 80 04 bra $396843 BRA pass_failure -.39683f ret_failure -.39683f e2 20 sep #$20 SEP #$20 ; set A short -.396841 a9 82 lda #$82 LDA #BIOS_ERR_READ -.396843 85 00 sta $0320 pass_failure STA BIOS_STATUS -.396845 af 31 e8 af lda $afe831 LDA @l IDE_ERROR -.396849 8d 06 03 sta $0306 STA @w FDC_ST0 -.39684c 28 plp PLP -.39684d 2b pld PLD -.39684e ab plb PLB -.39684f 7a ply PLY -.396850 18 clc CLC -.396851 6b rtl RTL -.396852 IDE_GETBLOCK -.396852 5a phy PHY -.396853 8b phb PHB -.396854 0b phd PHD -.396855 08 php PHP -.396856 48 pha PHA ; begin setdbr macro -.396857 08 php PHP -.396858 e2 20 sep #$20 SEP #$20 ; set A short -.39685a a9 00 lda #$00 LDA #0 -.39685c 48 pha PHA -.39685d ab plb PLB -.39685e 28 plp PLP -.39685f 68 pla PLA ; end setdbr macro -.396860 48 pha PHA ; begin setdp macro -.396861 08 php PHP -.396862 c2 20 rep #$20 REP #$20 ; set A long -.396864 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.396867 5b tcd TCD -.396868 28 plp PLP -.396869 68 pla PLA ; end setdp macro -.39686a e2 20 sep #$20 SEP #$20 ; set A short -.39686c 20 9e 67 jsr $39679e JSR IDE_DRV_READY_NOTBUSY ; Wait until the IDE is clear to accept commands -.39686f a5 05 lda $0325 LDA BIOS_LBA+3 ; Get the high bits of the LBA -.396871 29 07 and #$07 AND #$07 -.396873 09 e0 ora #$e0 ORA #%11100000 ; Select DEV=0 and LBA mode = 1 -.396875 8f 36 e8 af sta $afe836 STA @l IDE_HEAD ; Ensure master is selected -.396879 20 9e 67 jsr $39679e JSR IDE_DRV_READY_NOTBUSY ; And wait for it to take effect -.39687c e2 20 sep #$20 SEP #$20 ; set A short -.39687e a9 01 lda #$01 LDA #1 ; Set that we want one sector -.396880 8f 32 e8 af sta $afe832 STA @l IDE_SECT_CNT -.396884 a5 02 lda $0322 LDA BIOS_LBA ; Set the lower bits of the LBA -.396886 8f 33 e8 af sta $afe833 STA @l IDE_SECT_SRT -.39688a a5 03 lda $0323 LDA BIOS_LBA+1 -.39688c 8f 34 e8 af sta $afe834 STA @l IDE_CLDR_LO -.396890 a5 04 lda $0324 LDA BIOS_LBA+2 -.396892 8f 35 e8 af sta $afe835 STA @l IDE_CLDR_HI -.396896 a9 21 lda #$21 LDA #IDE_CMD_READ_SECTOR ; The READ SECTOR command -.396898 8f 37 e8 af sta $afe837 STA @l IDE_CMD_STAT -.39689c ea nop NOP ; Wait about 500ns -.39689d ea nop NOP -.39689e ea nop NOP -.39689f ea nop NOP -.3968a0 20 9e 67 jsr $39679e JSR IDE_DRV_READY_NOTBUSY ; Wait for the device to be ready -.3968a3 90 2b bcc $3968d0 BCC ret_failure ; If an error occurred, return it -.3968a5 e2 20 sep #$20 SEP #$20 ; set A short -.3968a7 af 30 e8 af lda $afe830 LDA @l IDE_DATA ; Read and toss out one byte from the 8-bit interface -.3968ab a0 00 00 ldy #$0000 LDY #0 -.3968ae c2 20 rep #$20 REP #$20 ; set A long -.3968b0 af 38 e8 af lda $afe838 read_loop LDA @l IDE_DATA_LO ; Get the word of data from the device -.3968b4 97 06 sta [$0326],y STA [BIOS_BUFF_PTR],Y ; Save it to the buffer -.3968b6 c8 iny INY ; Move to the next position -.3968b7 c8 iny INY -.3968b8 c0 00 02 cpy #$0200 CPY #512 -.3968bb d0 f3 bne $3968b0 BNE read_loop -.3968bd ea nop NOP ; Wait about 500ns -.3968be ea nop NOP -.3968bf ea nop NOP -.3968c0 ea nop NOP -.3968c1 ret_success -.3968c1 e2 20 sep #$20 SEP #$20 ; set A short -.3968c3 a9 00 lda #$00 LDA #0 -.3968c5 85 00 sta $0320 STA BIOS_STATUS -.3968c7 8d 06 03 sta $0306 STA @w FDC_ST0 -.3968ca 28 plp PLP ; Return success -.3968cb 2b pld PLD -.3968cc ab plb PLB -.3968cd 7a ply PLY -.3968ce 38 sec SEC -.3968cf 6b rtl RTL -.3968d0 ret_failure -.3968d0 e2 20 sep #$20 SEP #$20 ; set A short -.3968d2 af 31 e8 af lda $afe831 LDA @l IDE_ERROR -.3968d6 8d 06 03 sta $0306 STA @w FDC_ST0 -.3968d9 a9 82 lda #$82 LDA #BIOS_ERR_READ -.3968db 85 00 sta $0320 STA BIOS_STATUS -.3968dd 28 plp PLP -.3968de 2b pld PLD -.3968df ab plb PLB -.3968e0 7a ply PLY -.3968e1 18 clc CLC -.3968e2 6b rtl RTL -.3968e3 IDE_PUTBLOCK -.3968e3 5a phy PHY -.3968e4 8b phb PHB -.3968e5 0b phd PHD -.3968e6 08 php PHP -.3968e7 48 pha PHA ; begin setdbr macro -.3968e8 08 php PHP -.3968e9 e2 20 sep #$20 SEP #$20 ; set A short -.3968eb a9 00 lda #$00 LDA #0 -.3968ed 48 pha PHA -.3968ee ab plb PLB -.3968ef 28 plp PLP -.3968f0 68 pla PLA ; end setdbr macro -.3968f1 48 pha PHA ; begin setdp macro -.3968f2 08 php PHP -.3968f3 c2 20 rep #$20 REP #$20 ; set A long -.3968f5 a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 -.3968f8 5b tcd TCD -.3968f9 28 plp PLP -.3968fa 68 pla PLA ; end setdp macro -.3968fb e2 20 sep #$20 SEP #$20 ; set A short -.3968fd 20 9e 67 jsr $39679e JSR IDE_DRV_READY_NOTBUSY ; Wait until the IDE is clear to accept commands -.396900 a5 05 lda $0325 LDA BIOS_LBA+3 ; Get the high bits of the LBA -.396902 29 07 and #$07 AND #$07 -.396904 09 e0 ora #$e0 ORA #%11100000 ; Select DEV=0 and LBA mode = 1 -.396906 8f 36 e8 af sta $afe836 STA @l IDE_HEAD ; Ensure master is selected -.39690a 20 9e 67 jsr $39679e JSR IDE_DRV_READY_NOTBUSY ; And wait for it to take effect -.39690d e2 20 sep #$20 SEP #$20 ; set A short -.39690f a9 01 lda #$01 LDA #1 ; Set that we want one sector -.396911 8f 32 e8 af sta $afe832 STA @l IDE_SECT_CNT -.396915 a5 02 lda $0322 LDA BIOS_LBA ; Set the lower bits of the LBA -.396917 8f 33 e8 af sta $afe833 STA @l IDE_SECT_SRT -.39691b a5 03 lda $0323 LDA BIOS_LBA+1 -.39691d 8f 34 e8 af sta $afe834 STA @l IDE_CLDR_LO -.396921 a5 04 lda $0324 LDA BIOS_LBA+2 -.396923 8f 35 e8 af sta $afe835 STA @l IDE_CLDR_HI -.396927 a9 30 lda #$30 LDA #IDE_CMD_WRITE_SECTOR ; The READ SECTOR command -.396929 8f 37 e8 af sta $afe837 STA @l IDE_CMD_STAT -.39692d ea nop NOP ; Wait about 500ns -.39692e ea nop NOP -.39692f ea nop NOP -.396930 ea nop NOP -.396931 20 9e 67 jsr $39679e JSR IDE_DRV_READY_NOTBUSY ; Wait for the device to be ready -.396934 90 37 bcc $39696d BCC ret_failure ; If an error occurred, return it -.396936 c2 30 rep #$30 REP #$30 ; set A&X long -.396938 a0 00 00 ldy #$0000 LDY #0 -.39693b b7 06 lda [$0326],y read_loop LDA [BIOS_BUFF_PTR],Y ; Get the word from the buffer -.39693d 8f 38 e8 af sta $afe838 STA @l IDE_DATA_LO ; Save the word to the device -.396941 c8 iny INY ; Move to the next position -.396942 c8 iny INY -.396943 c0 00 02 cpy #$0200 CPY #512 -.396946 d0 f3 bne $39693b BNE read_loop -.396948 ea nop NOP ; Wait about 500ns -.396949 ea nop NOP -.39694a ea nop NOP -.39694b ea nop NOP -.39694c 20 9e 67 jsr $39679e JSR IDE_DRV_READY_NOTBUSY ; Wait for the device to be ready -.39694f 90 1c bcc $39696d BCC ret_failure ; If an error occurred, return it -.396951 ea nop NOP ; Wait about 500ns -.396952 ea nop NOP -.396953 ea nop NOP -.396954 ea nop NOP -.396955 af 37 e8 af lda $afe837 LDA @l IDE_CMD_STAT ; Check the status -.396959 89 21 00 bit #$0021 BIT #IDE_STAT_ERR | IDE_STAT_DF -.39695c d0 0f bne $39696d BNE ret_failure ; If error: return failure -.39695e ret_success -.39695e e2 20 sep #$20 SEP #$20 ; set A short -.396960 a9 00 lda #$00 LDA #0 -.396962 85 00 sta $0320 STA BIOS_STATUS -.396964 8d 06 03 sta $0306 STA @w FDC_ST0 -.396967 28 plp PLP ; Return success -.396968 2b pld PLD -.396969 ab plb PLB -.39696a 7a ply PLY -.39696b 38 sec SEC -.39696c 6b rtl RTL -.39696d ea nop ret_failure NOP ; Wait about 500ns -.39696e ea nop NOP -.39696f ea nop NOP -.396970 ea nop NOP -.396971 e2 20 sep #$20 SEP #$20 ; set A short -.396973 af 31 e8 af lda $afe831 LDA @l IDE_ERROR -.396977 80 08 bra $396981 BRA save_error -.396979 ea nop NOP -.39697a ea nop NOP -.39697b ea nop NOP -.39697c ea nop NOP -.39697d af 31 e8 af lda $afe831 LDA @l IDE_ERROR -.396981 8d 06 03 sta $0306 save_error STA @w FDC_ST0 -.396984 a9 83 lda #$83 LDA #BIOS_ERR_WRITE -.396986 85 00 sta $0320 STA BIOS_STATUS -.396988 28 plp PLP -.396989 2b pld PLD -.39698a ab plb PLB -.39698b 7a ply PLY -.39698c 18 clc CLC -.39698d 6b rtl RTL +.3967f0 a9 00 lda #$00 LDA #0 +.3967f2 48 pha PHA +.3967f3 ab plb PLB +.3967f4 28 plp PLP +.3967f5 68 pla PLA ; end setdbr macro +.3967f6 48 pha PHA ; begin setdp macro +.3967f7 08 php PHP +.3967f8 c2 20 rep #$20 REP #$20 ; set A long +.3967fa a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.3967fd 5b tcd TCD +.3967fe 28 plp PLP +.3967ff 68 pla PLA ; end setdp macro +.396800 e2 20 sep #$20 SEP #$20 ; set A short +.396802 20 34 67 jsr $396734 JSR IDE_DRV_READY_NOTBUSY ; Wait until the IDE is clear to accept commands +.396805 a5 05 lda $0325 LDA BIOS_LBA+3 ; Get the high bits of the LBA +.396807 29 07 and #$07 AND #$07 +.396809 09 e0 ora #$e0 ORA #%11100000 ; Select DEV=0 and LBA mode = 1 +.39680b 8f 36 e8 af sta $afe836 STA @l IDE_HEAD ; Ensure master is selected +.39680f 20 34 67 jsr $396734 JSR IDE_DRV_READY_NOTBUSY ; And wait for it to take effect +.396812 e2 20 sep #$20 SEP #$20 ; set A short +.396814 a9 01 lda #$01 LDA #1 ; Set that we want one sector +.396816 8f 32 e8 af sta $afe832 STA @l IDE_SECT_CNT +.39681a a5 02 lda $0322 LDA BIOS_LBA ; Set the lower bits of the LBA +.39681c 8f 33 e8 af sta $afe833 STA @l IDE_SECT_SRT +.396820 a5 03 lda $0323 LDA BIOS_LBA+1 +.396822 8f 34 e8 af sta $afe834 STA @l IDE_CLDR_LO +.396826 a5 04 lda $0324 LDA BIOS_LBA+2 +.396828 8f 35 e8 af sta $afe835 STA @l IDE_CLDR_HI +.39682c a9 21 lda #$21 LDA #IDE_CMD_READ_SECTOR ; The READ SECTOR command +.39682e 8f 37 e8 af sta $afe837 STA @l IDE_CMD_STAT +.396832 ea nop NOP ; Wait about 500ns +.396833 ea nop NOP +.396834 ea nop NOP +.396835 ea nop NOP +.396836 20 34 67 jsr $396734 JSR IDE_DRV_READY_NOTBUSY ; Wait for the device to be ready +.396839 90 2b bcc $396866 BCC ret_failure ; If an error occurred, return it +.39683b e2 20 sep #$20 SEP #$20 ; set A short +.39683d af 30 e8 af lda $afe830 LDA @l IDE_DATA ; Read and toss out one byte from the 8-bit interface +.396841 a0 00 00 ldy #$0000 LDY #0 +.396844 c2 30 rep #$30 REP #$30 ; set A&X long +.396846 af 38 e8 af lda $afe838 read_loop LDA @l IDE_DATA_LO ; Get the word of data from the device +.39684a 97 06 sta [$0326],y STA [BIOS_BUFF_PTR],Y ; Save it to the buffer +.39684c c8 iny INY ; Move to the next position +.39684d c8 iny INY +.39684e c0 00 02 cpy #$0200 CPY #512 +.396851 d0 f3 bne $396846 BNE read_loop +.396853 ea nop NOP ; Wait about 500ns +.396854 ea nop NOP +.396855 ea nop NOP +.396856 ea nop NOP +.396857 ret_success +.396857 e2 20 sep #$20 SEP #$20 ; set A short +.396859 a9 00 lda #$00 LDA #0 +.39685b 85 00 sta $0320 STA BIOS_STATUS +.39685d 8d 06 03 sta $0306 STA @w FDC_ST0 +.396860 28 plp PLP ; Return success +.396861 2b pld PLD +.396862 ab plb PLB +.396863 7a ply PLY +.396864 38 sec SEC +.396865 6b rtl RTL +.396866 ret_failure +.396866 e2 20 sep #$20 SEP #$20 ; set A short +.396868 af 31 e8 af lda $afe831 LDA @l IDE_ERROR +.39686c 8d 06 03 sta $0306 STA @w FDC_ST0 +.39686f a9 82 lda #$82 LDA #BIOS_ERR_READ +.396871 85 00 sta $0320 STA BIOS_STATUS +.396873 28 plp PLP +.396874 2b pld PLD +.396875 ab plb PLB +.396876 7a ply PLY +.396877 18 clc CLC +.396878 6b rtl RTL +.396879 IDE_PUTBLOCK +.396879 5a phy PHY +.39687a 8b phb PHB +.39687b 0b phd PHD +.39687c 08 php PHP +.39687d 48 pha PHA ; begin setdbr macro +.39687e 08 php PHP +.39687f e2 20 sep #$20 SEP #$20 ; set A short +.396881 a9 00 lda #$00 LDA #0 +.396883 48 pha PHA +.396884 ab plb PLB +.396885 28 plp PLP +.396886 68 pla PLA ; end setdbr macro +.396887 48 pha PHA ; begin setdp macro +.396888 08 php PHP +.396889 c2 20 rep #$20 REP #$20 ; set A long +.39688b a9 20 03 lda #$0320 LDA #SDOS_VARIABLES ; set DP to page 0 +.39688e 5b tcd TCD +.39688f 28 plp PLP +.396890 68 pla PLA ; end setdp macro +.396891 e2 20 sep #$20 SEP #$20 ; set A short +.396893 20 34 67 jsr $396734 JSR IDE_DRV_READY_NOTBUSY ; Wait until the IDE is clear to accept commands +.396896 a5 05 lda $0325 LDA BIOS_LBA+3 ; Get the high bits of the LBA +.396898 29 07 and #$07 AND #$07 +.39689a 09 e0 ora #$e0 ORA #%11100000 ; Select DEV=0 and LBA mode = 1 +.39689c 8f 36 e8 af sta $afe836 STA @l IDE_HEAD ; Ensure master is selected +.3968a0 20 34 67 jsr $396734 JSR IDE_DRV_READY_NOTBUSY ; And wait for it to take effect +.3968a3 e2 20 sep #$20 SEP #$20 ; set A short +.3968a5 a9 01 lda #$01 LDA #1 ; Set that we want one sector +.3968a7 8f 32 e8 af sta $afe832 STA @l IDE_SECT_CNT +.3968ab a5 02 lda $0322 LDA BIOS_LBA ; Set the lower bits of the LBA +.3968ad 8f 33 e8 af sta $afe833 STA @l IDE_SECT_SRT +.3968b1 a5 03 lda $0323 LDA BIOS_LBA+1 +.3968b3 8f 34 e8 af sta $afe834 STA @l IDE_CLDR_LO +.3968b7 a5 04 lda $0324 LDA BIOS_LBA+2 +.3968b9 8f 35 e8 af sta $afe835 STA @l IDE_CLDR_HI +.3968bd a9 30 lda #$30 LDA #IDE_CMD_WRITE_SECTOR ; The READ SECTOR command +.3968bf 8f 37 e8 af sta $afe837 STA @l IDE_CMD_STAT +.3968c3 ea nop NOP ; Wait about 500ns +.3968c4 ea nop NOP +.3968c5 ea nop NOP +.3968c6 ea nop NOP +.3968c7 20 34 67 jsr $396734 JSR IDE_DRV_READY_NOTBUSY ; Wait for the device to be ready +.3968ca 90 37 bcc $396903 BCC ret_failure ; If an error occurred, return it +.3968cc c2 30 rep #$30 REP #$30 ; set A&X long +.3968ce a0 00 00 ldy #$0000 LDY #0 +.3968d1 b7 06 lda [$0326],y read_loop LDA [BIOS_BUFF_PTR],Y ; Get the word from the buffer +.3968d3 8f 38 e8 af sta $afe838 STA @l IDE_DATA_LO ; Save the word to the device +.3968d7 c8 iny INY ; Move to the next position +.3968d8 c8 iny INY +.3968d9 c0 00 02 cpy #$0200 CPY #512 +.3968dc d0 f3 bne $3968d1 BNE read_loop +.3968de ea nop NOP ; Wait about 500ns +.3968df ea nop NOP +.3968e0 ea nop NOP +.3968e1 ea nop NOP +.3968e2 20 34 67 jsr $396734 JSR IDE_DRV_READY_NOTBUSY ; Wait for the device to be ready +.3968e5 90 1c bcc $396903 BCC ret_failure ; If an error occurred, return it +.3968e7 ea nop NOP ; Wait about 500ns +.3968e8 ea nop NOP +.3968e9 ea nop NOP +.3968ea ea nop NOP +.3968eb af 37 e8 af lda $afe837 LDA @l IDE_CMD_STAT ; Check the status +.3968ef 89 21 00 bit #$0021 BIT #IDE_STAT_ERR | IDE_STAT_DF +.3968f2 d0 0f bne $396903 BNE ret_failure ; If error: return failure +.3968f4 ret_success +.3968f4 e2 20 sep #$20 SEP #$20 ; set A short +.3968f6 a9 00 lda #$00 LDA #0 +.3968f8 85 00 sta $0320 STA BIOS_STATUS +.3968fa 8d 06 03 sta $0306 STA @w FDC_ST0 +.3968fd 28 plp PLP ; Return success +.3968fe 2b pld PLD +.3968ff ab plb PLB +.396900 7a ply PLY +.396901 38 sec SEC +.396902 6b rtl RTL +.396903 ea nop ret_failure NOP ; Wait about 500ns +.396904 ea nop NOP +.396905 ea nop NOP +.396906 ea nop NOP +.396907 e2 20 sep #$20 SEP #$20 ; set A short +.396909 af 31 e8 af lda $afe831 LDA @l IDE_ERROR +.39690d 80 08 bra $396917 BRA save_error +.39690f ea nop NOP +.396910 ea nop NOP +.396911 ea nop NOP +.396912 ea nop NOP +.396913 af 31 e8 af lda $afe831 LDA @l IDE_ERROR +.396917 8d 06 03 sta $0306 save_error STA @w FDC_ST0 +.39691a a9 83 lda #$83 LDA #BIOS_ERR_WRITE +.39691c 85 00 sta $0320 STA BIOS_STATUS +.39691e 28 plp PLP +.39691f 2b pld PLD +.396920 ab plb PLB +.396921 7a ply PLY +.396922 18 clc CLC +.396923 6b rtl RTL ;****** Return to file: src\kernel.asm ;****** Processing file: src\Libraries/Ethernet_Init_library.asm -.39698e SIMPLE_INIT_ETHERNET_CTRL -.39698e WaitforittobeReady: -.39698e af 84 e0 ae lda $aee084 LDA @l ESID_ETHERNET_REG + $84 -.396992 29 01 00 and #$0001 AND #$0001 -.396995 c9 01 00 cmp #$0001 CMP #$0001 ; This is to check that the Controller is ready to roll -.396998 d0 f4 bne $39698e BNE WaitforittobeReady -.39699a af 52 e0 ae lda $aee052 LDA @l ESID_ETHERNET_REG + $52 ;Chip ID (0x9221) -.39699e af 50 e0 ae lda $aee050 LDA @l ESID_ETHERNET_REG + $50 ;Chip Revision -.3969a2 af 64 e0 ae lda $aee064 LDA @l ESID_ETHERNET_REG + $64 -.3969a6 af 66 e0 ae lda $aee066 LDA @l ESID_ETHERNET_REG + $66 -.3969aa a9 00 00 lda #$0000 LDA #$0000 -.3969ad 8f 88 e0 ae sta $aee088 STA @l ESID_ETHERNET_REG + $88 -.3969b1 a9 00 70 lda #$7000 LDA #$7000 -.3969b4 8f 8a e0 ae sta $aee08a STA @l ESID_ETHERNET_REG + $8A -.3969b8 a9 02 00 lda #$0002 LDA #$0002 ; Accessing CSR INDEX 2 MAC Address (High) -.3969bb 8f a4 e0 ae sta $aee0a4 STA @l ESID_ETHERNET_REG + $A4 -.3969bf a9 0b 00 lda #$000b LDA #$000B -.3969c2 8f a8 e0 ae sta $aee0a8 STA @l ESID_ETHERNET_REG + $A8 -.3969c6 a9 00 00 lda #$0000 LDA #$0000 -.3969c9 8f aa e0 ae sta $aee0aa STA @l ESID_ETHERNET_REG + $AA -.3969cd 20 01 6a jsr $396a01 JSR MAC_ACCESS_WAIT_FOR_COMPLETION -.3969d0 a9 03 00 lda #$0003 LDA #$0003 ; Accessing CSR INDEX 3 MAC Address (low) -.3969d3 8f a4 e0 ae sta $aee0a4 STA @l ESID_ETHERNET_REG + $A4 -.3969d7 a9 7f dc lda #$dc7f LDA #$DC7F -.3969da 8f a8 e0 ae sta $aee0a8 STA @l ESID_ETHERNET_REG + $A8 -.3969de a9 d7 ab lda #$abd7 LDA #$ABD7 -.3969e1 8f aa e0 ae sta $aee0aa STA @l ESID_ETHERNET_REG + $AA -.3969e5 20 01 6a jsr $396a01 JSR MAC_ACCESS_WAIT_FOR_COMPLETION -.3969e8 a9 01 00 lda #$0001 LDA #$0001 ; Accessing CSR INDEX 2 MAC Address (High) -.3969eb 8f a4 e0 ae sta $aee0a4 STA @l ESID_ETHERNET_REG + $A4 -.3969ef a9 0c 00 lda #$000c LDA #$000C -.3969f2 8f a8 e0 ae sta $aee0a8 STA @l ESID_ETHERNET_REG + $A8 -.3969f6 a9 04 00 lda #$0004 LDA #$0004 -.3969f9 8f aa e0 ae sta $aee0aa STA @l ESID_ETHERNET_REG + $AA -.3969fd 20 01 6a jsr $396a01 JSR MAC_ACCESS_WAIT_FOR_COMPLETION -.396a00 6b rtl RTL -.396a01 MAC_ACCESS_WAIT_FOR_COMPLETION -.396a01 a9 00 80 lda #$8000 LDA #$8000 ; CsR busy bit is a status but also the Command Execution bit -.396a04 8f a6 e0 ae sta $aee0a6 STA @l ESID_ETHERNET_REG + $A6 -.396a08 WaitForCompletion: -.396a08 af a6 e0 ae lda $aee0a6 LDA @l ESID_ETHERNET_REG + $A6 -.396a0c 29 00 80 and #$8000 AND #$8000 -.396a0f c9 00 80 cmp #$8000 CMP #$8000 -.396a12 f0 f4 beq $396a08 BEQ WaitForCompletion -.396a14 60 rts RTS +.396924 SIMPLE_INIT_ETHERNET_CTRL +.396924 WaitforittobeReady: +.396924 af 84 e0 ae lda $aee084 LDA @l ESID_ETHERNET_REG + $84 +.396928 29 01 00 and #$0001 AND #$0001 +.39692b c9 01 00 cmp #$0001 CMP #$0001 ; This is to check that the Controller is ready to roll +.39692e d0 f4 bne $396924 BNE WaitforittobeReady +.396930 af 52 e0 ae lda $aee052 LDA @l ESID_ETHERNET_REG + $52 ;Chip ID (0x9221) +.396934 af 50 e0 ae lda $aee050 LDA @l ESID_ETHERNET_REG + $50 ;Chip Revision +.396938 af 64 e0 ae lda $aee064 LDA @l ESID_ETHERNET_REG + $64 +.39693c af 66 e0 ae lda $aee066 LDA @l ESID_ETHERNET_REG + $66 +.396940 a9 00 00 lda #$0000 LDA #$0000 +.396943 8f 88 e0 ae sta $aee088 STA @l ESID_ETHERNET_REG + $88 +.396947 a9 00 70 lda #$7000 LDA #$7000 +.39694a 8f 8a e0 ae sta $aee08a STA @l ESID_ETHERNET_REG + $8A +.39694e a9 02 00 lda #$0002 LDA #$0002 ; Accessing CSR INDEX 2 MAC Address (High) +.396951 8f a4 e0 ae sta $aee0a4 STA @l ESID_ETHERNET_REG + $A4 +.396955 a9 0b 00 lda #$000b LDA #$000B +.396958 8f a8 e0 ae sta $aee0a8 STA @l ESID_ETHERNET_REG + $A8 +.39695c a9 00 00 lda #$0000 LDA #$0000 +.39695f 8f aa e0 ae sta $aee0aa STA @l ESID_ETHERNET_REG + $AA +.396963 20 97 69 jsr $396997 JSR MAC_ACCESS_WAIT_FOR_COMPLETION +.396966 a9 03 00 lda #$0003 LDA #$0003 ; Accessing CSR INDEX 3 MAC Address (low) +.396969 8f a4 e0 ae sta $aee0a4 STA @l ESID_ETHERNET_REG + $A4 +.39696d a9 7f dc lda #$dc7f LDA #$DC7F +.396970 8f a8 e0 ae sta $aee0a8 STA @l ESID_ETHERNET_REG + $A8 +.396974 a9 d7 ab lda #$abd7 LDA #$ABD7 +.396977 8f aa e0 ae sta $aee0aa STA @l ESID_ETHERNET_REG + $AA +.39697b 20 97 69 jsr $396997 JSR MAC_ACCESS_WAIT_FOR_COMPLETION +.39697e a9 01 00 lda #$0001 LDA #$0001 ; Accessing CSR INDEX 2 MAC Address (High) +.396981 8f a4 e0 ae sta $aee0a4 STA @l ESID_ETHERNET_REG + $A4 +.396985 a9 0c 00 lda #$000c LDA #$000C +.396988 8f a8 e0 ae sta $aee0a8 STA @l ESID_ETHERNET_REG + $A8 +.39698c a9 04 00 lda #$0004 LDA #$0004 +.39698f 8f aa e0 ae sta $aee0aa STA @l ESID_ETHERNET_REG + $AA +.396993 20 97 69 jsr $396997 JSR MAC_ACCESS_WAIT_FOR_COMPLETION +.396996 6b rtl RTL +.396997 MAC_ACCESS_WAIT_FOR_COMPLETION +.396997 a9 00 80 lda #$8000 LDA #$8000 ; CsR busy bit is a status but also the Command Execution bit +.39699a 8f a6 e0 ae sta $aee0a6 STA @l ESID_ETHERNET_REG + $A6 +.39699e WaitForCompletion: +.39699e af a6 e0 ae lda $aee0a6 LDA @l ESID_ETHERNET_REG + $A6 +.3969a2 29 00 80 and #$8000 AND #$8000 +.3969a5 c9 00 80 cmp #$8000 CMP #$8000 +.3969a8 f0 f4 beq $39699e BEQ WaitForCompletion +.3969aa 60 rts RTS ;****** Return to file: src\kernel.asm @@ -13360,148 +13310,148 @@ ;****** Processing file: src\Libraries/EXP-C200_EVID_Library.asm =$ae2000 EVID_SCREEN_PAGE = $AE2000 ;8192 Bytes First page of display RAM. This is used at boot time to display the welcome screen and the BASIC or MONITOR command screens. -.396a15 INIT_EVID_VID_MODE -.396a15 e2 20 sep #$20 SEP #$20 ; set A short -.396a17 a9 01 lda #$01 LDA #EVID_800x600ModeEnable ; 0 - 80x60, 1- 100x75 -.396a19 8f 01 1e ae sta $ae1e01 STA @l EVID_MSTR_CTRL_REG_H -.396a1d a9 01 lda #$01 LDA #EVID_Border_Ctrl_Enable ; Enable the Border -.396a1f 8f 04 1e ae sta $ae1e04 STA @l EVID_BORDER_CTRL_REG -.396a23 a9 08 lda #$08 LDA #8 ; Set the border to the standard 8 pixels -.396a25 8f 08 1e ae sta $ae1e08 STA @l EVID_BORDER_X_SIZE ; Let's use maximum space -.396a29 8f 09 1e ae sta $ae1e09 STA @l EVID_BORDER_Y_SIZE -.396a2d a9 20 lda #$20 LDA #$20 -.396a2f 8f 07 1e ae sta $ae1e07 STA @l EVID_BORDER_COLOR_R ; R -.396a33 a9 00 lda #$00 LDA #$00 -.396a35 8f 06 1e ae sta $ae1e06 STA @l EVID_BORDER_COLOR_G ; G -.396a39 a9 20 lda #$20 LDA #$20 -.396a3b 8f 05 1e ae sta $ae1e05 STA @l EVID_BORDER_COLOR_B ; B -.396a3f 22 41 6b 39 jsl $396b41 JSL INIT_EVID_LUT -.396a43 22 2a 6b 39 jsl $396b2a JSL INIT_EVID_FONTSET -.396a47 22 65 6b 39 jsl $396b65 JSL INIT_EVID_CURSOR -.396a4b c2 30 rep #$30 REP #$30 ; set A&X long -.396a4d a9 62 00 lda #$0062 LDA #(100-2) -.396a50 8f 63 00 00 sta $000063 STA @l EVID_COLS_VISIBLE -.396a54 a9 49 00 lda #$0049 LDA #(75-2) -.396a57 8f 67 00 00 sta $000067 STA @l EVID_LINES_VISIBLE -.396a5b a9 64 00 lda #$0064 LDA #100 -.396a5e 8f 65 00 00 sta $000065 STA @l EVID_COLS_PER_LINE -.396a62 a9 4b 00 lda #$004b LDA #75 -.396a65 8f 69 00 00 sta $000069 STA @l EVID_LINES_MAX -.396a69 a9 70 00 lda #$0070 LDA #$70 ; Set the default text color to light gray on dark gray -.396a6c 8f 72 00 00 sta $000072 STA @l EVID_CURCOLOR -.396a70 c2 30 rep #$30 REP #$30 ; set A&X long -.396a72 a9 00 20 lda #$2000 LDA #<>EVID_TEXT_MEM ; store the initial screen buffer location -.396a75 8f 60 00 00 sta $000060 STA @l EVID_SCREENBEGIN -.396a79 8f 6b 00 00 sta $00006b STA @l EVID_CURSORPOS -.396a7d a9 00 40 lda #$4000 LDA #<>EVID_COLOR_MEM ; Set the initial COLOR cursor position -.396a80 8d 76 00 sta $0076 STA EVID_COLORPOS -.396a83 e2 20 sep #$20 SEP #$20 ; set A short -.396a85 a9 ae lda #$ae LDA #`EVID_TEXT_MEM -.396a87 8f 62 00 00 sta $000062 STA @l EVID_SCREENBEGIN + 2 -.396a8b 8f 6d 00 00 sta $00006d STA @l EVID_CURSORPOS+2 -.396a8f a9 ae lda #$ae LDA #`EVID_COLOR_MEM ; Set the initial COLOR cursor position -.396a91 8f 78 00 00 sta $000078 STA @l EVID_COLORPOS + 2 -.396a95 6b rtl RTL ->396a96 1b 5b 31 6d 1b 5b 33 31 EVID_DEV_RDY0 .text $1B, "[1m", $1B, "[31m", $0B, $0C, $1B, "[35m", $0B, $0C, $1B, "[33m", $0B, $0C, $1B ->396a9e 6d 0b 0c 1b 5b 33 35 6d 0b 0c 1b 5b 33 33 6d 0b ->396aae 0c 1b ->396ab0 5b 33 32 6d 0b 0c 1b 5b .null "[32m", $0B, $0C, $1B, "[34m", $0B, $0C, $1B, "[0m", $20, "C256 Foenix EXP-C200-EVID", $0D ->396ab8 33 34 6d 0b 0c 1b 5b 30 6d 20 43 32 35 36 20 46 ->396ac8 6f 65 6e 69 78 20 45 58 50 2d 43 32 30 30 2d 45 ->396ad8 56 49 44 0d 00 ->396add 59 6f 75 72 20 44 65 76 EVID_DEV_RDY1 .null "Your Device is Ready..." ->396ae5 69 63 65 20 69 73 20 52 65 61 64 79 2e 2e 2e 00 -.396af5 EVID_GREET -.396af5 48 pha PHA -.396af6 da phx PHX -.396af7 08 php PHP -.396af8 e2 20 sep #$20 SEP #$20 ; set A short -.396afa af 7d 00 00 lda $00007d LDA @l EVID_PRESENT ; Check if the EVID screen is present -.396afe f0 26 beq $396b26 BEQ done ; If not, skip this routine -.396b00 a9 04 lda #$04 LDA #CHAN_EVID ; Switch to the EVID screen -.396b02 22 3c 10 00 jsl $00103c JSL SETOUT -.396b06 22 a8 10 00 jsl $0010a8 JSL CLRSCREEN ; Clear the screen -.396b0a c2 10 rep #$10 REP #$10 ; set X long -.396b0c 8b phb PHB ; Print the messages -.396b0d a9 39 lda #$39 LDA #`EVID_DEV_RDY0 -.396b0f 48 pha PHA -.396b10 ab plb PLB -.396b11 a2 96 6a ldx #$6a96 LDX #<>EVID_DEV_RDY0 -.396b14 22 1d 07 39 jsl $39071d JSL IPRINT -.396b18 a2 dd 6a ldx #$6add LDX #<>EVID_DEV_RDY1 -.396b1b 22 1d 07 39 jsl $39071d JSL IPRINT -.396b1f ab plb PLB -.396b20 a9 00 lda #$00 LDA #CHAN_CONSOLE ; Go back to the main console -.396b22 22 3c 10 00 jsl $00103c JSL SETOUT -.396b26 28 plp done PLP -.396b27 fa plx PLX -.396b28 68 pla PLA -.396b29 6b rtl RTL -.396b2a INIT_EVID_FONTSET -.396b2a e2 20 sep #$20 SEP #$20 ; set A short -.396b2c c2 10 rep #$10 REP #$10 ; set X long -.396b2e a2 00 00 ldx #$0000 LDX #$0000 -.396b31 initFontsetbranch0 -.396b31 bf 00 00 3f lda $3f0000,x LDA @lFONT_4_BANK0,X ; RAM Content -.396b35 9f 00 10 ae sta $ae1000,x STA @lEVID_FONT_MEM,X ; Vicky FONT RAM Bank -.396b39 e8 inx INX -.396b3a e0 00 08 cpx #$0800 CPX #$0800 -.396b3d d0 f2 bne $396b31 BNE initFontsetbranch0 -.396b3f ea nop NOP -.396b40 6b rtl RTL -.396b41 INIT_EVID_LUT -.396b41 e2 20 sep #$20 SEP #$20 ; set A short -.396b43 e2 10 sep #$10 SEP #$10 ; set X short -.396b45 a2 00 ldx #$00 LDX #$00 -.396b47 bf 39 83 39 lda $398339,x lutinitloop0 LDA @lfg_color_lut,x ; get Local Data c64_character_Color_LUT_4_Txt -.396b4b 9f 00 1b ae sta $ae1b00,x STA @lEVID_FG_LUT,x ; Write in LUT Memory -.396b4f e8 inx inx -.396b50 e0 40 cpx #$40 cpx #$40 -.396b52 d0 f3 bne $396b47 bne lutinitloop0 -.396b54 a2 00 ldx #$00 LDX #$00 -.396b56 bf 79 83 39 lda $398379,x lutinitloop1 LDA @lbg_color_lut,x ; get Local Data -.396b5a 9f 40 1b ae sta $ae1b40,x STA @lEVID_BG_LUT,x ; Write in LUT Memory -.396b5e e8 inx INX -.396b5f e0 40 cpx #$40 CPX #$40 -.396b61 d0 f3 bne $396b56 bne lutinitloop1 -.396b63 ea nop NOP -.396b64 6b rtl RTL -.396b65 INIT_EVID_CURSOR -.396b65 08 php PHP -.396b66 e2 20 sep #$20 SEP #$20 ; set A short -.396b68 a9 b1 lda #$b1 LDA #$B1 ; The Cursor Character will be a Fully Filled Block -.396b6a 8f 12 1e ae sta $ae1e12 STA @lEVID_TXT_CURSOR_CHAR_REG -.396b6e a9 03 lda #$03 LDA #(EVID_Cursor_Enable | EVID_Cursor_Flash_Rate0) ; Set Cursor Enable And Flash Rate @1Hz -.396b70 8f 10 1e ae sta $ae1e10 STA @lEVID_TXT_CURSOR_CTRL_REG -.396b74 c2 30 rep #$30 REP #$30 ; set A&X long -.396b76 a9 00 00 lda #$0000 LDA #$0000; -.396b79 8f 14 1e ae sta $ae1e14 STA @lEVID_TXT_CURSOR_X_REG_L ; Set the X to Position 1 -.396b7d 8f 16 1e ae sta $ae1e16 STA @lEVID_TXT_CURSOR_Y_REG_L ; Set the Y to Position 6 (Below) -.396b81 28 plp PLP -.396b82 6b rtl RTL -.396b83 INIT_EVID_CLRSCREEN -.396b83 08 php PHP -.396b84 e2 20 sep #$20 SEP #$20 ; set A short -.396b86 c2 10 rep #$10 REP #$10 ; set X long -.396b88 a2 00 00 ldx #$0000 LDX #$0000 ; Only Use One Pointer -.396b8b a9 20 lda #$20 LDA #$20 ; Fill the Entire Screen with Space -.396b8d 9f 00 20 ae sta $ae2000,x iclearloop0 STA @l EVID_TEXT_MEM,X -.396b91 e8 inx inx -.396b92 e0 00 20 cpx #$2000 cpx #$2000 -.396b95 d0 f6 bne $396b8d bne iclearloop0 -.396b97 a2 00 00 ldx #$0000 LDX #$0000 ; Only Use One Pointer -.396b9a a9 f0 lda #$f0 LDA #$F0 ; Fill the Color Memory with Foreground: 75% Purple, Background 12.5% White -.396b9c 9f 00 40 ae sta $ae4000,x iclearloop1 STA @l EVID_COLOR_MEM,X -.396ba0 e8 inx inx -.396ba1 e0 00 20 cpx #$2000 cpx #$2000 -.396ba4 d0 f6 bne $396b9c bne iclearloop1 -.396ba6 28 plp PLP -.396ba7 6b rtl RTL +.3969ab INIT_EVID_VID_MODE +.3969ab e2 20 sep #$20 SEP #$20 ; set A short +.3969ad a9 01 lda #$01 LDA #EVID_800x600ModeEnable ; 0 - 80x60, 1- 100x75 +.3969af 8f 01 1e ae sta $ae1e01 STA @l EVID_MSTR_CTRL_REG_H +.3969b3 a9 01 lda #$01 LDA #EVID_Border_Ctrl_Enable ; Enable the Border +.3969b5 8f 04 1e ae sta $ae1e04 STA @l EVID_BORDER_CTRL_REG +.3969b9 a9 08 lda #$08 LDA #8 ; Set the border to the standard 8 pixels +.3969bb 8f 08 1e ae sta $ae1e08 STA @l EVID_BORDER_X_SIZE ; Let's use maximum space +.3969bf 8f 09 1e ae sta $ae1e09 STA @l EVID_BORDER_Y_SIZE +.3969c3 a9 20 lda #$20 LDA #$20 +.3969c5 8f 07 1e ae sta $ae1e07 STA @l EVID_BORDER_COLOR_R ; R +.3969c9 a9 00 lda #$00 LDA #$00 +.3969cb 8f 06 1e ae sta $ae1e06 STA @l EVID_BORDER_COLOR_G ; G +.3969cf a9 20 lda #$20 LDA #$20 +.3969d1 8f 05 1e ae sta $ae1e05 STA @l EVID_BORDER_COLOR_B ; B +.3969d5 22 d7 6a 39 jsl $396ad7 JSL INIT_EVID_LUT +.3969d9 22 c0 6a 39 jsl $396ac0 JSL INIT_EVID_FONTSET +.3969dd 22 fb 6a 39 jsl $396afb JSL INIT_EVID_CURSOR +.3969e1 c2 30 rep #$30 REP #$30 ; set A&X long +.3969e3 a9 62 00 lda #$0062 LDA #(100-2) +.3969e6 8f 63 00 00 sta $000063 STA @l EVID_COLS_VISIBLE +.3969ea a9 49 00 lda #$0049 LDA #(75-2) +.3969ed 8f 67 00 00 sta $000067 STA @l EVID_LINES_VISIBLE +.3969f1 a9 64 00 lda #$0064 LDA #100 +.3969f4 8f 65 00 00 sta $000065 STA @l EVID_COLS_PER_LINE +.3969f8 a9 4b 00 lda #$004b LDA #75 +.3969fb 8f 69 00 00 sta $000069 STA @l EVID_LINES_MAX +.3969ff a9 70 00 lda #$0070 LDA #$70 ; Set the default text color to light gray on dark gray +.396a02 8f 72 00 00 sta $000072 STA @l EVID_CURCOLOR +.396a06 c2 30 rep #$30 REP #$30 ; set A&X long +.396a08 a9 00 20 lda #$2000 LDA #<>EVID_TEXT_MEM ; store the initial screen buffer location +.396a0b 8f 60 00 00 sta $000060 STA @l EVID_SCREENBEGIN +.396a0f 8f 6b 00 00 sta $00006b STA @l EVID_CURSORPOS +.396a13 a9 00 40 lda #$4000 LDA #<>EVID_COLOR_MEM ; Set the initial COLOR cursor position +.396a16 8d 76 00 sta $0076 STA EVID_COLORPOS +.396a19 e2 20 sep #$20 SEP #$20 ; set A short +.396a1b a9 ae lda #$ae LDA #`EVID_TEXT_MEM +.396a1d 8f 62 00 00 sta $000062 STA @l EVID_SCREENBEGIN + 2 +.396a21 8f 6d 00 00 sta $00006d STA @l EVID_CURSORPOS+2 +.396a25 a9 ae lda #$ae LDA #`EVID_COLOR_MEM ; Set the initial COLOR cursor position +.396a27 8f 78 00 00 sta $000078 STA @l EVID_COLORPOS + 2 +.396a2b 6b rtl RTL +>396a2c 1b 5b 31 6d 1b 5b 33 31 EVID_DEV_RDY0 .text $1B, "[1m", $1B, "[31m", $0B, $0C, $1B, "[35m", $0B, $0C, $1B, "[33m", $0B, $0C, $1B +>396a34 6d 0b 0c 1b 5b 33 35 6d 0b 0c 1b 5b 33 33 6d 0b +>396a44 0c 1b +>396a46 5b 33 32 6d 0b 0c 1b 5b .null "[32m", $0B, $0C, $1B, "[34m", $0B, $0C, $1B, "[0m", $20, "C256 Foenix EXP-C200-EVID", $0D +>396a4e 33 34 6d 0b 0c 1b 5b 30 6d 20 43 32 35 36 20 46 +>396a5e 6f 65 6e 69 78 20 45 58 50 2d 43 32 30 30 2d 45 +>396a6e 56 49 44 0d 00 +>396a73 59 6f 75 72 20 44 65 76 EVID_DEV_RDY1 .null "Your Device is Ready..." +>396a7b 69 63 65 20 69 73 20 52 65 61 64 79 2e 2e 2e 00 +.396a8b EVID_GREET +.396a8b 48 pha PHA +.396a8c da phx PHX +.396a8d 08 php PHP +.396a8e e2 20 sep #$20 SEP #$20 ; set A short +.396a90 af 7d 00 00 lda $00007d LDA @l EVID_PRESENT ; Check if the EVID screen is present +.396a94 f0 26 beq $396abc BEQ done ; If not, skip this routine +.396a96 a9 04 lda #$04 LDA #CHAN_EVID ; Switch to the EVID screen +.396a98 22 3c 10 00 jsl $00103c JSL SETOUT +.396a9c 22 a8 10 00 jsl $0010a8 JSL CLRSCREEN ; Clear the screen +.396aa0 c2 10 rep #$10 REP #$10 ; set X long +.396aa2 8b phb PHB ; Print the messages +.396aa3 a9 39 lda #$39 LDA #`EVID_DEV_RDY0 +.396aa5 48 pha PHA +.396aa6 ab plb PLB +.396aa7 a2 2c 6a ldx #$6a2c LDX #<>EVID_DEV_RDY0 +.396aaa 22 1d 07 39 jsl $39071d JSL IPRINT +.396aae a2 73 6a ldx #$6a73 LDX #<>EVID_DEV_RDY1 +.396ab1 22 1d 07 39 jsl $39071d JSL IPRINT +.396ab5 ab plb PLB +.396ab6 a9 00 lda #$00 LDA #CHAN_CONSOLE ; Go back to the main console +.396ab8 22 3c 10 00 jsl $00103c JSL SETOUT +.396abc 28 plp done PLP +.396abd fa plx PLX +.396abe 68 pla PLA +.396abf 6b rtl RTL +.396ac0 INIT_EVID_FONTSET +.396ac0 e2 20 sep #$20 SEP #$20 ; set A short +.396ac2 c2 10 rep #$10 REP #$10 ; set X long +.396ac4 a2 00 00 ldx #$0000 LDX #$0000 +.396ac7 initFontsetbranch0 +.396ac7 bf 00 00 3f lda $3f0000,x LDA @lFONT_4_BANK0,X ; RAM Content +.396acb 9f 00 10 ae sta $ae1000,x STA @lEVID_FONT_MEM,X ; Vicky FONT RAM Bank +.396acf e8 inx INX +.396ad0 e0 00 08 cpx #$0800 CPX #$0800 +.396ad3 d0 f2 bne $396ac7 BNE initFontsetbranch0 +.396ad5 ea nop NOP +.396ad6 6b rtl RTL +.396ad7 INIT_EVID_LUT +.396ad7 e2 20 sep #$20 SEP #$20 ; set A short +.396ad9 e2 10 sep #$10 SEP #$10 ; set X short +.396adb a2 00 ldx #$00 LDX #$00 +.396add bf 39 83 39 lda $398339,x lutinitloop0 LDA @lfg_color_lut,x ; get Local Data c64_character_Color_LUT_4_Txt +.396ae1 9f 00 1b ae sta $ae1b00,x STA @lEVID_FG_LUT,x ; Write in LUT Memory +.396ae5 e8 inx inx +.396ae6 e0 40 cpx #$40 cpx #$40 +.396ae8 d0 f3 bne $396add bne lutinitloop0 +.396aea a2 00 ldx #$00 LDX #$00 +.396aec bf 79 83 39 lda $398379,x lutinitloop1 LDA @lbg_color_lut,x ; get Local Data +.396af0 9f 40 1b ae sta $ae1b40,x STA @lEVID_BG_LUT,x ; Write in LUT Memory +.396af4 e8 inx INX +.396af5 e0 40 cpx #$40 CPX #$40 +.396af7 d0 f3 bne $396aec bne lutinitloop1 +.396af9 ea nop NOP +.396afa 6b rtl RTL +.396afb INIT_EVID_CURSOR +.396afb 08 php PHP +.396afc e2 20 sep #$20 SEP #$20 ; set A short +.396afe a9 b1 lda #$b1 LDA #$B1 ; The Cursor Character will be a Fully Filled Block +.396b00 8f 12 1e ae sta $ae1e12 STA @lEVID_TXT_CURSOR_CHAR_REG +.396b04 a9 03 lda #$03 LDA #(EVID_Cursor_Enable | EVID_Cursor_Flash_Rate0) ; Set Cursor Enable And Flash Rate @1Hz +.396b06 8f 10 1e ae sta $ae1e10 STA @lEVID_TXT_CURSOR_CTRL_REG +.396b0a c2 30 rep #$30 REP #$30 ; set A&X long +.396b0c a9 00 00 lda #$0000 LDA #$0000; +.396b0f 8f 14 1e ae sta $ae1e14 STA @lEVID_TXT_CURSOR_X_REG_L ; Set the X to Position 1 +.396b13 8f 16 1e ae sta $ae1e16 STA @lEVID_TXT_CURSOR_Y_REG_L ; Set the Y to Position 6 (Below) +.396b17 28 plp PLP +.396b18 6b rtl RTL +.396b19 INIT_EVID_CLRSCREEN +.396b19 08 php PHP +.396b1a e2 20 sep #$20 SEP #$20 ; set A short +.396b1c c2 10 rep #$10 REP #$10 ; set X long +.396b1e a2 00 00 ldx #$0000 LDX #$0000 ; Only Use One Pointer +.396b21 a9 20 lda #$20 LDA #$20 ; Fill the Entire Screen with Space +.396b23 9f 00 20 ae sta $ae2000,x iclearloop0 STA @l EVID_TEXT_MEM,X +.396b27 e8 inx inx +.396b28 e0 00 20 cpx #$2000 cpx #$2000 +.396b2b d0 f6 bne $396b23 bne iclearloop0 +.396b2d a2 00 00 ldx #$0000 LDX #$0000 ; Only Use One Pointer +.396b30 a9 f0 lda #$f0 LDA #$F0 ; Fill the Color Memory with Foreground: 75% Purple, Background 12.5% White +.396b32 9f 00 40 ae sta $ae4000,x iclearloop1 STA @l EVID_COLOR_MEM,X +.396b36 e8 inx inx +.396b37 e0 00 20 cpx #$2000 cpx #$2000 +.396b3a d0 f6 bne $396b32 bne iclearloop1 +.396b3c 28 plp PLP +.396b3d 6b rtl RTL ;****** Return to file: src\kernel.asm -;****** Processing file: src\drivers/ansi_screens.asm +;****** Processing file: src\Libraries/ansi_screens.asm .0000 S_ANSI_VARS >0000 SCREENBEGIN .long ? ; Start of screen in video RAM. This is the upper-left corrner of the current video page being written to. This may not be what's being displayed by VICKY. Update this if you change VICKY's display page. @@ -13529,1177 +13479,1177 @@ =$70 ANSI_DEF_COLOR = $70 ; Default color (dim white on dim black) =$80 CONTROL_INVERT = $80 ; Control bit: Colors are inverted =$40 CONTROL_BOLD = $40 ; Control bit: Colors should be intense -.396ba8 ANSI_INIT -.396ba8 da phx PHX -.396ba9 5a phy PHY -.396baa 8b phb PHB -.396bab 0b phd PHD -.396bac 08 php PHP -.396bad c2 30 rep #$30 REP #$30 ; set A&X long -.396baf a0 00 00 ldy #$0000 LDY #0 -.396bb2 22 5e 6c 39 jsl $396c5e JSL INIT_SCREEN_Y ; Set up the main screen -.396bb6 e2 20 sep #$20 SEP #$20 ; set A short -.396bb8 af 87 e8 af lda $afe887 LDA @l GABE_SYS_STAT ; Let's check the Presence of an Expansion Card here -.396bbc 29 10 and #$10 AND #GABE_SYS_STAT_EXP ; When there is a Card the Value is 1 -.396bbe c9 10 cmp #$10 CMP #GABE_SYS_STAT_EXP -.396bc0 d0 1d bne $396bdf BNE no_evid -.396bc2 c2 20 rep #$20 REP #$20 ; set A long -.396bc4 af 12 00 ae lda $ae0012 LDA @l ESID_ID_CARD_ID_Lo ; Load the Card ID and check for C100 or C200 -.396bc8 c9 c8 00 cmp #$00c8 CMP #$00C8 ; Is it the EVID card? -.396bcb d0 12 bne $396bdf BNE no_evid ; No: mark the EVID screen as not present -.396bcd e2 20 sep #$20 SEP #$20 ; set A short -.396bcf a9 01 lda #$01 LDA #1 ; Otherwise: Mark that there is an EVID present -.396bd1 8f 7d 00 00 sta $00007d STA @l EVID_PRESENT -.396bd5 a0 01 00 ldy #$0001 LDY #1 -.396bd8 22 5e 6c 39 jsl $396c5e JSL INIT_SCREEN_Y ; Initialize the EVID screen variables -.396bdc 80 09 bra $396be7 BRA done -.396bde 00 brk # BRK -.396bdf no_evid -.396bdf e2 20 sep #$20 SEP #$20 ; set A short -.396be1 a9 00 lda #$00 LDA #0 ; Mark that there is no EVID present -.396be3 8f 7d 00 00 sta $00007d STA @l EVID_PRESENT -.396be7 28 plp done PLP -.396be8 2b pld PLD -.396be9 ab plb PLB -.396bea 7a ply PLY -.396beb fa plx PLX -.396bec 6b rtl RTL -.396bed ANSI_INIT_LUTS -.396bed 08 php PHP -.396bee e2 30 sep #$30 SEP #$30 ; set A&X short -.396bf0 a2 00 ldx #$00 LDX #0 -.396bf2 bf 1e 6c 39 lda $396c1e,x vicky_loop LDA ANSI_TEXT_LUT,X ; Get the Xth LUT byte -.396bf6 9f 40 1f af sta $af1f40,x STA @l FG_CHAR_LUT_PTR,X ; Set the corresponding foreground color component on Vicky -.396bfa 9f 80 1f af sta $af1f80,x STA @l BG_CHAR_LUT_PTR,X ; Set the corresponding background color component on Vicky -.396bfe e8 inx INX -.396bff e0 40 cpx #$40 CPX #4*16 -.396c01 d0 ef bne $396bf2 BNE vicky_loop -.396c03 af 7d 00 00 lda $00007d LDA @l EVID_PRESENT ; Check to see if EVID is present -.396c07 f0 13 beq $396c1c BEQ done ; If not, we're done -.396c09 a2 00 ldx #$00 LDX #0 -.396c0b bf 1e 6c 39 lda $396c1e,x evid_loop LDA ANSI_TEXT_LUT,X ; Get the Xth LUT byte -.396c0f 9f 00 1b ae sta $ae1b00,x STA @l EVID_FG_LUT,X ; Set the corresponding foreground color component on the EVID card -.396c13 9f 40 1b ae sta $ae1b40,x STA @l EVID_BG_LUT,X ; Set the corresponding background color component on the EVID card -.396c17 e8 inx INX -.396c18 e0 40 cpx #$40 CPX #4*16 -.396c1a d0 ef bne $396c0b BNE evid_loop -.396c1c 28 plp done PLP -.396c1d 6b rtl RTL -.396c1e ANSI_TEXT_LUT ->396c1e 00 00 00 00 .byte 0, 0, 0, 0 ->396c22 00 00 80 00 .byte 0, 0, 128, 0 ->396c26 00 80 00 00 .byte 0, 128, 0, 0 ->396c2a 00 80 80 00 .byte 0, 128, 128, 0 ->396c2e 80 00 00 00 .byte 128, 0, 0, 0 ->396c32 80 00 80 00 .byte 128, 0, 128, 0 ->396c36 80 80 00 00 .byte 128, 128, 0, 0 ->396c3a c0 c0 c0 00 .byte 192, 192, 192, 0 ->396c3e 80 80 80 00 .byte 128, 128, 128, 0 ->396c42 00 00 ff 00 .byte 0, 0, 255, 0 ->396c46 00 ff 00 00 .byte 0, 255, 0, 0 ->396c4a 00 ff ff 00 .byte 0, 255, 255, 0 ->396c4e ff 00 00 00 .byte 255, 0, 0, 0 ->396c52 00 7f fc 00 .byte 0, 127, 252, 0 ->396c56 ff ff 00 00 .byte 255, 255, 0, 0 ->396c5a ff ff ff 00 .byte 255, 255, 255, 0 -.396c5e INIT_SCREEN_Y -.396c5e c2 30 rep #$30 REP #$30 ; set A&X long -.396c60 c0 00 00 cpy #$0000 CPY #0 -.396c63 f0 06 beq $396c6b BEQ setdp_0 -.396c65 a9 60 00 lda #$0060 setdp_1 LDA #<>EVID_SCREENBEGIN ; Set DP to the EVID variable block -.396c68 5b tcd TCD -.396c69 80 04 bra $396c6f BRA set_addresses -.396c6b a9 0c 00 lda #$000c setdp_0 LDA #<>SCREENBEGIN ; Set DP to the main screen variable block -.396c6e 5b tcd TCD -.396c6f 98 tya set_addresses TYA ; Compute offset to screen Y's addresses -.396c70 0a asl a ASL A -.396c71 0a asl a ASL A -.396c72 aa tax TAX -.396c73 bf ae 6c 39 lda $396cae,x LDA @l text_address,X -.396c77 85 00 sta $0320 STA #S_ANSI_VARS.SCREENBEGIN,D ; Set the address of the text matrix -.396c79 85 0b sta $032b STA #S_ANSI_VARS.CURSORPOS,D ; And the cursor pointer -.396c7b e2 20 sep #$20 SEP #$20 ; set A short -.396c7d bf b0 6c 39 lda $396cb0,x LDA @l text_address+2,X -.396c81 85 02 sta $0322 STA #S_ANSI_VARS.SCREENBEGIN+2,D -.396c83 85 0d sta $032d STA #S_ANSI_VARS.CURSORPOS+2,D -.396c85 c2 20 rep #$20 REP #$20 ; set A long -.396c87 bf b6 6c 39 lda $396cb6,x LDA @l color_address,X -.396c8b 85 16 sta $0336 STA #S_ANSI_VARS.COLORBEGIN,D ; Set the address of the color matrix -.396c8d 85 13 sta $0333 STA #S_ANSI_VARS.COLORPOS,D ; And the color cursor pointer -.396c8f e2 20 sep #$20 SEP #$20 ; set A short -.396c91 bf b8 6c 39 lda $396cb8,x LDA @l color_address+2,X -.396c95 85 18 sta $0338 STA #S_ANSI_VARS.COLORBEGIN+2,D -.396c97 85 15 sta $0335 STA #S_ANSI_VARS.COLORPOS+2,D -.396c99 c2 20 rep #$20 REP #$20 ; set A long -.396c9b 64 0e stz $032e STZ #S_ANSI_VARS.CURSORX,D ; Set the cursor position to 0, 0 -.396c9d 64 10 stz $0330 STZ #S_ANSI_VARS.CURSORY,D -.396c9f e2 20 sep #$20 SEP #$20 ; set A short -.396ca1 64 1e stz $033e STZ #S_ANSI_VARS.STATE,D ; Set the state of the ANSI parser to S0 -.396ca3 64 1f stz $033f STZ #S_ANSI_VARS.CONTROL,D ; Set the control bits to 0 (default) -.396ca5 a9 70 lda #$70 LDA #ANSI_DEF_COLOR -.396ca7 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D ; Set the current color to the default -.396ca9 22 f7 6c 39 jsl $396cf7 JSL ANSI_SETSIZE_Y ; Set the size variables for the main screen -.396cad 6b rtl RTL ->396cae 00 a0 af 00 00 20 ae 00 text_address .dword CS_TEXT_MEM_PTR, EVID_TEXT_MEM ->396cb6 00 c0 af 00 00 40 ae 00 color_address .dword CS_COLOR_MEM_PTR, EVID_COLOR_MEM -.396cbe ANSI_SETSIZES -.396cbe 48 pha PHA -.396cbf da phx PHX -.396cc0 5a phy PHY -.396cc1 0b phd PHD -.396cc2 08 php PHP -.396cc3 e2 30 sep #$30 SEP #$30 ; set A&X short -.396cc5 af 03 07 00 lda $000703 LDA @l CHAN_OUT ; Save the current output channel -.396cc9 48 pha PHA -.396cca a9 00 lda #$00 LDA #CHAN_CONSOLE ; Set the sizes for the main screen -.396ccc 8f 03 07 00 sta $000703 STA @l CHAN_OUT -.396cd0 22 ba 6d 39 jsl $396dba JSL ANSI_SETDEVICE ; Set the DP to the device's record -.396cd4 a0 00 ldy #$00 LDY #0 -.396cd6 22 f7 6c 39 jsl $396cf7 JSL ANSI_SETSIZE_Y ; Set the sizes for that device -.396cda a9 04 lda #$04 LDA #CHAN_EVID ; Set the sizes for the EVID screen -.396cdc 8f 03 07 00 sta $000703 STA @l CHAN_OUT -.396ce0 22 ba 6d 39 jsl $396dba JSL ANSI_SETDEVICE ; Set the DP to the device's record -.396ce4 b0 06 bcs $396cec BCS done ; Not present, just return -.396ce6 a0 01 ldy #$01 LDY #1 -.396ce8 22 f7 6c 39 jsl $396cf7 JSL ANSI_SETSIZE_Y ; Set the sizes for that device -.396cec 68 pla done PLA -.396ced 8f 03 07 00 sta $000703 STA @l CHAN_OUT ; Restore the output channel -.396cf1 28 plp PLP -.396cf2 2b pld PLD -.396cf3 7a ply PLY -.396cf4 fa plx PLX -.396cf5 68 pla PLA -.396cf6 6b rtl RTL -.396cf7 ANSI_SETSIZE_Y -.396cf7 08 php PHP -.396cf8 e2 30 sep #$30 SEP #$30 ; set A&X short -.396cfa c0 00 cpy #$00 CPY #0 ; Is our target screen 0? -.396cfc f0 06 beq $396d04 BEQ vky_master ; Yes: get the resolution from Vicky -.396cfe af 01 1e ae lda $ae1e01 LDA @l EVID_MSTR_CTRL_REG_H ; No: get the resolution from EVID -.396d02 80 04 bra $396d08 BRA resolution -.396d04 af 01 00 af lda $af0001 vky_master LDA @l MASTER_CTRL_REG_H -.396d08 29 03 and #$03 resolution AND #$03 ; Mask off the resolution bits -.396d0a 0a asl a ASL A -.396d0b aa tax TAX ; Index to the col/line count in X -.396d0c c2 20 rep #$20 REP #$20 ; set A long -.396d0e bf aa 6d 39 lda $396daa,x LDA @l cols_by_res,X ; Get the number of columns -.396d12 85 05 sta $0325 STA #S_ANSI_VARS.COLS_PER_LINE,D ; This is how many columns there are per line in the memory -.396d14 85 03 sta $0323 STA #S_ANSI_VARS.COLS_VISIBLE,D ; This is how many would be visible with no border -.396d16 bf b2 6d 39 lda $396db2,x LDA @l lines_by_res,X ; Get the number of lines -.396d1a 85 09 sta $0329 STA #S_ANSI_VARS.LINES_MAX,D ; This is the total number of lines in memory -.396d1c 85 07 sta $0327 STA #S_ANSI_VARS.LINES_VISIBLE,D ; This is how many lines would be visible with no border -.396d1e e2 20 sep #$20 SEP #$20 ; set A short -.396d20 c0 00 cpy #$00 CPY #0 ; Is our target screen 0? -.396d22 f0 06 beq $396d2a BEQ vky_border ; Yes: get the border from Vicky -.396d24 af 04 1e ae lda $ae1e04 LDA @l EVID_BORDER_CTRL_REG ; No: Check EVID to see if we have a border -.396d28 80 04 bra $396d2e BRA border -.396d2a af 04 00 af lda $af0004 vky_border LDA @l BORDER_CTRL_REG ; Check Vicky to see if we have a border -.396d2e 89 01 bit #$01 border BIT #Border_Ctrl_Enable -.396d30 f0 76 beq $396da8 BEQ done ; No border... the sizes are correct now -.396d32 c0 00 cpy #$00 CPY #0 ; Is our target screen 0? -.396d34 f0 06 beq $396d3c BEQ vky_border_size ; Yes: get the border size from Vicky -.396d36 af 08 1e ae lda $ae1e08 LDA @l EVID_BORDER_X_SIZE ; No: Get the horizontal border width from EVID -.396d3a 80 04 bra $396d40 BRA get_border_x_size -.396d3c af 08 00 af lda $af0008 vky_border_size LDA @l BORDER_X_SIZE ; Get the horizontal border width from Vicky -.396d40 29 3f and #$3f get_border_x_size AND #$3F -.396d42 89 03 bit #$03 BIT #$03 ; Check the lower two bits... indicates a partial column is eaten -.396d44 d0 04 bne $396d4a BNE frac_width -.396d46 4a lsr a LSR A ; COLUMNS_HIDDEN := BORDER_X_SIZE / 4 -.396d47 4a lsr a LSR A -.396d48 80 03 bra $396d4d BRA store_width -.396d4a 4a lsr a frac_width LSR A ; COLUMNS_HIDDEN := BORDER_X_SIZE / 4 + 1 -.396d4b 4a lsr a LSR A ; because a column is partially hidden -.396d4c 1a inc a INC A -.396d4d 85 19 sta $0339 store_width STA #S_ANSI_VARS.TMPPTR1,D -.396d4f 64 1a stz $033a STZ #S_ANSI_VARS.TMPPTR1+1,D -.396d51 e2 20 sep #$20 SEP #$20 ; set A short -.396d53 c0 01 cpy #$01 CPY #1 ; Are we setting the EVID? -.396d55 f0 0c beq $396d63 BEQ adjust_width ; Yes: skip the pixel doubling check -.396d57 af 01 00 af lda $af0001 LDA @l MASTER_CTRL_REG_H ; Check Vucky if we're pixel doubling -.396d5b 89 02 bit #$02 BIT #Mstr_Ctrl_Video_Mode1 -.396d5d f0 04 beq $396d63 BEQ adjust_width ; No... just adjust the width of the screen -.396d5f c2 20 rep #$20 REP #$20 ; set A long -.396d61 46 19 lsr $0339 LSR #S_ANSI_VARS.TMPPTR1,D ; Yes... cut the adjustment in half -.396d63 adjust_width -.396d63 c2 20 rep #$20 REP #$20 ; set A long -.396d65 38 sec SEC -.396d66 a5 05 lda $0325 LDA #S_ANSI_VARS.COLS_PER_LINE,D -.396d68 e5 19 sbc $0339 SBC #S_ANSI_VARS.TMPPTR1,D -.396d6a 85 03 sta $0323 STA #S_ANSI_VARS.COLS_VISIBLE,D -.396d6c e2 20 sep #$20 SEP #$20 ; set A short -.396d6e c0 00 cpy #$00 CPY #0 ; Is our target screen 0? -.396d70 f0 06 beq $396d78 BEQ vky_border_y_size ; Yes: get the border Y size from Vicky -.396d72 af 09 1e ae lda $ae1e09 LDA @l EVID_BORDER_Y_SIZE ; No: Get the vertical border width from EVID -.396d76 80 04 bra $396d7c BRA get_border_y_size -.396d78 af 09 00 af lda $af0009 vky_border_y_size LDA @l BORDER_Y_SIZE ; Get the vertical border width from Vicky -.396d7c 29 3f and #$3f get_border_y_size AND #$3F -.396d7e 89 03 bit #$03 BIT #$03 ; Check the lower two bits... indicates a partial column is eaten -.396d80 d0 04 bne $396d86 BNE frac_height -.396d82 4a lsr a LSR A ; COLUMNS_HIDDEN := BORDER_X_SIZE / 4 -.396d83 4a lsr a LSR A -.396d84 80 03 bra $396d89 BRA store_height -.396d86 4a lsr a frac_height LSR A ; COLUMNS_HIDDEN := BORDER_X_SIZE / 4 + 1 -.396d87 4a lsr a LSR A ; because a column is partially hidden -.396d88 1a inc a INC A -.396d89 85 19 sta $0339 store_height STA #S_ANSI_VARS.TMPPTR1,D -.396d8b 64 1a stz $033a STZ #S_ANSI_VARS.TMPPTR1+1,D -.396d8d e2 20 sep #$20 SEP #$20 ; set A short -.396d8f c0 01 cpy #$01 CPY #1 ; Are we setting the EVID? -.396d91 f0 0c beq $396d9f BEQ adjust_height ; Yes: skip the pixel doubling check -.396d93 af 01 00 af lda $af0001 LDA @l MASTER_CTRL_REG_H ; Check if we're pixel doubling -.396d97 89 02 bit #$02 BIT #Mstr_Ctrl_Video_Mode1 -.396d99 f0 04 beq $396d9f BEQ adjust_height ; No... just adjust the height of the screen -.396d9b c2 20 rep #$20 REP #$20 ; set A long -.396d9d 46 19 lsr $0339 LSR #S_ANSI_VARS.TMPPTR1,D ; Yes... cut the adjustment in half -.396d9f adjust_height -.396d9f c2 20 rep #$20 REP #$20 ; set A long -.396da1 38 sec SEC -.396da2 a5 09 lda $0329 LDA #S_ANSI_VARS.LINES_MAX,D -.396da4 e5 19 sbc $0339 SBC #S_ANSI_VARS.TMPPTR1,D -.396da6 85 07 sta $0327 STA #S_ANSI_VARS.LINES_VISIBLE,D -.396da8 28 plp done PLP -.396da9 6b rtl RTL ->396daa 50 00 64 00 28 00 32 00 cols_by_res .word 80,100,40,50 ->396db2 3c 00 4b 00 1e 00 25 00 lines_by_res .word 60,75,30,37 -.396dba ANSI_SETDEVICE -.396dba 48 pha PHA -.396dbb 08 php PHP -.396dbc e2 20 sep #$20 SEP #$20 ; set A short -.396dbe af 03 07 00 lda $000703 LDA @l CHAN_OUT ; Check the current output channel -.396dc2 c9 00 cmp #$00 CMP #CHAN_CONSOLE ; Is it the console? -.396dc4 f0 08 beq $396dce BEQ console ; Yes: point to the console -.396dc6 c9 04 cmp #$04 CMP #CHAN_EVID ; Is it the EVID? -.396dc8 f0 0b beq $396dd5 BEQ evid ; Check to see if the EVID is present -.396dca 28 plp bad_device PLP -.396dcb 68 pla PLA -.396dcc 38 sec SEC -.396dcd 6b rtl RTL -.396dce console -.396dce c2 20 rep #$20 REP #$20 ; set A long -.396dd0 a9 0c 00 lda #$000c LDA #<>SCREENBEGIN ; Point to the the main screen's variables -.396dd3 80 0d bra $396de2 BRA set_dp -.396dd5 evid -.396dd5 e2 20 sep #$20 SEP #$20 ; set A short -.396dd7 af 7d 00 00 lda $00007d LDA @l EVID_PRESENT ; Is the EVID present? -.396ddb f0 ed beq $396dca BEQ bad_device ; No: return that the device is bad -.396ddd c2 20 rep #$20 REP #$20 ; set A long -.396ddf a9 60 00 lda #$0060 LDA #<>EVID_SCREENBEGIN ; Yes: point to the EVID's variables -.396de2 5b tcd set_dp TCD -.396de3 28 plp PLP -.396de4 68 pla PLA -.396de5 18 clc CLC -.396de6 6b rtl RTL -.396de7 ANSI_PUTC -.396de7 da phx PHX -.396de8 5a phy PHY -.396de9 0b phd PHD -.396dea 08 php PHP -.396deb e2 30 sep #$30 SEP #$30 ; set A&X short -.396ded 22 ba 6d 39 jsl $396dba JSL ANSI_SETDEVICE ; Look at the current output channel and point -.396df1 90 03 bcc $396df6 BCC get_state ; If valid, check the current state -.396df3 82 9d 00 brl $396e93 BRL done ; If invalid, just return -.396df6 a6 1e ldx $033e get_state LDX #S_ANSI_VARS.STATE,D ; Get the current state -.396df8 f0 0c beq $396e06 BEQ do_st_init ; Dispatch to the correct code for the state -.396dfa e0 01 cpx #$01 CPX #ST_ESCAPE -.396dfc f0 21 beq $396e1f BEQ do_st_escape -.396dfe e0 02 cpx #$02 CPX #ST_CSI -.396e00 f0 3f beq $396e41 BEQ do_st_csi -.396e02 64 1e stz $033e pr_and_reset STZ #S_ANSI_VARS.STATE,D ; If invalid, reset to 0 and print the character -.396e04 80 06 bra $396e0c BRA print_raw -.396e06 c9 1b cmp #$1b do_st_init CMP #CHAR_ESC ; Is it ESC? -.396e08 f0 09 beq $396e13 BEQ go_escape ; Yes, handle the ESC -.396e0a 90 0d bcc $396e19 BLT do_control ; If less than, handle as a control code -.396e0c 22 74 6f 39 jsl $396f74 print_raw JSL ANSI_PUTRAWC ; Otherwise: Just print the raw character -.396e10 82 80 00 brl $396e93 BRL done -.396e13 a9 01 lda #$01 go_escape LDA #ST_ESCAPE -.396e15 85 1e sta $033e STA #S_ANSI_VARS.STATE,D ; Move to the ESCAPE state -.396e17 80 7a bra $396e93 BRA done -.396e19 22 2b 6f 39 jsl $396f2b do_control JSL ANSI_PR_CONTROL ; Hand a single byte control code -.396e1d 80 74 bra $396e93 BRA done -.396e1f c9 5c cmp #$5c do_st_escape CMP #'\' ; Have we gotten 'ESC\' (String terminator)? -.396e21 f0 08 beq $396e2b BEQ go_init ; Yes: go back to the init state (we do nothing with this) -.396e23 c9 5f cmp #$5f chk_apc CMP #'_' ; Have we gotten 'ESC_' (Application Program Command)? -.396e25 d0 0a bne $396e31 BNE chk_csi ; No: check to see if we have a CSI -.396e27 22 6e 10 39 jsl $39106e JSL SHOW_CREDITS ; Yes: show the credits -.396e2b a9 00 lda #$00 go_init LDA #ST_INIT -.396e2d 85 1e sta $033e STA #S_ANSI_VARS.STATE,D ; Move to the INIT state -.396e2f 80 62 bra $396e93 BRA done -.396e31 c9 5b cmp #$5b chk_csi CMP #'[' ; Have we gotten 'ESC['? -.396e33 d0 cd bne $396e02 BNE pr_and_reset ; No: print this and return to ST_INIT -.396e35 64 21 stz $0341 STZ #S_ANSI_VARS.ARG0,D ; Clear the arguments -.396e37 64 22 stz $0342 STZ #S_ANSI_VARS.ARG1,D -.396e39 64 20 stz $0340 STZ #S_ANSI_VARS.ARGC,D -.396e3b a9 02 lda #$02 LDA #ST_CSI -.396e3d 85 1e sta $033e STA #S_ANSI_VARS.STATE,D ; Move to the CSI state -.396e3f 80 52 bra $396e93 BRA done -.396e41 c9 30 cmp #$30 do_st_csi CMP #'0' ; Do we have a digit? -.396e43 90 1d bcc $396e62 BLT csi_not_digit -.396e45 c9 3a cmp #$3a CMP #'9'+1 -.396e47 b0 19 bcs $396e62 BGE csi_not_digit -.396e49 38 sec SEC ; Have digit... convert to a number -.396e4a e9 30 sbc #$30 SBC #'0' -.396e4c 48 pha PHA ; Save it -.396e4d a6 20 ldx $0340 LDX #S_ANSI_VARS.ARGC,D -.396e4f 16 21 asl $0341,x ASL #S_ANSI_VARS.ARG0,D,X ; arg := arg * 2 -.396e51 b5 21 lda $0341,x LDA #S_ANSI_VARS.ARG0,D,X -.396e53 0a asl a ASL A ; A := arg * 4 -.396e54 0a asl a ASL A ; A := arg * 8 -.396e55 18 clc CLC -.396e56 75 21 adc $0341,x ADC #S_ANSI_VARS.ARG0,D,X ; A := arg * 10 -.396e58 95 21 sta $0341,x STA #S_ANSI_VARS.ARG0,D,X ; arg := A -.396e5a 18 clc CLC -.396e5b 68 pla PLA ; Get the digit back -.396e5c 75 21 adc $0341,x ADC #S_ANSI_VARS.ARG0,D,X ; A := arg * 10 + digit -.396e5e 95 21 sta $0341,x STA #S_ANSI_VARS.ARG0,D,X ; arg := arg * 10 + digit -.396e60 80 31 bra $396e93 BRA done ; And we're done with this particular character -.396e62 c9 3b cmp #$3b csi_not_digit CMP #';' ; Is it an argument separator? -.396e64 d0 0e bne $396e74 BNE csi_not_sep -.396e66 a5 20 lda $0340 LDA #S_ANSI_VARS.ARGC,D ; Get the argument count -.396e68 c9 02 cmp #$02 CMP #ANSI_MAX_ARG ; Are we at the maximum argument count? -.396e6a d0 03 bne $396e6f BNE csi_next_arg ; No: move to the next argument -.396e6c 82 93 ff brl $396e02 BRL pr_and_reset ; Yes: print and reset state -.396e6f 1a inc a csi_next_arg INC A -.396e70 85 20 sta $0340 STA #S_ANSI_VARS.ARGC,D ; Set the new argument count -.396e72 80 1f bra $396e93 BRA done ; And we're done with this character -.396e74 c9 40 cmp #$40 csi_not_sep CMP #'@' -.396e76 90 0a bcc $396e82 BLT csi_not_upper -.396e78 c9 5b cmp #$5b CMP #'Z'+1 -.396e7a b0 06 bcs $396e82 BGE csi_not_upper -.396e7c 22 a3 6e 39 jsl $396ea3 JSL ANSI_ANSI_UPPER ; Process an ANSI upper case code -.396e80 80 11 bra $396e93 BRA done -.396e82 c9 61 cmp #$61 csi_not_upper CMP #'a' -.396e84 90 0a bcc $396e90 BLT csi_not_lower -.396e86 c9 7b cmp #$7b CMP #'z'+1 -.396e88 b0 06 bcs $396e90 BGE csi_not_lower -.396e8a 22 e8 6e 39 jsl $396ee8 JSL ANSI_ANSI_LOWER ; Process an ANSI lower case code -.396e8e 80 03 bra $396e93 BRA done -.396e90 82 6f ff brl $396e02 csi_not_lower BRL pr_and_reset ; Invalid sequence: print it and reset -.396e93 28 plp done PLP -.396e94 2b pld PLD -.396e95 7a ply PLY -.396e96 fa plx PLX -.396e97 6b rtl RTL -.396e98 ANSI_INVALID -.396e98 08 php PHP -.396e99 e2 20 sep #$20 SEP #$20 ; set A short -.396e9b 64 1e stz $033e STZ #S_ANSI_VARS.STATE,D ; If invalid, reset to 0 and print the character -.396e9d 22 74 6f 39 jsl $396f74 JSL ANSI_PUTRAWC ; Print the character -.396ea1 28 plp PLP -.396ea2 6b rtl RTL -.396ea3 ANSI_ANSI_UPPER -.396ea3 08 php PHP -.396ea4 e2 30 sep #$30 SEP #$30 ; set A&X short -.396ea6 64 1e stz $033e STZ #S_ANSI_VARS.STATE,D ; We'll always reset to the initial state -.396ea8 38 sec SEC -.396ea9 e9 40 sbc #$40 SBC #'@' -.396eab 0a asl a ASL A -.396eac aa tax TAX -.396ead fc b2 6e jsr ($396eb2,x) JSR (ansi_table,X) -.396eb0 28 plp PLP -.396eb1 6b rtl RTL ->396eb2 0c 72 ansi_table .word <>ANSI_ICH ; '@' -- ICH -- Insert Character ->396eb4 8f 6f .word <>ANSI_CUU ; 'A' -- CUU -- Cursor Up ->396eb6 a3 6f .word <>ANSI_CUD ; 'B' -- CUD -- Cursor Down ->396eb8 b7 6f .word <>ANSI_CUF ; 'C' -- CUF -- Cursor Forward ->396eba cb 6f .word <>ANSI_CUB ; 'D' -- CUB -- Cursor Back ->396ebc 98 6e .word <>ANSI_INVALID ; 'E' -- CNL -- Cursor Next Line ->396ebe 98 6e .word <>ANSI_INVALID ; 'F' -- CPL -- Cursor Previous Line ->396ec0 98 6e .word <>ANSI_INVALID ; 'G' -- CHA -- Cursor Horizontal Absolute ->396ec2 df 6f .word <>ANSI_CUP ; 'H' -- CUP -- Cursor Position ->396ec4 98 6e .word <>ANSI_INVALID ; 'I' ->396ec6 5e 71 .word <>ANSI_ED ; 'J' -- ED -- Erase In Display ->396ec8 bb 71 .word <>ANSI_EL ; 'K' -- EL -- Erase In Line ->396eca 98 6e .word <>ANSI_INVALID ; 'L' ->396ecc 98 6e .word <>ANSI_INVALID ; 'M' ->396ece 98 6e .word <>ANSI_INVALID ; 'N' ->396ed0 98 6e .word <>ANSI_INVALID ; 'O' ->396ed2 50 72 .word <>ANSI_DCH ; 'P' -- DCH -- Delete Character ->396ed4 98 6e .word <>ANSI_INVALID ; 'Q' ->396ed6 98 6e .word <>ANSI_INVALID ; 'R' ->396ed8 98 6e .word <>ANSI_INVALID ; 'S' -- SU -- Scroll Up ->396eda 98 6e .word <>ANSI_INVALID ; 'T' -- SD -- Scroll Down ->396edc 98 6e .word <>ANSI_INVALID ; 'U' ->396ede 98 6e .word <>ANSI_INVALID ; 'V' ->396ee0 98 6e .word <>ANSI_INVALID ; 'W' ->396ee2 98 6e .word <>ANSI_INVALID ; 'X' ->396ee4 98 6e .word <>ANSI_INVALID ; 'Y' ->396ee6 98 6e .word <>ANSI_INVALID ; 'Z' -.396ee8 ANSI_ANSI_LOWER -.396ee8 08 php PHP -.396ee9 e2 30 sep #$30 SEP #$30 ; set A&X short -.396eeb 64 1e stz $033e STZ #S_ANSI_VARS.STATE,D ; We'll always reset to the initial state -.396eed 38 sec SEC -.396eee e9 61 sbc #$61 SBC #'a' -.396ef0 0a asl a ASL A -.396ef1 aa tax TAX -.396ef2 fc f7 6e jsr ($396ef7,x) JSR (ansi_table,X) -.396ef5 28 plp PLP -.396ef6 6b rtl RTL ->396ef7 98 6e ansi_table .word <>ANSI_INVALID ; 'a' ->396ef9 98 6e .word <>ANSI_INVALID ; 'b' ->396efb 98 6e .word <>ANSI_INVALID ; 'c' ->396efd 98 6e .word <>ANSI_INVALID ; 'd' ->396eff 98 6e .word <>ANSI_INVALID ; 'e' ->396f01 98 6e .word <>ANSI_INVALID ; 'f' -- HVP -- Horizontal Vertical Position ->396f03 98 6e .word <>ANSI_INVALID ; 'g' ->396f05 f8 6f .word <>ANSI_SET_MODE ; 'h' ->396f07 98 6e .word <>ANSI_INVALID ; 'i' ->396f09 98 6e .word <>ANSI_INVALID ; 'j' ->396f0b 98 6e .word <>ANSI_INVALID ; 'k' ->396f0d 35 70 .word <>ANSI_RESET_MODE ; 'l' ->396f0f 72 70 .word <>ANSI_SGR ; 'm' -- SGR -- Select Graphics Rendition ->396f11 98 6e .word <>ANSI_INVALID ; 'n' ->396f13 98 6e .word <>ANSI_INVALID ; 'o' ->396f15 98 6e .word <>ANSI_INVALID ; 'p' ->396f17 98 6e .word <>ANSI_INVALID ; 'q' ->396f19 98 6e .word <>ANSI_INVALID ; 'r' ->396f1b 98 6e .word <>ANSI_INVALID ; 's' ->396f1d 98 6e .word <>ANSI_INVALID ; 't' ->396f1f 98 6e .word <>ANSI_INVALID ; 'u' ->396f21 98 6e .word <>ANSI_INVALID ; 'v' ->396f23 98 6e .word <>ANSI_INVALID ; 'w' ->396f25 98 6e .word <>ANSI_INVALID ; 'x' ->396f27 98 6e .word <>ANSI_INVALID ; 'y' ->396f29 98 6e .word <>ANSI_INVALID ; 'z' -.396f2b ANSI_PR_CONTROL -.396f2b 08 php PHP -.396f2c e2 20 sep #$20 SEP #$20 ; set A short -.396f2e c2 10 rep #$10 REP #$10 ; set X long -.396f30 c9 0d cmp #$0d CMP #CHAR_CR ; Handle carriage return -.396f32 f0 12 beq $396f46 BEQ do_cr -.396f34 c9 0a cmp #$0a CMP #CHAR_LF ; Handle line feed -.396f36 f0 1a beq $396f52 BEQ do_lf -.396f38 c9 08 cmp #$08 CMP #CHAR_BS ; Handle back space -.396f3a f0 1c beq $396f58 BEQ do_bs -.396f3c c9 09 cmp #$09 CMP #CHAR_TAB ; Handle TAB -.396f3e f0 1e beq $396f5e BEQ do_tab -.396f40 22 74 6f 39 jsl $396f74 JSL ANSI_PUTRAWC ; Otherwise, just print it raw and wriggling! -.396f44 80 2c bra $396f72 BRA done -.396f46 a2 00 00 ldx #$0000 do_cr LDX #0 ; Move to the beginning of the next line -.396f49 a4 10 ldy $0330 LDY #S_ANSI_VARS.CURSORY,D -.396f4b c8 iny INY -.396f4c 22 29 73 39 jsl $397329 JSL ANSI_LOCATE -.396f50 80 20 bra $396f72 BRA done -.396f52 22 06 73 39 jsl $397306 do_lf JSL ANSI_CSRDOWN ; Move the cursor down a line -.396f56 80 1a bra $396f72 BRA done -.396f58 22 ca 72 39 jsl $3972ca do_bs JSL ANSI_CSRLEFT ; Move the cursor to the left (TODO: delete to the left?) -.396f5c 80 14 bra $396f72 BRA done -.396f5e do_tab -.396f5e c2 30 rep #$30 REP #$30 ; set A&X long -.396f60 a5 0e lda $032e LDA #S_ANSI_VARS.CURSORX,D ; Move to the next power 8th column -.396f62 29 f8 ff and #$fff8 AND #$FFF8 -.396f65 18 clc CLC -.396f66 69 08 00 adc #$0008 ADC #$0008 -.396f69 aa tax TAX -.396f6a e2 20 sep #$20 SEP #$20 ; set A short -.396f6c a4 10 ldy $0330 LDY #S_ANSI_VARS.CURSORY,D -.396f6e 22 29 73 39 jsl $397329 JSL ANSI_LOCATE -.396f72 28 plp done PLP -.396f73 6b rtl RTL -.396f74 ANSI_PUTRAWC -.396f74 da phx PHX -.396f75 5a phy PHY -.396f76 0b phd PHD -.396f77 08 php PHP -.396f78 e2 20 sep #$20 SEP #$20 ; set A short -.396f7a 22 ba 6d 39 jsl $396dba JSL ANSI_SETDEVICE ; Look at the current output channel and point -.396f7e b0 0a bcs $396f8a BCS done ; If invalid, just return -.396f80 87 0b sta [$032b] STA [#S_ANSI_VARS.CURSORPOS,D] ; Save the character on the screen -.396f82 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D ; Set the color based on CURCOLOR -.396f84 87 13 sta [$0333] STA [#S_ANSI_VARS.COLORPOS,D] -.396f86 22 9f 72 39 jsl $39729f JSL ANSI_CSRRIGHT ; And advance the cursor -.396f8a 28 plp done PLP -.396f8b 2b pld PLD -.396f8c 7a ply PLY -.396f8d fa plx PLX -.396f8e 6b rtl RTL -.396f8f ANSI_CUU -.396f8f 08 php PHP -.396f90 e2 20 sep #$20 SEP #$20 ; set A short -.396f92 a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Get the first argument -.396f94 d0 02 bne $396f98 BNE loop ; Move so long as not 0 -.396f96 a9 01 lda #$01 LDA #1 ; If 0, default to 1 -.396f98 48 pha loop PHA ; Save the count -.396f99 22 e8 72 39 jsl $3972e8 JSL ANSI_CSRUP ; Cursor Up -.396f9d 68 pla PLA ; Restore the count -.396f9e 3a dec a DEC A ; Count down and repeat if not done -.396f9f d0 f7 bne $396f98 BNE loop -.396fa1 28 plp PLP -.396fa2 60 rts RTS -.396fa3 ANSI_CUD -.396fa3 08 php PHP -.396fa4 e2 20 sep #$20 SEP #$20 ; set A short -.396fa6 a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Get the first argument -.396fa8 d0 02 bne $396fac BNE loop ; Move so long as not 0 -.396faa a9 01 lda #$01 LDA #1 ; If 0, default to 1 -.396fac 48 pha loop PHA ; Save the count -.396fad 22 06 73 39 jsl $397306 JSL ANSI_CSRDOWN ; Cursor Down -.396fb1 68 pla PLA ; Restore the count -.396fb2 3a dec a DEC A ; Count down and repeat if not done -.396fb3 d0 f7 bne $396fac BNE loop -.396fb5 28 plp PLP -.396fb6 60 rts RTS -.396fb7 ANSI_CUF -.396fb7 08 php PHP -.396fb8 e2 20 sep #$20 SEP #$20 ; set A short -.396fba a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Get the first argument -.396fbc d0 02 bne $396fc0 BNE loop ; Move so long as not 0 -.396fbe a9 01 lda #$01 LDA #1 ; If 0, default to 1 -.396fc0 48 pha loop PHA ; Save the count -.396fc1 22 9f 72 39 jsl $39729f JSL ANSI_CSRRIGHT ; Cursor right -.396fc5 68 pla PLA ; Restore the count -.396fc6 3a dec a DEC A ; Count down and repeat if not done -.396fc7 d0 f7 bne $396fc0 BNE loop -.396fc9 28 plp PLP +.396b3e ANSI_INIT +.396b3e da phx PHX +.396b3f 5a phy PHY +.396b40 8b phb PHB +.396b41 0b phd PHD +.396b42 08 php PHP +.396b43 c2 30 rep #$30 REP #$30 ; set A&X long +.396b45 a0 00 00 ldy #$0000 LDY #0 +.396b48 22 f4 6b 39 jsl $396bf4 JSL INIT_SCREEN_Y ; Set up the main screen +.396b4c e2 20 sep #$20 SEP #$20 ; set A short +.396b4e af 87 e8 af lda $afe887 LDA @l GABE_SYS_STAT ; Let's check the Presence of an Expansion Card here +.396b52 29 10 and #$10 AND #GABE_SYS_STAT_EXP ; When there is a Card the Value is 1 +.396b54 c9 10 cmp #$10 CMP #GABE_SYS_STAT_EXP +.396b56 d0 1d bne $396b75 BNE no_evid +.396b58 c2 20 rep #$20 REP #$20 ; set A long +.396b5a af 12 00 ae lda $ae0012 LDA @l ESID_ID_CARD_ID_Lo ; Load the Card ID and check for C100 or C200 +.396b5e c9 c8 00 cmp #$00c8 CMP #$00C8 ; Is it the EVID card? +.396b61 d0 12 bne $396b75 BNE no_evid ; No: mark the EVID screen as not present +.396b63 e2 20 sep #$20 SEP #$20 ; set A short +.396b65 a9 01 lda #$01 LDA #1 ; Otherwise: Mark that there is an EVID present +.396b67 8f 7d 00 00 sta $00007d STA @l EVID_PRESENT +.396b6b a0 01 00 ldy #$0001 LDY #1 +.396b6e 22 f4 6b 39 jsl $396bf4 JSL INIT_SCREEN_Y ; Initialize the EVID screen variables +.396b72 80 09 bra $396b7d BRA done +.396b74 00 brk # BRK +.396b75 no_evid +.396b75 e2 20 sep #$20 SEP #$20 ; set A short +.396b77 a9 00 lda #$00 LDA #0 ; Mark that there is no EVID present +.396b79 8f 7d 00 00 sta $00007d STA @l EVID_PRESENT +.396b7d 28 plp done PLP +.396b7e 2b pld PLD +.396b7f ab plb PLB +.396b80 7a ply PLY +.396b81 fa plx PLX +.396b82 6b rtl RTL +.396b83 ANSI_INIT_LUTS +.396b83 08 php PHP +.396b84 e2 30 sep #$30 SEP #$30 ; set A&X short +.396b86 a2 00 ldx #$00 LDX #0 +.396b88 bf b4 6b 39 lda $396bb4,x vicky_loop LDA ANSI_TEXT_LUT,X ; Get the Xth LUT byte +.396b8c 9f 40 1f af sta $af1f40,x STA @l FG_CHAR_LUT_PTR,X ; Set the corresponding foreground color component on Vicky +.396b90 9f 80 1f af sta $af1f80,x STA @l BG_CHAR_LUT_PTR,X ; Set the corresponding background color component on Vicky +.396b94 e8 inx INX +.396b95 e0 40 cpx #$40 CPX #4*16 +.396b97 d0 ef bne $396b88 BNE vicky_loop +.396b99 af 7d 00 00 lda $00007d LDA @l EVID_PRESENT ; Check to see if EVID is present +.396b9d f0 13 beq $396bb2 BEQ done ; If not, we're done +.396b9f a2 00 ldx #$00 LDX #0 +.396ba1 bf b4 6b 39 lda $396bb4,x evid_loop LDA ANSI_TEXT_LUT,X ; Get the Xth LUT byte +.396ba5 9f 00 1b ae sta $ae1b00,x STA @l EVID_FG_LUT,X ; Set the corresponding foreground color component on the EVID card +.396ba9 9f 40 1b ae sta $ae1b40,x STA @l EVID_BG_LUT,X ; Set the corresponding background color component on the EVID card +.396bad e8 inx INX +.396bae e0 40 cpx #$40 CPX #4*16 +.396bb0 d0 ef bne $396ba1 BNE evid_loop +.396bb2 28 plp done PLP +.396bb3 6b rtl RTL +.396bb4 ANSI_TEXT_LUT +>396bb4 00 00 00 00 .byte 0, 0, 0, 0 +>396bb8 00 00 80 00 .byte 0, 0, 128, 0 +>396bbc 00 80 00 00 .byte 0, 128, 0, 0 +>396bc0 00 80 80 00 .byte 0, 128, 128, 0 +>396bc4 80 00 00 00 .byte 128, 0, 0, 0 +>396bc8 80 00 80 00 .byte 128, 0, 128, 0 +>396bcc 80 80 00 00 .byte 128, 128, 0, 0 +>396bd0 c0 c0 c0 00 .byte 192, 192, 192, 0 +>396bd4 80 80 80 00 .byte 128, 128, 128, 0 +>396bd8 00 00 ff 00 .byte 0, 0, 255, 0 +>396bdc 00 ff 00 00 .byte 0, 255, 0, 0 +>396be0 00 ff ff 00 .byte 0, 255, 255, 0 +>396be4 ff 00 00 00 .byte 255, 0, 0, 0 +>396be8 00 7f fc 00 .byte 0, 127, 252, 0 +>396bec ff ff 00 00 .byte 255, 255, 0, 0 +>396bf0 ff ff ff 00 .byte 255, 255, 255, 0 +.396bf4 INIT_SCREEN_Y +.396bf4 c2 30 rep #$30 REP #$30 ; set A&X long +.396bf6 c0 00 00 cpy #$0000 CPY #0 +.396bf9 f0 06 beq $396c01 BEQ setdp_0 +.396bfb a9 60 00 lda #$0060 setdp_1 LDA #<>EVID_SCREENBEGIN ; Set DP to the EVID variable block +.396bfe 5b tcd TCD +.396bff 80 04 bra $396c05 BRA set_addresses +.396c01 a9 0c 00 lda #$000c setdp_0 LDA #<>SCREENBEGIN ; Set DP to the main screen variable block +.396c04 5b tcd TCD +.396c05 98 tya set_addresses TYA ; Compute offset to screen Y's addresses +.396c06 0a asl a ASL A +.396c07 0a asl a ASL A +.396c08 aa tax TAX +.396c09 bf 44 6c 39 lda $396c44,x LDA @l text_address,X +.396c0d 85 00 sta $0320 STA #S_ANSI_VARS.SCREENBEGIN,D ; Set the address of the text matrix +.396c0f 85 0b sta $032b STA #S_ANSI_VARS.CURSORPOS,D ; And the cursor pointer +.396c11 e2 20 sep #$20 SEP #$20 ; set A short +.396c13 bf 46 6c 39 lda $396c46,x LDA @l text_address+2,X +.396c17 85 02 sta $0322 STA #S_ANSI_VARS.SCREENBEGIN+2,D +.396c19 85 0d sta $032d STA #S_ANSI_VARS.CURSORPOS+2,D +.396c1b c2 20 rep #$20 REP #$20 ; set A long +.396c1d bf 4c 6c 39 lda $396c4c,x LDA @l color_address,X +.396c21 85 16 sta $0336 STA #S_ANSI_VARS.COLORBEGIN,D ; Set the address of the color matrix +.396c23 85 13 sta $0333 STA #S_ANSI_VARS.COLORPOS,D ; And the color cursor pointer +.396c25 e2 20 sep #$20 SEP #$20 ; set A short +.396c27 bf 4e 6c 39 lda $396c4e,x LDA @l color_address+2,X +.396c2b 85 18 sta $0338 STA #S_ANSI_VARS.COLORBEGIN+2,D +.396c2d 85 15 sta $0335 STA #S_ANSI_VARS.COLORPOS+2,D +.396c2f c2 20 rep #$20 REP #$20 ; set A long +.396c31 64 0e stz $032e STZ #S_ANSI_VARS.CURSORX,D ; Set the cursor position to 0, 0 +.396c33 64 10 stz $0330 STZ #S_ANSI_VARS.CURSORY,D +.396c35 e2 20 sep #$20 SEP #$20 ; set A short +.396c37 64 1e stz $033e STZ #S_ANSI_VARS.STATE,D ; Set the state of the ANSI parser to S0 +.396c39 64 1f stz $033f STZ #S_ANSI_VARS.CONTROL,D ; Set the control bits to 0 (default) +.396c3b a9 70 lda #$70 LDA #ANSI_DEF_COLOR +.396c3d 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D ; Set the current color to the default +.396c3f 22 8d 6c 39 jsl $396c8d JSL ANSI_SETSIZE_Y ; Set the size variables for the main screen +.396c43 6b rtl RTL +>396c44 00 a0 af 00 00 20 ae 00 text_address .dword CS_TEXT_MEM_PTR, EVID_TEXT_MEM +>396c4c 00 c0 af 00 00 40 ae 00 color_address .dword CS_COLOR_MEM_PTR, EVID_COLOR_MEM +.396c54 ANSI_SETSIZES +.396c54 48 pha PHA +.396c55 da phx PHX +.396c56 5a phy PHY +.396c57 0b phd PHD +.396c58 08 php PHP +.396c59 e2 30 sep #$30 SEP #$30 ; set A&X short +.396c5b af 03 07 00 lda $000703 LDA @l CHAN_OUT ; Save the current output channel +.396c5f 48 pha PHA +.396c60 a9 00 lda #$00 LDA #CHAN_CONSOLE ; Set the sizes for the main screen +.396c62 8f 03 07 00 sta $000703 STA @l CHAN_OUT +.396c66 22 50 6d 39 jsl $396d50 JSL ANSI_SETDEVICE ; Set the DP to the device's record +.396c6a a0 00 ldy #$00 LDY #0 +.396c6c 22 8d 6c 39 jsl $396c8d JSL ANSI_SETSIZE_Y ; Set the sizes for that device +.396c70 a9 04 lda #$04 LDA #CHAN_EVID ; Set the sizes for the EVID screen +.396c72 8f 03 07 00 sta $000703 STA @l CHAN_OUT +.396c76 22 50 6d 39 jsl $396d50 JSL ANSI_SETDEVICE ; Set the DP to the device's record +.396c7a b0 06 bcs $396c82 BCS done ; Not present, just return +.396c7c a0 01 ldy #$01 LDY #1 +.396c7e 22 8d 6c 39 jsl $396c8d JSL ANSI_SETSIZE_Y ; Set the sizes for that device +.396c82 68 pla done PLA +.396c83 8f 03 07 00 sta $000703 STA @l CHAN_OUT ; Restore the output channel +.396c87 28 plp PLP +.396c88 2b pld PLD +.396c89 7a ply PLY +.396c8a fa plx PLX +.396c8b 68 pla PLA +.396c8c 6b rtl RTL +.396c8d ANSI_SETSIZE_Y +.396c8d 08 php PHP +.396c8e e2 30 sep #$30 SEP #$30 ; set A&X short +.396c90 c0 00 cpy #$00 CPY #0 ; Is our target screen 0? +.396c92 f0 06 beq $396c9a BEQ vky_master ; Yes: get the resolution from Vicky +.396c94 af 01 1e ae lda $ae1e01 LDA @l EVID_MSTR_CTRL_REG_H ; No: get the resolution from EVID +.396c98 80 04 bra $396c9e BRA resolution +.396c9a af 01 00 af lda $af0001 vky_master LDA @l MASTER_CTRL_REG_H +.396c9e 29 03 and #$03 resolution AND #$03 ; Mask off the resolution bits +.396ca0 0a asl a ASL A +.396ca1 aa tax TAX ; Index to the col/line count in X +.396ca2 c2 20 rep #$20 REP #$20 ; set A long +.396ca4 bf 40 6d 39 lda $396d40,x LDA @l cols_by_res,X ; Get the number of columns +.396ca8 85 05 sta $0325 STA #S_ANSI_VARS.COLS_PER_LINE,D ; This is how many columns there are per line in the memory +.396caa 85 03 sta $0323 STA #S_ANSI_VARS.COLS_VISIBLE,D ; This is how many would be visible with no border +.396cac bf 48 6d 39 lda $396d48,x LDA @l lines_by_res,X ; Get the number of lines +.396cb0 85 09 sta $0329 STA #S_ANSI_VARS.LINES_MAX,D ; This is the total number of lines in memory +.396cb2 85 07 sta $0327 STA #S_ANSI_VARS.LINES_VISIBLE,D ; This is how many lines would be visible with no border +.396cb4 e2 20 sep #$20 SEP #$20 ; set A short +.396cb6 c0 00 cpy #$00 CPY #0 ; Is our target screen 0? +.396cb8 f0 06 beq $396cc0 BEQ vky_border ; Yes: get the border from Vicky +.396cba af 04 1e ae lda $ae1e04 LDA @l EVID_BORDER_CTRL_REG ; No: Check EVID to see if we have a border +.396cbe 80 04 bra $396cc4 BRA border +.396cc0 af 04 00 af lda $af0004 vky_border LDA @l BORDER_CTRL_REG ; Check Vicky to see if we have a border +.396cc4 89 01 bit #$01 border BIT #Border_Ctrl_Enable +.396cc6 f0 76 beq $396d3e BEQ done ; No border... the sizes are correct now +.396cc8 c0 00 cpy #$00 CPY #0 ; Is our target screen 0? +.396cca f0 06 beq $396cd2 BEQ vky_border_size ; Yes: get the border size from Vicky +.396ccc af 08 1e ae lda $ae1e08 LDA @l EVID_BORDER_X_SIZE ; No: Get the horizontal border width from EVID +.396cd0 80 04 bra $396cd6 BRA get_border_x_size +.396cd2 af 08 00 af lda $af0008 vky_border_size LDA @l BORDER_X_SIZE ; Get the horizontal border width from Vicky +.396cd6 29 3f and #$3f get_border_x_size AND #$3F +.396cd8 89 03 bit #$03 BIT #$03 ; Check the lower two bits... indicates a partial column is eaten +.396cda d0 04 bne $396ce0 BNE frac_width +.396cdc 4a lsr a LSR A ; COLUMNS_HIDDEN := BORDER_X_SIZE / 4 +.396cdd 4a lsr a LSR A +.396cde 80 03 bra $396ce3 BRA store_width +.396ce0 4a lsr a frac_width LSR A ; COLUMNS_HIDDEN := BORDER_X_SIZE / 4 + 1 +.396ce1 4a lsr a LSR A ; because a column is partially hidden +.396ce2 1a inc a INC A +.396ce3 85 19 sta $0339 store_width STA #S_ANSI_VARS.TMPPTR1,D +.396ce5 64 1a stz $033a STZ #S_ANSI_VARS.TMPPTR1+1,D +.396ce7 e2 20 sep #$20 SEP #$20 ; set A short +.396ce9 c0 01 cpy #$01 CPY #1 ; Are we setting the EVID? +.396ceb f0 0c beq $396cf9 BEQ adjust_width ; Yes: skip the pixel doubling check +.396ced af 01 00 af lda $af0001 LDA @l MASTER_CTRL_REG_H ; Check Vucky if we're pixel doubling +.396cf1 89 02 bit #$02 BIT #Mstr_Ctrl_Video_Mode1 +.396cf3 f0 04 beq $396cf9 BEQ adjust_width ; No... just adjust the width of the screen +.396cf5 c2 20 rep #$20 REP #$20 ; set A long +.396cf7 46 19 lsr $0339 LSR #S_ANSI_VARS.TMPPTR1,D ; Yes... cut the adjustment in half +.396cf9 adjust_width +.396cf9 c2 20 rep #$20 REP #$20 ; set A long +.396cfb 38 sec SEC +.396cfc a5 05 lda $0325 LDA #S_ANSI_VARS.COLS_PER_LINE,D +.396cfe e5 19 sbc $0339 SBC #S_ANSI_VARS.TMPPTR1,D +.396d00 85 03 sta $0323 STA #S_ANSI_VARS.COLS_VISIBLE,D +.396d02 e2 20 sep #$20 SEP #$20 ; set A short +.396d04 c0 00 cpy #$00 CPY #0 ; Is our target screen 0? +.396d06 f0 06 beq $396d0e BEQ vky_border_y_size ; Yes: get the border Y size from Vicky +.396d08 af 09 1e ae lda $ae1e09 LDA @l EVID_BORDER_Y_SIZE ; No: Get the vertical border width from EVID +.396d0c 80 04 bra $396d12 BRA get_border_y_size +.396d0e af 09 00 af lda $af0009 vky_border_y_size LDA @l BORDER_Y_SIZE ; Get the vertical border width from Vicky +.396d12 29 3f and #$3f get_border_y_size AND #$3F +.396d14 89 03 bit #$03 BIT #$03 ; Check the lower two bits... indicates a partial column is eaten +.396d16 d0 04 bne $396d1c BNE frac_height +.396d18 4a lsr a LSR A ; COLUMNS_HIDDEN := BORDER_X_SIZE / 4 +.396d19 4a lsr a LSR A +.396d1a 80 03 bra $396d1f BRA store_height +.396d1c 4a lsr a frac_height LSR A ; COLUMNS_HIDDEN := BORDER_X_SIZE / 4 + 1 +.396d1d 4a lsr a LSR A ; because a column is partially hidden +.396d1e 1a inc a INC A +.396d1f 85 19 sta $0339 store_height STA #S_ANSI_VARS.TMPPTR1,D +.396d21 64 1a stz $033a STZ #S_ANSI_VARS.TMPPTR1+1,D +.396d23 e2 20 sep #$20 SEP #$20 ; set A short +.396d25 c0 01 cpy #$01 CPY #1 ; Are we setting the EVID? +.396d27 f0 0c beq $396d35 BEQ adjust_height ; Yes: skip the pixel doubling check +.396d29 af 01 00 af lda $af0001 LDA @l MASTER_CTRL_REG_H ; Check if we're pixel doubling +.396d2d 89 02 bit #$02 BIT #Mstr_Ctrl_Video_Mode1 +.396d2f f0 04 beq $396d35 BEQ adjust_height ; No... just adjust the height of the screen +.396d31 c2 20 rep #$20 REP #$20 ; set A long +.396d33 46 19 lsr $0339 LSR #S_ANSI_VARS.TMPPTR1,D ; Yes... cut the adjustment in half +.396d35 adjust_height +.396d35 c2 20 rep #$20 REP #$20 ; set A long +.396d37 38 sec SEC +.396d38 a5 09 lda $0329 LDA #S_ANSI_VARS.LINES_MAX,D +.396d3a e5 19 sbc $0339 SBC #S_ANSI_VARS.TMPPTR1,D +.396d3c 85 07 sta $0327 STA #S_ANSI_VARS.LINES_VISIBLE,D +.396d3e 28 plp done PLP +.396d3f 6b rtl RTL +>396d40 50 00 64 00 28 00 32 00 cols_by_res .word 80,100,40,50 +>396d48 3c 00 4b 00 1e 00 25 00 lines_by_res .word 60,75,30,37 +.396d50 ANSI_SETDEVICE +.396d50 48 pha PHA +.396d51 08 php PHP +.396d52 e2 20 sep #$20 SEP #$20 ; set A short +.396d54 af 03 07 00 lda $000703 LDA @l CHAN_OUT ; Check the current output channel +.396d58 c9 00 cmp #$00 CMP #CHAN_CONSOLE ; Is it the console? +.396d5a f0 08 beq $396d64 BEQ console ; Yes: point to the console +.396d5c c9 04 cmp #$04 CMP #CHAN_EVID ; Is it the EVID? +.396d5e f0 0b beq $396d6b BEQ evid ; Check to see if the EVID is present +.396d60 28 plp bad_device PLP +.396d61 68 pla PLA +.396d62 38 sec SEC +.396d63 6b rtl RTL +.396d64 console +.396d64 c2 20 rep #$20 REP #$20 ; set A long +.396d66 a9 0c 00 lda #$000c LDA #<>SCREENBEGIN ; Point to the the main screen's variables +.396d69 80 0d bra $396d78 BRA set_dp +.396d6b evid +.396d6b e2 20 sep #$20 SEP #$20 ; set A short +.396d6d af 7d 00 00 lda $00007d LDA @l EVID_PRESENT ; Is the EVID present? +.396d71 f0 ed beq $396d60 BEQ bad_device ; No: return that the device is bad +.396d73 c2 20 rep #$20 REP #$20 ; set A long +.396d75 a9 60 00 lda #$0060 LDA #<>EVID_SCREENBEGIN ; Yes: point to the EVID's variables +.396d78 5b tcd set_dp TCD +.396d79 28 plp PLP +.396d7a 68 pla PLA +.396d7b 18 clc CLC +.396d7c 6b rtl RTL +.396d7d ANSI_PUTC +.396d7d da phx PHX +.396d7e 5a phy PHY +.396d7f 0b phd PHD +.396d80 08 php PHP +.396d81 e2 30 sep #$30 SEP #$30 ; set A&X short +.396d83 22 50 6d 39 jsl $396d50 JSL ANSI_SETDEVICE ; Look at the current output channel and point +.396d87 90 03 bcc $396d8c BCC get_state ; If valid, check the current state +.396d89 82 9d 00 brl $396e29 BRL done ; If invalid, just return +.396d8c a6 1e ldx $033e get_state LDX #S_ANSI_VARS.STATE,D ; Get the current state +.396d8e f0 0c beq $396d9c BEQ do_st_init ; Dispatch to the correct code for the state +.396d90 e0 01 cpx #$01 CPX #ST_ESCAPE +.396d92 f0 21 beq $396db5 BEQ do_st_escape +.396d94 e0 02 cpx #$02 CPX #ST_CSI +.396d96 f0 3f beq $396dd7 BEQ do_st_csi +.396d98 64 1e stz $033e pr_and_reset STZ #S_ANSI_VARS.STATE,D ; If invalid, reset to 0 and print the character +.396d9a 80 06 bra $396da2 BRA print_raw +.396d9c c9 1b cmp #$1b do_st_init CMP #CHAR_ESC ; Is it ESC? +.396d9e f0 09 beq $396da9 BEQ go_escape ; Yes, handle the ESC +.396da0 90 0d bcc $396daf BLT do_control ; If less than, handle as a control code +.396da2 22 0a 6f 39 jsl $396f0a print_raw JSL ANSI_PUTRAWC ; Otherwise: Just print the raw character +.396da6 82 80 00 brl $396e29 BRL done +.396da9 a9 01 lda #$01 go_escape LDA #ST_ESCAPE +.396dab 85 1e sta $033e STA #S_ANSI_VARS.STATE,D ; Move to the ESCAPE state +.396dad 80 7a bra $396e29 BRA done +.396daf 22 c1 6e 39 jsl $396ec1 do_control JSL ANSI_PR_CONTROL ; Hand a single byte control code +.396db3 80 74 bra $396e29 BRA done +.396db5 c9 5c cmp #$5c do_st_escape CMP #'\' ; Have we gotten 'ESC\' (String terminator)? +.396db7 f0 08 beq $396dc1 BEQ go_init ; Yes: go back to the init state (we do nothing with this) +.396db9 c9 5f cmp #$5f chk_apc CMP #'_' ; Have we gotten 'ESC_' (Application Program Command)? +.396dbb d0 0a bne $396dc7 BNE chk_csi ; No: check to see if we have a CSI +.396dbd 22 6e 10 39 jsl $39106e JSL SHOW_CREDITS ; Yes: show the credits +.396dc1 a9 00 lda #$00 go_init LDA #ST_INIT +.396dc3 85 1e sta $033e STA #S_ANSI_VARS.STATE,D ; Move to the INIT state +.396dc5 80 62 bra $396e29 BRA done +.396dc7 c9 5b cmp #$5b chk_csi CMP #'[' ; Have we gotten 'ESC['? +.396dc9 d0 cd bne $396d98 BNE pr_and_reset ; No: print this and return to ST_INIT +.396dcb 64 21 stz $0341 STZ #S_ANSI_VARS.ARG0,D ; Clear the arguments +.396dcd 64 22 stz $0342 STZ #S_ANSI_VARS.ARG1,D +.396dcf 64 20 stz $0340 STZ #S_ANSI_VARS.ARGC,D +.396dd1 a9 02 lda #$02 LDA #ST_CSI +.396dd3 85 1e sta $033e STA #S_ANSI_VARS.STATE,D ; Move to the CSI state +.396dd5 80 52 bra $396e29 BRA done +.396dd7 c9 30 cmp #$30 do_st_csi CMP #'0' ; Do we have a digit? +.396dd9 90 1d bcc $396df8 BLT csi_not_digit +.396ddb c9 3a cmp #$3a CMP #'9'+1 +.396ddd b0 19 bcs $396df8 BGE csi_not_digit +.396ddf 38 sec SEC ; Have digit... convert to a number +.396de0 e9 30 sbc #$30 SBC #'0' +.396de2 48 pha PHA ; Save it +.396de3 a6 20 ldx $0340 LDX #S_ANSI_VARS.ARGC,D +.396de5 16 21 asl $0341,x ASL #S_ANSI_VARS.ARG0,D,X ; arg := arg * 2 +.396de7 b5 21 lda $0341,x LDA #S_ANSI_VARS.ARG0,D,X +.396de9 0a asl a ASL A ; A := arg * 4 +.396dea 0a asl a ASL A ; A := arg * 8 +.396deb 18 clc CLC +.396dec 75 21 adc $0341,x ADC #S_ANSI_VARS.ARG0,D,X ; A := arg * 10 +.396dee 95 21 sta $0341,x STA #S_ANSI_VARS.ARG0,D,X ; arg := A +.396df0 18 clc CLC +.396df1 68 pla PLA ; Get the digit back +.396df2 75 21 adc $0341,x ADC #S_ANSI_VARS.ARG0,D,X ; A := arg * 10 + digit +.396df4 95 21 sta $0341,x STA #S_ANSI_VARS.ARG0,D,X ; arg := arg * 10 + digit +.396df6 80 31 bra $396e29 BRA done ; And we're done with this particular character +.396df8 c9 3b cmp #$3b csi_not_digit CMP #';' ; Is it an argument separator? +.396dfa d0 0e bne $396e0a BNE csi_not_sep +.396dfc a5 20 lda $0340 LDA #S_ANSI_VARS.ARGC,D ; Get the argument count +.396dfe c9 02 cmp #$02 CMP #ANSI_MAX_ARG ; Are we at the maximum argument count? +.396e00 d0 03 bne $396e05 BNE csi_next_arg ; No: move to the next argument +.396e02 82 93 ff brl $396d98 BRL pr_and_reset ; Yes: print and reset state +.396e05 1a inc a csi_next_arg INC A +.396e06 85 20 sta $0340 STA #S_ANSI_VARS.ARGC,D ; Set the new argument count +.396e08 80 1f bra $396e29 BRA done ; And we're done with this character +.396e0a c9 40 cmp #$40 csi_not_sep CMP #'@' +.396e0c 90 0a bcc $396e18 BLT csi_not_upper +.396e0e c9 5b cmp #$5b CMP #'Z'+1 +.396e10 b0 06 bcs $396e18 BGE csi_not_upper +.396e12 22 39 6e 39 jsl $396e39 JSL ANSI_ANSI_UPPER ; Process an ANSI upper case code +.396e16 80 11 bra $396e29 BRA done +.396e18 c9 61 cmp #$61 csi_not_upper CMP #'a' +.396e1a 90 0a bcc $396e26 BLT csi_not_lower +.396e1c c9 7b cmp #$7b CMP #'z'+1 +.396e1e b0 06 bcs $396e26 BGE csi_not_lower +.396e20 22 7e 6e 39 jsl $396e7e JSL ANSI_ANSI_LOWER ; Process an ANSI lower case code +.396e24 80 03 bra $396e29 BRA done +.396e26 82 6f ff brl $396d98 csi_not_lower BRL pr_and_reset ; Invalid sequence: print it and reset +.396e29 28 plp done PLP +.396e2a 2b pld PLD +.396e2b 7a ply PLY +.396e2c fa plx PLX +.396e2d 6b rtl RTL +.396e2e ANSI_INVALID +.396e2e 08 php PHP +.396e2f e2 20 sep #$20 SEP #$20 ; set A short +.396e31 64 1e stz $033e STZ #S_ANSI_VARS.STATE,D ; If invalid, reset to 0 and print the character +.396e33 22 0a 6f 39 jsl $396f0a JSL ANSI_PUTRAWC ; Print the character +.396e37 28 plp PLP +.396e38 6b rtl RTL +.396e39 ANSI_ANSI_UPPER +.396e39 08 php PHP +.396e3a e2 30 sep #$30 SEP #$30 ; set A&X short +.396e3c 64 1e stz $033e STZ #S_ANSI_VARS.STATE,D ; We'll always reset to the initial state +.396e3e 38 sec SEC +.396e3f e9 40 sbc #$40 SBC #'@' +.396e41 0a asl a ASL A +.396e42 aa tax TAX +.396e43 fc 48 6e jsr ($396e48,x) JSR (ansi_table,X) +.396e46 28 plp PLP +.396e47 6b rtl RTL +>396e48 a2 71 ansi_table .word <>ANSI_ICH ; '@' -- ICH -- Insert Character +>396e4a 25 6f .word <>ANSI_CUU ; 'A' -- CUU -- Cursor Up +>396e4c 39 6f .word <>ANSI_CUD ; 'B' -- CUD -- Cursor Down +>396e4e 4d 6f .word <>ANSI_CUF ; 'C' -- CUF -- Cursor Forward +>396e50 61 6f .word <>ANSI_CUB ; 'D' -- CUB -- Cursor Back +>396e52 2e 6e .word <>ANSI_INVALID ; 'E' -- CNL -- Cursor Next Line +>396e54 2e 6e .word <>ANSI_INVALID ; 'F' -- CPL -- Cursor Previous Line +>396e56 2e 6e .word <>ANSI_INVALID ; 'G' -- CHA -- Cursor Horizontal Absolute +>396e58 75 6f .word <>ANSI_CUP ; 'H' -- CUP -- Cursor Position +>396e5a 2e 6e .word <>ANSI_INVALID ; 'I' +>396e5c f4 70 .word <>ANSI_ED ; 'J' -- ED -- Erase In Display +>396e5e 51 71 .word <>ANSI_EL ; 'K' -- EL -- Erase In Line +>396e60 2e 6e .word <>ANSI_INVALID ; 'L' +>396e62 2e 6e .word <>ANSI_INVALID ; 'M' +>396e64 2e 6e .word <>ANSI_INVALID ; 'N' +>396e66 2e 6e .word <>ANSI_INVALID ; 'O' +>396e68 e6 71 .word <>ANSI_DCH ; 'P' -- DCH -- Delete Character +>396e6a 2e 6e .word <>ANSI_INVALID ; 'Q' +>396e6c 2e 6e .word <>ANSI_INVALID ; 'R' +>396e6e 2e 6e .word <>ANSI_INVALID ; 'S' -- SU -- Scroll Up +>396e70 2e 6e .word <>ANSI_INVALID ; 'T' -- SD -- Scroll Down +>396e72 2e 6e .word <>ANSI_INVALID ; 'U' +>396e74 2e 6e .word <>ANSI_INVALID ; 'V' +>396e76 2e 6e .word <>ANSI_INVALID ; 'W' +>396e78 2e 6e .word <>ANSI_INVALID ; 'X' +>396e7a 2e 6e .word <>ANSI_INVALID ; 'Y' +>396e7c 2e 6e .word <>ANSI_INVALID ; 'Z' +.396e7e ANSI_ANSI_LOWER +.396e7e 08 php PHP +.396e7f e2 30 sep #$30 SEP #$30 ; set A&X short +.396e81 64 1e stz $033e STZ #S_ANSI_VARS.STATE,D ; We'll always reset to the initial state +.396e83 38 sec SEC +.396e84 e9 61 sbc #$61 SBC #'a' +.396e86 0a asl a ASL A +.396e87 aa tax TAX +.396e88 fc 8d 6e jsr ($396e8d,x) JSR (ansi_table,X) +.396e8b 28 plp PLP +.396e8c 6b rtl RTL +>396e8d 2e 6e ansi_table .word <>ANSI_INVALID ; 'a' +>396e8f 2e 6e .word <>ANSI_INVALID ; 'b' +>396e91 2e 6e .word <>ANSI_INVALID ; 'c' +>396e93 2e 6e .word <>ANSI_INVALID ; 'd' +>396e95 2e 6e .word <>ANSI_INVALID ; 'e' +>396e97 2e 6e .word <>ANSI_INVALID ; 'f' -- HVP -- Horizontal Vertical Position +>396e99 2e 6e .word <>ANSI_INVALID ; 'g' +>396e9b 8e 6f .word <>ANSI_SET_MODE ; 'h' +>396e9d 2e 6e .word <>ANSI_INVALID ; 'i' +>396e9f 2e 6e .word <>ANSI_INVALID ; 'j' +>396ea1 2e 6e .word <>ANSI_INVALID ; 'k' +>396ea3 cb 6f .word <>ANSI_RESET_MODE ; 'l' +>396ea5 08 70 .word <>ANSI_SGR ; 'm' -- SGR -- Select Graphics Rendition +>396ea7 2e 6e .word <>ANSI_INVALID ; 'n' +>396ea9 2e 6e .word <>ANSI_INVALID ; 'o' +>396eab 2e 6e .word <>ANSI_INVALID ; 'p' +>396ead 2e 6e .word <>ANSI_INVALID ; 'q' +>396eaf 2e 6e .word <>ANSI_INVALID ; 'r' +>396eb1 2e 6e .word <>ANSI_INVALID ; 's' +>396eb3 2e 6e .word <>ANSI_INVALID ; 't' +>396eb5 2e 6e .word <>ANSI_INVALID ; 'u' +>396eb7 2e 6e .word <>ANSI_INVALID ; 'v' +>396eb9 2e 6e .word <>ANSI_INVALID ; 'w' +>396ebb 2e 6e .word <>ANSI_INVALID ; 'x' +>396ebd 2e 6e .word <>ANSI_INVALID ; 'y' +>396ebf 2e 6e .word <>ANSI_INVALID ; 'z' +.396ec1 ANSI_PR_CONTROL +.396ec1 08 php PHP +.396ec2 e2 20 sep #$20 SEP #$20 ; set A short +.396ec4 c2 10 rep #$10 REP #$10 ; set X long +.396ec6 c9 0d cmp #$0d CMP #CHAR_CR ; Handle carriage return +.396ec8 f0 12 beq $396edc BEQ do_cr +.396eca c9 0a cmp #$0a CMP #CHAR_LF ; Handle line feed +.396ecc f0 1a beq $396ee8 BEQ do_lf +.396ece c9 08 cmp #$08 CMP #CHAR_BS ; Handle back space +.396ed0 f0 1c beq $396eee BEQ do_bs +.396ed2 c9 09 cmp #$09 CMP #CHAR_TAB ; Handle TAB +.396ed4 f0 1e beq $396ef4 BEQ do_tab +.396ed6 22 0a 6f 39 jsl $396f0a JSL ANSI_PUTRAWC ; Otherwise, just print it raw and wriggling! +.396eda 80 2c bra $396f08 BRA done +.396edc a2 00 00 ldx #$0000 do_cr LDX #0 ; Move to the beginning of the next line +.396edf a4 10 ldy $0330 LDY #S_ANSI_VARS.CURSORY,D +.396ee1 c8 iny INY +.396ee2 22 bf 72 39 jsl $3972bf JSL ANSI_LOCATE +.396ee6 80 20 bra $396f08 BRA done +.396ee8 22 9c 72 39 jsl $39729c do_lf JSL ANSI_CSRDOWN ; Move the cursor down a line +.396eec 80 1a bra $396f08 BRA done +.396eee 22 60 72 39 jsl $397260 do_bs JSL ANSI_CSRLEFT ; Move the cursor to the left (TODO: delete to the left?) +.396ef2 80 14 bra $396f08 BRA done +.396ef4 do_tab +.396ef4 c2 30 rep #$30 REP #$30 ; set A&X long +.396ef6 a5 0e lda $032e LDA #S_ANSI_VARS.CURSORX,D ; Move to the next power 8th column +.396ef8 29 f8 ff and #$fff8 AND #$FFF8 +.396efb 18 clc CLC +.396efc 69 08 00 adc #$0008 ADC #$0008 +.396eff aa tax TAX +.396f00 e2 20 sep #$20 SEP #$20 ; set A short +.396f02 a4 10 ldy $0330 LDY #S_ANSI_VARS.CURSORY,D +.396f04 22 bf 72 39 jsl $3972bf JSL ANSI_LOCATE +.396f08 28 plp done PLP +.396f09 6b rtl RTL +.396f0a ANSI_PUTRAWC +.396f0a da phx PHX +.396f0b 5a phy PHY +.396f0c 0b phd PHD +.396f0d 08 php PHP +.396f0e e2 20 sep #$20 SEP #$20 ; set A short +.396f10 22 50 6d 39 jsl $396d50 JSL ANSI_SETDEVICE ; Look at the current output channel and point +.396f14 b0 0a bcs $396f20 BCS done ; If invalid, just return +.396f16 87 0b sta [$032b] STA [#S_ANSI_VARS.CURSORPOS,D] ; Save the character on the screen +.396f18 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D ; Set the color based on CURCOLOR +.396f1a 87 13 sta [$0333] STA [#S_ANSI_VARS.COLORPOS,D] +.396f1c 22 35 72 39 jsl $397235 JSL ANSI_CSRRIGHT ; And advance the cursor +.396f20 28 plp done PLP +.396f21 2b pld PLD +.396f22 7a ply PLY +.396f23 fa plx PLX +.396f24 6b rtl RTL +.396f25 ANSI_CUU +.396f25 08 php PHP +.396f26 e2 20 sep #$20 SEP #$20 ; set A short +.396f28 a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Get the first argument +.396f2a d0 02 bne $396f2e BNE loop ; Move so long as not 0 +.396f2c a9 01 lda #$01 LDA #1 ; If 0, default to 1 +.396f2e 48 pha loop PHA ; Save the count +.396f2f 22 7e 72 39 jsl $39727e JSL ANSI_CSRUP ; Cursor Up +.396f33 68 pla PLA ; Restore the count +.396f34 3a dec a DEC A ; Count down and repeat if not done +.396f35 d0 f7 bne $396f2e BNE loop +.396f37 28 plp PLP +.396f38 60 rts RTS +.396f39 ANSI_CUD +.396f39 08 php PHP +.396f3a e2 20 sep #$20 SEP #$20 ; set A short +.396f3c a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Get the first argument +.396f3e d0 02 bne $396f42 BNE loop ; Move so long as not 0 +.396f40 a9 01 lda #$01 LDA #1 ; If 0, default to 1 +.396f42 48 pha loop PHA ; Save the count +.396f43 22 9c 72 39 jsl $39729c JSL ANSI_CSRDOWN ; Cursor Down +.396f47 68 pla PLA ; Restore the count +.396f48 3a dec a DEC A ; Count down and repeat if not done +.396f49 d0 f7 bne $396f42 BNE loop +.396f4b 28 plp PLP +.396f4c 60 rts RTS +.396f4d ANSI_CUF +.396f4d 08 php PHP +.396f4e e2 20 sep #$20 SEP #$20 ; set A short +.396f50 a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Get the first argument +.396f52 d0 02 bne $396f56 BNE loop ; Move so long as not 0 +.396f54 a9 01 lda #$01 LDA #1 ; If 0, default to 1 +.396f56 48 pha loop PHA ; Save the count +.396f57 22 35 72 39 jsl $397235 JSL ANSI_CSRRIGHT ; Cursor right +.396f5b 68 pla PLA ; Restore the count +.396f5c 3a dec a DEC A ; Count down and repeat if not done +.396f5d d0 f7 bne $396f56 BNE loop +.396f5f 28 plp PLP +.396f60 60 rts RTS +.396f61 ANSI_CUB +.396f61 08 php PHP +.396f62 e2 20 sep #$20 SEP #$20 ; set A short +.396f64 a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Get the first argument +.396f66 d0 02 bne $396f6a BNE loop ; Move so long as not 0 +.396f68 a9 01 lda #$01 LDA #1 ; If 0, default to 1 +.396f6a 48 pha loop PHA ; Save the count +.396f6b 22 60 72 39 jsl $397260 JSL ANSI_CSRLEFT ; Cursor left +.396f6f 68 pla PLA ; Restore the count +.396f70 3a dec a DEC A ; Count down and repeat if not done +.396f71 d0 f7 bne $396f6a BNE loop +.396f73 28 plp PLP +.396f74 60 rts RTS +.396f75 ANSI_CUP +.396f75 08 php PHP +.396f76 e2 30 sep #$30 SEP #$30 ; set A&X short +.396f78 a6 21 ldx $0341 LDX #S_ANSI_VARS.ARG0,D ; Get the first argument +.396f7a d0 02 bne $396f7e BNE get_row +.396f7c a2 01 ldx #$01 LDX #1 ; Default to 1 +.396f7e a4 22 ldy $0342 get_row LDY #S_ANSI_VARS.ARG1,D ; Get the second argument +.396f80 d0 02 bne $396f84 BNE adjust_coords +.396f82 a0 01 ldy #$01 LDY #1 ; Default to 1 +.396f84 ca dex adjust_coords DEX ; Translate from base 1 to base 0 coordinates +.396f85 88 dey DEY +.396f86 c2 30 rep #$30 REP #$30 ; set A&X long +.396f88 22 bf 72 39 jsl $3972bf JSL ANSI_LOCATE ; Set the cursor position +.396f8c 28 plp PLP +.396f8d 60 rts RTS +.396f8e ANSI_SET_MODE +.396f8e 08 php PHP +.396f8f e2 30 sep #$30 SEP #$30 ; set A&X short +.396f91 a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Get the first argument +.396f93 c9 19 cmp #$19 CMP #25 +.396f95 d0 24 bne $396fbb BNE chk_break +.396f97 af 03 07 00 lda $000703 LDA @l CHAN_OUT ; Check to see if we're going to screen 0 +.396f9b c9 00 cmp #$00 CMP #CHAN_CONSOLE +.396f9d d0 0c bne $396fab BNE check_evid +.396f9f af 10 00 af lda $af0010 LDA @l VKY_TXT_CURSOR_CTRL_REG ; Yes: enable screen 0's cursor +.396fa3 09 01 ora #$01 ORA #Vky_Cursor_Enable +.396fa5 af 10 00 af lda $af0010 LDA @l VKY_TXT_CURSOR_CTRL_REG +.396fa9 80 1e bra $396fc9 BRA done +.396fab c9 04 cmp #$04 check_evid CMP #CHAN_EVID ; Check to see if we're going to screen 1 +.396fad d0 1a bne $396fc9 BNE done +.396faf af 10 1e ae lda $ae1e10 LDA @l EVID_TXT_CURSOR_CTRL_REG ; Yes: enable screen 1's cursor +.396fb3 09 01 ora #$01 ORA #EVID_Cursor_Enable +.396fb5 af 10 1e ae lda $ae1e10 LDA @l EVID_TXT_CURSOR_CTRL_REG +.396fb9 80 0e bra $396fc9 BRA done +.396fbb c9 1c cmp #$1c chk_break CMP #28 +.396fbd d0 0a bne $396fc9 BNE done +.396fbf 22 88 77 39 jsl $397788 JSL KBD_GET_CONTROL +.396fc3 09 80 ora #$80 ORA #KBD_CTRL_BREAK +.396fc5 22 9b 77 39 jsl $39779b JSL KBD_SET_CONTROL +.396fc9 28 plp done PLP .396fca 60 rts RTS -.396fcb ANSI_CUB +.396fcb ANSI_RESET_MODE .396fcb 08 php PHP -.396fcc e2 20 sep #$20 SEP #$20 ; set A short +.396fcc e2 30 sep #$30 SEP #$30 ; set A&X short .396fce a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Get the first argument -.396fd0 d0 02 bne $396fd4 BNE loop ; Move so long as not 0 -.396fd2 a9 01 lda #$01 LDA #1 ; If 0, default to 1 -.396fd4 48 pha loop PHA ; Save the count -.396fd5 22 ca 72 39 jsl $3972ca JSL ANSI_CSRLEFT ; Cursor left -.396fd9 68 pla PLA ; Restore the count -.396fda 3a dec a DEC A ; Count down and repeat if not done -.396fdb d0 f7 bne $396fd4 BNE loop -.396fdd 28 plp PLP -.396fde 60 rts RTS -.396fdf ANSI_CUP -.396fdf 08 php PHP -.396fe0 e2 30 sep #$30 SEP #$30 ; set A&X short -.396fe2 a6 21 ldx $0341 LDX #S_ANSI_VARS.ARG0,D ; Get the first argument -.396fe4 d0 02 bne $396fe8 BNE get_row -.396fe6 a2 01 ldx #$01 LDX #1 ; Default to 1 -.396fe8 a4 22 ldy $0342 get_row LDY #S_ANSI_VARS.ARG1,D ; Get the second argument -.396fea d0 02 bne $396fee BNE adjust_coords -.396fec a0 01 ldy #$01 LDY #1 ; Default to 1 -.396fee ca dex adjust_coords DEX ; Translate from base 1 to base 0 coordinates -.396fef 88 dey DEY -.396ff0 c2 30 rep #$30 REP #$30 ; set A&X long -.396ff2 22 29 73 39 jsl $397329 JSL ANSI_LOCATE ; Set the cursor position -.396ff6 28 plp PLP -.396ff7 60 rts RTS -.396ff8 ANSI_SET_MODE -.396ff8 08 php PHP -.396ff9 e2 30 sep #$30 SEP #$30 ; set A&X short -.396ffb a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Get the first argument -.396ffd c9 19 cmp #$19 CMP #25 -.396fff d0 24 bne $397025 BNE chk_break -.397001 af 03 07 00 lda $000703 LDA @l CHAN_OUT ; Check to see if we're going to screen 0 -.397005 c9 00 cmp #$00 CMP #CHAN_CONSOLE -.397007 d0 0c bne $397015 BNE check_evid -.397009 af 10 00 af lda $af0010 LDA @l VKY_TXT_CURSOR_CTRL_REG ; Yes: enable screen 0's cursor -.39700d 09 01 ora #$01 ORA #Vky_Cursor_Enable -.39700f af 10 00 af lda $af0010 LDA @l VKY_TXT_CURSOR_CTRL_REG -.397013 80 1e bra $397033 BRA done -.397015 c9 04 cmp #$04 check_evid CMP #CHAN_EVID ; Check to see if we're going to screen 1 -.397017 d0 1a bne $397033 BNE done -.397019 af 10 1e ae lda $ae1e10 LDA @l EVID_TXT_CURSOR_CTRL_REG ; Yes: enable screen 1's cursor -.39701d 09 01 ora #$01 ORA #EVID_Cursor_Enable -.39701f af 10 1e ae lda $ae1e10 LDA @l EVID_TXT_CURSOR_CTRL_REG -.397023 80 0e bra $397033 BRA done -.397025 c9 1c cmp #$1c chk_break CMP #28 -.397027 d0 0a bne $397033 BNE done -.397029 22 f2 77 39 jsl $3977f2 JSL KBD_GET_CONTROL -.39702d 09 80 ora #$80 ORA #KBD_CTRL_BREAK -.39702f 22 05 78 39 jsl $397805 JSL KBD_SET_CONTROL -.397033 28 plp done PLP -.397034 60 rts RTS -.397035 ANSI_RESET_MODE -.397035 08 php PHP -.397036 e2 30 sep #$30 SEP #$30 ; set A&X short -.397038 a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Get the first argument -.39703a c9 19 cmp #$19 CMP #25 -.39703c d0 24 bne $397062 BNE chk_break -.39703e af 03 07 00 lda $000703 LDA @l CHAN_OUT ; Check to see if we're going to screen 0 -.397042 c9 00 cmp #$00 CMP #CHAN_CONSOLE -.397044 d0 0c bne $397052 BNE check_evid -.397046 af 10 00 af lda $af0010 LDA @l VKY_TXT_CURSOR_CTRL_REG ; Yes: enable screen 0's cursor -.39704a 29 fe and #$fe AND #~Vky_Cursor_Enable -.39704c af 10 00 af lda $af0010 LDA @l VKY_TXT_CURSOR_CTRL_REG -.397050 80 1e bra $397070 BRA done -.397052 c9 04 cmp #$04 check_evid CMP #CHAN_EVID ; Check to see if we're going to screen 1 -.397054 d0 1a bne $397070 BNE done -.397056 af 10 1e ae lda $ae1e10 LDA @l EVID_TXT_CURSOR_CTRL_REG ; Yes: enable screen 1's cursor -.39705a 29 fe and #$fe AND #~EVID_Cursor_Enable -.39705c af 10 1e ae lda $ae1e10 LDA @l EVID_TXT_CURSOR_CTRL_REG -.397060 80 0e bra $397070 BRA done -.397062 c9 1c cmp #$1c chk_break CMP #28 -.397064 d0 0a bne $397070 BNE done -.397066 22 f2 77 39 jsl $3977f2 JSL KBD_GET_CONTROL -.39706a 29 7f and #$7f AND #~KBD_CTRL_BREAK -.39706c 22 05 78 39 jsl $397805 JSL KBD_SET_CONTROL -.397070 28 plp done PLP -.397071 60 rts RTS -.397072 ANSI_SGR -.397072 08 php PHP -.397073 e2 30 sep #$30 SEP #$30 ; set A&X short -.397075 a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Get the first argument -.397077 d0 0d bne $397086 BNE chk_1 -.397079 a9 70 lda #$70 LDA #ANSI_DEF_COLOR ; 0 ==> Return to the default colors -.39707b 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D -.39707d a5 1f lda $033f LDA #S_ANSI_VARS.CONTROL,D ; Switch off inversion -.39707f 29 3f and #$3f AND #~(CONTROL_INVERT | CONTROL_BOLD) -.397081 85 1f sta $033f STA #S_ANSI_VARS.CONTROL,D -.397083 82 d6 00 brl $39715c BRL done -.397086 c9 01 cmp #$01 chk_1 CMP #1 -.397088 d0 0f bne $397099 BNE chk_2 -.39708a a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D ; Make the current color bold -.39708c 09 80 ora #$80 ORA #$80 +.396fd0 c9 19 cmp #$19 CMP #25 +.396fd2 d0 24 bne $396ff8 BNE chk_break +.396fd4 af 03 07 00 lda $000703 LDA @l CHAN_OUT ; Check to see if we're going to screen 0 +.396fd8 c9 00 cmp #$00 CMP #CHAN_CONSOLE +.396fda d0 0c bne $396fe8 BNE check_evid +.396fdc af 10 00 af lda $af0010 LDA @l VKY_TXT_CURSOR_CTRL_REG ; Yes: enable screen 0's cursor +.396fe0 29 fe and #$fe AND #~Vky_Cursor_Enable +.396fe2 af 10 00 af lda $af0010 LDA @l VKY_TXT_CURSOR_CTRL_REG +.396fe6 80 1e bra $397006 BRA done +.396fe8 c9 04 cmp #$04 check_evid CMP #CHAN_EVID ; Check to see if we're going to screen 1 +.396fea d0 1a bne $397006 BNE done +.396fec af 10 1e ae lda $ae1e10 LDA @l EVID_TXT_CURSOR_CTRL_REG ; Yes: enable screen 1's cursor +.396ff0 29 fe and #$fe AND #~EVID_Cursor_Enable +.396ff2 af 10 1e ae lda $ae1e10 LDA @l EVID_TXT_CURSOR_CTRL_REG +.396ff6 80 0e bra $397006 BRA done +.396ff8 c9 1c cmp #$1c chk_break CMP #28 +.396ffa d0 0a bne $397006 BNE done +.396ffc 22 88 77 39 jsl $397788 JSL KBD_GET_CONTROL +.397000 29 7f and #$7f AND #~KBD_CTRL_BREAK +.397002 22 9b 77 39 jsl $39779b JSL KBD_SET_CONTROL +.397006 28 plp done PLP +.397007 60 rts RTS +.397008 ANSI_SGR +.397008 08 php PHP +.397009 e2 30 sep #$30 SEP #$30 ; set A&X short +.39700b a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Get the first argument +.39700d d0 0d bne $39701c BNE chk_1 +.39700f a9 70 lda #$70 LDA #ANSI_DEF_COLOR ; 0 ==> Return to the default colors +.397011 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D +.397013 a5 1f lda $033f LDA #S_ANSI_VARS.CONTROL,D ; Switch off inversion +.397015 29 3f and #$3f AND #~(CONTROL_INVERT | CONTROL_BOLD) +.397017 85 1f sta $033f STA #S_ANSI_VARS.CONTROL,D +.397019 82 d6 00 brl $3970f2 BRL done +.39701c c9 01 cmp #$01 chk_1 CMP #1 +.39701e d0 0f bne $39702f BNE chk_2 +.397020 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D ; Make the current color bold +.397022 09 80 ora #$80 ORA #$80 +.397024 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D +.397026 a5 1f lda $033f LDA #S_ANSI_VARS.CONTROL,D ; Flag that text should be bold +.397028 09 40 ora #$40 ORA #CONTROL_BOLD +.39702a 85 1f sta $033f STA #S_ANSI_VARS.CONTROL,D +.39702c 82 c3 00 brl $3970f2 BRL done +.39702f c9 02 cmp #$02 chk_2 CMP #2 +.397031 f0 04 beq $397037 BEQ normal_intensity +.397033 c9 16 cmp #$16 chk_22 CMP #22 +.397035 d0 0f bne $397046 BNE chk_7 +.397037 a5 12 lda $0332 normal_intensity LDA #S_ANSI_VARS.CURCOLOR,D ; 2 ==> Set the foreground to normal intensity +.397039 29 7f and #$7f AND #~$80 +.39703b 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D +.39703d a5 1f lda $033f LDA #S_ANSI_VARS.CONTROL,D ; Flag that text should be normal +.39703f 29 bf and #$bf AND #~CONTROL_BOLD +.397041 85 1f sta $033f STA #S_ANSI_VARS.CONTROL,D +.397043 82 ac 00 brl $3970f2 BRL done +.397046 c9 07 cmp #$07 chk_7 CMP #7 +.397048 d0 2c bne $397076 BNE chk_27 +.39704a a5 1f lda $033f LDA #S_ANSI_VARS.CONTROL,D ; Are the colors already inverted? +.39704c 89 80 bit #$80 BIT #CONTROL_INVERT +.39704e f0 03 beq $397053 BEQ invert_on +.397050 82 9f 00 brl $3970f2 BRL done ; Yes: just finish +.397053 09 80 ora #$80 invert_on ORA #CONTROL_INVERT ; No: Mark that the colors are inverted +.397055 85 1f sta $033f STA #S_ANSI_VARS.CONTROL,D +.397057 a5 12 lda $0332 swap_colors LDA #S_ANSI_VARS.CURCOLOR,D ; Exchange the upper and lower nibbles +.397059 0a asl a ASL A +.39705a 69 80 adc #$80 ADC #$80 +.39705c 2a rol a ROL A +.39705d 0a asl a ASL A +.39705e 69 80 adc #$80 ADC #$80 +.397060 2a rol a ROL A +.397061 29 f7 and #$f7 AND #%11110111 ; Make sure the background is not bolded +.397063 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D +.397065 a5 1f lda $033f LDA #S_ANSI_VARS.CONTROL,D ; Should the color be bold? +.397067 89 40 bit #$40 BIT #CONTROL_BOLD +.397069 d0 03 bne $39706e BNE bold_on +.39706b 82 84 00 brl $3970f2 BRL done ; No: we're done +.39706e a5 12 lda $0332 bold_on LDA #S_ANSI_VARS.CURCOLOR,D ; Yes: make the foreground bold +.397070 09 80 ora #$80 ORA #$80 +.397072 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D +.397074 80 7c bra $3970f2 BRA done +.397076 c9 1b cmp #$1b chk_27 CMP #27 +.397078 d0 0c bne $397086 BNE chk_39 +.39707a a5 1f lda $033f LDA #S_ANSI_VARS.CONTROL,D ; Are the colors inverted? +.39707c 89 80 bit #$80 BIT #CONTROL_INVERT +.39707e f0 72 beq $3970f2 BEQ done ; No: just finish +.397080 29 7f and #$7f AND #~CONTROL_INVERT ; Yes: Mark that the colors are back to normal +.397082 85 1f sta $033f STA #S_ANSI_VARS.CONTROL,D +.397084 80 d1 bra $397057 BRA swap_colors ; And go swap the colors +.397086 c9 27 cmp #$27 chk_39 CMP #39 +.397088 d0 10 bne $39709a BNE chk_49 +.39708a a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D +.39708c 29 0f and #$0f AND #$0F .39708e 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D -.397090 a5 1f lda $033f LDA #S_ANSI_VARS.CONTROL,D ; Flag that text should be bold -.397092 09 40 ora #$40 ORA #CONTROL_BOLD -.397094 85 1f sta $033f STA #S_ANSI_VARS.CONTROL,D -.397096 82 c3 00 brl $39715c BRL done -.397099 c9 02 cmp #$02 chk_2 CMP #2 -.39709b f0 04 beq $3970a1 BEQ normal_intensity -.39709d c9 16 cmp #$16 chk_22 CMP #22 -.39709f d0 0f bne $3970b0 BNE chk_7 -.3970a1 a5 12 lda $0332 normal_intensity LDA #S_ANSI_VARS.CURCOLOR,D ; 2 ==> Set the foreground to normal intensity -.3970a3 29 7f and #$7f AND #~$80 -.3970a5 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D -.3970a7 a5 1f lda $033f LDA #S_ANSI_VARS.CONTROL,D ; Flag that text should be normal -.3970a9 29 bf and #$bf AND #~CONTROL_BOLD -.3970ab 85 1f sta $033f STA #S_ANSI_VARS.CONTROL,D -.3970ad 82 ac 00 brl $39715c BRL done -.3970b0 c9 07 cmp #$07 chk_7 CMP #7 -.3970b2 d0 2c bne $3970e0 BNE chk_27 -.3970b4 a5 1f lda $033f LDA #S_ANSI_VARS.CONTROL,D ; Are the colors already inverted? -.3970b6 89 80 bit #$80 BIT #CONTROL_INVERT -.3970b8 f0 03 beq $3970bd BEQ invert_on -.3970ba 82 9f 00 brl $39715c BRL done ; Yes: just finish -.3970bd 09 80 ora #$80 invert_on ORA #CONTROL_INVERT ; No: Mark that the colors are inverted -.3970bf 85 1f sta $033f STA #S_ANSI_VARS.CONTROL,D -.3970c1 a5 12 lda $0332 swap_colors LDA #S_ANSI_VARS.CURCOLOR,D ; Exchange the upper and lower nibbles -.3970c3 0a asl a ASL A -.3970c4 69 80 adc #$80 ADC #$80 -.3970c6 2a rol a ROL A -.3970c7 0a asl a ASL A -.3970c8 69 80 adc #$80 ADC #$80 -.3970ca 2a rol a ROL A -.3970cb 29 f7 and #$f7 AND #%11110111 ; Make sure the background is not bolded -.3970cd 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D -.3970cf a5 1f lda $033f LDA #S_ANSI_VARS.CONTROL,D ; Should the color be bold? -.3970d1 89 40 bit #$40 BIT #CONTROL_BOLD -.3970d3 d0 03 bne $3970d8 BNE bold_on -.3970d5 82 84 00 brl $39715c BRL done ; No: we're done -.3970d8 a5 12 lda $0332 bold_on LDA #S_ANSI_VARS.CURCOLOR,D ; Yes: make the foreground bold -.3970da 09 80 ora #$80 ORA #$80 -.3970dc 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D -.3970de 80 7c bra $39715c BRA done -.3970e0 c9 1b cmp #$1b chk_27 CMP #27 -.3970e2 d0 0c bne $3970f0 BNE chk_39 -.3970e4 a5 1f lda $033f LDA #S_ANSI_VARS.CONTROL,D ; Are the colors inverted? -.3970e6 89 80 bit #$80 BIT #CONTROL_INVERT -.3970e8 f0 72 beq $39715c BEQ done ; No: just finish -.3970ea 29 7f and #$7f AND #~CONTROL_INVERT ; Yes: Mark that the colors are back to normal -.3970ec 85 1f sta $033f STA #S_ANSI_VARS.CONTROL,D -.3970ee 80 d1 bra $3970c1 BRA swap_colors ; And go swap the colors -.3970f0 c9 27 cmp #$27 chk_39 CMP #39 -.3970f2 d0 10 bne $397104 BNE chk_49 -.3970f4 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D -.3970f6 29 0f and #$0f AND #$0F -.3970f8 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D -.3970fa a9 70 lda #$70 LDA #ANSI_DEF_COLOR -.3970fc 29 f0 and #$f0 AND #$F0 -.3970fe 05 12 ora $0332 ORA #S_ANSI_VARS.CURCOLOR,D -.397100 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D -.397102 80 58 bra $39715c BRA done -.397104 c9 31 cmp #$31 chk_49 CMP #49 -.397106 d0 10 bne $397118 BNE chk_foreground -.397108 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D -.39710a 29 f0 and #$f0 AND #$F0 -.39710c 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D -.39710e a9 70 lda #$70 LDA #ANSI_DEF_COLOR -.397110 29 0f and #$0f AND #$0F -.397112 05 12 ora $0332 ORA #S_ANSI_VARS.CURCOLOR,D -.397114 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D -.397116 80 44 bra $39715c BRA done -.397118 c9 1e cmp #$1e chk_foreground CMP #30 ; If [30..37], set the foreground color -.39711a 90 29 bcc $397145 BLT chk_background -.39711c c9 26 cmp #$26 CMP #38 -.39711e b0 25 bcs $397145 BGE chk_background -.397120 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D -.397122 29 0f and #$0f AND #$0F -.397124 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D -.397126 a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D -.397128 38 sec SEC -.397129 e9 1e sbc #$1e SBC #30 -.39712b 0a asl a ASL A -.39712c 0a asl a ASL A -.39712d 0a asl a ASL A -.39712e 0a asl a ASL A -.39712f 05 12 ora $0332 ORA #S_ANSI_VARS.CURCOLOR,D -.397131 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D -.397133 a5 1f lda $033f LDA #S_ANSI_VARS.CONTROL,D ; Should the color be bold? -.397135 89 40 bit #$40 BIT #CONTROL_BOLD -.397137 d0 03 bne $39713c BNE bold_fore ; No: we're done -.397139 82 20 00 brl $39715c BRL done -.39713c a5 12 lda $0332 bold_fore LDA #S_ANSI_VARS.CURCOLOR,D ; Yes: make the foreground bold -.39713e 09 80 ora #$80 ORA #$80 -.397140 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D -.397142 82 17 00 brl $39715c BRL done -.397145 c9 28 cmp #$28 chk_background CMP #40 ; If [40..47], set the background color -.397147 90 13 bcc $39715c BLT done -.397149 c9 30 cmp #$30 CMP #48 -.39714b b0 0f bcs $39715c BGE done -.39714d a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D -.39714f 29 f0 and #$f0 AND #$F0 -.397151 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D -.397153 a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D -.397155 38 sec SEC -.397156 e9 28 sbc #$28 SBC #40 -.397158 05 12 ora $0332 ORA #S_ANSI_VARS.CURCOLOR,D -.39715a 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D -.39715c 28 plp done PLP -.39715d 60 rts RTS -.39715e ANSI_ED -.39715e 5a phy PHY -.39715f 08 php PHP -.397160 e2 20 sep #$20 SEP #$20 ; set A short -.397162 c2 10 rep #$10 REP #$10 ; set X long -.397164 a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Get the first argument -.397166 d0 1b bne $397183 BNE not_0 ; Is the code 0? -.397168 code_0 -.397168 c2 20 rep #$20 REP #$20 ; set A long -.39716a 38 sec SEC ; Calculate min index to erase -.39716b a5 0b lda $032b LDA #S_ANSI_VARS.CURSORPOS,D -.39716d e5 00 sbc $0320 SBC #S_ANSI_VARS.SCREENBEGIN,D -.39716f a8 tay TAY -.397170 e2 20 sep #$20 SEP #$20 ; set A short -.397172 a9 20 lda #$20 code_2_loop LDA #' ' -.397174 97 00 sta [$0320],y STA [#S_ANSI_VARS.SCREENBEGIN,D],Y ; Clear the text cell -.397176 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D -.397178 97 16 sta [$0336],y STA [#S_ANSI_VARS.COLORBEGIN,D],Y ; And set the default color -.39717a c8 iny INY -.39717b c0 00 20 cpy #$2000 CPY #$2000 -.39717e d0 f2 bne $397172 BNE code_2_loop -.397180 82 35 00 brl $3971b8 BRL done -.397183 c9 01 cmp #$01 not_0 CMP #1 ; Is the code 1? -.397185 d0 18 bne $39719f BNE not_1 -.397187 code_1 -.397187 c2 20 rep #$20 REP #$20 ; set A long -.397189 38 sec SEC ; Calculate max index to erase -.39718a a5 0b lda $032b LDA #S_ANSI_VARS.CURSORPOS,D -.39718c e5 00 sbc $0320 SBC #S_ANSI_VARS.SCREENBEGIN,D -.39718e a8 tay TAY -.39718f e2 20 sep #$20 SEP #$20 ; set A short -.397191 a9 20 lda #$20 code_1_loop LDA #' ' -.397193 97 00 sta [$0320],y STA [#S_ANSI_VARS.SCREENBEGIN,D],Y ; Clear the text cell -.397195 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D -.397197 97 16 sta [$0336],y STA [#S_ANSI_VARS.COLORBEGIN,D],Y ; And set the default color -.397199 88 dey DEY ; Move to the previous index -.39719a 10 f5 bpl $397191 BPL code_1_loop ; And loop until we're done -.39719c 82 19 00 brl $3971b8 BRL done -.39719f c9 02 cmp #$02 not_1 CMP #2 ; Is the code 2 or 3? -.3971a1 f0 04 beq $3971a7 BEQ cls_all -.3971a3 c9 03 cmp #$03 CMP #3 -.3971a5 d0 11 bne $3971b8 BNE done ; No: just ignore the sequence -.3971a7 a0 00 00 ldy #$0000 cls_all LDY #0 ; Start with the cursor's position -.3971aa a9 20 lda #$20 cls_all_loop LDA #' ' -.3971ac 97 00 sta [$0320],y STA [#S_ANSI_VARS.SCREENBEGIN,D],Y ; Clear the text cell -.3971ae a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D -.3971b0 97 16 sta [$0336],y STA [#S_ANSI_VARS.COLORBEGIN,D],Y ; And set the default color -.3971b2 c8 iny INY ; Go to the next position -.3971b3 c0 00 20 cpy #$2000 CPY #$2000 ; Have we reached the end? -.3971b6 d0 f2 bne $3971aa BNE cls_all_loop ; No: keep going -.3971b8 28 plp done PLP -.3971b9 7a ply PLY -.3971ba 60 rts RTS -.3971bb ANSI_EL -.3971bb da phx PHX -.3971bc 5a phy PHY -.3971bd 08 php PHP -.3971be c2 30 rep #$30 REP #$30 ; set A&X long -.3971c0 38 sec SEC -.3971c1 a5 0b lda $032b LDA #S_ANSI_VARS.CURSORPOS,D ; Compute the address of the first character of the line -.3971c3 e5 0e sbc $032e SBC #S_ANSI_VARS.CURSORX,D -.3971c5 85 19 sta $0339 STA #S_ANSI_VARS.TMPPTR1,D -.3971c7 e2 20 sep #$20 SEP #$20 ; set A short -.3971c9 a5 02 lda $0322 LDA #S_ANSI_VARS.SCREENBEGIN+2,D ; Get the bank of the screen -.3971cb 85 1b sta $033b STA #S_ANSI_VARS.TMPPTR1+2,D ; And put it in the TMPPTR1 -.3971cd a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Get the first argument -.3971cf d0 0e bne $3971df BNE not_0 ; Is the code 0? -.3971d1 code_0 -.3971d1 a9 20 lda #$20 LDA #' ' -.3971d3 a4 0e ldy $032e LDY #S_ANSI_VARS.CURSORX,D ; Start at the cursor position -.3971d5 97 19 sta [$0339],y code_0_loop STA [#S_ANSI_VARS.TMPPTR1,D],Y ; Clear the text cell -.3971d7 c8 iny INY -.3971d8 c4 05 cpy $0325 CPY #S_ANSI_VARS.COLS_PER_LINE,D ; Have we reached the end of the line? -.3971da d0 f9 bne $3971d5 BNE code_0_loop ; No: keep looping -.3971dc 82 29 00 brl $397208 BRL done -.3971df c9 01 cmp #$01 not_0 CMP #1 ; Is the code 1? -.3971e1 d0 11 bne $3971f4 BNE not_1 -.3971e3 code_1 -.3971e3 a9 20 lda #$20 LDA #' ' -.3971e5 a0 00 00 ldy #$0000 LDY #0 -.3971e8 97 19 sta [$0339],y code_1_loop STA [#S_ANSI_VARS.TMPPTR1,D],Y ; Clear the text cell -.3971ea c8 iny INY -.3971eb c4 0e cpy $032e CPY #S_ANSI_VARS.CURSORX,D ; Have we reached the cursor? -.3971ed d0 f9 bne $3971e8 BNE code_1_loop ; No: keep looping -.3971ef 97 19 sta [$0339],y STA [#S_ANSI_VARS.TMPPTR1,D],Y ; And clear under the cursor -.3971f1 82 14 00 brl $397208 BRL done -.3971f4 c9 02 cmp #$02 not_1 CMP #2 ; Is the code 2 or 3? -.3971f6 f0 04 beq $3971fc BEQ code_2_3 -.3971f8 c9 03 cmp #$03 CMP #3 -.3971fa d0 0c bne $397208 BNE done ; No: just ignore the sequence -.3971fc code_2_3 -.3971fc a9 20 lda #$20 LDA #' ' -.3971fe a0 00 00 ldy #$0000 LDY #0 -.397201 97 19 sta [$0339],y code_2_3_loop STA [#S_ANSI_VARS.TMPPTR1,D],Y ; Clear the text cell -.397203 c8 iny INY -.397204 c4 05 cpy $0325 CPY #S_ANSI_VARS.COLS_PER_LINE,D ; Have we reached the end of the line? -.397206 d0 f9 bne $397201 BNE code_2_3_loop ; No: keep looping -.397208 28 plp done PLP -.397209 7a ply PLY -.39720a fa plx PLX -.39720b 60 rts RTS -.39720c ANSI_ICH -.39720c 5a phy PHY -.39720d 08 php PHP -.39720e e2 30 sep #$30 SEP #$30 ; set A&X short -.397210 a5 20 lda $0340 LDA #S_ANSI_VARS.ARGC,D ; Check how many arguments were passed -.397212 f0 04 beq $397218 BEQ default_1 ; If 0, default to 1 -.397214 a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Check the argument -.397216 d0 04 bne $39721c BNE calc_src_dest ; If not 0, start calculating the indexes -.397218 a9 01 lda #$01 default_1 LDA #1 ; Default the insert count to 1 -.39721a 85 21 sta $0341 STA #S_ANSI_VARS.ARG0,D -.39721c 38 sec calc_src_dest SEC -.39721d a5 03 lda $0323 LDA #S_ANSI_VARS.COLS_VISIBLE,D ; TMPPTR1 := COLS_VISIBLE - CURSORX (destination index) -.39721f e5 0e sbc $032e SBC #S_ANSI_VARS.CURSORX,D -.397221 85 19 sta $0339 STA #S_ANSI_VARS.TMPPTR1,D -.397223 38 sec SEC -.397224 e5 21 sbc $0341 SBC #S_ANSI_VARS.ARG0,D ; TMPPTR1+1 := TMPPTR1 - n (source index) -.397226 85 1a sta $033a STA #S_ANSI_VARS.TMPPTR1+1,D -.397228 a4 1a ldy $033a insert_loop LDY #S_ANSI_VARS.TMPPTR1+1,D ; text[dest] := text[source] -.39722a b7 0b lda [$032b],y LDA [#S_ANSI_VARS.CURSORPOS,D],Y -.39722c a4 19 ldy $0339 LDY #S_ANSI_VARS.TMPPTR1,D -.39722e 97 0b sta [$032b],y STA [#S_ANSI_VARS.CURSORPOS,D],Y -.397230 a4 1a ldy $033a LDY #S_ANSI_VARS.TMPPTR1+1,D ; color[dest] := color[source] -.397232 b7 13 lda [$0333],y LDA [#S_ANSI_VARS.COLORPOS,D],Y -.397234 a4 19 ldy $0339 LDY #S_ANSI_VARS.TMPPTR1,D -.397236 97 13 sta [$0333],y STA [#S_ANSI_VARS.COLORPOS,D],Y -.397238 c6 19 dec $0339 DEC #S_ANSI_VARS.TMPPTR1,D ; Move to the previous position -.39723a c6 1a dec $033a DEC #S_ANSI_VARS.TMPPTR1+1,D -.39723c 10 ea bpl $397228 BPL insert_loop ; Keep looping until we reach the end -.39723e a0 00 ldy #$00 LDY #0 -.397240 a9 20 lda #$20 fill_loop LDA #CHAR_SP ; Replace the character with a space -.397242 97 0b sta [$032b],y STA [#S_ANSI_VARS.CURSORPOS,D],Y -.397244 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D -.397246 97 13 sta [$0333],y STA [#S_ANSI_VARS.COLORPOS,D],Y ; In the default color -.397248 c8 iny INY ; Move to the next byte -.397249 c4 21 cpy $0341 CPY #S_ANSI_VARS.ARG0,D ; Until we reach the end -.39724b d0 f3 bne $397240 BNE fill_loop -.39724d 28 plp PLP -.39724e 7a ply PLY -.39724f 60 rts RTS -.397250 ANSI_DCH -.397250 5a phy PHY -.397251 08 php PHP -.397252 e2 30 sep #$30 SEP #$30 ; set A&X short -.397254 a5 20 lda $0340 LDA #S_ANSI_VARS.ARGC,D ; Check how many arguments were passed -.397256 f0 04 beq $39725c BEQ default_1 ; If 0, default to 1 -.397258 a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Check the argument -.39725a d0 04 bne $397260 BNE calc_src_dest ; If not 0, start calculating the indexes -.39725c a9 01 lda #$01 default_1 LDA #1 ; Default the insert count to 1 -.39725e 85 21 sta $0341 STA #S_ANSI_VARS.ARG0,D -.397260 a9 00 lda #$00 calc_src_dest LDA #0 -.397262 85 1a sta $033a STA #S_ANSI_VARS.TMPPTR1+1,D ; TMPPTR+1 := 0 (destination) -.397264 a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D -.397266 85 19 sta $0339 STA #S_ANSI_VARS.TMPPTR1,D ; TMPPTR+1 := n (source) -.397268 38 sec SEC ; Calculate end offset -.397269 a5 03 lda $0323 LDA #S_ANSI_VARS.COLS_VISIBLE,D -.39726b e5 0e sbc $032e SBC #S_ANSI_VARS.CURSORX,D -.39726d 85 22 sta $0342 STA #S_ANSI_VARS.ARG1,D -.39726f a4 19 ldy $0339 del_loop LDY #S_ANSI_VARS.TMPPTR1,D ; text[dest] := text[source] -.397271 b7 0b lda [$032b],y LDA [#S_ANSI_VARS.CURSORPOS,D],Y -.397273 a4 1a ldy $033a LDY #S_ANSI_VARS.TMPPTR1+1,D -.397275 97 0b sta [$032b],y STA [#S_ANSI_VARS.CURSORPOS,D],Y -.397277 a4 19 ldy $0339 LDY #S_ANSI_VARS.TMPPTR1,D ; color[dest] := color[source] -.397279 b7 13 lda [$0333],y LDA [#S_ANSI_VARS.COLORPOS,D],Y -.39727b a4 1a ldy $033a LDY #S_ANSI_VARS.TMPPTR1+1,D -.39727d 97 13 sta [$0333],y STA [#S_ANSI_VARS.COLORPOS,D],Y -.39727f e6 19 inc $0339 INC #S_ANSI_VARS.TMPPTR1,D ; Move to the next position -.397281 e6 1a inc $033a INC #S_ANSI_VARS.TMPPTR1+1,D -.397283 a5 19 lda $0339 LDA #S_ANSI_VARS.TMPPTR1,D -.397285 c5 22 cmp $0342 CMP #S_ANSI_VARS.ARG1,D -.397287 90 e6 bcc $39726f BLT del_loop ; Keep looping until we reach the end -.397289 38 sec SEC ; Calculate the starting point to fill with blanks -.39728a a5 1a lda $033a LDA #S_ANSI_VARS.TMPPTR1+1,D -.39728c e5 21 sbc $0341 SBC #S_ANSI_VARS.ARG0,D -.39728e a8 tay TAY -.39728f a9 20 lda #$20 fill_loop LDA #CHAR_SP ; Replace the character with a space -.397291 97 0b sta [$032b],y STA [#S_ANSI_VARS.CURSORPOS,D],Y -.397293 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D -.397295 97 13 sta [$0333],y STA [#S_ANSI_VARS.COLORPOS,D],Y ; In the default color -.397297 c8 iny INY ; Move to the next byte -.397298 c4 22 cpy $0342 CPY #S_ANSI_VARS.ARG1,D ; Until we reach the end -.39729a 90 f3 bcc $39728f BLT fill_loop -.39729c 28 plp PLP -.39729d 7a ply PLY -.39729e 60 rts RTS -.39729f ANSI_CSRRIGHT -.39729f da phx PHX -.3972a0 5a phy PHY -.3972a1 0b phd PHD -.3972a2 08 php PHP -.3972a3 c2 30 rep #$30 REP #$30 ; set A&X long -.3972a5 22 ba 6d 39 jsl $396dba JSL ANSI_SETDEVICE ; Look at the current output channel and point -.3972a9 b0 1a bcs $3972c5 BCS done ; If invalid, just return -.3972ab a6 0e ldx $032e LDX #S_ANSI_VARS.CURSORX,D ; Get the new column -.3972ad e8 inx INX -.3972ae a4 10 ldy $0330 LDY #S_ANSI_VARS.CURSORY,D ; Get the current row -.3972b0 e4 03 cpx $0323 CPX #S_ANSI_VARS.COLS_VISIBLE,D ; Are we off screen? -.3972b2 90 0d bcc $3972c1 BCC nowrap ; No: just set the position -.3972b4 a2 00 00 ldx #$0000 LDX #0 ; Yes: move to the first column -.3972b7 c8 iny INY ; And move to the next row -.3972b8 c4 07 cpy $0327 CPY #S_ANSI_VARS.LINES_VISIBLE,D ; Are we still off screen? -.3972ba 90 05 bcc $3972c1 BCC nowrap ; No: just set the position -.3972bc 88 dey DEY ; Yes: lock to the last row -.3972bd 22 8d 73 39 jsl $39738d JSL ANSI_SCROLLUP ; But scroll the screen up -.3972c1 22 29 73 39 jsl $397329 nowrap JSL ANSI_LOCATE ; Set the cursor position -.3972c5 28 plp done PLP -.3972c6 2b pld PLD -.3972c7 7a ply PLY -.3972c8 fa plx PLX -.3972c9 6b rtl RTL -.3972ca ANSI_CSRLEFT -.3972ca da phx PHX -.3972cb 5a phy PHY -.3972cc 0b phd PHD -.3972cd 08 php PHP -.3972ce c2 30 rep #$30 REP #$30 ; set A&X long -.3972d0 22 ba 6d 39 jsl $396dba JSL ANSI_SETDEVICE ; Look at the current output channel and point -.3972d4 b0 0d bcs $3972e3 BCS done ; If invalid, just return -.3972d6 a6 0e ldx $032e LDX #S_ANSI_VARS.CURSORX,D ; Check that we are not already @ Zero -.3972d8 f0 09 beq $3972e3 BEQ done ; If so, just ignore this call -.3972da ca dex DEX -.3972db 86 0e stx $032e STX #S_ANSI_VARS.CURSORX,D -.3972dd a4 10 ldy $0330 LDY #S_ANSI_VARS.CURSORY,D -.3972df 22 29 73 39 jsl $397329 JSL ANSI_LOCATE -.3972e3 28 plp done PLP -.3972e4 2b pld PLD -.3972e5 7a ply PLY -.3972e6 fa plx PLX -.3972e7 6b rtl RTL -.3972e8 ANSI_CSRUP -.3972e8 da phx PHX -.3972e9 5a phy PHY -.3972ea 0b phd PHD -.3972eb 08 php PHP -.3972ec c2 30 rep #$30 REP #$30 ; set A&X long -.3972ee 22 ba 6d 39 jsl $396dba JSL ANSI_SETDEVICE ; Look at the current output channel and point -.3972f2 b0 0d bcs $397301 BCS done ; If invalid, just return -.3972f4 a4 10 ldy $0330 LDY #S_ANSI_VARS.CURSORY,D ; Check if we are not already @ Zero -.3972f6 f0 09 beq $397301 BEQ done ; If we are, just ignore the call -.3972f8 88 dey DEY -.3972f9 84 10 sty $0330 STY #S_ANSI_VARS.CURSORY,D -.3972fb a6 0e ldx $032e LDX #S_ANSI_VARS.CURSORX,D -.3972fd 22 29 73 39 jsl $397329 JSL ANSI_LOCATE -.397301 28 plp done PLP -.397302 2b pld PLD -.397303 7a ply PLY -.397304 fa plx PLX -.397305 6b rtl RTL -.397306 ANSI_CSRDOWN -.397306 da phx PHX -.397307 5a phy PHY -.397308 0b phd PHD -.397309 08 php PHP -.39730a c2 30 rep #$30 REP #$30 ; set A&X long -.39730c 22 ba 6d 39 jsl $396dba JSL ANSI_SETDEVICE ; Look at the current output channel and point -.397310 b0 12 bcs $397324 BCS done ; If invalid, just return -.397312 a6 0e ldx $032e LDX #S_ANSI_VARS.CURSORX,D ; Get the current column -.397314 a4 10 ldy $0330 LDY #S_ANSI_VARS.CURSORY,D ; Get the new row -.397316 c8 iny INY -.397317 c4 07 cpy $0327 CPY #S_ANSI_VARS.LINES_VISIBLE,D ; Check to see if we're off screen -.397319 90 05 bcc $397320 BCC noscroll ; No: go ahead and set the position -.39731b 88 dey DEY ; Yes: go back to the last row -.39731c 22 8d 73 39 jsl $39738d JSL ANSI_SCROLLUP ; But scroll the screen up -.397320 22 29 73 39 jsl $397329 noscroll JSL ANSI_LOCATE ; And set the cursor position -.397324 28 plp done PLP -.397325 2b pld PLD -.397326 7a ply PLY -.397327 fa plx PLX -.397328 6b rtl RTL -.397329 ANSI_LOCATE -.397329 da phx PHX -.39732a 5a phy PHY -.39732b 0b phd PHD -.39732c 08 php PHP -.39732d 22 ba 6d 39 jsl $396dba JSL ANSI_SETDEVICE ; Look at the current output channel and point -.397331 b0 55 bcs $397388 BCS done ; If invalid, just return -.397333 c2 30 rep #$30 REP #$30 ; set A&X long -.397335 locate_scroll -.397335 c4 07 cpy $0327 CPY #S_ANSI_VARS.LINES_VISIBLE,D -.397337 90 07 bcc $397340 BCC locate_scrolldone -.397339 22 8d 73 39 jsl $39738d JSL ANSI_SCROLLUP -.39733d 88 dey DEY -.39733e 80 f5 bra $397335 BRA locate_scroll -.397340 locate_scrolldone -.397340 86 0e stx $032e STX #S_ANSI_VARS.CURSORX,D -.397342 84 10 sty $0330 STY #S_ANSI_VARS.CURSORY,D -.397344 a5 00 lda $0320 LDA #S_ANSI_VARS.SCREENBEGIN,D -.397346 locate_row -.397346 c0 00 00 cpy #$0000 CPY #$0 -.397349 f0 08 beq $397353 BEQ locate_right -.39734b 18 clc locate_down CLC -.39734c 65 05 adc $0325 ADC #S_ANSI_VARS.COLS_PER_LINE,D -.39734e 88 dey DEY -.39734f f0 02 beq $397353 BEQ locate_right -.397351 80 f8 bra $39734b BRA locate_down -.397353 18 clc locate_right CLC -.397354 65 0e adc $032e ADC #S_ANSI_VARS.CURSORX,D ; move the cursor right X columns -.397356 85 0b sta $032b STA #S_ANSI_VARS.CURSORPOS,D -.397358 a4 10 ldy $0330 LDY #S_ANSI_VARS.CURSORY,D -.39735a e2 20 sep #$20 SEP #$20 ; set A short -.39735c af 03 07 00 lda $000703 LDA @l CHAN_OUT -.397360 c9 04 cmp #$04 CMP #CHAN_EVID -.397362 f0 0e beq $397372 beq locate_evid -.397364 c2 20 rep #$20 REP #$20 ; set A long -.397366 98 tya TYA -.397367 8f 16 00 af sta $af0016 STA @l VKY_TXT_CURSOR_Y_REG_L -.39736b 8a txa TXA -.39736c 8f 14 00 af sta $af0014 STA @l VKY_TXT_CURSOR_X_REG_L -.397370 80 0c bra $39737e BRA update_colorpos -.397372 locate_evid -.397372 c2 20 rep #$20 REP #$20 ; set A long -.397374 98 tya TYA -.397375 8f 16 1e ae sta $ae1e16 STA @l EVID_TXT_CURSOR_Y_REG_L -.397379 8a txa TXA -.39737a 8f 14 1e ae sta $ae1e14 STA @l EVID_TXT_CURSOR_X_REG_L -.39737e update_colorpos -.39737e c2 20 rep #$20 REP #$20 ; set A long -.397380 18 clc CLC -.397381 a5 0b lda $032b LDA #S_ANSI_VARS.CURSORPOS,D -.397383 69 00 20 adc #$2000 ADC #<>(CS_COLOR_MEM_PTR - CS_TEXT_MEM_PTR) -.397386 85 13 sta $0333 STA #S_ANSI_VARS.COLORPOS,D -.397388 28 plp done PLP -.397389 2b pld PLD -.39738a 7a ply PLY -.39738b fa plx PLX -.39738c 6b rtl RTL -.39738d ANSI_SCROLLUP -.39738d da phx PHX -.39738e 5a phy PHY -.39738f 8b phb PHB -.397390 0b phd PHD -.397391 08 php PHP -.397392 22 ba 6d 39 jsl $396dba JSL ANSI_SETDEVICE ; Look at the current output channel and point -.397396 90 03 bcc $39739b BCC calc_size -.397398 82 81 00 brl $39741c BRL done ; If invalid, just return -.39739b calc_size -.39739b c2 30 rep #$30 REP #$30 ; set A&X long -.39739d a5 05 lda $0325 LDA #S_ANSI_VARS.COLS_PER_LINE,D -.39739f 8f 00 01 00 sta $000100 STA @l UNSIGNED_MULT_A_LO -.3973a3 a5 07 lda $0327 LDA #S_ANSI_VARS.LINES_VISIBLE,D -.3973a5 8f 02 01 00 sta $000102 STA @l UNSIGNED_MULT_B_LO -.3973a9 af 04 01 00 lda $000104 LDA @l UNSIGNED_MULT_AL_LO -.3973ad 85 19 sta $0339 STA #S_ANSI_VARS.TMPPTR1,D -.3973af 18 clc CLC -.3973b0 a5 00 lda $0320 LDA #S_ANSI_VARS.SCREENBEGIN,D -.3973b2 a8 tay TAY -.3973b3 65 05 adc $0325 ADC #S_ANSI_VARS.COLS_PER_LINE,D -.3973b5 aa tax TAX -.3973b6 e2 20 sep #$20 SEP #$20 ; set A short -.3973b8 af 03 07 00 lda $000703 LDA @l CHAN_OUT ; Are we scrolling the EVID -.3973bc c9 04 cmp #$04 CMP #CHAN_EVID -.3973be f0 09 beq $3973c9 BEQ move_text_1 ; Yes: do the move on the EVID memory -.3973c0 move_text_0 -.3973c0 c2 20 rep #$20 REP #$20 ; set A long -.3973c2 a5 19 lda $0339 LDA #S_ANSI_VARS.TMPPTR1,D -.3973c4 54 af af mvn $af,$af MVN `CS_TEXT_MEM_PTR,`CS_TEXT_MEM_PTR ; Move the data on the main screen -.3973c7 80 07 bra $3973d0 BRA scroll_color -.3973c9 move_text_1 -.3973c9 c2 20 rep #$20 REP #$20 ; set A long -.3973cb a5 19 lda $0339 LDA #S_ANSI_VARS.TMPPTR1,D -.3973cd 54 ae ae mvn $ae,$ae MVN `EVID_TEXT_MEM,`EVID_TEXT_MEM ; Move the data on the EVID screen -.3973d0 scroll_color -.3973d0 c2 30 rep #$30 REP #$30 ; set A&X long -.3973d2 18 clc CLC -.3973d3 a5 16 lda $0336 LDA #S_ANSI_VARS.COLORBEGIN,D -.3973d5 a8 tay TAY -.3973d6 65 05 adc $0325 ADC #S_ANSI_VARS.COLS_PER_LINE,D -.3973d8 aa tax TAX -.3973d9 e2 20 sep #$20 SEP #$20 ; set A short -.3973db af 03 07 00 lda $000703 LDA @l CHAN_OUT ; Are we scrolling the EVID? -.3973df c9 04 cmp #$04 CMP #CHAN_EVID -.3973e1 f0 09 beq $3973ec BEQ move_color_1 ; Yes: scroll the EVID color matrix -.3973e3 move_color_0 -.3973e3 c2 20 rep #$20 REP #$20 ; set A long -.3973e5 a5 19 lda $0339 LDA #S_ANSI_VARS.TMPPTR1,D -.3973e7 54 af af mvn $af,$af MVN `CS_COLOR_MEM_PTR,`CS_COLOR_MEM_PTR ; Move the data on the main screen -.3973ea 80 07 bra $3973f3 BRA vicky_lastline -.3973ec move_color_1 -.3973ec c2 20 rep #$20 REP #$20 ; set A long -.3973ee a5 19 lda $0339 LDA #S_ANSI_VARS.TMPPTR1,D -.3973f0 54 ae ae mvn $ae,$ae MVN `EVID_COLOR_MEM,`EVID_COLOR_MEM ; Move the data on the EVID screen -.3973f3 vicky_lastline -.3973f3 c2 20 rep #$20 REP #$20 ; set A long -.3973f5 a5 19 lda $0339 LDA #S_ANSI_VARS.TMPPTR1,D -.3973f7 48 pha PHA -.3973f8 18 clc CLC -.3973f9 65 00 adc $0320 ADC #S_ANSI_VARS.SCREENBEGIN,D -.3973fb 85 19 sta $0339 STA #S_ANSI_VARS.TMPPTR1,D -.3973fd a0 00 00 ldy #$0000 start_clear LDY #0 -.397400 a9 20 00 lda #$0020 LDA #' ' -.397403 97 19 sta [$0339],y clr_text STA [#S_ANSI_VARS.TMPPTR1,D],Y -.397405 c8 iny INY -.397406 c4 0f cpy $032f CPY #COLS_VISIBLE,D -.397408 d0 f9 bne $397403 BNE clr_text -.39740a 68 pla vicky_lastcolor PLA -.39740b 18 clc CLC -.39740c 65 16 adc $0336 ADC #S_ANSI_VARS.COLORBEGIN,D -.39740e 85 19 sta $0339 STA #S_ANSI_VARS.TMPPTR1,D -.397410 a0 00 00 ldy #$0000 start_color LDY #0 -.397413 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D -.397415 97 19 sta [$0339],y clr_color STA [#S_ANSI_VARS.TMPPTR1,D],Y -.397417 c8 iny INY -.397418 c4 05 cpy $0325 CPY #S_ANSI_VARS.COLS_PER_LINE,D -.39741a d0 f9 bne $397415 BNE clr_color -.39741c 28 plp done PLP -.39741d 2b pld PLD -.39741e ab plb PLB -.39741f 7a ply PLY -.397420 fa plx PLX -.397421 6b rtl RTL -.397422 ANSI_CLRSCREEN -.397422 da phx PHX -.397423 5a phy PHY -.397424 0b phd PHD -.397425 08 php PHP -.397426 22 ba 6d 39 jsl $396dba JSL ANSI_SETDEVICE ; Look at the current output channel and point -.39742a b0 1e bcs $39744a BCS done ; If invalid, just return -.39742c e2 20 sep #$20 SEP #$20 ; set A short -.39742e c2 10 rep #$10 REP #$10 ; set X long -.397430 a0 00 00 ldy #$0000 LDY #0 -.397433 a9 20 lda #$20 LDA #$20 ; Fill the Entire Screen with Space -.397435 97 00 sta [$0320],y iclearloop0 STA [#S_ANSI_VARS.SCREENBEGIN,D],Y -.397437 c8 iny INY -.397438 c0 00 20 cpy #$2000 CPY #$2000 -.39743b d0 f8 bne $397435 BNE iclearloop0 -.39743d a0 00 00 ldy #$0000 LDY #0 -.397440 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D ; Fill the current color -.397442 97 16 sta [$0336],y evid_clearloop1 STA [#S_ANSI_VARS.COLORBEGIN,D],Y -.397444 c8 iny INY -.397445 c0 00 20 cpy #$2000 CPY #$2000 -.397448 d0 f8 bne $397442 BNE evid_clearloop1 -.39744a 28 plp done PLP -.39744b 2b pld PLD -.39744c 7a ply PLY -.39744d fa plx PLX -.39744e 6b rtl RTL +.397090 a9 70 lda #$70 LDA #ANSI_DEF_COLOR +.397092 29 f0 and #$f0 AND #$F0 +.397094 05 12 ora $0332 ORA #S_ANSI_VARS.CURCOLOR,D +.397096 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D +.397098 80 58 bra $3970f2 BRA done +.39709a c9 31 cmp #$31 chk_49 CMP #49 +.39709c d0 10 bne $3970ae BNE chk_foreground +.39709e a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D +.3970a0 29 f0 and #$f0 AND #$F0 +.3970a2 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D +.3970a4 a9 70 lda #$70 LDA #ANSI_DEF_COLOR +.3970a6 29 0f and #$0f AND #$0F +.3970a8 05 12 ora $0332 ORA #S_ANSI_VARS.CURCOLOR,D +.3970aa 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D +.3970ac 80 44 bra $3970f2 BRA done +.3970ae c9 1e cmp #$1e chk_foreground CMP #30 ; If [30..37], set the foreground color +.3970b0 90 29 bcc $3970db BLT chk_background +.3970b2 c9 26 cmp #$26 CMP #38 +.3970b4 b0 25 bcs $3970db BGE chk_background +.3970b6 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D +.3970b8 29 0f and #$0f AND #$0F +.3970ba 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D +.3970bc a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D +.3970be 38 sec SEC +.3970bf e9 1e sbc #$1e SBC #30 +.3970c1 0a asl a ASL A +.3970c2 0a asl a ASL A +.3970c3 0a asl a ASL A +.3970c4 0a asl a ASL A +.3970c5 05 12 ora $0332 ORA #S_ANSI_VARS.CURCOLOR,D +.3970c7 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D +.3970c9 a5 1f lda $033f LDA #S_ANSI_VARS.CONTROL,D ; Should the color be bold? +.3970cb 89 40 bit #$40 BIT #CONTROL_BOLD +.3970cd d0 03 bne $3970d2 BNE bold_fore ; No: we're done +.3970cf 82 20 00 brl $3970f2 BRL done +.3970d2 a5 12 lda $0332 bold_fore LDA #S_ANSI_VARS.CURCOLOR,D ; Yes: make the foreground bold +.3970d4 09 80 ora #$80 ORA #$80 +.3970d6 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D +.3970d8 82 17 00 brl $3970f2 BRL done +.3970db c9 28 cmp #$28 chk_background CMP #40 ; If [40..47], set the background color +.3970dd 90 13 bcc $3970f2 BLT done +.3970df c9 30 cmp #$30 CMP #48 +.3970e1 b0 0f bcs $3970f2 BGE done +.3970e3 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D +.3970e5 29 f0 and #$f0 AND #$F0 +.3970e7 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D +.3970e9 a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D +.3970eb 38 sec SEC +.3970ec e9 28 sbc #$28 SBC #40 +.3970ee 05 12 ora $0332 ORA #S_ANSI_VARS.CURCOLOR,D +.3970f0 85 12 sta $0332 STA #S_ANSI_VARS.CURCOLOR,D +.3970f2 28 plp done PLP +.3970f3 60 rts RTS +.3970f4 ANSI_ED +.3970f4 5a phy PHY +.3970f5 08 php PHP +.3970f6 e2 20 sep #$20 SEP #$20 ; set A short +.3970f8 c2 10 rep #$10 REP #$10 ; set X long +.3970fa a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Get the first argument +.3970fc d0 1b bne $397119 BNE not_0 ; Is the code 0? +.3970fe code_0 +.3970fe c2 20 rep #$20 REP #$20 ; set A long +.397100 38 sec SEC ; Calculate min index to erase +.397101 a5 0b lda $032b LDA #S_ANSI_VARS.CURSORPOS,D +.397103 e5 00 sbc $0320 SBC #S_ANSI_VARS.SCREENBEGIN,D +.397105 a8 tay TAY +.397106 e2 20 sep #$20 SEP #$20 ; set A short +.397108 a9 20 lda #$20 code_2_loop LDA #' ' +.39710a 97 00 sta [$0320],y STA [#S_ANSI_VARS.SCREENBEGIN,D],Y ; Clear the text cell +.39710c a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D +.39710e 97 16 sta [$0336],y STA [#S_ANSI_VARS.COLORBEGIN,D],Y ; And set the default color +.397110 c8 iny INY +.397111 c0 00 20 cpy #$2000 CPY #$2000 +.397114 d0 f2 bne $397108 BNE code_2_loop +.397116 82 35 00 brl $39714e BRL done +.397119 c9 01 cmp #$01 not_0 CMP #1 ; Is the code 1? +.39711b d0 18 bne $397135 BNE not_1 +.39711d code_1 +.39711d c2 20 rep #$20 REP #$20 ; set A long +.39711f 38 sec SEC ; Calculate max index to erase +.397120 a5 0b lda $032b LDA #S_ANSI_VARS.CURSORPOS,D +.397122 e5 00 sbc $0320 SBC #S_ANSI_VARS.SCREENBEGIN,D +.397124 a8 tay TAY +.397125 e2 20 sep #$20 SEP #$20 ; set A short +.397127 a9 20 lda #$20 code_1_loop LDA #' ' +.397129 97 00 sta [$0320],y STA [#S_ANSI_VARS.SCREENBEGIN,D],Y ; Clear the text cell +.39712b a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D +.39712d 97 16 sta [$0336],y STA [#S_ANSI_VARS.COLORBEGIN,D],Y ; And set the default color +.39712f 88 dey DEY ; Move to the previous index +.397130 10 f5 bpl $397127 BPL code_1_loop ; And loop until we're done +.397132 82 19 00 brl $39714e BRL done +.397135 c9 02 cmp #$02 not_1 CMP #2 ; Is the code 2 or 3? +.397137 f0 04 beq $39713d BEQ cls_all +.397139 c9 03 cmp #$03 CMP #3 +.39713b d0 11 bne $39714e BNE done ; No: just ignore the sequence +.39713d a0 00 00 ldy #$0000 cls_all LDY #0 ; Start with the cursor's position +.397140 a9 20 lda #$20 cls_all_loop LDA #' ' +.397142 97 00 sta [$0320],y STA [#S_ANSI_VARS.SCREENBEGIN,D],Y ; Clear the text cell +.397144 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D +.397146 97 16 sta [$0336],y STA [#S_ANSI_VARS.COLORBEGIN,D],Y ; And set the default color +.397148 c8 iny INY ; Go to the next position +.397149 c0 00 20 cpy #$2000 CPY #$2000 ; Have we reached the end? +.39714c d0 f2 bne $397140 BNE cls_all_loop ; No: keep going +.39714e 28 plp done PLP +.39714f 7a ply PLY +.397150 60 rts RTS +.397151 ANSI_EL +.397151 da phx PHX +.397152 5a phy PHY +.397153 08 php PHP +.397154 c2 30 rep #$30 REP #$30 ; set A&X long +.397156 38 sec SEC +.397157 a5 0b lda $032b LDA #S_ANSI_VARS.CURSORPOS,D ; Compute the address of the first character of the line +.397159 e5 0e sbc $032e SBC #S_ANSI_VARS.CURSORX,D +.39715b 85 19 sta $0339 STA #S_ANSI_VARS.TMPPTR1,D +.39715d e2 20 sep #$20 SEP #$20 ; set A short +.39715f a5 02 lda $0322 LDA #S_ANSI_VARS.SCREENBEGIN+2,D ; Get the bank of the screen +.397161 85 1b sta $033b STA #S_ANSI_VARS.TMPPTR1+2,D ; And put it in the TMPPTR1 +.397163 a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Get the first argument +.397165 d0 0e bne $397175 BNE not_0 ; Is the code 0? +.397167 code_0 +.397167 a9 20 lda #$20 LDA #' ' +.397169 a4 0e ldy $032e LDY #S_ANSI_VARS.CURSORX,D ; Start at the cursor position +.39716b 97 19 sta [$0339],y code_0_loop STA [#S_ANSI_VARS.TMPPTR1,D],Y ; Clear the text cell +.39716d c8 iny INY +.39716e c4 05 cpy $0325 CPY #S_ANSI_VARS.COLS_PER_LINE,D ; Have we reached the end of the line? +.397170 d0 f9 bne $39716b BNE code_0_loop ; No: keep looping +.397172 82 29 00 brl $39719e BRL done +.397175 c9 01 cmp #$01 not_0 CMP #1 ; Is the code 1? +.397177 d0 11 bne $39718a BNE not_1 +.397179 code_1 +.397179 a9 20 lda #$20 LDA #' ' +.39717b a0 00 00 ldy #$0000 LDY #0 +.39717e 97 19 sta [$0339],y code_1_loop STA [#S_ANSI_VARS.TMPPTR1,D],Y ; Clear the text cell +.397180 c8 iny INY +.397181 c4 0e cpy $032e CPY #S_ANSI_VARS.CURSORX,D ; Have we reached the cursor? +.397183 d0 f9 bne $39717e BNE code_1_loop ; No: keep looping +.397185 97 19 sta [$0339],y STA [#S_ANSI_VARS.TMPPTR1,D],Y ; And clear under the cursor +.397187 82 14 00 brl $39719e BRL done +.39718a c9 02 cmp #$02 not_1 CMP #2 ; Is the code 2 or 3? +.39718c f0 04 beq $397192 BEQ code_2_3 +.39718e c9 03 cmp #$03 CMP #3 +.397190 d0 0c bne $39719e BNE done ; No: just ignore the sequence +.397192 code_2_3 +.397192 a9 20 lda #$20 LDA #' ' +.397194 a0 00 00 ldy #$0000 LDY #0 +.397197 97 19 sta [$0339],y code_2_3_loop STA [#S_ANSI_VARS.TMPPTR1,D],Y ; Clear the text cell +.397199 c8 iny INY +.39719a c4 05 cpy $0325 CPY #S_ANSI_VARS.COLS_PER_LINE,D ; Have we reached the end of the line? +.39719c d0 f9 bne $397197 BNE code_2_3_loop ; No: keep looping +.39719e 28 plp done PLP +.39719f 7a ply PLY +.3971a0 fa plx PLX +.3971a1 60 rts RTS +.3971a2 ANSI_ICH +.3971a2 5a phy PHY +.3971a3 08 php PHP +.3971a4 e2 30 sep #$30 SEP #$30 ; set A&X short +.3971a6 a5 20 lda $0340 LDA #S_ANSI_VARS.ARGC,D ; Check how many arguments were passed +.3971a8 f0 04 beq $3971ae BEQ default_1 ; If 0, default to 1 +.3971aa a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Check the argument +.3971ac d0 04 bne $3971b2 BNE calc_src_dest ; If not 0, start calculating the indexes +.3971ae a9 01 lda #$01 default_1 LDA #1 ; Default the insert count to 1 +.3971b0 85 21 sta $0341 STA #S_ANSI_VARS.ARG0,D +.3971b2 38 sec calc_src_dest SEC +.3971b3 a5 03 lda $0323 LDA #S_ANSI_VARS.COLS_VISIBLE,D ; TMPPTR1 := COLS_VISIBLE - CURSORX (destination index) +.3971b5 e5 0e sbc $032e SBC #S_ANSI_VARS.CURSORX,D +.3971b7 85 19 sta $0339 STA #S_ANSI_VARS.TMPPTR1,D +.3971b9 38 sec SEC +.3971ba e5 21 sbc $0341 SBC #S_ANSI_VARS.ARG0,D ; TMPPTR1+1 := TMPPTR1 - n (source index) +.3971bc 85 1a sta $033a STA #S_ANSI_VARS.TMPPTR1+1,D +.3971be a4 1a ldy $033a insert_loop LDY #S_ANSI_VARS.TMPPTR1+1,D ; text[dest] := text[source] +.3971c0 b7 0b lda [$032b],y LDA [#S_ANSI_VARS.CURSORPOS,D],Y +.3971c2 a4 19 ldy $0339 LDY #S_ANSI_VARS.TMPPTR1,D +.3971c4 97 0b sta [$032b],y STA [#S_ANSI_VARS.CURSORPOS,D],Y +.3971c6 a4 1a ldy $033a LDY #S_ANSI_VARS.TMPPTR1+1,D ; color[dest] := color[source] +.3971c8 b7 13 lda [$0333],y LDA [#S_ANSI_VARS.COLORPOS,D],Y +.3971ca a4 19 ldy $0339 LDY #S_ANSI_VARS.TMPPTR1,D +.3971cc 97 13 sta [$0333],y STA [#S_ANSI_VARS.COLORPOS,D],Y +.3971ce c6 19 dec $0339 DEC #S_ANSI_VARS.TMPPTR1,D ; Move to the previous position +.3971d0 c6 1a dec $033a DEC #S_ANSI_VARS.TMPPTR1+1,D +.3971d2 10 ea bpl $3971be BPL insert_loop ; Keep looping until we reach the end +.3971d4 a0 00 ldy #$00 LDY #0 +.3971d6 a9 20 lda #$20 fill_loop LDA #CHAR_SP ; Replace the character with a space +.3971d8 97 0b sta [$032b],y STA [#S_ANSI_VARS.CURSORPOS,D],Y +.3971da a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D +.3971dc 97 13 sta [$0333],y STA [#S_ANSI_VARS.COLORPOS,D],Y ; In the default color +.3971de c8 iny INY ; Move to the next byte +.3971df c4 21 cpy $0341 CPY #S_ANSI_VARS.ARG0,D ; Until we reach the end +.3971e1 d0 f3 bne $3971d6 BNE fill_loop +.3971e3 28 plp PLP +.3971e4 7a ply PLY +.3971e5 60 rts RTS +.3971e6 ANSI_DCH +.3971e6 5a phy PHY +.3971e7 08 php PHP +.3971e8 e2 30 sep #$30 SEP #$30 ; set A&X short +.3971ea a5 20 lda $0340 LDA #S_ANSI_VARS.ARGC,D ; Check how many arguments were passed +.3971ec f0 04 beq $3971f2 BEQ default_1 ; If 0, default to 1 +.3971ee a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D ; Check the argument +.3971f0 d0 04 bne $3971f6 BNE calc_src_dest ; If not 0, start calculating the indexes +.3971f2 a9 01 lda #$01 default_1 LDA #1 ; Default the insert count to 1 +.3971f4 85 21 sta $0341 STA #S_ANSI_VARS.ARG0,D +.3971f6 a9 00 lda #$00 calc_src_dest LDA #0 +.3971f8 85 1a sta $033a STA #S_ANSI_VARS.TMPPTR1+1,D ; TMPPTR+1 := 0 (destination) +.3971fa a5 21 lda $0341 LDA #S_ANSI_VARS.ARG0,D +.3971fc 85 19 sta $0339 STA #S_ANSI_VARS.TMPPTR1,D ; TMPPTR+1 := n (source) +.3971fe 38 sec SEC ; Calculate end offset +.3971ff a5 03 lda $0323 LDA #S_ANSI_VARS.COLS_VISIBLE,D +.397201 e5 0e sbc $032e SBC #S_ANSI_VARS.CURSORX,D +.397203 85 22 sta $0342 STA #S_ANSI_VARS.ARG1,D +.397205 a4 19 ldy $0339 del_loop LDY #S_ANSI_VARS.TMPPTR1,D ; text[dest] := text[source] +.397207 b7 0b lda [$032b],y LDA [#S_ANSI_VARS.CURSORPOS,D],Y +.397209 a4 1a ldy $033a LDY #S_ANSI_VARS.TMPPTR1+1,D +.39720b 97 0b sta [$032b],y STA [#S_ANSI_VARS.CURSORPOS,D],Y +.39720d a4 19 ldy $0339 LDY #S_ANSI_VARS.TMPPTR1,D ; color[dest] := color[source] +.39720f b7 13 lda [$0333],y LDA [#S_ANSI_VARS.COLORPOS,D],Y +.397211 a4 1a ldy $033a LDY #S_ANSI_VARS.TMPPTR1+1,D +.397213 97 13 sta [$0333],y STA [#S_ANSI_VARS.COLORPOS,D],Y +.397215 e6 19 inc $0339 INC #S_ANSI_VARS.TMPPTR1,D ; Move to the next position +.397217 e6 1a inc $033a INC #S_ANSI_VARS.TMPPTR1+1,D +.397219 a5 19 lda $0339 LDA #S_ANSI_VARS.TMPPTR1,D +.39721b c5 22 cmp $0342 CMP #S_ANSI_VARS.ARG1,D +.39721d 90 e6 bcc $397205 BLT del_loop ; Keep looping until we reach the end +.39721f 38 sec SEC ; Calculate the starting point to fill with blanks +.397220 a5 1a lda $033a LDA #S_ANSI_VARS.TMPPTR1+1,D +.397222 e5 21 sbc $0341 SBC #S_ANSI_VARS.ARG0,D +.397224 a8 tay TAY +.397225 a9 20 lda #$20 fill_loop LDA #CHAR_SP ; Replace the character with a space +.397227 97 0b sta [$032b],y STA [#S_ANSI_VARS.CURSORPOS,D],Y +.397229 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D +.39722b 97 13 sta [$0333],y STA [#S_ANSI_VARS.COLORPOS,D],Y ; In the default color +.39722d c8 iny INY ; Move to the next byte +.39722e c4 22 cpy $0342 CPY #S_ANSI_VARS.ARG1,D ; Until we reach the end +.397230 90 f3 bcc $397225 BLT fill_loop +.397232 28 plp PLP +.397233 7a ply PLY +.397234 60 rts RTS +.397235 ANSI_CSRRIGHT +.397235 da phx PHX +.397236 5a phy PHY +.397237 0b phd PHD +.397238 08 php PHP +.397239 c2 30 rep #$30 REP #$30 ; set A&X long +.39723b 22 50 6d 39 jsl $396d50 JSL ANSI_SETDEVICE ; Look at the current output channel and point +.39723f b0 1a bcs $39725b BCS done ; If invalid, just return +.397241 a6 0e ldx $032e LDX #S_ANSI_VARS.CURSORX,D ; Get the new column +.397243 e8 inx INX +.397244 a4 10 ldy $0330 LDY #S_ANSI_VARS.CURSORY,D ; Get the current row +.397246 e4 03 cpx $0323 CPX #S_ANSI_VARS.COLS_VISIBLE,D ; Are we off screen? +.397248 90 0d bcc $397257 BCC nowrap ; No: just set the position +.39724a a2 00 00 ldx #$0000 LDX #0 ; Yes: move to the first column +.39724d c8 iny INY ; And move to the next row +.39724e c4 07 cpy $0327 CPY #S_ANSI_VARS.LINES_VISIBLE,D ; Are we still off screen? +.397250 90 05 bcc $397257 BCC nowrap ; No: just set the position +.397252 88 dey DEY ; Yes: lock to the last row +.397253 22 23 73 39 jsl $397323 JSL ANSI_SCROLLUP ; But scroll the screen up +.397257 22 bf 72 39 jsl $3972bf nowrap JSL ANSI_LOCATE ; Set the cursor position +.39725b 28 plp done PLP +.39725c 2b pld PLD +.39725d 7a ply PLY +.39725e fa plx PLX +.39725f 6b rtl RTL +.397260 ANSI_CSRLEFT +.397260 da phx PHX +.397261 5a phy PHY +.397262 0b phd PHD +.397263 08 php PHP +.397264 c2 30 rep #$30 REP #$30 ; set A&X long +.397266 22 50 6d 39 jsl $396d50 JSL ANSI_SETDEVICE ; Look at the current output channel and point +.39726a b0 0d bcs $397279 BCS done ; If invalid, just return +.39726c a6 0e ldx $032e LDX #S_ANSI_VARS.CURSORX,D ; Check that we are not already @ Zero +.39726e f0 09 beq $397279 BEQ done ; If so, just ignore this call +.397270 ca dex DEX +.397271 86 0e stx $032e STX #S_ANSI_VARS.CURSORX,D +.397273 a4 10 ldy $0330 LDY #S_ANSI_VARS.CURSORY,D +.397275 22 bf 72 39 jsl $3972bf JSL ANSI_LOCATE +.397279 28 plp done PLP +.39727a 2b pld PLD +.39727b 7a ply PLY +.39727c fa plx PLX +.39727d 6b rtl RTL +.39727e ANSI_CSRUP +.39727e da phx PHX +.39727f 5a phy PHY +.397280 0b phd PHD +.397281 08 php PHP +.397282 c2 30 rep #$30 REP #$30 ; set A&X long +.397284 22 50 6d 39 jsl $396d50 JSL ANSI_SETDEVICE ; Look at the current output channel and point +.397288 b0 0d bcs $397297 BCS done ; If invalid, just return +.39728a a4 10 ldy $0330 LDY #S_ANSI_VARS.CURSORY,D ; Check if we are not already @ Zero +.39728c f0 09 beq $397297 BEQ done ; If we are, just ignore the call +.39728e 88 dey DEY +.39728f 84 10 sty $0330 STY #S_ANSI_VARS.CURSORY,D +.397291 a6 0e ldx $032e LDX #S_ANSI_VARS.CURSORX,D +.397293 22 bf 72 39 jsl $3972bf JSL ANSI_LOCATE +.397297 28 plp done PLP +.397298 2b pld PLD +.397299 7a ply PLY +.39729a fa plx PLX +.39729b 6b rtl RTL +.39729c ANSI_CSRDOWN +.39729c da phx PHX +.39729d 5a phy PHY +.39729e 0b phd PHD +.39729f 08 php PHP +.3972a0 c2 30 rep #$30 REP #$30 ; set A&X long +.3972a2 22 50 6d 39 jsl $396d50 JSL ANSI_SETDEVICE ; Look at the current output channel and point +.3972a6 b0 12 bcs $3972ba BCS done ; If invalid, just return +.3972a8 a6 0e ldx $032e LDX #S_ANSI_VARS.CURSORX,D ; Get the current column +.3972aa a4 10 ldy $0330 LDY #S_ANSI_VARS.CURSORY,D ; Get the new row +.3972ac c8 iny INY +.3972ad c4 07 cpy $0327 CPY #S_ANSI_VARS.LINES_VISIBLE,D ; Check to see if we're off screen +.3972af 90 05 bcc $3972b6 BCC noscroll ; No: go ahead and set the position +.3972b1 88 dey DEY ; Yes: go back to the last row +.3972b2 22 23 73 39 jsl $397323 JSL ANSI_SCROLLUP ; But scroll the screen up +.3972b6 22 bf 72 39 jsl $3972bf noscroll JSL ANSI_LOCATE ; And set the cursor position +.3972ba 28 plp done PLP +.3972bb 2b pld PLD +.3972bc 7a ply PLY +.3972bd fa plx PLX +.3972be 6b rtl RTL +.3972bf ANSI_LOCATE +.3972bf da phx PHX +.3972c0 5a phy PHY +.3972c1 0b phd PHD +.3972c2 08 php PHP +.3972c3 22 50 6d 39 jsl $396d50 JSL ANSI_SETDEVICE ; Look at the current output channel and point +.3972c7 b0 55 bcs $39731e BCS done ; If invalid, just return +.3972c9 c2 30 rep #$30 REP #$30 ; set A&X long +.3972cb locate_scroll +.3972cb c4 07 cpy $0327 CPY #S_ANSI_VARS.LINES_VISIBLE,D +.3972cd 90 07 bcc $3972d6 BCC locate_scrolldone +.3972cf 22 23 73 39 jsl $397323 JSL ANSI_SCROLLUP +.3972d3 88 dey DEY +.3972d4 80 f5 bra $3972cb BRA locate_scroll +.3972d6 locate_scrolldone +.3972d6 86 0e stx $032e STX #S_ANSI_VARS.CURSORX,D +.3972d8 84 10 sty $0330 STY #S_ANSI_VARS.CURSORY,D +.3972da a5 00 lda $0320 LDA #S_ANSI_VARS.SCREENBEGIN,D +.3972dc locate_row +.3972dc c0 00 00 cpy #$0000 CPY #$0 +.3972df f0 08 beq $3972e9 BEQ locate_right +.3972e1 18 clc locate_down CLC +.3972e2 65 05 adc $0325 ADC #S_ANSI_VARS.COLS_PER_LINE,D +.3972e4 88 dey DEY +.3972e5 f0 02 beq $3972e9 BEQ locate_right +.3972e7 80 f8 bra $3972e1 BRA locate_down +.3972e9 18 clc locate_right CLC +.3972ea 65 0e adc $032e ADC #S_ANSI_VARS.CURSORX,D ; move the cursor right X columns +.3972ec 85 0b sta $032b STA #S_ANSI_VARS.CURSORPOS,D +.3972ee a4 10 ldy $0330 LDY #S_ANSI_VARS.CURSORY,D +.3972f0 e2 20 sep #$20 SEP #$20 ; set A short +.3972f2 af 03 07 00 lda $000703 LDA @l CHAN_OUT +.3972f6 c9 04 cmp #$04 CMP #CHAN_EVID +.3972f8 f0 0e beq $397308 beq locate_evid +.3972fa c2 20 rep #$20 REP #$20 ; set A long +.3972fc 98 tya TYA +.3972fd 8f 16 00 af sta $af0016 STA @l VKY_TXT_CURSOR_Y_REG_L +.397301 8a txa TXA +.397302 8f 14 00 af sta $af0014 STA @l VKY_TXT_CURSOR_X_REG_L +.397306 80 0c bra $397314 BRA update_colorpos +.397308 locate_evid +.397308 c2 20 rep #$20 REP #$20 ; set A long +.39730a 98 tya TYA +.39730b 8f 16 1e ae sta $ae1e16 STA @l EVID_TXT_CURSOR_Y_REG_L +.39730f 8a txa TXA +.397310 8f 14 1e ae sta $ae1e14 STA @l EVID_TXT_CURSOR_X_REG_L +.397314 update_colorpos +.397314 c2 20 rep #$20 REP #$20 ; set A long +.397316 18 clc CLC +.397317 a5 0b lda $032b LDA #S_ANSI_VARS.CURSORPOS,D +.397319 69 00 20 adc #$2000 ADC #<>(CS_COLOR_MEM_PTR - CS_TEXT_MEM_PTR) +.39731c 85 13 sta $0333 STA #S_ANSI_VARS.COLORPOS,D +.39731e 28 plp done PLP +.39731f 2b pld PLD +.397320 7a ply PLY +.397321 fa plx PLX +.397322 6b rtl RTL +.397323 ANSI_SCROLLUP +.397323 da phx PHX +.397324 5a phy PHY +.397325 8b phb PHB +.397326 0b phd PHD +.397327 08 php PHP +.397328 22 50 6d 39 jsl $396d50 JSL ANSI_SETDEVICE ; Look at the current output channel and point +.39732c 90 03 bcc $397331 BCC calc_size +.39732e 82 81 00 brl $3973b2 BRL done ; If invalid, just return +.397331 calc_size +.397331 c2 30 rep #$30 REP #$30 ; set A&X long +.397333 a5 05 lda $0325 LDA #S_ANSI_VARS.COLS_PER_LINE,D +.397335 8f 00 01 00 sta $000100 STA @l UNSIGNED_MULT_A_LO +.397339 a5 07 lda $0327 LDA #S_ANSI_VARS.LINES_VISIBLE,D +.39733b 8f 02 01 00 sta $000102 STA @l UNSIGNED_MULT_B_LO +.39733f af 04 01 00 lda $000104 LDA @l UNSIGNED_MULT_AL_LO +.397343 85 19 sta $0339 STA #S_ANSI_VARS.TMPPTR1,D +.397345 18 clc CLC +.397346 a5 00 lda $0320 LDA #S_ANSI_VARS.SCREENBEGIN,D +.397348 a8 tay TAY +.397349 65 05 adc $0325 ADC #S_ANSI_VARS.COLS_PER_LINE,D +.39734b aa tax TAX +.39734c e2 20 sep #$20 SEP #$20 ; set A short +.39734e af 03 07 00 lda $000703 LDA @l CHAN_OUT ; Are we scrolling the EVID +.397352 c9 04 cmp #$04 CMP #CHAN_EVID +.397354 f0 09 beq $39735f BEQ move_text_1 ; Yes: do the move on the EVID memory +.397356 move_text_0 +.397356 c2 20 rep #$20 REP #$20 ; set A long +.397358 a5 19 lda $0339 LDA #S_ANSI_VARS.TMPPTR1,D +.39735a 54 af af mvn $af,$af MVN `CS_TEXT_MEM_PTR,`CS_TEXT_MEM_PTR ; Move the data on the main screen +.39735d 80 07 bra $397366 BRA scroll_color +.39735f move_text_1 +.39735f c2 20 rep #$20 REP #$20 ; set A long +.397361 a5 19 lda $0339 LDA #S_ANSI_VARS.TMPPTR1,D +.397363 54 ae ae mvn $ae,$ae MVN `EVID_TEXT_MEM,`EVID_TEXT_MEM ; Move the data on the EVID screen +.397366 scroll_color +.397366 c2 30 rep #$30 REP #$30 ; set A&X long +.397368 18 clc CLC +.397369 a5 16 lda $0336 LDA #S_ANSI_VARS.COLORBEGIN,D +.39736b a8 tay TAY +.39736c 65 05 adc $0325 ADC #S_ANSI_VARS.COLS_PER_LINE,D +.39736e aa tax TAX +.39736f e2 20 sep #$20 SEP #$20 ; set A short +.397371 af 03 07 00 lda $000703 LDA @l CHAN_OUT ; Are we scrolling the EVID? +.397375 c9 04 cmp #$04 CMP #CHAN_EVID +.397377 f0 09 beq $397382 BEQ move_color_1 ; Yes: scroll the EVID color matrix +.397379 move_color_0 +.397379 c2 20 rep #$20 REP #$20 ; set A long +.39737b a5 19 lda $0339 LDA #S_ANSI_VARS.TMPPTR1,D +.39737d 54 af af mvn $af,$af MVN `CS_COLOR_MEM_PTR,`CS_COLOR_MEM_PTR ; Move the data on the main screen +.397380 80 07 bra $397389 BRA vicky_lastline +.397382 move_color_1 +.397382 c2 20 rep #$20 REP #$20 ; set A long +.397384 a5 19 lda $0339 LDA #S_ANSI_VARS.TMPPTR1,D +.397386 54 ae ae mvn $ae,$ae MVN `EVID_COLOR_MEM,`EVID_COLOR_MEM ; Move the data on the EVID screen +.397389 vicky_lastline +.397389 c2 20 rep #$20 REP #$20 ; set A long +.39738b a5 19 lda $0339 LDA #S_ANSI_VARS.TMPPTR1,D +.39738d 48 pha PHA +.39738e 18 clc CLC +.39738f 65 00 adc $0320 ADC #S_ANSI_VARS.SCREENBEGIN,D +.397391 85 19 sta $0339 STA #S_ANSI_VARS.TMPPTR1,D +.397393 a0 00 00 ldy #$0000 start_clear LDY #0 +.397396 a9 20 00 lda #$0020 LDA #' ' +.397399 97 19 sta [$0339],y clr_text STA [#S_ANSI_VARS.TMPPTR1,D],Y +.39739b c8 iny INY +.39739c c4 0f cpy $032f CPY #COLS_VISIBLE,D +.39739e d0 f9 bne $397399 BNE clr_text +.3973a0 68 pla vicky_lastcolor PLA +.3973a1 18 clc CLC +.3973a2 65 16 adc $0336 ADC #S_ANSI_VARS.COLORBEGIN,D +.3973a4 85 19 sta $0339 STA #S_ANSI_VARS.TMPPTR1,D +.3973a6 a0 00 00 ldy #$0000 start_color LDY #0 +.3973a9 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D +.3973ab 97 19 sta [$0339],y clr_color STA [#S_ANSI_VARS.TMPPTR1,D],Y +.3973ad c8 iny INY +.3973ae c4 05 cpy $0325 CPY #S_ANSI_VARS.COLS_PER_LINE,D +.3973b0 d0 f9 bne $3973ab BNE clr_color +.3973b2 28 plp done PLP +.3973b3 2b pld PLD +.3973b4 ab plb PLB +.3973b5 7a ply PLY +.3973b6 fa plx PLX +.3973b7 6b rtl RTL +.3973b8 ANSI_CLRSCREEN +.3973b8 da phx PHX +.3973b9 5a phy PHY +.3973ba 0b phd PHD +.3973bb 08 php PHP +.3973bc 22 50 6d 39 jsl $396d50 JSL ANSI_SETDEVICE ; Look at the current output channel and point +.3973c0 b0 1e bcs $3973e0 BCS done ; If invalid, just return +.3973c2 e2 20 sep #$20 SEP #$20 ; set A short +.3973c4 c2 10 rep #$10 REP #$10 ; set X long +.3973c6 a0 00 00 ldy #$0000 LDY #0 +.3973c9 a9 20 lda #$20 LDA #$20 ; Fill the Entire Screen with Space +.3973cb 97 00 sta [$0320],y iclearloop0 STA [#S_ANSI_VARS.SCREENBEGIN,D],Y +.3973cd c8 iny INY +.3973ce c0 00 20 cpy #$2000 CPY #$2000 +.3973d1 d0 f8 bne $3973cb BNE iclearloop0 +.3973d3 a0 00 00 ldy #$0000 LDY #0 +.3973d6 a5 12 lda $0332 LDA #S_ANSI_VARS.CURCOLOR,D ; Fill the current color +.3973d8 97 16 sta [$0336],y evid_clearloop1 STA [#S_ANSI_VARS.COLORBEGIN,D],Y +.3973da c8 iny INY +.3973db c0 00 20 cpy #$2000 CPY #$2000 +.3973de d0 f8 bne $3973d8 BNE evid_clearloop1 +.3973e0 28 plp done PLP +.3973e1 2b pld PLD +.3973e2 7a ply PLY +.3973e3 fa plx PLX +.3973e4 6b rtl RTL ;****** Return to file: src\kernel.asm -;****** Processing file: src\drivers/kbd_driver.asm +;****** Processing file: src\Libraries/kbd_driver.asm =16 KBD_INBUF_SIZE = 16 ; Number of scan codes that can be buffered =0 KBD_STATE_IDLE = 0 ; Keyboard is IDLE =1 KBD_STATE_E0 = 1 ; Keyboard has sent E0 -=2 KBD_STATE_E02A = 2 ; Keybaord has sent E0 2A (leading to Print Screen E02AE037) +=2 KBD_STATE_E02A = 2 ; Keyboard has sent E0 2A (leading to Print Screen E02AE037) =3 KBD_STATE_E02AE0 = 3 =4 KBD_STATE_E1 = 4 ; Keyboard has sent E1 (leading to Pause/Break) =5 KBD_STATE_E11D = 5 @@ -14713,12 +14663,12 @@ =2 KBD_ACTION_EMIT_E0 = 2 ; State machine action: translate scancode from E0 prefix table and emit it =$01 KBD_STAT_OBF = $01 ; Keyboard status: Output Buffer is Full =$02 KBD_STAT_IBF = $02 ; Keyboard status: Input Buffer is Full -=$a7 KBD_CTRL_CMD_DISABLE2 = $A7 ; Keybaord controller command: disable output device #2 -=$a9 KBD_CTRL_CMD_ENABLE2 = $A9 ; Keybaord controller command: enable output device #2 +=$a7 KBD_CTRL_CMD_DISABLE2 = $A7 ; Keyboard controller command: disable output device #2 +=$a9 KBD_CTRL_CMD_ENABLE2 = $A9 ; Keyboard controller command: enable output device #2 =$aa KBD_CTRL_CMD_SELFTEST = $AA ; Keyboard controller command: start self test =$ab KBD_CTRL_CMD_KBDTEST = $AB ; Keyboard controller command: start keyboard test -=$ad KBD_CTRL_CMD_DISABLE1 = $AD ; Keybaord controller command: disable output device #1 -=$ae KBD_CTRL_CMD_ENABLE1 = $AE ; Keybaord controller command: enable output device #1 +=$ad KBD_CTRL_CMD_DISABLE1 = $AD ; Keyboard controller command: disable output device #1 +=$ae KBD_CTRL_CMD_ENABLE1 = $AE ; Keyboard controller command: enable output device #1 =$60 KBD_CTRL_CMD_WRITECMD = $60 ; Keyboard controller command: write to the command register =$ff KBD_CMD_RESET = $FF ; Keyboard command: reset the keyboard =$f4 KBD_CMD_ENABLE = $F4 ; Keyboard command: enable to keyboard @@ -14768,806 +14718,806 @@ >0033 TBL_LOCK .dword ? ; Pointer to the scan code translation table for keys modified by CAPSLOCK or NUMLOCK >0037 TBL_LOCK_SHIFT .dword ? ; Pointer to the scan code translation table for keys modified by CAPSLOCK and SHIFT >003b TBL_CTRL_SHIFT .dword ? ; Pointer to the scan code translation table for keys modified by CTRL and SHIFT -.39744f IINITKEYBOARD -.39744f da phx PHX -.397450 5a phy PHY -.397451 0b phd PHD -.397452 08 php PHP -.397453 48 pha PHA ; begin setdp macro -.397454 08 php PHP -.397455 c2 20 rep #$20 REP #$20 ; set A long -.397457 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 -.39745a 5b tcd TCD -.39745b 28 plp PLP -.39745c 68 pla PLA ; end setdp macro -.39745d e2 20 sep #$20 SEP #$20 ; set A short -.39745f c2 10 rep #$10 REP #$10 ; set X long -.397461 af 4d 01 00 lda $00014d LDA @l INT_MASK_REG1 ; Disable the keyboard interrupts while we get things started -.397465 09 01 ora #$01 ORA #FNX1_INT00_KBD -.397467 af 4d 01 00 lda $00014d LDA @l INT_MASK_REG1 -.39746b a9 00 lda #$00 LDA #KBD_STATE_IDLE ; Set the state machine to the starting IDLE state -.39746d 85 00 sta $0f00 STA #S_KBD_CONTROL.STATE,D -.39746f 64 13 stz $0f13 STZ #S_KBD_CONTROL.SC_HEAD,D ; Mark the scancode buffer as empty -.397471 64 24 stz $0f24 STZ #S_KBD_CONTROL.CHAR_HEAD,D ; Mark the character buffer as empty -.397473 64 25 stz $0f25 STZ #S_KBD_CONTROL.MODIFIERS,D ; Default to modifiers being off -.397475 64 02 stz $0f02 STZ #S_KBD_CONTROL.STATUS,D ; Clear the status register -.397477 a9 80 lda #$80 LDA #KBD_CTRL_BREAK ; Enable BREAK processing -.397479 85 01 sta $0f01 STA #S_KBD_CONTROL.CONTROL,D -.39747b c2 20 rep #$20 REP #$20 ; set A long -.39747d a9 00 7c lda #$7c00 LDA #<>SC_US_UNMOD -.397480 85 27 sta $0f27 STA #S_KBD_CONTROL.TBL_UNMOD,D -.397482 a9 80 7c lda #$7c80 LDA #<>SC_US_SHFT -.397485 85 2b sta $0f2b STA #S_KBD_CONTROL.TBL_SHIFT,D -.397487 a9 00 7d lda #$7d00 LDA #<>SC_US_CTRL -.39748a 85 2f sta $0f2f STA #S_KBD_CONTROL.TBL_CTRL,D -.39748c a9 80 7d lda #$7d80 LDA #<>SC_US_LOCK -.39748f 85 33 sta $0f33 STA #S_KBD_CONTROL.TBL_LOCK,D -.397491 a9 00 7e lda #$7e00 LDA #<>SC_US_LOCK_SHFT -.397494 85 37 sta $0f37 STA #S_KBD_CONTROL.TBL_LOCK_SHIFT,D -.397496 a9 80 7e lda #$7e80 LDA #<>SC_US_CTRL_SHFT -.397499 85 3b sta $0f3b STA #S_KBD_CONTROL.TBL_CTRL_SHIFT,D -.39749b e2 20 sep #$20 SEP #$20 ; set A short -.39749d a9 39 lda #$39 LDA #`SC_US_UNMOD -.39749f 85 29 sta $0f29 STA #S_KBD_CONTROL.TBL_UNMOD+2,D -.3974a1 a9 39 lda #$39 LDA #`SC_US_SHFT -.3974a3 85 2d sta $0f2d STA #S_KBD_CONTROL.TBL_SHIFT+2,D -.3974a5 a9 39 lda #$39 LDA #`SC_US_CTRL -.3974a7 85 31 sta $0f31 STA #S_KBD_CONTROL.TBL_CTRL+2,D -.3974a9 a9 39 lda #$39 LDA #`SC_US_LOCK -.3974ab 85 35 sta $0f35 STA #S_KBD_CONTROL.TBL_LOCK+2,D -.3974ad a9 39 lda #$39 LDA #`SC_US_LOCK_SHFT -.3974af 85 39 sta $0f39 STA #S_KBD_CONTROL.TBL_LOCK_SHIFT+2,D -.3974b1 a9 39 lda #$39 LDA #`SC_US_CTRL_SHFT -.3974b3 85 3b sta $0f3b STA #S_KBD_CONTROL.TBL_CTRL_SHIFT,D -.3974b5 a9 ad lda #$ad LDA #KBD_CTRL_CMD_DISABLE1 ; Disable the keyboard sending data -.3974b7 22 46 75 39 jsl $397546 JSL KBD_WAIT_IN ; Send the command to the controller -.3974bb 8f 64 10 af sta $af1064 STA @l KBD_CMD_BUF -.3974bf af 60 10 af lda $af1060 flush_output LDA @l KBD_DATA_BUF ; We just throw that away -.3974c3 a9 aa lda #$aa LDA #KBD_CTRL_CMD_SELFTEST ; Send the self test command -.3974c5 22 51 75 39 jsl $397551 JSL KBD_CTRL_SND_CMD -.3974c9 c9 55 cmp #$55 CMP #KBD_RESP_OK ; Did we get an OK? -.3974cb f0 05 beq $3974d2 BEQ test_AB -.3974cd a9 02 lda #$02 LDA #2 ; Return error #2 -.3974cf 82 64 00 brl $397536 BRL done -.3974d2 a9 ab lda #$ab test_AB LDA #KBD_CTRL_CMD_KBDTEST ; Send the keyboard test command -.3974d4 22 51 75 39 jsl $397551 JSL KBD_CTRL_SND_CMD -.3974d8 c9 00 cmp #$00 CMP #0 ; Did we get a good response? -.3974da f0 05 beq $3974e1 BEQ write_command -.3974dc a9 03 lda #$03 LDA #3 ; Return error #3 -.3974de 82 55 00 brl $397536 BRL done -.3974e1 a9 60 lda #$60 write_command LDA #KBD_CTRL_CMD_WRITECMD -.3974e3 a2 43 00 ldx #$0043 LDX #%01000011 ; Translate to set 1, no interrupts -.3974e6 22 ab 75 39 jsl $3975ab JSL KBD_CTRL_SND_CMD_P -.3974ea a9 ae lda #$ae enable_dev1 LDA #KBD_CTRL_CMD_ENABLE1 ; Re-enable the keyboard sending data -.3974ec 22 46 75 39 jsl $397546 JSL KBD_WAIT_IN ; Send the command to the controller -.3974f0 8f 64 10 af sta $af1064 STA @l KBD_CMD_BUF -.3974f4 a9 ff lda #$ff reset_kbd LDA #KBD_CMD_RESET ; Send a reset command to the keyboard -.3974f6 a2 ff ff ldx #$ffff LDX #$FFFF ; And wait a while for it to complete the reset -.3974f9 22 62 75 39 jsl $397562 JSL KBD_SND_CMD -.3974fd a0 80 00 ldy #$0080 LDY #128 ; Attemp enabling the keyboard 128 times -.397500 a9 f4 lda #$f4 enable_loop LDA #KBD_CMD_ENABLE ; Try to enable the keyboard -.397502 a2 00 00 ldx #$0000 LDX #0 -.397505 22 62 75 39 jsl $397562 JSL KBD_SND_CMD -.397509 c9 fa cmp #$fa CMP #KBD_RESP_ACK ; Did the keyboard acknowledge the command? -.39750b f0 07 beq $397514 BEQ set_led ; Yes: try to set the LEDs -.39750d 88 dey DEY ; No: try again... counting down -.39750e d0 f0 bne $397500 BNE enable_loop ; If we are out of attempts... -.397510 a9 05 lda #$05 LDA #5 ; Return error #5 -.397512 80 22 bra $397536 BRA done -.397514 a9 36 lda #$36 set_led LDA #"6" -.397516 22 18 10 00 jsl $001018 JSL PUTC -.39751a a9 00 lda #$00 LDA #0 ; Set the state of the locks -.39751c 22 d8 77 39 jsl $3977d8 JSL KBD_SETLOCKS -.397520 af 41 01 00 lda $000141 LDA @l INT_PENDING_REG1 ; Read the Pending Register & -.397524 29 01 and #$01 AND #FNX1_INT00_KBD -.397526 8f 41 01 00 sta $000141 STA @l INT_PENDING_REG1 ; Writing it back will clear the Active Bit -.39752a af 4d 01 00 lda $00014d LDA @l INT_MASK_REG1 -.39752e 29 fe and #$fe AND #~FNX1_INT00_KBD -.397530 8f 4d 01 00 sta $00014d STA @l INT_MASK_REG1 -.397534 a9 00 lda #$00 return_0 LDA #0 ; Return status code for success -.397536 28 plp done PLP -.397537 2b pld PLD -.397538 7a ply PLY -.397539 fa plx PLX -.39753a 6b rtl RTL -.39753b KBD_WAIT_OUT -.39753b 48 pha PHA -.39753c af 64 10 af lda $af1064 wait LDA @l KBD_STATUS ; Get the keyboard status -.397540 89 01 bit #$01 BIT #KBD_STAT_OBF ; Check to see if the output buffer is full -.397542 f0 f8 beq $39753c BEQ wait ; If it isn't, keep waiting -.397544 68 pla PLA -.397545 6b rtl RTL -.397546 KBD_WAIT_IN -.397546 48 pha PHA -.397547 af 64 10 af lda $af1064 wait LDA @l KBD_STATUS ; Get the keyboard status -.39754b 89 02 bit #$02 BIT #KBD_STAT_IBF ; Check to see if the input buffer has data -.39754d d0 f8 bne $397547 BNE wait ; If not, wait for it to have something -.39754f 68 pla PLA -.397550 6b rtl RTL -.397551 KBD_CTRL_SND_CMD -.397551 22 46 75 39 jsl $397546 JSL KBD_WAIT_IN ; Send the command to the controller -.397555 8f 64 10 af sta $af1064 STA @l KBD_CMD_BUF -.397559 22 3b 75 39 jsl $39753b JSL KBD_WAIT_OUT ; Wait for and read the response byte -.39755d af 60 10 af lda $af1060 LDA @l KBD_DATA_BUF -.397561 6b rtl RTL -.397562 KBD_SND_CMD -.397562 22 46 75 39 jsl $397546 JSL KBD_WAIT_IN ; Send the command to the keyboard -.397566 8f 60 10 af sta $af1060 STA @l KBD_DATA_BUF -.39756a c2 10 rep #$10 REP #$10 ; set X long -.39756c e0 00 00 cpx #$0000 delay CPX #0 ; Check how many delay loops are left to do -.39756f f0 0b beq $39757c BEQ get_response ; If 0, check for a response -.397571 ca dex DEX ; Count down -.397572 ea nop NOP ; And do a delay -.397573 ea nop NOP -.397574 ea nop NOP -.397575 ea nop NOP -.397576 ea nop NOP -.397577 ea nop NOP -.397578 ea nop NOP -.397579 ea nop NOP -.39757a 80 f0 bra $39756c BRA delay -.39757c 22 3b 75 39 jsl $39753b get_response JSL KBD_WAIT_OUT ; Wait for and read the response byte -.397580 af 60 10 af lda $af1060 LDA @l KBD_DATA_BUF -.397584 6b rtl RTL -.397585 KBD_SND_CMD_P -.397585 22 46 75 39 jsl $397546 JSL KBD_WAIT_IN ; Send the command to the keyboard -.397589 8f 60 10 af sta $af1060 STA @l KBD_DATA_BUF -.39758d 8a txa TXA ; Send the parameter to the keyboard -.39758e c2 10 rep #$10 REP #$10 ; set X long -.397590 a2 e8 03 ldx #$03e8 LDX #1000 -.397593 e0 00 00 cpx #$0000 delay CPX #0 ; Check how many delay loops are left to do -.397596 f0 0a beq $3975a2 BEQ send_data ; If 0, check for a response -.397598 ca dex DEX ; Count down -.397599 ea nop NOP ; And do a delay -.39759a ea nop NOP -.39759b ea nop NOP -.39759c ea nop NOP -.39759d ea nop NOP -.39759e ea nop NOP -.39759f ea nop NOP -.3975a0 80 f1 bra $397593 BRA delay -.3975a2 22 46 75 39 jsl $397546 send_data JSL KBD_WAIT_IN -.3975a6 8f 60 10 af sta $af1060 STA @l KBD_DATA_BUF -.3975aa get_response -.3975aa 6b rtl RTL -.3975ab KBD_CTRL_SND_CMD_P -.3975ab 22 46 75 39 jsl $397546 JSL KBD_WAIT_IN ; Send the command to the controller -.3975af 8f 64 10 af sta $af1064 STA @l KBD_CMD_BUF -.3975b3 8a txa TXA -.3975b4 22 46 75 39 jsl $397546 JSL KBD_WAIT_IN ; Send the parameter to the controller -.3975b8 8f 60 10 af sta $af1060 STA @l KBD_DATA_BUF -.3975bc 6b rtl RTL -.3975bd KBD_PROCESS_BYTE -.3975bd 8b phb PHB -.3975be 0b phd PHD -.3975bf 08 php PHP -.3975c0 48 pha PHA ; begin setdbr macro -.3975c1 08 php PHP -.3975c2 e2 20 sep #$20 SEP #$20 ; set A short -.3975c4 a9 39 lda #$39 LDA #`KBD_STATE_MACH -.3975c6 48 pha PHA -.3975c7 ab plb PLB -.3975c8 28 plp PLP -.3975c9 68 pla PLA ; end setdbr macro -.3975ca 48 pha PHA ; begin setdp macro -.3975cb 08 php PHP -.3975cc c2 20 rep #$20 REP #$20 ; set A long -.3975ce a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 -.3975d1 5b tcd TCD -.3975d2 28 plp PLP -.3975d3 68 pla PLA ; end setdp macro -.3975d4 e2 30 sep #$30 SEP #$30 ; set A&X short -.3975d6 a9 00 lda #$00 LDA #0 -.3975d8 8f e0 00 00 sta $0000e0 STA @l MOUSE_IDX ; A bit of a hack to try to stabilize the mouse -.3975dc af 60 10 af lda $af1060 LDA @l KBD_DATA_BUF ; Get the current scancode byte -.3975e0 d0 03 bne $3975e5 BNE save_scancode -.3975e2 82 67 00 brl $39764c BRL done ; If it's 0, just ignore it -.3975e5 LOCALS +.3973e5 IINITKEYBOARD +.3973e5 da phx PHX +.3973e6 5a phy PHY +.3973e7 0b phd PHD +.3973e8 08 php PHP +.3973e9 48 pha PHA ; begin setdp macro +.3973ea 08 php PHP +.3973eb c2 20 rep #$20 REP #$20 ; set A long +.3973ed a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 +.3973f0 5b tcd TCD +.3973f1 28 plp PLP +.3973f2 68 pla PLA ; end setdp macro +.3973f3 e2 20 sep #$20 SEP #$20 ; set A short +.3973f5 c2 10 rep #$10 REP #$10 ; set X long +.3973f7 af 4d 01 00 lda $00014d LDA @l INT_MASK_REG1 ; Disable the keyboard interrupts while we get things started +.3973fb 09 01 ora #$01 ORA #FNX1_INT00_KBD +.3973fd af 4d 01 00 lda $00014d LDA @l INT_MASK_REG1 +.397401 a9 00 lda #$00 LDA #KBD_STATE_IDLE ; Set the state machine to the starting IDLE state +.397403 85 00 sta $0f00 STA #S_KBD_CONTROL.STATE,D +.397405 64 13 stz $0f13 STZ #S_KBD_CONTROL.SC_HEAD,D ; Mark the scancode buffer as empty +.397407 64 24 stz $0f24 STZ #S_KBD_CONTROL.CHAR_HEAD,D ; Mark the character buffer as empty +.397409 64 25 stz $0f25 STZ #S_KBD_CONTROL.MODIFIERS,D ; Default to modifiers being off +.39740b 64 02 stz $0f02 STZ #S_KBD_CONTROL.STATUS,D ; Clear the status register +.39740d a9 80 lda #$80 LDA #KBD_CTRL_BREAK ; Enable BREAK processing +.39740f 85 01 sta $0f01 STA #S_KBD_CONTROL.CONTROL,D +.397411 c2 20 rep #$20 REP #$20 ; set A long +.397413 a9 00 7c lda #$7c00 LDA #<>SC_US_UNMOD +.397416 85 27 sta $0f27 STA #S_KBD_CONTROL.TBL_UNMOD,D +.397418 a9 80 7c lda #$7c80 LDA #<>SC_US_SHFT +.39741b 85 2b sta $0f2b STA #S_KBD_CONTROL.TBL_SHIFT,D +.39741d a9 00 7d lda #$7d00 LDA #<>SC_US_CTRL +.397420 85 2f sta $0f2f STA #S_KBD_CONTROL.TBL_CTRL,D +.397422 a9 80 7d lda #$7d80 LDA #<>SC_US_LOCK +.397425 85 33 sta $0f33 STA #S_KBD_CONTROL.TBL_LOCK,D +.397427 a9 00 7e lda #$7e00 LDA #<>SC_US_LOCK_SHFT +.39742a 85 37 sta $0f37 STA #S_KBD_CONTROL.TBL_LOCK_SHIFT,D +.39742c a9 80 7e lda #$7e80 LDA #<>SC_US_CTRL_SHFT +.39742f 85 3b sta $0f3b STA #S_KBD_CONTROL.TBL_CTRL_SHIFT,D +.397431 e2 20 sep #$20 SEP #$20 ; set A short +.397433 a9 39 lda #$39 LDA #`SC_US_UNMOD +.397435 85 29 sta $0f29 STA #S_KBD_CONTROL.TBL_UNMOD+2,D +.397437 a9 39 lda #$39 LDA #`SC_US_SHFT +.397439 85 2d sta $0f2d STA #S_KBD_CONTROL.TBL_SHIFT+2,D +.39743b a9 39 lda #$39 LDA #`SC_US_CTRL +.39743d 85 31 sta $0f31 STA #S_KBD_CONTROL.TBL_CTRL+2,D +.39743f a9 39 lda #$39 LDA #`SC_US_LOCK +.397441 85 35 sta $0f35 STA #S_KBD_CONTROL.TBL_LOCK+2,D +.397443 a9 39 lda #$39 LDA #`SC_US_LOCK_SHFT +.397445 85 39 sta $0f39 STA #S_KBD_CONTROL.TBL_LOCK_SHIFT+2,D +.397447 a9 39 lda #$39 LDA #`SC_US_CTRL_SHFT +.397449 85 3b sta $0f3b STA #S_KBD_CONTROL.TBL_CTRL_SHIFT,D +.39744b a9 ad lda #$ad LDA #KBD_CTRL_CMD_DISABLE1 ; Disable the keyboard sending data +.39744d 22 dc 74 39 jsl $3974dc JSL KBD_WAIT_IN ; Send the command to the controller +.397451 8f 64 10 af sta $af1064 STA @l KBD_CMD_BUF +.397455 af 60 10 af lda $af1060 flush_output LDA @l KBD_DATA_BUF ; We just throw that away +.397459 a9 aa lda #$aa LDA #KBD_CTRL_CMD_SELFTEST ; Send the self test command +.39745b 22 e7 74 39 jsl $3974e7 JSL KBD_CTRL_SND_CMD +.39745f c9 55 cmp #$55 CMP #KBD_RESP_OK ; Did we get an OK? +.397461 f0 05 beq $397468 BEQ test_AB +.397463 a9 02 lda #$02 LDA #2 ; Return error #2 +.397465 82 64 00 brl $3974cc BRL done +.397468 a9 ab lda #$ab test_AB LDA #KBD_CTRL_CMD_KBDTEST ; Send the keyboard test command +.39746a 22 e7 74 39 jsl $3974e7 JSL KBD_CTRL_SND_CMD +.39746e c9 00 cmp #$00 CMP #0 ; Did we get a good response? +.397470 f0 05 beq $397477 BEQ write_command +.397472 a9 03 lda #$03 LDA #3 ; Return error #3 +.397474 82 55 00 brl $3974cc BRL done +.397477 a9 60 lda #$60 write_command LDA #KBD_CTRL_CMD_WRITECMD +.397479 a2 43 00 ldx #$0043 LDX #%01000011 ; Translate to set 1, no interrupts +.39747c 22 41 75 39 jsl $397541 JSL KBD_CTRL_SND_CMD_P +.397480 a9 ae lda #$ae enable_dev1 LDA #KBD_CTRL_CMD_ENABLE1 ; Re-enable the keyboard sending data +.397482 22 dc 74 39 jsl $3974dc JSL KBD_WAIT_IN ; Send the command to the controller +.397486 8f 64 10 af sta $af1064 STA @l KBD_CMD_BUF +.39748a a9 ff lda #$ff reset_kbd LDA #KBD_CMD_RESET ; Send a reset command to the keyboard +.39748c a2 ff ff ldx #$ffff LDX #$FFFF ; And wait a while for it to complete the reset +.39748f 22 f8 74 39 jsl $3974f8 JSL KBD_SND_CMD +.397493 a0 80 00 ldy #$0080 LDY #128 ; Attemp enabling the keyboard 128 times +.397496 a9 f4 lda #$f4 enable_loop LDA #KBD_CMD_ENABLE ; Try to enable the keyboard +.397498 a2 00 00 ldx #$0000 LDX #0 +.39749b 22 f8 74 39 jsl $3974f8 JSL KBD_SND_CMD +.39749f c9 fa cmp #$fa CMP #KBD_RESP_ACK ; Did the keyboard acknowledge the command? +.3974a1 f0 07 beq $3974aa BEQ set_led ; Yes: try to set the LEDs +.3974a3 88 dey DEY ; No: try again... counting down +.3974a4 d0 f0 bne $397496 BNE enable_loop ; If we are out of attempts... +.3974a6 a9 05 lda #$05 LDA #5 ; Return error #5 +.3974a8 80 22 bra $3974cc BRA done +.3974aa a9 36 lda #$36 set_led LDA #"6" +.3974ac 22 18 10 00 jsl $001018 JSL PUTC +.3974b0 a9 00 lda #$00 LDA #0 ; Set the state of the locks +.3974b2 22 6e 77 39 jsl $39776e JSL KBD_SETLOCKS +.3974b6 af 41 01 00 lda $000141 LDA @l INT_PENDING_REG1 ; Read the Pending Register & +.3974ba 29 01 and #$01 AND #FNX1_INT00_KBD +.3974bc 8f 41 01 00 sta $000141 STA @l INT_PENDING_REG1 ; Writing it back will clear the Active Bit +.3974c0 af 4d 01 00 lda $00014d LDA @l INT_MASK_REG1 +.3974c4 29 fe and #$fe AND #~FNX1_INT00_KBD +.3974c6 8f 4d 01 00 sta $00014d STA @l INT_MASK_REG1 +.3974ca a9 00 lda #$00 return_0 LDA #0 ; Return status code for success +.3974cc 28 plp done PLP +.3974cd 2b pld PLD +.3974ce 7a ply PLY +.3974cf fa plx PLX +.3974d0 6b rtl RTL +.3974d1 KBD_WAIT_OUT +.3974d1 48 pha PHA +.3974d2 af 64 10 af lda $af1064 wait LDA @l KBD_STATUS ; Get the keyboard status +.3974d6 89 01 bit #$01 BIT #KBD_STAT_OBF ; Check to see if the output buffer is full +.3974d8 f0 f8 beq $3974d2 BEQ wait ; If it isn't, keep waiting +.3974da 68 pla PLA +.3974db 6b rtl RTL +.3974dc KBD_WAIT_IN +.3974dc 48 pha PHA +.3974dd af 64 10 af lda $af1064 wait LDA @l KBD_STATUS ; Get the keyboard status +.3974e1 89 02 bit #$02 BIT #KBD_STAT_IBF ; Check to see if the input buffer has data +.3974e3 d0 f8 bne $3974dd BNE wait ; If not, wait for it to have something +.3974e5 68 pla PLA +.3974e6 6b rtl RTL +.3974e7 KBD_CTRL_SND_CMD +.3974e7 22 dc 74 39 jsl $3974dc JSL KBD_WAIT_IN ; Send the command to the controller +.3974eb 8f 64 10 af sta $af1064 STA @l KBD_CMD_BUF +.3974ef 22 d1 74 39 jsl $3974d1 JSL KBD_WAIT_OUT ; Wait for and read the response byte +.3974f3 af 60 10 af lda $af1060 LDA @l KBD_DATA_BUF +.3974f7 6b rtl RTL +.3974f8 KBD_SND_CMD +.3974f8 22 dc 74 39 jsl $3974dc JSL KBD_WAIT_IN ; Send the command to the keyboard +.3974fc 8f 60 10 af sta $af1060 STA @l KBD_DATA_BUF +.397500 c2 10 rep #$10 REP #$10 ; set X long +.397502 e0 00 00 cpx #$0000 delay CPX #0 ; Check how many delay loops are left to do +.397505 f0 0b beq $397512 BEQ get_response ; If 0, check for a response +.397507 ca dex DEX ; Count down +.397508 ea nop NOP ; And do a delay +.397509 ea nop NOP +.39750a ea nop NOP +.39750b ea nop NOP +.39750c ea nop NOP +.39750d ea nop NOP +.39750e ea nop NOP +.39750f ea nop NOP +.397510 80 f0 bra $397502 BRA delay +.397512 22 d1 74 39 jsl $3974d1 get_response JSL KBD_WAIT_OUT ; Wait for and read the response byte +.397516 af 60 10 af lda $af1060 LDA @l KBD_DATA_BUF +.39751a 6b rtl RTL +.39751b KBD_SND_CMD_P +.39751b 22 dc 74 39 jsl $3974dc JSL KBD_WAIT_IN ; Send the command to the keyboard +.39751f 8f 60 10 af sta $af1060 STA @l KBD_DATA_BUF +.397523 8a txa TXA ; Send the parameter to the keyboard +.397524 c2 10 rep #$10 REP #$10 ; set X long +.397526 a2 e8 03 ldx #$03e8 LDX #1000 +.397529 e0 00 00 cpx #$0000 delay CPX #0 ; Check how many delay loops are left to do +.39752c f0 0a beq $397538 BEQ send_data ; If 0, check for a response +.39752e ca dex DEX ; Count down +.39752f ea nop NOP ; And do a delay +.397530 ea nop NOP +.397531 ea nop NOP +.397532 ea nop NOP +.397533 ea nop NOP +.397534 ea nop NOP +.397535 ea nop NOP +.397536 80 f1 bra $397529 BRA delay +.397538 22 dc 74 39 jsl $3974dc send_data JSL KBD_WAIT_IN +.39753c 8f 60 10 af sta $af1060 STA @l KBD_DATA_BUF +.397540 get_response +.397540 6b rtl RTL +.397541 KBD_CTRL_SND_CMD_P +.397541 22 dc 74 39 jsl $3974dc JSL KBD_WAIT_IN ; Send the command to the controller +.397545 8f 64 10 af sta $af1064 STA @l KBD_CMD_BUF +.397549 8a txa TXA +.39754a 22 dc 74 39 jsl $3974dc JSL KBD_WAIT_IN ; Send the parameter to the controller +.39754e 8f 60 10 af sta $af1060 STA @l KBD_DATA_BUF +.397552 6b rtl RTL +.397553 KBD_PROCESS_BYTE +.397553 8b phb PHB +.397554 0b phd PHD +.397555 08 php PHP +.397556 48 pha PHA ; begin setdbr macro +.397557 08 php PHP +.397558 e2 20 sep #$20 SEP #$20 ; set A short +.39755a a9 39 lda #$39 LDA #`KBD_STATE_MACH +.39755c 48 pha PHA +.39755d ab plb PLB +.39755e 28 plp PLP +.39755f 68 pla PLA ; end setdbr macro +.397560 48 pha PHA ; begin setdp macro +.397561 08 php PHP +.397562 c2 20 rep #$20 REP #$20 ; set A long +.397564 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 +.397567 5b tcd TCD +.397568 28 plp PLP +.397569 68 pla PLA ; end setdp macro +.39756a e2 30 sep #$30 SEP #$30 ; set A&X short +.39756c a9 00 lda #$00 LDA #0 +.39756e 8f e0 00 00 sta $0000e0 STA @l MOUSE_IDX ; A bit of a hack to try to stabilize the mouse +.397572 af 60 10 af lda $af1060 LDA @l KBD_DATA_BUF ; Get the current scancode byte +.397576 d0 03 bne $39757b BNE save_scancode +.397578 82 67 00 brl $3975e2 BRL done ; If it's 0, just ignore it +.39757b LOCALS >0001 l_break .byte ? ; The make/break bit of the scancode >0002 l_code .byte ? ; The scancode -.3975e5 48 pha save_scancode PHA -.3975e6 48 pha PHA -.3975e7 29 80 and #$80 AND #$80 -.3975e9 83 01 sta $01,s STA l_break ; Save the make/break bit -.3975eb a2 00 ldx #$00 LDX #0 ; Start from the beginning -.3975ed bf 00 7b 39 lda $397b00,x chk_transition LDA @l KBD_STATE_MACH,X ; Get the tranition's start state -.3975f1 c9 ff cmp #$ff CMP #$FF -.3975f3 d0 03 bne $3975f8 BNE compare_state -.3975f5 82 54 00 brl $39764c BRL done ; If $FF: we've reached the end... this is an error... just ignore it? -.3975f8 c5 00 cmp $0f00 compare_state CMP #S_KBD_CONTROL.STATE,D ; Compare it to the current state -.3975fa d0 0e bne $39760a BNE next_transition ; If they don't match, go to the next transition -.3975fc bf 01 7b 39 lda $397b01,x LDA @l KBD_STATE_MACH+1,X ; Get the tranition's test byte -.397600 f0 0e beq $397610 BEQ apply ; Is it 0? Yes: the default applies -.397602 a3 02 lda $02,s LDA l_code ; Otherwise: get the scan code back -.397604 df 01 7b 39 cmp $397b01,x CMP @l KBD_STATE_MACH+1,X ; Compare it to the transition's test byte -.397608 f0 06 beq $397610 BEQ apply ; If equal: this matches, apply the transition -.39760a e8 inx next_transition INX ; Move to the next transition -.39760b e8 inx INX -.39760c e8 inx INX -.39760d e8 inx INX -.39760e 80 dd bra $3975ed BRA chk_transition ; Check to see if the next transition applies -.397610 bf 02 7b 39 lda $397b02,x apply LDA @l KBD_STATE_MACH+2,X ; Get the tranition's destination state -.397614 85 00 sta $0f00 STA #S_KBD_CONTROL.STATE,D ; And save it as our new state -.397616 bf 03 7b 39 lda $397b03,x LDA @l KBD_STATE_MACH+3,X ; Get the tranition's action -.39761a c9 00 cmp #$00 CMP #KBD_ACTION_IGNORE ; Is it IGNORE? -.39761c f0 2e beq $39764c BEQ done ; Yes: we're done for now -.39761e c9 01 cmp #$01 CMP #KBD_ACTION_EMIT_BASE ; Is it EMIT_BASE? -.397620 f0 06 beq $397628 BEQ emit_base ; Yes: emit the translation of the base byte -.397622 c9 02 cmp #$02 CMP #KBD_ACTION_EMIT_E0 ; Is it EMIT_E0? -.397624 f0 0f beq $397635 BEQ emit_e0 ; Yes: emit the translation of the E0 prefixed byte -.397626 80 18 bra $397640 BRA emit_A ; Otherwise: just emit the action byte as the new scan code -.397628 a3 02 lda $02,s emit_base LDA l_code -.39762a 29 7f and #$7f AND #$7F ; Strip off the make/break bit -.39762c aa tax TAX -.39762d bf 00 7a 39 lda $397a00,x LDA @l TBL_SET1,X ; Get the translation of the base scan code -.397631 03 01 ora $01,s ORA l_break ; Add the make/break bit back -.397633 80 0b bra $397640 BRA emit_A ; Emit the translation -.397635 a3 02 lda $02,s emit_e0 LDA l_code -.397637 29 7f and #$7f AND #$7F ; Strip off any make/break bit -.397639 aa tax TAX -.39763a bf 80 7a 39 lda $397a80,x LDA @l TBL_SET1_E0,X ; Get the translation of the E0 prefixed scan code -.39763e 03 01 ora $01,s ORA l_break ; Add in the make/break flag -.397640 c9 00 cmp #$00 emit_A CMP #0 ; Is the code NUL? -.397642 f0 08 beq $39764c BEQ done ; If so, skip enqueuing it -.397644 22 54 76 39 jsl $397654 enqueue JSL KBD_SC_ENQUEUE ; Enqueue the scancode -.397648 a9 00 lda #$00 LDA #KBD_STATE_IDLE ; Set the state machine to the initial state -.39764a 85 00 sta $0f00 STA #S_KBD_CONTROL.STATE,D -.39764c done -.39764c e2 20 sep #$20 SEP #$20 ; set A short -.39764e 68 pla PLA ; Clean the scan code byte from the stack -.39764f 68 pla PLA -.397650 28 plp PLP -.397651 2b pld PLD -.397652 ab plb PLB -.397653 6b rtl RTL -.397654 KBD_SC_ENQUEUE -.397654 0b phd PHD -.397655 08 php PHP -.397656 78 sei SEI ; Disable IRQs for the duration of this routine to avoid race conditions -.397657 48 pha PHA ; begin setdp macro -.397658 08 php PHP -.397659 c2 20 rep #$20 REP #$20 ; set A long -.39765b a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 -.39765e 5b tcd TCD -.39765f 28 plp PLP -.397660 68 pla PLA ; end setdp macro -.397661 e2 30 sep #$30 SEP #$30 ; set A&X short -.397663 c9 00 cmp #$00 CMP #0 ; Is the scan code a NUL? -.397665 f0 2f beq $397696 BEQ done ; Yes: just ignore -.397667 c9 61 cmp #$61 CMP #KBD_SC_BREAK ; Is it the BREAK key? -.397669 d0 10 bne $39767b BNE chk_locks ; No: check the various lock keys -.39766b a5 01 lda $0f01 LDA #S_KBD_CONTROL.CONTROL,D -.39766d 89 80 bit #$80 BIT #KBD_CTRL_BREAK ; Are we processing BREAK? -.39766f f0 08 beq $397679 BEQ enqueue_break ; No: enqueue it as normal -.397671 a9 80 lda #$80 LDA #KBD_STAT_BREAK ; Yes: turn on the BREAK bit -.397673 05 02 ora $0f02 ORA #S_KBD_CONTROL.STATUS,D -.397675 85 02 sta $0f02 STA #S_KBD_CONTROL.STATUS,D -.397677 80 1d bra $397696 BRA done ; And we're done -.397679 a9 61 lda #$61 enqueue_break LDA #KBD_SC_BREAK -.39767b c9 3a cmp #$3a chk_locks CMP #KBD_SC_CAPSLOCK ; Is it the CAPS lock? -.39767d f0 1a beq $397699 BEQ toggle_caps ; Yes: toggle the CAPS lock bits -.39767f c9 45 cmp #$45 CMP #KBD_SC_NUMLOCK ; Is it the NUM lock? -.397681 f0 20 beq $3976a3 BEQ toggle_num ; Yes: toggle the NUM lock bits -.397683 c9 46 cmp #$46 CMP #KBD_SC_SCROLL ; Is it the SCROLL lock? -.397685 f0 22 beq $3976a9 BEQ toggle_scroll ; Yes: toggle the SCROLL lock bits -.397687 a6 13 ldx $0f13 LDX #S_KBD_CONTROL.SC_HEAD,D ; Get the index of the next free spot -.397689 e0 10 cpx #$10 CPX #KBD_INBUF_SIZE ; Is it at the end? -.39768b f0 09 beq $397696 BEQ done ; Yes: we're full... ignore the scancode -.39768d 95 03 sta $0f03,x STA #S_KBD_CONTROL.SC_BUF,D,X ; No: we have room, write the scan code to the buffer -.39768f e8 inx INX ; Advance to the next location -.397690 86 13 stx $0f13 STX #S_KBD_CONTROL.SC_HEAD,D -.397692 a9 01 lda #$01 LDA #KBD_STAT_SCAN ; Set the KBD_STAT_SCAN bit -.397694 04 02 tsb $0f02 TSB #S_KBD_CONTROL.STATUS,D -.397696 28 plp done PLP -.397697 2b pld PLD -.397698 6b rtl RTL -.397699 a5 26 lda $0f26 toggle_caps LDA #S_KBD_CONTROL.LOCKS,D -.39769b 49 04 eor #$04 EOR #KBD_LOCK_CAPS ; Toggle the CAPS lock -.39769d 22 d8 77 39 jsl $3977d8 save_locks JSL KBD_SETLOCKS ; Set the locks -.3976a1 80 f3 bra $397696 BRA done -.3976a3 a5 26 lda $0f26 toggle_num LDA #S_KBD_CONTROL.LOCKS,D -.3976a5 49 02 eor #$02 EOR #KBD_LOCK_NUMBER ; Toggle the NUM lock -.3976a7 80 f4 bra $39769d BRA save_locks -.3976a9 a5 26 lda $0f26 toggle_scroll LDA #S_KBD_CONTROL.LOCKS,D -.3976ab 49 01 eor #$01 EOR #KBD_LOCK_SCROLL ; Toggle the SCROLL lock -.3976ad 80 ee bra $39769d BRA save_locks -.3976af KBD_CHAR_ENQUEUE -.3976af 0b phd PHD -.3976b0 08 php PHP -.3976b1 78 sei SEI ; Disable IRQs for the duration of this routine to avoid race conditions -.3976b2 48 pha PHA ; begin setdp macro -.3976b3 08 php PHP -.3976b4 c2 20 rep #$20 REP #$20 ; set A long -.3976b6 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 -.3976b9 5b tcd TCD -.3976ba 28 plp PLP -.3976bb 68 pla PLA ; end setdp macro -.3976bc e2 30 sep #$30 SEP #$30 ; set A&X short -.3976be c9 00 cmp #$00 CMP #0 ; Is the character a NUL? -.3976c0 f0 0f beq $3976d1 BEQ done ; Yes: just ignore -.3976c2 a6 24 ldx $0f24 LDX #S_KBD_CONTROL.CHAR_HEAD,D ; Get the index of the next free spot -.3976c4 e0 10 cpx #$10 CPX #KBD_INBUF_SIZE ; Is it at the end? -.3976c6 f0 09 beq $3976d1 BEQ done ; Yes: we're full... ignore the scancode -.3976c8 95 14 sta $0f14,x STA #S_KBD_CONTROL.CHAR_BUF,D,X ; No: we have room, write the scan code to the buffer -.3976ca e8 inx INX ; Advance to the next location -.3976cb 86 24 stx $0f24 STX #S_KBD_CONTROL.CHAR_HEAD,D -.3976cd a9 02 lda #$02 LDA #KBD_STAT_CHAR ; Set the KBD_STAT_CHAR bit -.3976cf 04 02 tsb $0f02 TSB #S_KBD_CONTROL.STATUS,D -.3976d1 28 plp done PLP -.3976d2 2b pld PLD -.3976d3 6b rtl RTL -.3976d4 KBD_CHAR_DEQUEUE -.3976d4 da phx PHX -.3976d5 0b phd PHD -.3976d6 08 php PHP -.3976d7 48 pha PHA ; begin setdp macro -.3976d8 08 php PHP -.3976d9 c2 20 rep #$20 REP #$20 ; set A long -.3976db a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 -.3976de 5b tcd TCD -.3976df 28 plp PLP -.3976e0 68 pla PLA ; end setdp macro -.3976e1 78 sei SEI ; Disable IRQ for the duration of this routine to avoid race conditions -.3976e2 e2 30 sep #$30 SEP #$30 ; set A&X short -.3976e4 a6 24 ldx $0f24 LDX #S_KBD_CONTROL.CHAR_HEAD,D ; Get the index of the next free spot -.3976e6 f0 21 beq $397709 BEQ return_empty ; If it's 0, we have no data -.3976e8 a5 14 lda $0f14 LDA #S_KBD_CONTROL.CHAR_BUF,D ; Get the character at the head of the queue -.3976ea 48 pha PHA ; Save it -.3976eb a6 24 ldx $0f24 LDX #S_KBD_CONTROL.CHAR_HEAD,D ; How many bytes were there? -.3976ed e0 01 cpx #$01 CPX #1 ; Is it one? -.3976ef d0 08 bne $3976f9 BNE copy_down ; No: we need to copy down the remaining bytes -.3976f1 64 24 stz $0f24 STZ #S_KBD_CONTROL.CHAR_HEAD,D ; Yes: mark that we have no data in the queue now -.3976f3 a9 02 lda #$02 LDA #KBD_STAT_CHAR ; Clear the KBD_STAT_CHAR bit -.3976f5 14 02 trb $0f02 TRB #S_KBD_CONTROL.STATUS,D -.3976f7 80 0d bra $397706 BRA return_head ; And return the character we found -.3976f9 a2 00 ldx #$00 copy_down LDX #0 ; Starting at the beginning of the buffer... -.3976fb b5 15 lda $0f15,x loop LDA #S_KBD_CONTROL.CHAR_BUF+1,D,X ; Get the next byte -.3976fd 95 14 sta $0f14,x STA #S_KBD_CONTROL.CHAR_BUF,D,X ; Move it down -.3976ff e8 inx INX ; And move to the next byte -.397700 e4 24 cpx $0f24 CPX #S_KBD_CONTROL.CHAR_HEAD,D ; Have we reached the end? -.397702 d0 f7 bne $3976fb BNE loop ; No: keep copying bytes -.397704 c6 24 dec $0f24 DEC #S_KBD_CONTROL.CHAR_HEAD,D ; Decrement the index -.397706 68 pla return_head PLA ; Get the character back -.397707 80 02 bra $39770b BRA done ; And return it -.397709 a9 00 lda #$00 return_empty LDA #0 ; Return: 0 for no character -.39770b 28 plp done PLP -.39770c 2b pld PLD -.39770d fa plx PLX -.39770e 6b rtl RTL -.39770f KBD_GET_SCANCODE -.39770f da phx PHX -.397710 0b phd PHD -.397711 08 php PHP -.397712 48 pha PHA ; begin setdp macro -.397713 08 php PHP -.397714 c2 20 rep #$20 REP #$20 ; set A long -.397716 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 -.397719 5b tcd TCD -.39771a 28 plp PLP -.39771b 68 pla PLA ; end setdp macro -.39771c 78 sei SEI ; Disable IRQ for the duration of this routine to avoid race conditions -.39771d e2 30 sep #$30 SEP #$30 ; set A&X short -.39771f a6 13 ldx $0f13 LDX #S_KBD_CONTROL.SC_HEAD,D ; Get the index of the next free spot -.397721 f0 21 beq $397744 BEQ return_empty ; If it's 0, we have no data -.397723 a5 03 lda $0f03 LDA #S_KBD_CONTROL.SC_BUF,D ; Get the scan code at the head of the queue -.397725 48 pha PHA ; Save it -.397726 a6 13 ldx $0f13 LDX #S_KBD_CONTROL.SC_HEAD,D ; How many bytes were there? -.397728 e0 01 cpx #$01 CPX #1 ; Is it one? -.39772a d0 08 bne $397734 BNE copy_down ; No: we need to copy down the remaining bytes -.39772c 64 13 stz $0f13 STZ #S_KBD_CONTROL.SC_HEAD,D ; Yes: mark that we have no data in the queue now -.39772e a9 01 lda #$01 LDA #KBD_STAT_SCAN ; Clear the KBD_STAT_SCAN bit -.397730 14 02 trb $0f02 TRB #S_KBD_CONTROL.STATUS,D -.397732 80 0d bra $397741 BRA return_head ; And return the scan code we found -.397734 a2 00 ldx #$00 copy_down LDX #0 ; Starting at the beginning of the buffer... -.397736 b5 04 lda $0f04,x loop LDA #S_KBD_CONTROL.SC_BUF+1,D,X ; Get the next byte -.397738 85 03 sta $0f03 STA #S_KBD_CONTROL.SC_BUF,D ; Move it down -.39773a e8 inx INX ; And move to the next byte -.39773b e4 13 cpx $0f13 CPX #S_KBD_CONTROL.SC_HEAD,D ; Have we reached the end? -.39773d d0 f7 bne $397736 BNE loop ; No: keep copying bytes -.39773f c6 13 dec $0f13 DEC #S_KBD_CONTROL.SC_HEAD,D ; Reduce the index to the next free byte -.397741 68 pla return_head PLA ; Get the scan code back -.397742 80 02 bra $397746 BRA done ; And return it -.397744 a9 00 lda #$00 return_empty LDA #0 ; Return: 0 for no scan code -.397746 28 plp done PLP -.397747 2b pld PLD -.397748 fa plx PLX -.397749 6b rtl RTL -.39774a KBD_GETMODS -.39774a 0b phd PHD -.39774b 08 php PHP -.39774c 48 pha PHA ; begin setdp macro -.39774d 08 php PHP -.39774e c2 20 rep #$20 REP #$20 ; set A long -.397750 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 -.397753 5b tcd TCD -.397754 28 plp PLP -.397755 68 pla PLA ; end setdp macro -.397756 e2 20 sep #$20 SEP #$20 ; set A short -.397758 a5 25 lda $0f25 LDA #S_KBD_CONTROL.MODIFIERS,D -.39775a 28 plp PLP -.39775b 2b pld PLD -.39775c 6b rtl RTL -.39775d KBD_GET_STAT -.39775d 0b phd PHD +.39757b 48 pha save_scancode PHA +.39757c 48 pha PHA +.39757d 29 80 and #$80 AND #$80 +.39757f 83 01 sta $01,s STA l_break ; Save the make/break bit +.397581 a2 00 ldx #$00 LDX #0 ; Start from the beginning +.397583 bf 00 7b 39 lda $397b00,x chk_transition LDA @l KBD_STATE_MACH,X ; Get the tranition's start state +.397587 c9 ff cmp #$ff CMP #$FF +.397589 d0 03 bne $39758e BNE compare_state +.39758b 82 54 00 brl $3975e2 BRL done ; If $FF: we've reached the end... this is an error... just ignore it? +.39758e c5 00 cmp $0f00 compare_state CMP #S_KBD_CONTROL.STATE,D ; Compare it to the current state +.397590 d0 0e bne $3975a0 BNE next_transition ; If they don't match, go to the next transition +.397592 bf 01 7b 39 lda $397b01,x LDA @l KBD_STATE_MACH+1,X ; Get the tranition's test byte +.397596 f0 0e beq $3975a6 BEQ apply ; Is it 0? Yes: the default applies +.397598 a3 02 lda $02,s LDA l_code ; Otherwise: get the scan code back +.39759a df 01 7b 39 cmp $397b01,x CMP @l KBD_STATE_MACH+1,X ; Compare it to the transition's test byte +.39759e f0 06 beq $3975a6 BEQ apply ; If equal: this matches, apply the transition +.3975a0 e8 inx next_transition INX ; Move to the next transition +.3975a1 e8 inx INX +.3975a2 e8 inx INX +.3975a3 e8 inx INX +.3975a4 80 dd bra $397583 BRA chk_transition ; Check to see if the next transition applies +.3975a6 bf 02 7b 39 lda $397b02,x apply LDA @l KBD_STATE_MACH+2,X ; Get the tranition's destination state +.3975aa 85 00 sta $0f00 STA #S_KBD_CONTROL.STATE,D ; And save it as our new state +.3975ac bf 03 7b 39 lda $397b03,x LDA @l KBD_STATE_MACH+3,X ; Get the tranition's action +.3975b0 c9 00 cmp #$00 CMP #KBD_ACTION_IGNORE ; Is it IGNORE? +.3975b2 f0 2e beq $3975e2 BEQ done ; Yes: we're done for now +.3975b4 c9 01 cmp #$01 CMP #KBD_ACTION_EMIT_BASE ; Is it EMIT_BASE? +.3975b6 f0 06 beq $3975be BEQ emit_base ; Yes: emit the translation of the base byte +.3975b8 c9 02 cmp #$02 CMP #KBD_ACTION_EMIT_E0 ; Is it EMIT_E0? +.3975ba f0 0f beq $3975cb BEQ emit_e0 ; Yes: emit the translation of the E0 prefixed byte +.3975bc 80 18 bra $3975d6 BRA emit_A ; Otherwise: just emit the action byte as the new scan code +.3975be a3 02 lda $02,s emit_base LDA l_code +.3975c0 29 7f and #$7f AND #$7F ; Strip off the make/break bit +.3975c2 aa tax TAX +.3975c3 bf 00 7a 39 lda $397a00,x LDA @l TBL_SET1,X ; Get the translation of the base scan code +.3975c7 03 01 ora $01,s ORA l_break ; Add the make/break bit back +.3975c9 80 0b bra $3975d6 BRA emit_A ; Emit the translation +.3975cb a3 02 lda $02,s emit_e0 LDA l_code +.3975cd 29 7f and #$7f AND #$7F ; Strip off any make/break bit +.3975cf aa tax TAX +.3975d0 bf 80 7a 39 lda $397a80,x LDA @l TBL_SET1_E0,X ; Get the translation of the E0 prefixed scan code +.3975d4 03 01 ora $01,s ORA l_break ; Add in the make/break flag +.3975d6 c9 00 cmp #$00 emit_A CMP #0 ; Is the code NUL? +.3975d8 f0 08 beq $3975e2 BEQ done ; If so, skip enqueuing it +.3975da 22 ea 75 39 jsl $3975ea enqueue JSL KBD_SC_ENQUEUE ; Enqueue the scancode +.3975de a9 00 lda #$00 LDA #KBD_STATE_IDLE ; Set the state machine to the initial state +.3975e0 85 00 sta $0f00 STA #S_KBD_CONTROL.STATE,D +.3975e2 done +.3975e2 e2 20 sep #$20 SEP #$20 ; set A short +.3975e4 68 pla PLA ; Clean the scan code byte from the stack +.3975e5 68 pla PLA +.3975e6 28 plp PLP +.3975e7 2b pld PLD +.3975e8 ab plb PLB +.3975e9 6b rtl RTL +.3975ea KBD_SC_ENQUEUE +.3975ea 0b phd PHD +.3975eb 08 php PHP +.3975ec 78 sei SEI ; Disable IRQs for the duration of this routine to avoid race conditions +.3975ed 48 pha PHA ; begin setdp macro +.3975ee 08 php PHP +.3975ef c2 20 rep #$20 REP #$20 ; set A long +.3975f1 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 +.3975f4 5b tcd TCD +.3975f5 28 plp PLP +.3975f6 68 pla PLA ; end setdp macro +.3975f7 e2 30 sep #$30 SEP #$30 ; set A&X short +.3975f9 c9 00 cmp #$00 CMP #0 ; Is the scan code a NUL? +.3975fb f0 2f beq $39762c BEQ done ; Yes: just ignore +.3975fd c9 61 cmp #$61 CMP #KBD_SC_BREAK ; Is it the BREAK key? +.3975ff d0 10 bne $397611 BNE chk_locks ; No: check the various lock keys +.397601 a5 01 lda $0f01 LDA #S_KBD_CONTROL.CONTROL,D +.397603 89 80 bit #$80 BIT #KBD_CTRL_BREAK ; Are we processing BREAK? +.397605 f0 08 beq $39760f BEQ enqueue_break ; No: enqueue it as normal +.397607 a9 80 lda #$80 LDA #KBD_STAT_BREAK ; Yes: turn on the BREAK bit +.397609 05 02 ora $0f02 ORA #S_KBD_CONTROL.STATUS,D +.39760b 85 02 sta $0f02 STA #S_KBD_CONTROL.STATUS,D +.39760d 80 1d bra $39762c BRA done ; And we're done +.39760f a9 61 lda #$61 enqueue_break LDA #KBD_SC_BREAK +.397611 c9 3a cmp #$3a chk_locks CMP #KBD_SC_CAPSLOCK ; Is it the CAPS lock? +.397613 f0 1a beq $39762f BEQ toggle_caps ; Yes: toggle the CAPS lock bits +.397615 c9 45 cmp #$45 CMP #KBD_SC_NUMLOCK ; Is it the NUM lock? +.397617 f0 20 beq $397639 BEQ toggle_num ; Yes: toggle the NUM lock bits +.397619 c9 46 cmp #$46 CMP #KBD_SC_SCROLL ; Is it the SCROLL lock? +.39761b f0 22 beq $39763f BEQ toggle_scroll ; Yes: toggle the SCROLL lock bits +.39761d a6 13 ldx $0f13 LDX #S_KBD_CONTROL.SC_HEAD,D ; Get the index of the next free spot +.39761f e0 10 cpx #$10 CPX #KBD_INBUF_SIZE ; Is it at the end? +.397621 f0 09 beq $39762c BEQ done ; Yes: we're full... ignore the scancode +.397623 95 03 sta $0f03,x STA #S_KBD_CONTROL.SC_BUF,D,X ; No: we have room, write the scan code to the buffer +.397625 e8 inx INX ; Advance to the next location +.397626 86 13 stx $0f13 STX #S_KBD_CONTROL.SC_HEAD,D +.397628 a9 01 lda #$01 LDA #KBD_STAT_SCAN ; Set the KBD_STAT_SCAN bit +.39762a 04 02 tsb $0f02 TSB #S_KBD_CONTROL.STATUS,D +.39762c 28 plp done PLP +.39762d 2b pld PLD +.39762e 6b rtl RTL +.39762f a5 26 lda $0f26 toggle_caps LDA #S_KBD_CONTROL.LOCKS,D +.397631 49 04 eor #$04 EOR #KBD_LOCK_CAPS ; Toggle the CAPS lock +.397633 22 6e 77 39 jsl $39776e save_locks JSL KBD_SETLOCKS ; Set the locks +.397637 80 f3 bra $39762c BRA done +.397639 a5 26 lda $0f26 toggle_num LDA #S_KBD_CONTROL.LOCKS,D +.39763b 49 02 eor #$02 EOR #KBD_LOCK_NUMBER ; Toggle the NUM lock +.39763d 80 f4 bra $397633 BRA save_locks +.39763f a5 26 lda $0f26 toggle_scroll LDA #S_KBD_CONTROL.LOCKS,D +.397641 49 01 eor #$01 EOR #KBD_LOCK_SCROLL ; Toggle the SCROLL lock +.397643 80 ee bra $397633 BRA save_locks +.397645 KBD_CHAR_ENQUEUE +.397645 0b phd PHD +.397646 08 php PHP +.397647 78 sei SEI ; Disable IRQs for the duration of this routine to avoid race conditions +.397648 48 pha PHA ; begin setdp macro +.397649 08 php PHP +.39764a c2 20 rep #$20 REP #$20 ; set A long +.39764c a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 +.39764f 5b tcd TCD +.397650 28 plp PLP +.397651 68 pla PLA ; end setdp macro +.397652 e2 30 sep #$30 SEP #$30 ; set A&X short +.397654 c9 00 cmp #$00 CMP #0 ; Is the character a NUL? +.397656 f0 0f beq $397667 BEQ done ; Yes: just ignore +.397658 a6 24 ldx $0f24 LDX #S_KBD_CONTROL.CHAR_HEAD,D ; Get the index of the next free spot +.39765a e0 10 cpx #$10 CPX #KBD_INBUF_SIZE ; Is it at the end? +.39765c f0 09 beq $397667 BEQ done ; Yes: we're full... ignore the scancode +.39765e 95 14 sta $0f14,x STA #S_KBD_CONTROL.CHAR_BUF,D,X ; No: we have room, write the scan code to the buffer +.397660 e8 inx INX ; Advance to the next location +.397661 86 24 stx $0f24 STX #S_KBD_CONTROL.CHAR_HEAD,D +.397663 a9 02 lda #$02 LDA #KBD_STAT_CHAR ; Set the KBD_STAT_CHAR bit +.397665 04 02 tsb $0f02 TSB #S_KBD_CONTROL.STATUS,D +.397667 28 plp done PLP +.397668 2b pld PLD +.397669 6b rtl RTL +.39766a KBD_CHAR_DEQUEUE +.39766a da phx PHX +.39766b 0b phd PHD +.39766c 08 php PHP +.39766d 48 pha PHA ; begin setdp macro +.39766e 08 php PHP +.39766f c2 20 rep #$20 REP #$20 ; set A long +.397671 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 +.397674 5b tcd TCD +.397675 28 plp PLP +.397676 68 pla PLA ; end setdp macro +.397677 78 sei SEI ; Disable IRQ for the duration of this routine to avoid race conditions +.397678 e2 30 sep #$30 SEP #$30 ; set A&X short +.39767a a6 24 ldx $0f24 LDX #S_KBD_CONTROL.CHAR_HEAD,D ; Get the index of the next free spot +.39767c f0 21 beq $39769f BEQ return_empty ; If it's 0, we have no data +.39767e a5 14 lda $0f14 LDA #S_KBD_CONTROL.CHAR_BUF,D ; Get the character at the head of the queue +.397680 48 pha PHA ; Save it +.397681 a6 24 ldx $0f24 LDX #S_KBD_CONTROL.CHAR_HEAD,D ; How many bytes were there? +.397683 e0 01 cpx #$01 CPX #1 ; Is it one? +.397685 d0 08 bne $39768f BNE copy_down ; No: we need to copy down the remaining bytes +.397687 64 24 stz $0f24 STZ #S_KBD_CONTROL.CHAR_HEAD,D ; Yes: mark that we have no data in the queue now +.397689 a9 02 lda #$02 LDA #KBD_STAT_CHAR ; Clear the KBD_STAT_CHAR bit +.39768b 14 02 trb $0f02 TRB #S_KBD_CONTROL.STATUS,D +.39768d 80 0d bra $39769c BRA return_head ; And return the character we found +.39768f a2 00 ldx #$00 copy_down LDX #0 ; Starting at the beginning of the buffer... +.397691 b5 15 lda $0f15,x loop LDA #S_KBD_CONTROL.CHAR_BUF+1,D,X ; Get the next byte +.397693 95 14 sta $0f14,x STA #S_KBD_CONTROL.CHAR_BUF,D,X ; Move it down +.397695 e8 inx INX ; And move to the next byte +.397696 e4 24 cpx $0f24 CPX #S_KBD_CONTROL.CHAR_HEAD,D ; Have we reached the end? +.397698 d0 f7 bne $397691 BNE loop ; No: keep copying bytes +.39769a c6 24 dec $0f24 DEC #S_KBD_CONTROL.CHAR_HEAD,D ; Decrement the index +.39769c 68 pla return_head PLA ; Get the character back +.39769d 80 02 bra $3976a1 BRA done ; And return it +.39769f a9 00 lda #$00 return_empty LDA #0 ; Return: 0 for no character +.3976a1 28 plp done PLP +.3976a2 2b pld PLD +.3976a3 fa plx PLX +.3976a4 6b rtl RTL +.3976a5 KBD_GET_SCANCODE +.3976a5 da phx PHX +.3976a6 0b phd PHD +.3976a7 08 php PHP +.3976a8 48 pha PHA ; begin setdp macro +.3976a9 08 php PHP +.3976aa c2 20 rep #$20 REP #$20 ; set A long +.3976ac a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 +.3976af 5b tcd TCD +.3976b0 28 plp PLP +.3976b1 68 pla PLA ; end setdp macro +.3976b2 78 sei SEI ; Disable IRQ for the duration of this routine to avoid race conditions +.3976b3 e2 30 sep #$30 SEP #$30 ; set A&X short +.3976b5 a6 13 ldx $0f13 LDX #S_KBD_CONTROL.SC_HEAD,D ; Get the index of the next free spot +.3976b7 f0 21 beq $3976da BEQ return_empty ; If it's 0, we have no data +.3976b9 a5 03 lda $0f03 LDA #S_KBD_CONTROL.SC_BUF,D ; Get the scan code at the head of the queue +.3976bb 48 pha PHA ; Save it +.3976bc a6 13 ldx $0f13 LDX #S_KBD_CONTROL.SC_HEAD,D ; How many bytes were there? +.3976be e0 01 cpx #$01 CPX #1 ; Is it one? +.3976c0 d0 08 bne $3976ca BNE copy_down ; No: we need to copy down the remaining bytes +.3976c2 64 13 stz $0f13 STZ #S_KBD_CONTROL.SC_HEAD,D ; Yes: mark that we have no data in the queue now +.3976c4 a9 01 lda #$01 LDA #KBD_STAT_SCAN ; Clear the KBD_STAT_SCAN bit +.3976c6 14 02 trb $0f02 TRB #S_KBD_CONTROL.STATUS,D +.3976c8 80 0d bra $3976d7 BRA return_head ; And return the scan code we found +.3976ca a2 00 ldx #$00 copy_down LDX #0 ; Starting at the beginning of the buffer... +.3976cc b5 04 lda $0f04,x loop LDA #S_KBD_CONTROL.SC_BUF+1,D,X ; Get the next byte +.3976ce 85 03 sta $0f03 STA #S_KBD_CONTROL.SC_BUF,D ; Move it down +.3976d0 e8 inx INX ; And move to the next byte +.3976d1 e4 13 cpx $0f13 CPX #S_KBD_CONTROL.SC_HEAD,D ; Have we reached the end? +.3976d3 d0 f7 bne $3976cc BNE loop ; No: keep copying bytes +.3976d5 c6 13 dec $0f13 DEC #S_KBD_CONTROL.SC_HEAD,D ; Reduce the index to the next free byte +.3976d7 68 pla return_head PLA ; Get the scan code back +.3976d8 80 02 bra $3976dc BRA done ; And return it +.3976da a9 00 lda #$00 return_empty LDA #0 ; Return: 0 for no scan code +.3976dc 28 plp done PLP +.3976dd 2b pld PLD +.3976de fa plx PLX +.3976df 6b rtl RTL +.3976e0 KBD_GETMODS +.3976e0 0b phd PHD +.3976e1 08 php PHP +.3976e2 48 pha PHA ; begin setdp macro +.3976e3 08 php PHP +.3976e4 c2 20 rep #$20 REP #$20 ; set A long +.3976e6 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 +.3976e9 5b tcd TCD +.3976ea 28 plp PLP +.3976eb 68 pla PLA ; end setdp macro +.3976ec e2 20 sep #$20 SEP #$20 ; set A short +.3976ee a5 25 lda $0f25 LDA #S_KBD_CONTROL.MODIFIERS,D +.3976f0 28 plp PLP +.3976f1 2b pld PLD +.3976f2 6b rtl RTL +.3976f3 KBD_GET_STAT +.3976f3 0b phd PHD +.3976f4 08 php PHP +.3976f5 48 pha PHA ; begin setdp macro +.3976f6 08 php PHP +.3976f7 c2 20 rep #$20 REP #$20 ; set A long +.3976f9 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 +.3976fc 5b tcd TCD +.3976fd 28 plp PLP +.3976fe 68 pla PLA ; end setdp macro +.3976ff e2 20 sep #$20 SEP #$20 ; set A short +.397701 a5 02 lda $0f02 LDA #S_KBD_CONTROL.STATUS,D +.397703 28 plp PLP +.397704 2b pld PLD +.397705 6b rtl RTL +.397706 KBD_TEST_BREAK +.397706 0b phd PHD +.397707 08 php PHP +.397708 48 pha PHA ; begin setdp macro +.397709 08 php PHP +.39770a c2 20 rep #$20 REP #$20 ; set A long +.39770c a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 +.39770f 5b tcd TCD +.397710 28 plp PLP +.397711 68 pla PLA ; end setdp macro +.397712 e2 20 sep #$20 SEP #$20 ; set A short +.397714 a9 80 lda #$80 LDA #KBD_STAT_BREAK ; Check the BREAK bit in STATUS +.397716 14 02 trb $0f02 TRB #S_KBD_CONTROL.STATUS,D ; ... and clear it +.397718 d0 04 bne $39771e BNE ret_true ; If it was set, return TRUE +.39771a 28 plp ret_false PLP ; Otherwise, return false +.39771b 2b pld PLD +.39771c 18 clc CLC +.39771d 6b rtl RTL +.39771e 28 plp ret_true PLP +.39771f 2b pld PLD +.397720 38 sec SEC +.397721 6b rtl RTL +.397722 KBD_GETMODS_ANSI +.397722 0b phd PHD +.397723 08 php PHP +.397724 48 pha PHA ; begin setdp macro +.397725 08 php PHP +.397726 c2 20 rep #$20 REP #$20 ; set A long +.397728 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 +.39772b 5b tcd TCD +.39772c 28 plp PLP +.39772d 68 pla PLA ; end setdp macro +.39772e e2 30 sep #$30 SEP #$30 ; set A&X short +.397730 a9 00 lda #$00 LDA #0 ; Make space for the result code +.397732 48 pha PHA +>0001 l_result .byte ? +.397733 a5 25 lda $0f25 LDA #S_KBD_CONTROL.MODIFIERS,D +.397735 89 03 bit #$03 BIT #KBD_MOD_LSHIFT | KBD_MOD_RSHIFT +.397737 f0 06 beq $39773f BEQ check_alt +.397739 a3 01 lda $01,s LDA l_result +.39773b 09 02 ora #$02 ORA #%00000010 +.39773d 83 01 sta $01,s STA l_result +.39773f a5 25 lda $0f25 check_alt LDA #S_KBD_CONTROL.MODIFIERS,D +.397741 89 30 bit #$30 BIT #KBD_MOD_LALT | KBD_MOD_RALT +.397743 f0 06 beq $39774b BEQ check_ctrl +.397745 a3 01 lda $01,s LDA l_result +.397747 09 04 ora #$04 ORA #%00000100 +.397749 83 01 sta $01,s STA l_result +.39774b a5 25 lda $0f25 check_ctrl LDA #S_KBD_CONTROL.MODIFIERS,D +.39774d 89 0c bit #$0c BIT #KBD_MOD_LCTRL | KBD_MOD_RCTRL +.39774f f0 06 beq $397757 BEQ return_result +.397751 a3 01 lda $01,s LDA l_result +.397753 09 08 ora #$08 ORA #%00001000 +.397755 83 01 sta $01,s STA l_result +.397757 68 pla return_result PLA +.397758 28 plp PLP +.397759 2b pld PLD +.39775a 6b rtl RTL +.39775b KBD_GETLOCKS +.39775b 0b phd PHD +.39775c 08 php PHP +.39775d 48 pha PHA ; begin setdp macro .39775e 08 php PHP -.39775f 48 pha PHA ; begin setdp macro -.397760 08 php PHP -.397761 c2 20 rep #$20 REP #$20 ; set A long -.397763 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 -.397766 5b tcd TCD -.397767 28 plp PLP -.397768 68 pla PLA ; end setdp macro -.397769 e2 20 sep #$20 SEP #$20 ; set A short -.39776b a5 02 lda $0f02 LDA #S_KBD_CONTROL.STATUS,D -.39776d 28 plp PLP -.39776e 2b pld PLD -.39776f 6b rtl RTL -.397770 KBD_TEST_BREAK -.397770 0b phd PHD +.39775f c2 20 rep #$20 REP #$20 ; set A long +.397761 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 +.397764 5b tcd TCD +.397765 28 plp PLP +.397766 68 pla PLA ; end setdp macro +.397767 e2 20 sep #$20 SEP #$20 ; set A short +.397769 a5 26 lda $0f26 LDA #S_KBD_CONTROL.LOCKS,D +.39776b 28 plp PLP +.39776c 2b pld PLD +.39776d 6b rtl RTL +.39776e KBD_SETLOCKS +.39776e 0b phd PHD +.39776f 08 php PHP +.397770 48 pha PHA ; begin setdp macro .397771 08 php PHP -.397772 48 pha PHA ; begin setdp macro -.397773 08 php PHP -.397774 c2 20 rep #$20 REP #$20 ; set A long -.397776 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 -.397779 5b tcd TCD -.39777a 28 plp PLP -.39777b 68 pla PLA ; end setdp macro -.39777c e2 20 sep #$20 SEP #$20 ; set A short -.39777e a9 80 lda #$80 LDA #KBD_STAT_BREAK ; Check the BREAK bit in STATUS -.397780 14 02 trb $0f02 TRB #S_KBD_CONTROL.STATUS,D ; ... and clear it -.397782 d0 04 bne $397788 BNE ret_true ; If it was set, return TRUE -.397784 28 plp ret_false PLP ; Otherwise, return false -.397785 2b pld PLD -.397786 18 clc CLC +.397772 c2 20 rep #$20 REP #$20 ; set A long +.397774 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 +.397777 5b tcd TCD +.397778 28 plp PLP +.397779 68 pla PLA ; end setdp macro +.39777a e2 20 sep #$20 SEP #$20 ; set A short +.39777c 85 26 sta $0f26 STA #S_KBD_CONTROL.LOCKS,D +.39777e aa tax TAX ; Move the new status to X... +.39777f a9 ed lda #$ed LDA #KBD_CMD_SET_LED ; Set the LEDs... +.397781 22 1b 75 39 jsl $39751b JSL KBD_SND_CMD_P +.397785 28 plp PLP +.397786 2b pld PLD .397787 6b rtl RTL -.397788 28 plp ret_true PLP -.397789 2b pld PLD -.39778a 38 sec SEC -.39778b 6b rtl RTL -.39778c KBD_GETMODS_ANSI -.39778c 0b phd PHD -.39778d 08 php PHP -.39778e 48 pha PHA ; begin setdp macro -.39778f 08 php PHP -.397790 c2 20 rep #$20 REP #$20 ; set A long -.397792 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 -.397795 5b tcd TCD -.397796 28 plp PLP -.397797 68 pla PLA ; end setdp macro -.397798 e2 30 sep #$30 SEP #$30 ; set A&X short -.39779a a9 00 lda #$00 LDA #0 ; Make space for the result code -.39779c 48 pha PHA ->0001 l_result .byte ? -.39779d a5 25 lda $0f25 LDA #S_KBD_CONTROL.MODIFIERS,D -.39779f 89 03 bit #$03 BIT #KBD_MOD_LSHIFT | KBD_MOD_RSHIFT -.3977a1 f0 06 beq $3977a9 BEQ check_alt -.3977a3 a3 01 lda $01,s LDA l_result -.3977a5 09 02 ora #$02 ORA #%00000010 -.3977a7 83 01 sta $01,s STA l_result -.3977a9 a5 25 lda $0f25 check_alt LDA #S_KBD_CONTROL.MODIFIERS,D -.3977ab 89 30 bit #$30 BIT #KBD_MOD_LALT | KBD_MOD_RALT -.3977ad f0 06 beq $3977b5 BEQ check_ctrl -.3977af a3 01 lda $01,s LDA l_result -.3977b1 09 04 ora #$04 ORA #%00000100 -.3977b3 83 01 sta $01,s STA l_result -.3977b5 a5 25 lda $0f25 check_ctrl LDA #S_KBD_CONTROL.MODIFIERS,D -.3977b7 89 0c bit #$0c BIT #KBD_MOD_LCTRL | KBD_MOD_RCTRL -.3977b9 f0 06 beq $3977c1 BEQ return_result -.3977bb a3 01 lda $01,s LDA l_result -.3977bd 09 08 ora #$08 ORA #%00001000 -.3977bf 83 01 sta $01,s STA l_result -.3977c1 68 pla return_result PLA -.3977c2 28 plp PLP -.3977c3 2b pld PLD -.3977c4 6b rtl RTL -.3977c5 KBD_GETLOCKS -.3977c5 0b phd PHD -.3977c6 08 php PHP -.3977c7 48 pha PHA ; begin setdp macro -.3977c8 08 php PHP -.3977c9 c2 20 rep #$20 REP #$20 ; set A long -.3977cb a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 -.3977ce 5b tcd TCD -.3977cf 28 plp PLP -.3977d0 68 pla PLA ; end setdp macro -.3977d1 e2 20 sep #$20 SEP #$20 ; set A short -.3977d3 a5 26 lda $0f26 LDA #S_KBD_CONTROL.LOCKS,D -.3977d5 28 plp PLP -.3977d6 2b pld PLD -.3977d7 6b rtl RTL -.3977d8 KBD_SETLOCKS -.3977d8 0b phd PHD -.3977d9 08 php PHP -.3977da 48 pha PHA ; begin setdp macro -.3977db 08 php PHP -.3977dc c2 20 rep #$20 REP #$20 ; set A long -.3977de a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 -.3977e1 5b tcd TCD -.3977e2 28 plp PLP -.3977e3 68 pla PLA ; end setdp macro -.3977e4 e2 20 sep #$20 SEP #$20 ; set A short -.3977e6 85 26 sta $0f26 STA #S_KBD_CONTROL.LOCKS,D -.3977e8 aa tax TAX ; Move the new status to X... -.3977e9 a9 ed lda #$ed LDA #KBD_CMD_SET_LED ; Set the LEDs... -.3977eb 22 85 75 39 jsl $397585 JSL KBD_SND_CMD_P -.3977ef 28 plp PLP -.3977f0 2b pld PLD -.3977f1 6b rtl RTL -.3977f2 KBD_GET_CONTROL -.3977f2 0b phd PHD -.3977f3 08 php PHP -.3977f4 48 pha PHA ; begin setdp macro -.3977f5 08 php PHP -.3977f6 c2 20 rep #$20 REP #$20 ; set A long -.3977f8 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 -.3977fb 5b tcd TCD -.3977fc 28 plp PLP -.3977fd 68 pla PLA ; end setdp macro -.3977fe e2 20 sep #$20 SEP #$20 ; set A short -.397800 a5 01 lda $0f01 LDA #S_KBD_CONTROL.CONTROL,D -.397802 28 plp PLP -.397803 2b pld PLD -.397804 6b rtl RTL -.397805 KBD_SET_CONTROL -.397805 0b phd PHD -.397806 08 php PHP -.397807 48 pha PHA ; begin setdp macro -.397808 08 php PHP -.397809 c2 20 rep #$20 REP #$20 ; set A long -.39780b a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 -.39780e 5b tcd TCD -.39780f 28 plp PLP -.397810 68 pla PLA ; end setdp macro -.397811 e2 20 sep #$20 SEP #$20 ; set A short -.397813 85 01 sta $0f01 STA #S_KBD_CONTROL.CONTROL,D -.397815 28 plp PLP -.397816 2b pld PLD -.397817 6b rtl RTL -.397818 KBD_GETCW -.397818 22 24 78 39 jsl $397824 JSL KBD_GETC -.39781c c9 00 cmp #$00 CMP #0 -.39781e f0 01 beq $397821 BEQ wait -.397820 6b rtl RTL -.397821 cb wai wait WAI -.397822 80 f4 bra $397818 BRA KBD_GETCW -.397824 KBD_GETC -.397824 0b phd PHD -.397825 08 php PHP -.397826 48 pha PHA ; begin setdp macro -.397827 08 php PHP -.397828 c2 20 rep #$20 REP #$20 ; set A long -.39782a a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 -.39782d 5b tcd TCD -.39782e 28 plp PLP -.39782f 68 pla PLA ; end setdp macro -.397830 e2 30 sep #$30 SEP #$30 ; set A&X short -.397832 22 d4 76 39 jsl $3976d4 JSL KBD_CHAR_DEQUEUE ; Try to fetch a character from the character queue -.397836 c9 00 cmp #$00 CMP #0 ; Did we get anything back? -.397838 f0 03 beq $39783d BEQ get_scancode ; No: try to get a scan code -.39783a 82 cb 00 brl $397908 BRL done ; Yes: return the character we had queued -.39783d 22 0f 77 39 jsl $39770f get_scancode JSL KBD_GET_SCANCODE ; Fetch the next scancode -.397841 c9 00 cmp #$00 CMP #0 ; Is it NUL? -.397843 d0 04 bne $397849 BNE chk_make_break -.397845 28 plp PLP ; Yes: return 0... we got nothin -.397846 38 sec SEC -.397847 2b pld PLD -.397848 6b rtl RTL -.397849 89 80 bit #$80 chk_make_break BIT #$80 ; Is it a break scan code? -.39784b d0 08 bne $397855 BNE handle_break ; Yes: process the break -.39784d c9 2a cmp #$2a handle_make CMP #KBD_SC_LSHIFT ; Is it a make LSHIFT? -.39784f d0 0c bne $39785d BNE not_make_ls -.397851 a9 01 lda #$01 LDA #KBD_MOD_LSHIFT -.397853 80 4e bra $3978a3 BRA set_modifier -.397855 c9 aa cmp #$aa handle_break CMP #KBD_SC_LSHIFT | $80 ; Is it a break LSHIFT? -.397857 d0 0c bne $397865 BNE not_break_ls -.397859 a9 01 lda #$01 LDA #KBD_MOD_LSHIFT -.39785b 80 50 bra $3978ad BRA clr_modifier -.39785d c9 1d cmp #$1d not_make_ls CMP #KBD_SC_LCTRL ; Is it a make LCTRL? -.39785f d0 0c bne $39786d BNE not_make_lc -.397861 a9 04 lda #$04 LDA #KBD_MOD_LCTRL -.397863 80 3e bra $3978a3 BRA set_modifier -.397865 c9 9d cmp #$9d not_break_ls CMP #KBD_SC_LCTRL | $80 ; Is it a break LCTRL? -.397867 d0 0c bne $397875 BNE not_break_lc -.397869 a9 04 lda #$04 LDA #KBD_MOD_LCTRL -.39786b 80 40 bra $3978ad BRA clr_modifier -.39786d c9 38 cmp #$38 not_make_lc CMP #KBD_SC_LALT ; Is it a make LALT? -.39786f d0 0c bne $39787d BNE not_make_la -.397871 a9 10 lda #$10 LDA #KBD_MOD_LALT -.397873 80 2e bra $3978a3 BRA set_modifier -.397875 c9 b8 cmp #$b8 not_break_lc CMP #KBD_SC_LALT | $80 ; Is it a break LALT? -.397877 d0 0c bne $397885 BNE not_break_la -.397879 a9 10 lda #$10 LDA #KBD_MOD_LALT -.39787b 80 30 bra $3978ad BRA clr_modifier -.39787d c9 36 cmp #$36 not_make_la CMP #KBD_SC_RSHIFT ; Is it a make RSHIFT? -.39787f d0 0c bne $39788d BNE not_make_rs -.397881 a9 02 lda #$02 LDA #KBD_MOD_RSHIFT -.397883 80 1e bra $3978a3 BRA set_modifier -.397885 c9 b6 cmp #$b6 not_break_la CMP #KBD_SC_RSHIFT | $80 ; Is it a break RSHIFT? -.397887 d0 0c bne $397895 BNE not_break_rs -.397889 a9 02 lda #$02 LDA #KBD_MOD_RSHIFT -.39788b 80 20 bra $3978ad BRA clr_modifier -.39788d c9 5e cmp #$5e not_make_rs CMP #KBD_SC_RCTRL ; Is it a make RCTRL? -.39788f d0 0c bne $39789d BNE not_make_rc -.397891 a9 08 lda #$08 LDA #KBD_MOD_RCTRL -.397893 80 0e bra $3978a3 BRA set_modifier -.397895 c9 de cmp #$de not_break_rs CMP #KBD_SC_RCTRL | $80 ; Is it a break RCTRL? -.397897 d0 0e bne $3978a7 BNE not_break_rc -.397899 a9 08 lda #$08 LDA #KBD_MOD_RCTRL -.39789b 80 10 bra $3978ad BRA clr_modifier -.39789d c9 5c cmp #$5c not_make_rc CMP #KBD_SC_RALT ; Is it a make RALT? -.39789f d0 12 bne $3978b3 BNE not_make_ra -.3978a1 a9 20 lda #$20 LDA #KBD_MOD_RALT -.3978a3 04 25 tsb $0f25 set_modifier TSB #S_KBD_CONTROL.MODIFIERS,D ; Set the indicated modifier bit -.3978a5 80 08 bra $3978af BRA return_null -.3978a7 c9 dc cmp #$dc not_break_rc CMP #KBD_SC_RALT | $80 ; Is it a break RALT? -.3978a9 d0 04 bne $3978af BNE return_null ; No: we don't use any other break scan codes -.3978ab a9 20 lda #$20 LDA #KBD_MOD_RALT -.3978ad 14 25 trb $0f25 clr_modifier TRB #S_KBD_CONTROL.MODIFIERS,D ; Clear the indicated modifier bit -.3978af a9 00 lda #$00 return_null LDA #0 -.3978b1 80 55 bra $397908 BRA done -.3978b3 a8 tay not_make_ra TAY ; Use the scan code as an index... -.3978b4 c9 38 cmp #$38 CMP #KBD_SC_PIVOT -.3978b6 90 0e bcc $3978c6 BLT below_38 -.3978b8 a5 26 lda $0f26 LDA #S_KBD_CONTROL.LOCKS,D ; Check the NUM lock -.3978ba 89 02 bit #$02 BIT #KBD_LOCK_NUMBER -.3978bc f0 2a beq $3978e8 BEQ fetch_unmod ; No: translate the keys as unmodified -.3978be a5 25 lda $0f25 chk_num_shift LDA #S_KBD_CONTROL.MODIFIERS,D -.3978c0 89 03 bit #$03 BIT #KBD_MOD_LSHIFT | KBD_MOD_RSHIFT ; Check for a shift key being pressed -.3978c2 d0 24 bne $3978e8 BNE fetch_unmod ; If so: translate the keys as modified -.3978c4 80 30 bra $3978f6 BRA fetch_caps ; No: translate the key using the lock table -.3978c6 a5 25 lda $0f25 below_38 LDA #S_KBD_CONTROL.MODIFIERS,D -.3978c8 89 0c bit #$0c BIT #KBD_MOD_LCTRL | KBD_MOD_RCTRL ; Is either control key pressed? -.3978ca f0 0c beq $3978d8 BEQ chk_capslock ; No: check for capslock -.3978cc 89 03 bit #$03 BIT #KBD_MOD_LSHIFT | KBD_MOD_RSHIFT ; Is either shift key pressed? -.3978ce f0 04 beq $3978d4 BEQ fetch_control ; No: translate just based off of control -.3978d0 b7 3b lda [$0f3b],y LDA [#S_KBD_CONTROL.TBL_CTRL_SHIFT,D],Y ; Look up the key modfified by CTRL and SHIFT -.3978d2 80 26 bra $3978fa BRA chk_ansi -.3978d4 b7 2f lda [$0f2f],y fetch_control LDA [#S_KBD_CONTROL.TBL_CTRL,D],Y ; Look up the key modified by CONTROL -.3978d6 80 22 bra $3978fa BRA chk_ansi -.3978d8 a5 26 lda $0f26 chk_capslock LDA #S_KBD_CONTROL.LOCKS,D ; Check the CAPS lock -.3978da 89 04 bit #$04 BIT #KBD_LOCK_CAPS -.3978dc d0 0e bne $3978ec BNE chk_caps_shift ; Yes: check the state of the SHIFT key -.3978de a5 25 lda $0f25 LDA #S_KBD_CONTROL.MODIFIERS,D -.3978e0 89 03 bit #$03 BIT #KBD_MOD_LSHIFT | KBD_MOD_RSHIFT ; Is either shift key pressed? -.3978e2 f0 04 beq $3978e8 BEQ fetch_unmod ; No: translate just based off of control -.3978e4 b7 2b lda [$0f2b],y fetch_shifted LDA [#S_KBD_CONTROL.TBL_SHIFT,D],Y ; Look up the key modified by SHIFT -.3978e6 80 12 bra $3978fa BRA chk_ansi -.3978e8 b7 27 lda [$0f27],y fetch_unmod LDA [#S_KBD_CONTROL.TBL_UNMOD,D],Y ; Look up the unmodified key -.3978ea 80 0e bra $3978fa BRA chk_ansi -.3978ec a5 25 lda $0f25 chk_caps_shift LDA #S_KBD_CONTROL.MODIFIERS,D -.3978ee 89 03 bit #$03 BIT #KBD_MOD_LSHIFT | KBD_MOD_RSHIFT ; Is either shift key pressed? -.3978f0 f0 04 beq $3978f6 BEQ fetch_caps ; No: translate just based off of control -.3978f2 b7 37 lda [$0f37],y LDA [#S_KBD_CONTROL.TBL_LOCK_SHIFT,D],Y ; Look up the key modified by CAPS and SHIFT -.3978f4 80 04 bra $3978fa BRA chk_ansi -.3978f6 b7 33 lda [$0f33],y fetch_caps LDA [#S_KBD_CONTROL.TBL_LOCK,D],Y ; Look up the key modified by CAPSLOCK -.3978f8 80 00 bra $3978fa BRA chk_ansi -.3978fa c9 80 cmp #$80 chk_ansi CMP #$80 ; Check to see if we have an ANSI escape sequence to send -.3978fc 90 0a bcc $397908 BLT done ; If not, just return the character -.3978fe c9 96 cmp #$96 CMP #$96 -.397900 b0 06 bcs $397908 BGE done -.397902 22 44 79 39 jsl $397944 JSL KBD_ENQ_ANSI ; Expand and enqueue the ANSI sequence -.397906 a9 1b lda #$1b LDA #CHAR_ESC ; And return the ESC key to start the sequence -.397908 28 plp done PLP -.397909 2b pld PLD -.39790a 18 clc CLC -.39790b 6b rtl RTL -.39790c KBD_ENQUEUE_BCD -.39790c 08 php PHP -.39790d e2 30 sep #$30 SEP #$30 ; set A&X short -.39790f 48 pha PHA ; Save the value -.397910 4a lsr a LSR A ; Get the 10s digit -.397911 4a lsr a LSR A -.397912 4a lsr a LSR A -.397913 4a lsr a LSR A -.397914 c9 00 cmp #$00 CMP #0 ; If it's 0, move to the 1s digit -.397916 f0 0b beq $397923 BEQ enqueue_1 -.397918 c9 0a cmp #$0a CMP #$0A ; If it's out of range, ignore this whole call -.39791a b0 13 bcs $39792f BGE done_A -.39791c 18 clc CLC ; Enqueue the tens digit -.39791d 69 30 adc #$30 ADC #'0' -.39791f 22 af 76 39 jsl $3976af JSL KBD_CHAR_ENQUEUE -.397923 68 pla enqueue_1 PLA ; Enqueue the ones digit -.397924 29 0f and #$0f AND #$0F -.397926 18 clc CLC -.397927 69 30 adc #$30 ADC #'0' -.397929 22 af 76 39 jsl $3976af JSL KBD_CHAR_ENQUEUE -.39792d 28 plp done PLP -.39792e 6b rtl RTL -.39792f 68 pla done_A PLA -.397930 80 fb bra $39792d BRA done -.397932 KBD_BIN_TO_BCD -.397932 da phx PHX -.397933 08 php PHP -.397934 e2 30 sep #$30 SEP #$30 ; set A&X short -.397936 aa tax TAX -.397937 a9 99 lda #$99 LDA #$99 ; Start with -1 in BCD form -.397939 f8 sed SED ; Switch to Decimal arithmetic -.39793a 18 clc loop CLC -.39793b 69 01 adc #$01 ADC #1 ; Add 1 with BCD arithmetic -.39793d ca dex DEX ; Decrement input value in X -.39793e 10 fa bpl $39793a BPL loop ; loop until input value < 0 -.397940 d8 cld CLD ; Switch back to Binary arithmetic -.397941 28 plp PLP -.397942 fa plx PLX -.397943 6b rtl RTL -.397944 KBD_ENQ_ANSI -.397944 08 php PHP -.397945 e2 30 sep #$30 SEP #$30 ; set A&X short -.397947 c9 80 cmp #$80 CMP #$80 ; check to make sure the code is within range -.397949 b0 03 bcs $39794e BGE chk_high_end -.39794b 82 4a 00 brl $397998 BRL done ; Out of range, just ignore it -.39794e c9 96 cmp #$96 chk_high_end CMP #$96 -.397950 90 03 bcc $397955 BLT save_value -.397952 82 43 00 brl $397998 BRL done ; Out of range, just ignore it -.397955 48 pha save_value PHA -.397956 a9 5b lda #$5b LDA #'[' -.397958 22 af 76 39 jsl $3976af JSL KBD_CHAR_ENQUEUE -.39795c 68 pla PLA -.39795d 38 sec SEC -.39795e e9 80 sbc #$80 SBC #$80 ; Convert to an offset -.397960 aa tax TAX ; And use it as an index to... -.397961 bf 9a 79 39 lda $39799a,x LDA @l ENCODE_CODE,X ; Get the number -.397965 10 0b bpl $397972 BPL send_number ; If MSB is not set, send the number as-is -.397967 29 7f and #$7f AND #$7F ; Remove the MSB -.397969 18 clc CLC -.39796a 69 41 adc #$41 ADC #'A' ; Convert to 'A' .. 'D' -.39796c 22 af 76 39 jsl $3976af JSL KBD_CHAR_ENQUEUE ; Enqueue the code -.397970 80 26 bra $397998 BRA done -.397972 22 32 79 39 jsl $397932 send_number JSL KBD_BIN_TO_BCD ; Convert A to BCD -.397976 22 0c 79 39 jsl $39790c JSL KBD_ENQUEUE_BCD ; Enqueue the BCD value -.39797a 22 8c 77 39 jsl $39778c chk_modifier JSL KBD_GETMODS_ANSI ; Get the modifiers -.39797e c9 00 cmp #$00 CMP #0 ; Are there any? -.397980 f0 10 beq $397992 BEQ close ; No: close the sequence -.397982 48 pha PHA -.397983 a9 3b lda #$3b LDA #';' ; Enqueue the separator -.397985 22 af 76 39 jsl $3976af JSL KBD_CHAR_ENQUEUE -.397989 68 pla PLA -.39798a 22 32 79 39 jsl $397932 JSL KBD_BIN_TO_BCD ; Convert A to BCD -.39798e 22 0c 79 39 jsl $39790c JSL KBD_ENQUEUE_BCD ; Enqueue the BCD value -.397992 a9 7e lda #$7e close LDA #'~' ; Enqueue closing code -.397994 22 af 76 39 jsl $3976af JSL KBD_CHAR_ENQUEUE -.397998 28 plp done PLP -.397999 6b rtl RTL ->39799a 01 02 03 04 05 06 ENCODE_CODE .byte 1, 2, 3, 4, 5, 6 ; Insert, etc... ->3979a0 80 81 82 83 .byte $80, $81, $82, $83 ; Cursor keys ->3979a4 0b 0c 0d 0e 0f .byte 11, 12, 13, 14, 15 ; F1 - F5 ->3979a9 11 12 13 14 15 .byte 17, 18, 19, 20, 21 ; F6 - F10 ->3979ae 17 18 .byte 23, 24 ; F11 - F12 -.3979b0 KBD_SETTABLE -.3979b0 48 pha PHA -.3979b1 8b phb PHB -.3979b2 0b phd PHD -.3979b3 08 php PHP -.3979b4 48 pha PHA ; begin setdp macro -.3979b5 08 php PHP -.3979b6 c2 20 rep #$20 REP #$20 ; set A long -.3979b8 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 -.3979bb 5b tcd TCD -.3979bc 28 plp PLP -.3979bd 68 pla PLA ; end setdp macro -.3979be e2 20 sep #$20 SEP #$20 ; set A short -.3979c0 8b phb PHB ; Get the data bank into A -.3979c1 68 pla PLA -.3979c2 c2 20 rep #$20 REP #$20 ; set A long -.3979c4 29 ff 00 and #$00ff AND #$00FF -.3979c7 85 29 sta $0f29 STA #S_KBD_CONTROL.TBL_UNMOD+2,D -.3979c9 85 2d sta $0f2d STA #S_KBD_CONTROL.TBL_SHIFT+2,D -.3979cb 85 31 sta $0f31 STA #S_KBD_CONTROL.TBL_CTRL+2,D -.3979cd 85 35 sta $0f35 STA #S_KBD_CONTROL.TBL_LOCK+2,D -.3979cf 85 39 sta $0f39 STA #S_KBD_CONTROL.TBL_LOCK_SHIFT+2,D -.3979d1 85 3d sta $0f3d STA #S_KBD_CONTROL.TBL_CTRL_SHIFT+2,D -.3979d3 86 27 stx $0f27 STX #S_KBD_CONTROL.TBL_UNMOD,D -.3979d5 86 2b stx $0f2b STX #S_KBD_CONTROL.TBL_SHIFT,D -.3979d7 86 2f stx $0f2f STX #S_KBD_CONTROL.TBL_CTRL,D -.3979d9 86 33 stx $0f33 STX #S_KBD_CONTROL.TBL_LOCK,D -.3979db 86 37 stx $0f37 STX #S_KBD_CONTROL.TBL_LOCK_SHIFT,D -.3979dd 86 3b stx $0f3b STX #S_KBD_CONTROL.TBL_CTRL_SHIFT,D -.3979df 28 plp PLP -.3979e0 2b pld PLD -.3979e1 ab plb PLB -.3979e2 68 pla PLA -.3979e3 6b rtl RTL ->3979e4 .align 256 +.397788 KBD_GET_CONTROL +.397788 0b phd PHD +.397789 08 php PHP +.39778a 48 pha PHA ; begin setdp macro +.39778b 08 php PHP +.39778c c2 20 rep #$20 REP #$20 ; set A long +.39778e a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 +.397791 5b tcd TCD +.397792 28 plp PLP +.397793 68 pla PLA ; end setdp macro +.397794 e2 20 sep #$20 SEP #$20 ; set A short +.397796 a5 01 lda $0f01 LDA #S_KBD_CONTROL.CONTROL,D +.397798 28 plp PLP +.397799 2b pld PLD +.39779a 6b rtl RTL +.39779b KBD_SET_CONTROL +.39779b 0b phd PHD +.39779c 08 php PHP +.39779d 48 pha PHA ; begin setdp macro +.39779e 08 php PHP +.39779f c2 20 rep #$20 REP #$20 ; set A long +.3977a1 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 +.3977a4 5b tcd TCD +.3977a5 28 plp PLP +.3977a6 68 pla PLA ; end setdp macro +.3977a7 e2 20 sep #$20 SEP #$20 ; set A short +.3977a9 85 01 sta $0f01 STA #S_KBD_CONTROL.CONTROL,D +.3977ab 28 plp PLP +.3977ac 2b pld PLD +.3977ad 6b rtl RTL +.3977ae KBD_GETCW +.3977ae 22 ba 77 39 jsl $3977ba JSL KBD_GETC +.3977b2 c9 00 cmp #$00 CMP #0 +.3977b4 f0 01 beq $3977b7 BEQ wait +.3977b6 6b rtl RTL +.3977b7 cb wai wait WAI +.3977b8 80 f4 bra $3977ae BRA KBD_GETCW +.3977ba KBD_GETC +.3977ba 0b phd PHD +.3977bb 08 php PHP +.3977bc 48 pha PHA ; begin setdp macro +.3977bd 08 php PHP +.3977be c2 20 rep #$20 REP #$20 ; set A long +.3977c0 a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 +.3977c3 5b tcd TCD +.3977c4 28 plp PLP +.3977c5 68 pla PLA ; end setdp macro +.3977c6 e2 30 sep #$30 SEP #$30 ; set A&X short +.3977c8 22 6a 76 39 jsl $39766a JSL KBD_CHAR_DEQUEUE ; Try to fetch a character from the character queue +.3977cc c9 00 cmp #$00 CMP #0 ; Did we get anything back? +.3977ce f0 03 beq $3977d3 BEQ get_scancode ; No: try to get a scan code +.3977d0 82 cb 00 brl $39789e BRL done ; Yes: return the character we had queued +.3977d3 22 a5 76 39 jsl $3976a5 get_scancode JSL KBD_GET_SCANCODE ; Fetch the next scancode +.3977d7 c9 00 cmp #$00 CMP #0 ; Is it NUL? +.3977d9 d0 04 bne $3977df BNE chk_make_break +.3977db 28 plp PLP ; Yes: return 0... we got nothin +.3977dc 38 sec SEC +.3977dd 2b pld PLD +.3977de 6b rtl RTL +.3977df 89 80 bit #$80 chk_make_break BIT #$80 ; Is it a break scan code? +.3977e1 d0 08 bne $3977eb BNE handle_break ; Yes: process the break +.3977e3 c9 2a cmp #$2a handle_make CMP #KBD_SC_LSHIFT ; Is it a make LSHIFT? +.3977e5 d0 0c bne $3977f3 BNE not_make_ls +.3977e7 a9 01 lda #$01 LDA #KBD_MOD_LSHIFT +.3977e9 80 4e bra $397839 BRA set_modifier +.3977eb c9 aa cmp #$aa handle_break CMP #KBD_SC_LSHIFT | $80 ; Is it a break LSHIFT? +.3977ed d0 0c bne $3977fb BNE not_break_ls +.3977ef a9 01 lda #$01 LDA #KBD_MOD_LSHIFT +.3977f1 80 50 bra $397843 BRA clr_modifier +.3977f3 c9 1d cmp #$1d not_make_ls CMP #KBD_SC_LCTRL ; Is it a make LCTRL? +.3977f5 d0 0c bne $397803 BNE not_make_lc +.3977f7 a9 04 lda #$04 LDA #KBD_MOD_LCTRL +.3977f9 80 3e bra $397839 BRA set_modifier +.3977fb c9 9d cmp #$9d not_break_ls CMP #KBD_SC_LCTRL | $80 ; Is it a break LCTRL? +.3977fd d0 0c bne $39780b BNE not_break_lc +.3977ff a9 04 lda #$04 LDA #KBD_MOD_LCTRL +.397801 80 40 bra $397843 BRA clr_modifier +.397803 c9 38 cmp #$38 not_make_lc CMP #KBD_SC_LALT ; Is it a make LALT? +.397805 d0 0c bne $397813 BNE not_make_la +.397807 a9 10 lda #$10 LDA #KBD_MOD_LALT +.397809 80 2e bra $397839 BRA set_modifier +.39780b c9 b8 cmp #$b8 not_break_lc CMP #KBD_SC_LALT | $80 ; Is it a break LALT? +.39780d d0 0c bne $39781b BNE not_break_la +.39780f a9 10 lda #$10 LDA #KBD_MOD_LALT +.397811 80 30 bra $397843 BRA clr_modifier +.397813 c9 36 cmp #$36 not_make_la CMP #KBD_SC_RSHIFT ; Is it a make RSHIFT? +.397815 d0 0c bne $397823 BNE not_make_rs +.397817 a9 02 lda #$02 LDA #KBD_MOD_RSHIFT +.397819 80 1e bra $397839 BRA set_modifier +.39781b c9 b6 cmp #$b6 not_break_la CMP #KBD_SC_RSHIFT | $80 ; Is it a break RSHIFT? +.39781d d0 0c bne $39782b BNE not_break_rs +.39781f a9 02 lda #$02 LDA #KBD_MOD_RSHIFT +.397821 80 20 bra $397843 BRA clr_modifier +.397823 c9 5e cmp #$5e not_make_rs CMP #KBD_SC_RCTRL ; Is it a make RCTRL? +.397825 d0 0c bne $397833 BNE not_make_rc +.397827 a9 08 lda #$08 LDA #KBD_MOD_RCTRL +.397829 80 0e bra $397839 BRA set_modifier +.39782b c9 de cmp #$de not_break_rs CMP #KBD_SC_RCTRL | $80 ; Is it a break RCTRL? +.39782d d0 0e bne $39783d BNE not_break_rc +.39782f a9 08 lda #$08 LDA #KBD_MOD_RCTRL +.397831 80 10 bra $397843 BRA clr_modifier +.397833 c9 5c cmp #$5c not_make_rc CMP #KBD_SC_RALT ; Is it a make RALT? +.397835 d0 12 bne $397849 BNE not_make_ra +.397837 a9 20 lda #$20 LDA #KBD_MOD_RALT +.397839 04 25 tsb $0f25 set_modifier TSB #S_KBD_CONTROL.MODIFIERS,D ; Set the indicated modifier bit +.39783b 80 08 bra $397845 BRA return_null +.39783d c9 dc cmp #$dc not_break_rc CMP #KBD_SC_RALT | $80 ; Is it a break RALT? +.39783f d0 04 bne $397845 BNE return_null ; No: we don't use any other break scan codes +.397841 a9 20 lda #$20 LDA #KBD_MOD_RALT +.397843 14 25 trb $0f25 clr_modifier TRB #S_KBD_CONTROL.MODIFIERS,D ; Clear the indicated modifier bit +.397845 a9 00 lda #$00 return_null LDA #0 +.397847 80 55 bra $39789e BRA done +.397849 a8 tay not_make_ra TAY ; Use the scan code as an index... +.39784a c9 38 cmp #$38 CMP #KBD_SC_PIVOT +.39784c 90 0e bcc $39785c BLT below_38 +.39784e a5 26 lda $0f26 LDA #S_KBD_CONTROL.LOCKS,D ; Check the NUM lock +.397850 89 02 bit #$02 BIT #KBD_LOCK_NUMBER +.397852 f0 2a beq $39787e BEQ fetch_unmod ; No: translate the keys as unmodified +.397854 a5 25 lda $0f25 chk_num_shift LDA #S_KBD_CONTROL.MODIFIERS,D +.397856 89 03 bit #$03 BIT #KBD_MOD_LSHIFT | KBD_MOD_RSHIFT ; Check for a shift key being pressed +.397858 d0 24 bne $39787e BNE fetch_unmod ; If so: translate the keys as modified +.39785a 80 30 bra $39788c BRA fetch_caps ; No: translate the key using the lock table +.39785c a5 25 lda $0f25 below_38 LDA #S_KBD_CONTROL.MODIFIERS,D +.39785e 89 0c bit #$0c BIT #KBD_MOD_LCTRL | KBD_MOD_RCTRL ; Is either control key pressed? +.397860 f0 0c beq $39786e BEQ chk_capslock ; No: check for capslock +.397862 89 03 bit #$03 BIT #KBD_MOD_LSHIFT | KBD_MOD_RSHIFT ; Is either shift key pressed? +.397864 f0 04 beq $39786a BEQ fetch_control ; No: translate just based off of control +.397866 b7 3b lda [$0f3b],y LDA [#S_KBD_CONTROL.TBL_CTRL_SHIFT,D],Y ; Look up the key modfified by CTRL and SHIFT +.397868 80 26 bra $397890 BRA chk_ansi +.39786a b7 2f lda [$0f2f],y fetch_control LDA [#S_KBD_CONTROL.TBL_CTRL,D],Y ; Look up the key modified by CONTROL +.39786c 80 22 bra $397890 BRA chk_ansi +.39786e a5 26 lda $0f26 chk_capslock LDA #S_KBD_CONTROL.LOCKS,D ; Check the CAPS lock +.397870 89 04 bit #$04 BIT #KBD_LOCK_CAPS +.397872 d0 0e bne $397882 BNE chk_caps_shift ; Yes: check the state of the SHIFT key +.397874 a5 25 lda $0f25 LDA #S_KBD_CONTROL.MODIFIERS,D +.397876 89 03 bit #$03 BIT #KBD_MOD_LSHIFT | KBD_MOD_RSHIFT ; Is either shift key pressed? +.397878 f0 04 beq $39787e BEQ fetch_unmod ; No: translate just based off of control +.39787a b7 2b lda [$0f2b],y fetch_shifted LDA [#S_KBD_CONTROL.TBL_SHIFT,D],Y ; Look up the key modified by SHIFT +.39787c 80 12 bra $397890 BRA chk_ansi +.39787e b7 27 lda [$0f27],y fetch_unmod LDA [#S_KBD_CONTROL.TBL_UNMOD,D],Y ; Look up the unmodified key +.397880 80 0e bra $397890 BRA chk_ansi +.397882 a5 25 lda $0f25 chk_caps_shift LDA #S_KBD_CONTROL.MODIFIERS,D +.397884 89 03 bit #$03 BIT #KBD_MOD_LSHIFT | KBD_MOD_RSHIFT ; Is either shift key pressed? +.397886 f0 04 beq $39788c BEQ fetch_caps ; No: translate just based off of control +.397888 b7 37 lda [$0f37],y LDA [#S_KBD_CONTROL.TBL_LOCK_SHIFT,D],Y ; Look up the key modified by CAPS and SHIFT +.39788a 80 04 bra $397890 BRA chk_ansi +.39788c b7 33 lda [$0f33],y fetch_caps LDA [#S_KBD_CONTROL.TBL_LOCK,D],Y ; Look up the key modified by CAPSLOCK +.39788e 80 00 bra $397890 BRA chk_ansi +.397890 c9 80 cmp #$80 chk_ansi CMP #$80 ; Check to see if we have an ANSI escape sequence to send +.397892 90 0a bcc $39789e BLT done ; If not, just return the character +.397894 c9 96 cmp #$96 CMP #$96 +.397896 b0 06 bcs $39789e BGE done +.397898 22 da 78 39 jsl $3978da JSL KBD_ENQ_ANSI ; Expand and enqueue the ANSI sequence +.39789c a9 1b lda #$1b LDA #CHAR_ESC ; And return the ESC key to start the sequence +.39789e 28 plp done PLP +.39789f 2b pld PLD +.3978a0 18 clc CLC +.3978a1 6b rtl RTL +.3978a2 KBD_ENQUEUE_BCD +.3978a2 08 php PHP +.3978a3 e2 30 sep #$30 SEP #$30 ; set A&X short +.3978a5 48 pha PHA ; Save the value +.3978a6 4a lsr a LSR A ; Get the 10s digit +.3978a7 4a lsr a LSR A +.3978a8 4a lsr a LSR A +.3978a9 4a lsr a LSR A +.3978aa c9 00 cmp #$00 CMP #0 ; If it's 0, move to the 1s digit +.3978ac f0 0b beq $3978b9 BEQ enqueue_1 +.3978ae c9 0a cmp #$0a CMP #$0A ; If it's out of range, ignore this whole call +.3978b0 b0 13 bcs $3978c5 BGE done_A +.3978b2 18 clc CLC ; Enqueue the tens digit +.3978b3 69 30 adc #$30 ADC #'0' +.3978b5 22 45 76 39 jsl $397645 JSL KBD_CHAR_ENQUEUE +.3978b9 68 pla enqueue_1 PLA ; Enqueue the ones digit +.3978ba 29 0f and #$0f AND #$0F +.3978bc 18 clc CLC +.3978bd 69 30 adc #$30 ADC #'0' +.3978bf 22 45 76 39 jsl $397645 JSL KBD_CHAR_ENQUEUE +.3978c3 28 plp done PLP +.3978c4 6b rtl RTL +.3978c5 68 pla done_A PLA +.3978c6 80 fb bra $3978c3 BRA done +.3978c8 KBD_BIN_TO_BCD +.3978c8 da phx PHX +.3978c9 08 php PHP +.3978ca e2 30 sep #$30 SEP #$30 ; set A&X short +.3978cc aa tax TAX +.3978cd a9 99 lda #$99 LDA #$99 ; Start with -1 in BCD form +.3978cf f8 sed SED ; Switch to Decimal arithmetic +.3978d0 18 clc loop CLC +.3978d1 69 01 adc #$01 ADC #1 ; Add 1 with BCD arithmetic +.3978d3 ca dex DEX ; Decrement input value in X +.3978d4 10 fa bpl $3978d0 BPL loop ; loop until input value < 0 +.3978d6 d8 cld CLD ; Switch back to Binary arithmetic +.3978d7 28 plp PLP +.3978d8 fa plx PLX +.3978d9 6b rtl RTL +.3978da KBD_ENQ_ANSI +.3978da 08 php PHP +.3978db e2 30 sep #$30 SEP #$30 ; set A&X short +.3978dd c9 80 cmp #$80 CMP #$80 ; check to make sure the code is within range +.3978df b0 03 bcs $3978e4 BGE chk_high_end +.3978e1 82 4a 00 brl $39792e BRL done ; Out of range, just ignore it +.3978e4 c9 96 cmp #$96 chk_high_end CMP #$96 +.3978e6 90 03 bcc $3978eb BLT save_value +.3978e8 82 43 00 brl $39792e BRL done ; Out of range, just ignore it +.3978eb 48 pha save_value PHA +.3978ec a9 5b lda #$5b LDA #'[' +.3978ee 22 45 76 39 jsl $397645 JSL KBD_CHAR_ENQUEUE +.3978f2 68 pla PLA +.3978f3 38 sec SEC +.3978f4 e9 80 sbc #$80 SBC #$80 ; Convert to an offset +.3978f6 aa tax TAX ; And use it as an index to... +.3978f7 bf 30 79 39 lda $397930,x LDA @l ENCODE_CODE,X ; Get the number +.3978fb 10 0b bpl $397908 BPL send_number ; If MSB is not set, send the number as-is +.3978fd 29 7f and #$7f AND #$7F ; Remove the MSB +.3978ff 18 clc CLC +.397900 69 41 adc #$41 ADC #'A' ; Convert to 'A' .. 'D' +.397902 22 45 76 39 jsl $397645 JSL KBD_CHAR_ENQUEUE ; Enqueue the code +.397906 80 26 bra $39792e BRA done +.397908 22 c8 78 39 jsl $3978c8 send_number JSL KBD_BIN_TO_BCD ; Convert A to BCD +.39790c 22 a2 78 39 jsl $3978a2 JSL KBD_ENQUEUE_BCD ; Enqueue the BCD value +.397910 22 22 77 39 jsl $397722 chk_modifier JSL KBD_GETMODS_ANSI ; Get the modifiers +.397914 c9 00 cmp #$00 CMP #0 ; Are there any? +.397916 f0 10 beq $397928 BEQ close ; No: close the sequence +.397918 48 pha PHA +.397919 a9 3b lda #$3b LDA #';' ; Enqueue the separator +.39791b 22 45 76 39 jsl $397645 JSL KBD_CHAR_ENQUEUE +.39791f 68 pla PLA +.397920 22 c8 78 39 jsl $3978c8 JSL KBD_BIN_TO_BCD ; Convert A to BCD +.397924 22 a2 78 39 jsl $3978a2 JSL KBD_ENQUEUE_BCD ; Enqueue the BCD value +.397928 a9 7e lda #$7e close LDA #'~' ; Enqueue closing code +.39792a 22 45 76 39 jsl $397645 JSL KBD_CHAR_ENQUEUE +.39792e 28 plp done PLP +.39792f 6b rtl RTL +>397930 01 02 03 04 05 06 ENCODE_CODE .byte 1, 2, 3, 4, 5, 6 ; Insert, etc... +>397936 80 81 82 83 .byte $80, $81, $82, $83 ; Cursor keys +>39793a 0b 0c 0d 0e 0f .byte 11, 12, 13, 14, 15 ; F1 - F5 +>39793f 11 12 13 14 15 .byte 17, 18, 19, 20, 21 ; F6 - F10 +>397944 17 18 .byte 23, 24 ; F11 - F12 +.397946 KBD_SETTABLE +.397946 48 pha PHA +.397947 8b phb PHB +.397948 0b phd PHD +.397949 08 php PHP +.39794a 48 pha PHA ; begin setdp macro +.39794b 08 php PHP +.39794c c2 20 rep #$20 REP #$20 ; set A long +.39794e a9 00 0f lda #$0f00 LDA #<>KBD_VARS ; set DP to page 0 +.397951 5b tcd TCD +.397952 28 plp PLP +.397953 68 pla PLA ; end setdp macro +.397954 e2 20 sep #$20 SEP #$20 ; set A short +.397956 8b phb PHB ; Get the data bank into A +.397957 68 pla PLA +.397958 c2 20 rep #$20 REP #$20 ; set A long +.39795a 29 ff 00 and #$00ff AND #$00FF +.39795d 85 29 sta $0f29 STA #S_KBD_CONTROL.TBL_UNMOD+2,D +.39795f 85 2d sta $0f2d STA #S_KBD_CONTROL.TBL_SHIFT+2,D +.397961 85 31 sta $0f31 STA #S_KBD_CONTROL.TBL_CTRL+2,D +.397963 85 35 sta $0f35 STA #S_KBD_CONTROL.TBL_LOCK+2,D +.397965 85 39 sta $0f39 STA #S_KBD_CONTROL.TBL_LOCK_SHIFT+2,D +.397967 85 3d sta $0f3d STA #S_KBD_CONTROL.TBL_CTRL_SHIFT+2,D +.397969 86 27 stx $0f27 STX #S_KBD_CONTROL.TBL_UNMOD,D +.39796b 86 2b stx $0f2b STX #S_KBD_CONTROL.TBL_SHIFT,D +.39796d 86 2f stx $0f2f STX #S_KBD_CONTROL.TBL_CTRL,D +.39796f 86 33 stx $0f33 STX #S_KBD_CONTROL.TBL_LOCK,D +.397971 86 37 stx $0f37 STX #S_KBD_CONTROL.TBL_LOCK_SHIFT,D +.397973 86 3b stx $0f3b STX #S_KBD_CONTROL.TBL_CTRL_SHIFT,D +.397975 28 plp PLP +.397976 2b pld PLD +.397977 ab plb PLB +.397978 68 pla PLA +.397979 6b rtl RTL +>39797a .align 256 >397a00 00 01 02 03 04 05 06 07 TBL_SET1 .byte $00, $01, $02, $03, $04, $05, $06, $07 ; $00 - $07 >397a08 08 09 0a 0b 0c 0d 0e 0f .byte $08, $09, $0A, $0B, $0C, $0D, $0E, $0F ; $08 - $0F >397a10 10 11 12 13 14 15 16 17 .byte $10, $11, $12, $13, $14, $15, $16, $17 ; $10 - $17 @@ -15727,7 +15677,7 @@ ;****** Return to file: src\kernel.asm -;****** Processing file: src\drivers/mouse_driver.asm +;****** Processing file: src\Libraries/mouse_driver.asm .397f00 IINITMOUSE .397f00 48 pha PHA @@ -16030,9 +15980,9 @@ ;****** Processing file: src\version.asm ->398248 76 30 2e 34 2e 30 2d 61 .text "v0.4.0-alpha+321 (2021-06-04)" ->398250 6c 70 68 61 2b 33 32 31 20 28 32 30 32 31 2d 30 ->398260 36 2d 30 34 29 +>398248 76 30 2e 34 2e 30 2d 61 .text "v0.4.0-alpha+333 (2021-08-07)" +>398250 6c 70 68 61 2b 33 33 33 20 28 32 30 32 31 2d 30 +>398260 38 2d 30 37 29 ;****** Return to file: src\kernel.asm @@ -16378,8 +16328,8 @@ >398de8 00 01 01 00 00 00 00 00 >398df0 00 00 00 00 00 00 00 00 .text $00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00 >398df8 00 00 00 00 00 00 00 00 ->3a0000 5c 72 8a 3a 5c 84 70 3a .binary "binaries/basic816_3A0000.bin" ->3a0008 5c 76 27 3a 5c ba 02 3a 5c 58 00 3a 5c b8 00 3a +>3a0000 5c 67 8a 3a 5c 79 70 3a .binary "binaries/basic816_3A0000.bin" +>3a0008 5c 6b 27 3a 5c ba 02 3a 5c 58 00 3a 5c b8 00 3a >3a0018 5c 0f 04 3a 5c 5e 02 3a 5c 79 02 3a 5c 80 02 3a >3a0028 0b 08 08 c2 20 48 a9 00 08 5b 68 28 e2 20 85 b5 >3a0038 c2 20 a5 a6 d0 06 e2 20 a5 a8 f0 11 c2 10 a4 ab @@ -16480,90 +16430,90 @@ >3a0628 60 28 c2 02 60 08 c2 30 a9 ff ff 85 23 85 25 e2 >3a0638 20 a9 00 85 27 28 60 08 c2 30 a9 00 00 85 23 85 >3a0648 25 e2 20 a9 00 85 27 28 60 08 e2 20 a5 27 c9 00 ->3a0658 f0 07 c9 01 d0 05 20 0a 5c 28 60 08 c2 20 48 a9 +>3a0658 f0 07 c9 01 d0 05 20 ff 5b 28 60 08 c2 20 48 a9 >3a0668 00 08 5b 68 28 e2 20 a9 04 8f d3 08 00 c2 20 29 ->3a0678 ff 00 20 5e 1e e2 20 dc d4 08 08 e2 20 a5 2d c9 +>3a0678 ff 00 20 5b 1e e2 20 dc d4 08 08 e2 20 a5 2d c9 >3a0688 00 f0 37 c9 01 d0 35 c2 20 a5 25 48 a5 23 48 c2 >3a0698 20 a5 29 85 23 a5 2b 85 25 e2 20 a9 01 85 27 20 ->3a06a8 0a 5c c2 20 a5 23 85 29 a5 25 85 2b e2 20 a9 00 +>3a06a8 ff 5b c2 20 a5 23 85 29 a5 25 85 2b e2 20 a9 00 >3a06b8 85 2d c2 20 68 85 23 68 85 25 28 60 08 c2 20 48 >3a06c8 a9 00 08 5b 68 28 e2 20 a9 04 8f d3 08 00 c2 20 ->3a06d8 29 ff 00 20 5e 1e e2 20 dc d4 08 08 e2 20 a5 27 +>3a06d8 29 ff 00 20 5b 1e e2 20 dc d4 08 08 e2 20 a5 27 >3a06e8 c9 02 d0 02 28 60 08 c2 20 48 a9 00 08 5b 68 28 ->3a06f8 e2 20 a9 04 8f d3 08 00 c2 20 29 ff 00 20 5e 1e +>3a06f8 e2 20 a9 04 8f d3 08 00 c2 20 29 ff 00 20 5b 1e >3a0708 e2 20 dc d4 08 08 e2 20 a5 27 c9 00 f0 07 c9 01 ->3a0718 d0 0b 20 0a 5c c2 20 a5 25 d0 21 28 60 08 c2 20 +>3a0718 d0 0b 20 ff 5b c2 20 a5 25 d0 21 28 60 08 c2 20 >3a0728 48 a9 00 08 5b 68 28 e2 20 a9 04 8f d3 08 00 c2 ->3a0738 20 29 ff 00 20 5e 1e e2 20 dc d4 08 08 c2 20 48 +>3a0738 20 29 ff 00 20 5b 1e e2 20 dc d4 08 08 c2 20 48 >3a0748 a9 00 08 5b 68 28 e2 20 a9 09 8f d3 08 00 c2 20 ->3a0758 29 ff 00 20 5e 1e e2 20 dc d4 08 08 e2 20 a5 27 ->3a0768 c9 00 f0 07 c9 01 d0 11 20 0a 5c a5 26 d0 29 a5 +>3a0758 29 ff 00 20 5b 1e e2 20 dc d4 08 08 e2 20 a5 27 +>3a0768 c9 00 f0 07 c9 01 d0 11 20 ff 5b a5 26 d0 29 a5 >3a0778 25 d0 25 a5 24 d0 21 28 60 08 c2 20 48 a9 00 08 >3a0788 5b 68 28 e2 20 a9 04 8f d3 08 00 c2 20 29 ff 00 ->3a0798 20 5e 1e e2 20 dc d4 08 08 c2 20 48 a9 00 08 5b +>3a0798 20 5b 1e e2 20 dc d4 08 08 c2 20 48 a9 00 08 5b >3a07a8 68 28 e2 20 a9 09 8f d3 08 00 c2 20 29 ff 00 20 ->3a07b8 5e 1e e2 20 dc d4 08 08 e2 20 a5 27 c9 01 f0 26 +>3a07b8 5b 1e e2 20 dc d4 08 08 e2 20 a5 27 c9 01 f0 26 >3a07c8 c9 00 f0 1f 08 c2 20 48 a9 00 08 5b 68 28 e2 20 ->3a07d8 a9 04 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 ->3a07e8 dc d4 08 20 04 5c 28 60 08 e2 20 a5 2d c9 01 f0 +>3a07d8 a9 04 8f d3 08 00 c2 20 29 ff 00 20 5b 1e e2 20 +>3a07e8 dc d4 08 20 f9 5b 28 60 08 e2 20 a5 2d c9 01 f0 >3a07f8 26 c9 00 f0 1f 08 c2 20 48 a9 00 08 5b 68 28 e2 ->3a0808 20 a9 04 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 +>3a0808 20 a9 04 8f d3 08 00 c2 20 29 ff 00 20 5b 1e e2 >3a0818 20 dc d4 08 20 21 08 28 60 c2 20 a5 25 48 a5 23 >3a0828 48 c2 20 a5 29 85 23 a5 2b 85 25 e2 20 a9 00 85 ->3a0838 27 20 04 5c c2 20 a5 23 85 29 a5 25 85 2b e2 20 +>3a0838 27 20 f9 5b c2 20 a5 23 85 29 a5 25 85 2b e2 20 >3a0848 a9 01 85 2d c2 20 68 85 23 68 85 25 60 08 e2 20 >3a0858 a5 27 c9 00 f0 23 c9 01 f0 2e 08 c2 20 48 a9 00 >3a0868 08 5b 68 28 e2 20 a9 04 8f d3 08 00 c2 20 29 ff ->3a0878 00 20 5e 1e e2 20 dc d4 08 a5 2d c9 00 f0 16 c9 ->3a0888 01 d0 d7 20 04 5c 80 0d a5 2d c9 01 f0 07 c9 00 +>3a0878 00 20 5b 1e e2 20 dc d4 08 a5 2d c9 00 f0 16 c9 +>3a0888 01 d0 d7 20 f9 5b 80 0d a5 2d c9 01 f0 07 c9 00 >3a0898 d0 c8 20 21 08 e2 20 a5 27 28 60 08 e2 20 a5 27 >3a08a8 c9 02 d0 25 a5 2d c9 02 f0 24 08 c2 20 48 a9 00 >3a08b8 08 5b 68 28 e2 20 a9 04 8f d3 08 00 c2 20 29 ff ->3a08c8 00 20 5e 1e e2 20 dc d4 08 20 55 08 a5 27 28 60 +>3a08c8 00 20 5b 1e e2 20 dc d4 08 20 55 08 a5 27 28 60 >3a08d8 08 0b 08 c2 20 48 a9 00 08 5b 68 28 c2 30 64 23 >3a08e8 64 25 e2 20 64 27 a7 00 c9 26 f0 44 e2 20 a7 00 >3a08f8 20 fb 04 90 76 20 7a 05 38 e9 30 c2 20 29 ff 00 ->3a0908 18 65 23 85 23 a5 25 69 00 00 85 25 20 1d 21 80 +>3a0908 18 65 23 85 23 a5 25 69 00 00 85 25 20 1a 21 80 >3a0918 db 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 02 8f ->3a0928 d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 ->3a0938 20 1d 21 a7 00 c9 48 f0 04 c9 68 d0 d4 20 1d 21 +>3a0928 d3 08 00 c2 20 29 ff 00 20 5b 1e e2 20 dc d4 08 +>3a0938 20 1a 21 a7 00 c9 48 f0 04 c9 68 d0 d4 20 1a 21 >3a0948 e2 20 a7 00 20 0c 05 90 22 20 2d 05 c2 20 06 23 >3a0958 26 25 06 23 26 25 06 23 26 25 06 23 26 25 29 ff ->3a0968 00 18 65 23 85 23 20 1d 21 80 d5 2b 28 60 08 c2 +>3a0968 00 18 65 23 85 23 20 1a 21 80 d5 2b 28 60 08 c2 >3a0978 30 a5 04 f0 1c 38 a5 04 e5 1a a8 e2 20 b7 1a f0 >3a0988 10 c9 20 f0 06 c9 09 f0 02 28 60 88 c0 ff ff d0 >3a0998 ec a9 00 60 08 0b 08 c2 20 48 a9 00 08 5b 68 28 ->3a09a8 c2 30 a5 1a 85 00 e2 20 a5 1c 85 02 20 3e 21 a7 +>3a09a8 c2 30 a5 1a 85 00 e2 20 a5 1c 85 02 20 3b 21 a7 >3a09b8 00 20 fb 04 90 0c 20 d8 08 c2 20 a5 23 85 d7 20 ->3a09c8 3e 21 c2 20 a5 00 85 1a e2 20 a5 02 85 1c 20 ea +>3a09c8 3b 21 c2 20 a5 00 85 1a e2 20 a5 02 85 1c 20 ea >3a09d8 09 e2 20 20 5b 0a c9 00 f0 05 20 06 0c 80 f4 2b >3a09e8 28 60 08 c2 20 a5 1a 85 00 a5 1c 85 02 a2 00 00 >3a09f8 e2 20 a0 00 00 e0 00 00 f0 0d b7 00 f0 53 c9 3a >3a0a08 f0 04 c9 20 d0 33 c8 b7 00 f0 46 c9 52 f0 10 c9 >3a0a18 72 d0 26 b7 00 f0 3a c9 52 f0 04 c9 72 d0 1a c8 >3a0a28 b7 00 f0 2d c9 45 f0 04 c9 65 d0 0d c8 b7 00 f0 ->3a0a38 20 c9 4d f0 0a c9 6d f0 06 e8 20 1d 21 80 b3 a7 ->3a0a48 00 c9 3a d0 03 20 1d 21 a9 03 85 1e a9 91 20 06 +>3a0a38 20 c9 4d f0 0a c9 6d f0 06 e8 20 1a 21 80 b3 a7 +>3a0a48 00 c9 3a d0 03 20 1a 21 a9 03 85 1e a9 91 20 06 >3a0a58 0c 28 60 08 0b 08 c2 20 48 a9 00 08 5b 68 28 e2 >3a0a68 20 a9 7f 85 1e c2 10 20 bb 0b a5 1e d0 03 4c fb >3a0a78 0a c2 20 a5 1a 85 00 e2 20 a5 1c 85 02 c2 20 64 >3a0a88 04 64 06 e2 30 a0 00 b7 00 f0 da c9 91 f0 d6 c8 >3a0a98 c4 1e 90 f3 c2 10 a7 00 c9 22 d0 05 20 1d 0b 80 >3a0aa8 28 a5 1e c9 03 90 19 c2 20 a5 00 c5 1a d0 08 e2 ->3a0ab8 20 a5 02 c5 1c f0 09 e2 20 a7 04 20 4d 51 b0 09 +>3a0ab8 20 a5 02 c5 1c f0 09 e2 20 a7 04 20 42 51 b0 09 >3a0ac8 e2 20 20 2d 0b c9 00 d0 11 c2 20 a5 00 85 04 e2 ->3a0ad8 20 a5 02 85 06 20 1d 21 80 a9 c9 81 d0 15 20 76 +>3a0ad8 20 a5 02 85 06 20 1a 21 80 a9 c9 81 d0 15 20 76 >3a0ae8 09 c9 00 f0 11 89 80 f0 08 c9 90 f0 04 a9 af 80 >3a0af8 02 a9 81 2b 28 60 08 c2 20 48 a9 00 08 5b 68 28 ->3a0b08 e2 20 a9 02 8f d3 08 00 c2 20 29 ff 00 20 5e 1e ->3a0b18 e2 20 dc d4 08 08 e2 20 20 1d 21 a7 00 f0 04 c9 +>3a0b08 e2 20 a9 02 8f d3 08 00 c2 20 29 ff 00 20 5b 1e +>3a0b18 e2 20 dc d4 08 08 e2 20 20 1a 21 a7 00 f0 04 c9 >3a0b28 22 d0 f5 28 60 da 5a 08 0b 08 c2 20 48 a9 00 08 >3a0b38 5b 68 28 c2 20 a5 04 d0 0a e2 20 a5 04 d0 04 a9 ->3a0b48 00 80 0a e2 20 a7 04 20 4d 51 a9 00 2a 85 28 c2 +>3a0b48 00 80 0a e2 20 a7 04 20 42 51 a9 00 2a 85 28 c2 >3a0b58 30 a9 fb 0c 85 08 e2 20 a9 3a 85 0a a2 80 00 e2 >3a0b68 20 a0 01 00 b7 08 f0 31 c5 1e d0 32 c2 30 a0 02 >3a0b78 00 b7 08 85 0c e2 20 a9 3a 85 0e a5 28 f0 07 a7 ->3a0b88 0c 20 4d 51 b0 18 e2 10 a0 00 b7 00 20 56 05 d7 +>3a0b88 0c 20 42 51 b0 18 e2 10 a0 00 b7 00 20 56 05 d7 >3a0b98 0c d0 0b c8 c4 1e 90 f2 8a 2b 28 7a fa 60 c2 30 >3a0ba8 18 a5 08 69 08 00 85 08 e2 20 a5 0a 69 00 85 0a >3a0bb8 e8 80 ac 08 0b 8b 08 c2 20 48 a9 00 08 5b 68 28 @@ -16586,65 +16536,65 @@ >3a0cc8 c2 20 29 f0 00 2b ab 28 60 08 8b 0b 08 c2 20 48 >3a0cd8 a9 00 08 5b 68 28 08 e2 20 48 a9 3a 48 ab 68 28 >3a0ce8 e2 20 c2 10 20 4a 0c bd 06 00 c2 20 29 ff 00 2b ->3a0cf8 ab 28 60 03 01 10 d0 e3 27 02 00 03 01 12 d0 23 ->3a0d08 28 02 00 02 01 14 d0 5a 28 02 00 02 01 16 d0 91 ->3a0d18 28 02 00 02 03 18 d0 9b 28 02 00 00 01 1c d0 ae ->3a0d28 28 02 00 04 02 1e d0 6c 2a 02 00 04 02 21 d0 2c ->3a0d38 2a 02 00 04 02 24 d0 ec 29 02 00 04 01 27 d0 2c ->3a0d48 29 02 00 04 01 29 d0 ac 29 02 00 04 01 2b d0 6c ->3a0d58 29 02 00 05 03 2d d0 16 29 01 00 06 03 31 d0 e8 ->3a0d68 28 02 00 07 02 35 d0 ff 28 02 00 ff 01 38 d0 00 ->3a0d78 00 00 00 40 01 3a d0 00 00 00 00 20 03 3c d0 7f ->3a0d88 41 00 00 20 05 40 d0 84 45 00 00 20 03 46 d0 cf ->3a0d98 44 00 00 20 04 4a d0 6f 44 00 00 20 03 4f d0 66 ->3a0da8 44 00 00 20 02 53 d0 fe 43 00 00 50 04 56 d0 00 ->3a0db8 00 00 00 50 04 5b d0 00 00 00 00 20 05 60 d0 41 ->3a0dc8 43 00 00 20 06 66 d0 ba 43 00 00 20 03 6d d0 96 +>3a0cf8 ab 28 60 03 01 10 d0 d8 27 02 00 03 01 12 d0 18 +>3a0d08 28 02 00 02 01 14 d0 4f 28 02 00 02 01 16 d0 86 +>3a0d18 28 02 00 02 03 18 d0 90 28 02 00 00 01 1c d0 a3 +>3a0d28 28 02 00 04 02 1e d0 61 2a 02 00 04 02 21 d0 21 +>3a0d38 2a 02 00 04 02 24 d0 e1 29 02 00 04 01 27 d0 21 +>3a0d48 29 02 00 04 01 29 d0 a1 29 02 00 04 01 2b d0 61 +>3a0d58 29 02 00 05 03 2d d0 0b 29 01 00 06 03 31 d0 dd +>3a0d68 28 02 00 07 02 35 d0 f4 28 02 00 ff 01 38 d0 00 +>3a0d78 00 00 00 40 01 3a d0 00 00 00 00 20 03 3c d0 74 +>3a0d88 41 00 00 20 05 40 d0 79 45 00 00 20 03 46 d0 c4 +>3a0d98 44 00 00 20 04 4a d0 64 44 00 00 20 03 4f d0 5b +>3a0da8 44 00 00 20 02 53 d0 f3 43 00 00 50 04 56 d0 00 +>3a0db8 00 00 00 50 04 5b d0 00 00 00 00 20 05 60 d0 36 +>3a0dc8 43 00 00 20 06 66 d0 af 43 00 00 20 03 6d d0 8b >3a0dd8 41 00 00 50 02 71 d0 00 00 00 00 50 04 74 d0 00 ->3a0de8 00 00 00 20 04 79 d0 8a 42 00 00 20 02 7e d0 90 ->3a0df8 41 00 00 20 04 81 d0 93 41 00 00 50 05 86 d0 00 ->3a0e08 00 00 00 50 05 8c d0 00 00 00 00 20 04 92 d0 8d ->3a0e18 41 00 00 20 03 97 d0 c5 44 00 00 20 04 9b d0 60 ->3a0e28 41 00 00 20 04 a0 d0 f0 40 00 00 20 05 a5 d0 86 ->3a0e38 40 00 00 20 05 ab d0 13 40 00 00 20 03 b1 d0 0f ->3a0e48 40 00 00 20 04 b5 d0 f0 3e 00 00 20 04 ba d0 02 ->3a0e58 40 00 00 20 07 bf d0 06 40 00 00 20 03 c7 d0 43 ->3a0e68 3e 00 00 20 04 cb d0 ac 3d 00 00 00 01 d0 d0 ac ->3a0e78 2a 01 00 30 03 d2 d0 9c 4b 00 00 30 04 d6 d0 ec ->3a0e88 4b 00 00 30 05 db d0 b5 4c 00 00 30 05 e1 d0 42 ->3a0e98 4c 00 00 30 04 e7 d0 14 4d 00 00 30 03 ec d0 69 ->3a0ea8 4d 00 00 30 03 f0 d0 ae 4d 00 00 30 03 f4 d0 37 ->3a0eb8 4e 00 00 30 03 f8 d0 c0 4e 00 00 30 03 fc d0 22 ->3a0ec8 4f 00 00 30 04 00 d1 0e 4b 00 00 30 03 05 d1 ad ->3a0ed8 4a 00 00 30 04 09 d1 5f 4a 00 00 30 03 0e d1 09 ->3a0ee8 4a 00 00 30 05 12 d1 40 49 00 00 30 06 18 d1 5f ->3a0ef8 48 00 00 30 04 1f d1 aa 47 00 00 10 03 24 d1 89 ->3a0f08 50 00 00 10 03 28 d1 54 50 00 00 10 04 2c d1 5d ->3a0f18 6c 00 00 10 04 31 d1 a0 50 00 00 10 03 36 d1 84 ->3a0f28 69 00 00 20 05 3a d1 2f 6b 00 00 10 04 40 d1 0a ->3a0f38 6c 00 00 20 05 45 d1 16 6d 00 00 20 03 4b d1 35 ->3a0f48 6e 00 00 10 04 4f d1 a2 6d 00 00 20 06 54 d1 ab ->3a0f58 6e 00 00 20 04 5b d1 cf 6f 00 00 10 07 60 d1 51 ->3a0f68 50 00 00 20 03 68 d1 3a 3d 00 00 20 05 6c d1 4a ->3a0f78 3c 00 00 20 09 72 d1 6b 2c 00 00 20 09 7c d1 f8 ->3a0f88 2b 00 00 20 0a 86 d1 28 2c 00 00 20 07 91 d1 65 ->3a0f98 2b 00 00 30 08 99 d1 61 46 00 00 20 07 a2 d1 fa ->3a0fa8 2a 00 00 30 08 aa d1 cb 46 00 00 20 08 b3 d1 b0 ->3a0fb8 2d 00 00 20 08 bc d1 e4 2c 00 00 20 06 c5 d1 ea ->3a0fc8 2e 00 00 20 09 cc d1 f2 2f 00 00 20 04 d6 d1 4f ->3a0fd8 31 00 00 20 04 db d1 c0 31 00 00 20 04 e0 d1 59 ->3a0fe8 32 00 00 20 06 e5 d1 95 33 00 00 20 08 ec d1 33 ->3a0ff8 34 00 00 20 0a f5 d1 81 34 00 00 20 07 00 d2 b8 ->3a1008 35 00 00 20 07 08 d2 36 36 00 00 20 08 10 d2 a8 ->3a1018 36 00 00 20 06 19 d2 e5 36 00 00 20 07 20 d2 15 +>3a0de8 00 00 00 20 04 79 d0 7f 42 00 00 20 02 7e d0 85 +>3a0df8 41 00 00 20 04 81 d0 88 41 00 00 50 05 86 d0 00 +>3a0e08 00 00 00 50 05 8c d0 00 00 00 00 20 04 92 d0 82 +>3a0e18 41 00 00 20 03 97 d0 ba 44 00 00 20 04 9b d0 55 +>3a0e28 41 00 00 20 04 a0 d0 e5 40 00 00 20 05 a5 d0 7b +>3a0e38 40 00 00 20 05 ab d0 08 40 00 00 20 03 b1 d0 04 +>3a0e48 40 00 00 20 04 b5 d0 e5 3e 00 00 20 04 ba d0 f7 +>3a0e58 3f 00 00 20 07 bf d0 fb 3f 00 00 20 03 c7 d0 38 +>3a0e68 3e 00 00 20 04 cb d0 a1 3d 00 00 00 01 d0 d0 a1 +>3a0e78 2a 01 00 30 03 d2 d0 91 4b 00 00 30 04 d6 d0 e1 +>3a0e88 4b 00 00 30 05 db d0 aa 4c 00 00 30 05 e1 d0 37 +>3a0e98 4c 00 00 30 04 e7 d0 09 4d 00 00 30 03 ec d0 5e +>3a0ea8 4d 00 00 30 03 f0 d0 a3 4d 00 00 30 03 f4 d0 2c +>3a0eb8 4e 00 00 30 03 f8 d0 b5 4e 00 00 30 03 fc d0 17 +>3a0ec8 4f 00 00 30 04 00 d1 03 4b 00 00 30 03 05 d1 a2 +>3a0ed8 4a 00 00 30 04 09 d1 54 4a 00 00 30 03 0e d1 fe +>3a0ee8 49 00 00 30 05 12 d1 35 49 00 00 30 06 18 d1 54 +>3a0ef8 48 00 00 30 04 1f d1 9f 47 00 00 10 03 24 d1 7e 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da 36 00 00 20 07 20 d2 0a >3a1028 3a 00 00 50 06 28 d2 00 00 00 00 50 04 2f d2 00 ->3a1038 00 00 00 20 06 34 d2 2a 3c 00 00 30 03 3b d2 78 ->3a1048 4f 00 00 30 03 3f d2 30 47 00 00 30 03 43 d2 8b ->3a1058 4f 00 00 30 03 47 d2 a1 4f 00 00 30 03 4b d2 b7 ->3a1068 4f 00 00 30 02 4f d2 cd 4f 00 00 30 04 52 d2 e3 ->3a1078 4f 00 00 30 04 57 d2 f9 4f 00 00 30 04 5c d2 0f ->3a1088 50 00 00 30 03 61 d2 25 50 00 00 30 03 65 d2 3b ->3a1098 50 00 00 30 05 69 d2 86 47 00 00 00 00 00 00 00 +>3a1038 00 00 00 20 06 34 d2 1f 3c 00 00 30 03 3b d2 6d +>3a1048 4f 00 00 30 03 3f d2 25 47 00 00 30 03 43 d2 80 +>3a1058 4f 00 00 30 03 47 d2 96 4f 00 00 30 03 4b d2 ac +>3a1068 4f 00 00 30 02 4f d2 c2 4f 00 00 30 04 52 d2 d8 +>3a1078 4f 00 00 30 04 57 d2 ee 4f 00 00 30 04 5c d2 04 +>3a1088 50 00 00 30 03 61 d2 1a 50 00 00 30 03 65 d2 30 +>3a1098 50 00 00 30 05 69 d2 7b 47 00 00 00 00 00 00 00 >3a10a8 00 00 00 08 0b 08 c2 20 48 a9 00 08 5b 68 28 c2 >3a10b8 30 a9 ff ff 85 ba e2 20 a9 37 85 bc c2 20 64 b7 >3a10c8 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d0 f8 20 c5 44 28 60 0b 08 ->3a2598 08 c2 20 48 a9 00 08 5b 68 28 c2 30 a9 00 00 85 ->3a25a8 08 a9 36 00 85 0a a0 02 00 b7 08 f0 1d c5 d7 f0 ->3a25b8 25 b0 1d a0 00 00 18 a5 08 77 08 85 0c a5 0a 69 ->3a25c8 00 00 85 0a a5 0c 85 08 80 dc a9 00 00 28 2b 60 ->3a25d8 a9 01 00 28 2b 60 a9 02 00 28 2b 60 08 c2 30 a9 ->3a25e8 05 00 85 10 a0 00 00 e2 20 b7 1a f0 07 c2 20 e6 ->3a25f8 10 c8 80 f3 c2 20 a5 08 85 00 a5 0a 85 02 18 a5 ->3a2608 d9 69 04 00 85 0c a5 db 69 00 00 85 0e 18 a5 d9 ->3a2618 65 10 85 d9 a5 db 69 00 00 85 db 18 a5 d9 69 04 ->3a2628 00 85 08 a5 db 69 00 00 85 0a 20 a8 24 c2 20 a5 ->3a2638 10 a0 00 00 97 00 a5 d7 a0 02 00 97 00 18 a5 00 ->3a2648 69 04 00 85 00 a5 02 69 00 00 85 02 a0 00 00 e2 ->3a2658 20 b7 1a 97 00 f0 03 c8 80 f7 20 c5 44 28 60 08 ->3a2668 c2 30 85 d7 20 96 25 c9 00 00 f0 2c c9 01 00 f0 ->3a2678 22 c2 20 a5 08 48 a5 0a 48 20 e5 24 68 85 0a 68 ->3a2688 85 08 a5 1a 85 00 a5 1c 85 02 20 3e 21 e2 20 a7 ->3a2698 00 f0 0a 20 e4 25 80 05 a5 d7 20 28 25 28 60 0b ->3a26a8 08 08 c2 20 48 a9 00 08 5b 68 28 e2 20 c2 10 a2 ->3a26b8 00 00 bd 00 4f f0 03 e8 80 f8 86 0c c2 30 8a c9 ->3a26c8 02 00 90 12 3a 18 69 00 4f aa 18 65 8f a8 a5 0c ->3a26d8 3a 8b 44 00 00 ab c2 20 a6 55 a0 00 4f a5 8f 8b ->3a26e8 54 00 3a ab e2 20 a5 0c c9 02 90 18 a6 8f a9 22 ->3a26f8 9d 00 4f e8 bd 00 4f d0 fa a9 22 9d 00 4f a9 00 ->3a2708 e8 9d 00 4f 28 2b 60 da 5a 8b 0b 08 08 c2 20 48 ->3a2718 a9 00 08 5b 68 28 e2 20 c2 10 ad 00 4f c9 23 f0 ->3a2728 0a c9 7c f0 17 28 2b ab 7a fa 60 c2 20 a9 03 00 ->3a2738 85 8f a9 55 27 85 55 20 a7 26 80 e9 c2 20 a9 04 ->3a2748 00 85 8f a9 59 27 85 55 20 a7 26 80 d8 44 49 52 ->3a2758 00 42 52 55 4e 00 8b 08 20 3d 02 08 e2 20 48 a9 ->3a2768 3a 48 ab 68 28 a2 6f d2 20 64 04 28 ab 60 08 e2 ->3a2778 30 a9 01 20 1c 00 20 db 00 c9 00 f0 f9 c9 0d f0 ->3a2788 02 80 f3 28 60 0b 08 08 c2 20 48 a9 00 08 5b 68 ->3a2798 28 c2 30 64 d7 a9 00 4f 85 1a a9 00 00 85 1c 20 ->3a27a8 9c 09 c2 20 a5 d7 d0 05 20 51 23 80 07 20 67 26 ->3a27b8 28 2b 38 60 28 2b 18 60 c2 30 a2 ff fe 9a 20 5e ->3a27c8 27 20 08 00 20 0c 00 22 3c 11 00 a9 00 00 20 1c ->3a27d8 00 20 0f 27 20 8d 27 b0 e8 80 e3 08 e2 20 20 a3 ->3a27e8 08 c9 00 f0 2c c9 01 f0 2d c9 02 f0 1f 08 c2 20 ->3a27f8 48 a9 00 08 5b 68 28 e2 20 a9 04 8f d3 08 00 c2 ->3a2808 20 29 ff 00 20 5e 1e e2 20 dc d4 08 20 51 16 80 ->3a2818 08 20 72 54 80 03 20 e1 56 28 60 08 e2 20 20 55 ->3a2828 08 c9 00 f0 23 c9 01 f0 24 08 c2 20 48 a9 00 08 ->3a2838 5b 68 28 e2 20 a9 04 8f d3 08 00 c2 20 29 ff 00 ->3a2848 20 5e 1e e2 20 dc d4 08 20 84 54 80 03 20 d6 56 ->3a2858 28 60 08 e2 20 20 55 08 c9 00 f0 23 c9 01 f0 24 ->3a2868 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 04 8f d3 ->3a2878 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 20 ->3a2888 96 54 80 03 20 77 57 28 60 20 bf 07 20 f0 07 20 ->3a2898 2c 57 60 a5 23 8f 1a 01 00 a5 29 8f 18 01 00 af ->3a28a8 1e 01 00 85 23 60 08 c2 30 48 20 bf 07 a5 2d c9 ->3a28b8 00 00 d0 0d a5 2b d0 09 da a6 29 20 4a 64 fa 80 ->3a28c8 1c 20 f0 07 c2 20 a5 2b 48 a5 29 48 20 d5 62 c2 ->3a28d8 20 68 85 29 68 85 2b 20 77 57 20 b4 64 68 28 60 ->3a28e8 08 20 51 06 20 82 06 c2 20 a5 23 25 29 85 23 a5 ->3a28f8 25 25 2b 85 25 28 60 08 20 51 06 20 82 06 c2 20 ->3a2908 a5 23 05 29 85 23 a5 25 05 2b 85 25 28 60 08 20 ->3a2918 51 06 c2 20 a5 23 49 ff ff 85 23 a5 25 49 ff ff ->3a2928 85 25 28 60 08 e2 20 20 a3 08 c9 00 f0 2c c9 01 ->3a2938 f0 2d c9 02 f0 1f 08 c2 20 48 a9 00 08 5b 68 28 ->3a2948 e2 20 a9 04 8f d3 08 00 c2 20 29 ff 00 20 5e 1e ->3a2958 e2 20 dc d4 08 20 d9 17 80 08 20 97 55 80 03 20 ->3a2968 0c 5d 28 60 08 e2 20 20 a3 08 c9 00 f0 2c c9 01 ->3a2978 f0 2d c9 02 f0 1f 08 c2 20 48 a9 00 08 5b 68 28 ->3a2988 e2 20 a9 04 8f d3 08 00 c2 20 29 ff 00 20 5e 1e ->3a2998 e2 20 dc d4 08 20 f0 17 80 08 20 b8 55 80 03 20 ->3a29a8 21 5d 28 60 08 e2 20 20 a3 08 c9 00 f0 2c c9 01 ->3a29b8 f0 2d c9 02 f0 1f 08 c2 20 48 a9 00 08 5b 68 28 ->3a29c8 e2 20 a9 04 8f d3 08 00 c2 20 29 ff 00 20 5e 1e ->3a29d8 e2 20 dc d4 08 20 07 18 80 08 20 e5 55 80 03 20 ->3a29e8 36 5d 28 60 08 e2 20 20 a3 08 c9 00 f0 2c c9 01 ->3a29f8 f0 2d c9 02 f0 1f 08 c2 20 48 a9 00 08 5b 68 28 ->3a2a08 e2 20 a9 04 8f d3 08 00 c2 20 29 ff 00 20 5e 1e ->3a2a18 e2 20 dc d4 08 20 1e 18 80 08 20 03 56 80 03 20 ->3a2a28 75 5d 28 60 08 e2 20 20 a3 08 c9 00 f0 2c c9 01 ->3a2a38 f0 2d c9 02 f0 1f 08 c2 20 48 a9 00 08 5b 68 28 ->3a2a48 e2 20 a9 04 8f d3 08 00 c2 20 29 ff 00 20 5e 1e ->3a2a58 e2 20 dc d4 08 20 35 18 80 08 20 21 56 80 03 20 ->3a2a68 60 5d 28 60 08 e2 20 20 a3 08 c9 00 f0 2c c9 01 ->3a2a78 f0 2d c9 02 f0 1f 08 c2 20 48 a9 00 08 5b 68 28 ->3a2a88 e2 20 a9 04 8f d3 08 00 c2 20 29 ff 00 20 5e 1e ->3a2a98 e2 20 dc d4 08 20 4c 18 80 08 20 4e 56 80 03 20 ->3a2aa8 4b 5d 28 60 08 e2 20 a5 27 c9 00 f0 2d c9 01 f0 ->3a2ab8 1f 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 04 8f ->3a2ac8 d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 ->3a2ad8 e2 20 a5 26 49 80 85 26 80 16 c2 20 a5 23 49 ff ->3a2ae8 ff 85 23 a5 25 49 ff ff 85 25 e6 23 d0 02 e6 25 ->3a2af8 28 60 08 e2 20 20 0c 1d 20 63 07 20 ae 05 a5 23 ->3a2b08 0a 0a 0a 0a 05 29 48 a9 2c 20 2a 22 20 0c 1d 20 ->3a2b18 63 07 20 ae 05 a5 23 0a 0a 0a 0a 05 29 48 a9 2c ->3a2b28 20 2a 22 20 0c 1d 20 63 07 20 ae 05 a5 23 0a 0a ->3a2b38 0a 0a 05 29 48 af 0e 08 af 09 0c 8f 0e 08 af 68 ->3a2b48 8f 00 08 af 68 8f 02 08 af 68 8f 04 08 af af 0e ->3a2b58 08 af 29 f7 8f 0e 08 af 20 62 21 28 60 08 e2 20 ->3a2b68 20 0c 1d 20 63 07 20 ae 05 a5 23 0a 0a 0a 0a 05 ->3a2b78 29 48 a9 2c 20 2a 22 20 0c 1d 20 63 07 20 ae 05 ->3a2b88 a5 23 0a 0a 0a 0a 05 29 48 a9 2c 20 2a 22 20 0c ->3a2b98 1d 20 51 06 20 e4 05 c2 20 a5 23 85 92 a5 29 85 ->3a2ba8 23 20 ae 05 e2 20 a5 23 0a 0a 0a 0a 05 29 48 c2 ->3a2bb8 20 a5 92 85 23 20 ae 05 e2 20 a5 23 0a 0a 0a 0a ->3a2bc8 05 29 48 af 0e 08 af 09 0c 8f 0e 08 af 68 8f 0f ->3a2bd8 08 af 68 8f 0a 08 af 68 8f 09 08 af 68 8f 06 08 ->3a2be8 af af 0e 08 af 29 f7 8f 0e 08 af 20 62 21 28 60 ->3a2bf8 08 e2 20 48 20 0c 1d 20 63 07 e2 20 a5 23 29 0f ->3a2c08 0a 0a 0a 0a 83 01 a9 2c 20 2a 22 20 0c 1d 20 63 ->3a2c18 07 a5 23 29 0f 03 01 8f 1e 00 00 e2 20 68 28 60 ->3a2c28 08 c2 20 f4 00 00 e2 20 20 0c 1d 20 63 07 a5 23 ->3a2c38 83 01 a9 2c 20 2a 22 20 0c 1d 20 63 07 a5 23 83 ->3a2c48 02 a9 2c 20 2a 22 20 0c 1d 20 63 07 a5 23 8f 0d ->3a2c58 00 af a3 02 8f 0e 00 af a3 01 8f 0f 00 af c2 20 ->3a2c68 68 28 60 08 c2 20 f4 00 00 e2 20 20 0c 1d 20 51 ->3a2c78 06 a5 23 f0 16 a9 01 8f 04 00 af a9 20 8f 08 00 ->3a2c88 af 8f 09 00 af 22 2c 11 00 80 0a a9 00 8f 04 00 ->3a2c98 af 22 2c 11 00 a9 2c 85 37 20 5f 22 90 39 20 1d ->3a2ca8 21 20 0c 1d 20 63 07 a5 23 83 01 a9 2c 20 2a 22 ->3a2cb8 20 0c 1d 20 63 07 a5 23 83 02 a9 2c 20 2a 22 20 ->3a2cc8 0c 1d 20 63 07 a5 23 8f 05 00 af a3 02 8f 06 00 ->3a2cd8 af a3 01 8f 07 00 af c2 20 68 28 60 08 c2 20 3b ->3a2ce8 38 e9 05 00 1b e2 20 20 0c 1d 20 63 07 a5 23 c9 ->3a2cf8 0a 90 1f 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 ->3a2d08 0a 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc ->3a2d18 d4 08 83 01 a9 2c 20 2a 22 20 0c 1d 20 63 07 a5 ->3a2d28 23 83 02 a9 2c 20 2a 22 20 0c 1d 20 63 07 a5 23 ->3a2d38 83 03 a9 2c 20 2a 22 20 0c 1d 20 63 07 a5 23 83 ->3a2d48 04 a9 2c 20 2a 22 20 0c 1d 20 63 07 a5 23 83 05 ->3a2d58 a9 af 85 a0 a3 01 0a c2 20 29 ff 00 aa bf 9c 2d ->3a2d68 3a 85 9e e2 20 a3 02 c2 20 29 ff 00 0a 0a 18 65 ->3a2d78 9e 85 9e e2 20 a0 02 00 a3 03 97 9e a0 01 00 a3 ->3a2d88 04 97 9e a0 00 00 a3 05 97 9e c2 20 3b 18 69 05 ->3a2d98 00 1b 28 60 00 20 00 24 00 28 00 2c 00 30 00 34 ->3a2da8 00 38 00 3c 40 1f 80 1f da 5a 08 20 0c 1d 20 51 ->3a2db8 06 c2 20 a5 23 89 00 01 d0 17 af 00 00 af 89 00 ->3a2dc8 01 f0 0e e2 20 a9 00 8f 01 00 af a9 01 8f 01 00 ->3a2dd8 af c2 20 a5 23 8f 00 00 af e2 20 a5 24 c2 20 29 ->3a2de8 03 00 0a aa c2 20 bf 37 2e 3a 8f 10 f0 3a bf 3f ->3a2df8 2e 3a 8f 12 f0 3a af 10 f0 3a 8f 08 01 00 af 12 ->3a2e08 f0 3a 8f 0a 01 00 af 0c 01 00 8f 14 f0 3a e2 20 ->3a2e18 af 0e 01 00 8f 16 f0 3a 22 2c 11 00 c2 20 af 1a ->3a2e28 00 00 aa af 1c 00 00 a8 20 20 00 28 7a fa 60 80 ->3a2e38 02 20 03 40 01 90 01 e0 01 58 02 f0 00 2c 01 50 ->3a2e48 00 64 00 28 00 32 00 3c 00 4b 00 1e 00 32 00 48 ->3a2e58 00 5c 00 20 00 2a 00 34 00 43 00 16 00 34 00 da ->3a2e68 08 c2 30 c9 02 00 b0 1c 0a 0a aa bf 00 f0 3a 85 ->3a2e78 9e bf 02 f0 3a 85 a0 c9 f0 00 b0 08 c9 b0 00 90 ->3a2e88 03 28 fa 60 08 c2 20 48 a9 00 08 5b 68 28 e2 20 ->3a2e98 a9 09 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 ->3a2ea8 dc d4 08 da 08 c2 30 c9 02 00 b0 17 0a 0a aa bf ->3a2eb8 08 f0 3a 85 9e bf 0a f0 3a 85 a0 c9 40 00 b0 03 ->3a2ec8 28 fa 60 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 ->3a2ed8 09 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc ->3a2ee8 d4 08 08 c2 30 3b 38 e9 07 00 1b 20 0c 1d 20 63 ->3a2ef8 07 c2 20 a5 23 c9 02 00 b0 59 83 01 e2 20 a9 2c ->3a2f08 20 2a 22 20 0c 1d 20 63 07 a5 23 83 03 a9 2c 20 ->3a2f18 2a 22 20 0c 1d 20 63 07 a3 01 0a 0a 0a aa a3 03 ->3a2f28 d0 05 a5 23 0a 80 04 a5 23 38 2a 9f 00 01 af c2 ->3a2f38 20 a9 2c 00 85 37 20 5f 22 b0 37 c2 20 08 c2 20 ->3a2f48 a9 00 00 85 23 a9 b0 00 85 25 e2 20 a9 00 85 27 ->3a2f58 28 80 27 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 ->3a2f68 09 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc ->3a2f78 d4 08 c2 20 20 1d 21 20 0c 1d c2 20 a3 01 0a 0a ->3a2f88 aa a5 23 9f 00 f0 3a 9f 08 f0 3a 83 04 a5 25 9f ->3a2f98 02 f0 3a 38 e9 b0 00 9f 0a f0 3a 83 06 a3 01 0a ->3a2fa8 0a 0a aa e2 20 a3 04 9f 01 01 af a3 05 9f 02 01 ->3a2fb8 af a3 06 9f 03 01 af a9 00 9f 04 01 af 9f 05 01 ->3a2fc8 af c2 30 3b 18 69 07 00 1b 28 60 08 c2 20 48 a9 ->3a2fd8 00 08 5b 68 28 e2 20 a9 0a 8f d3 08 00 c2 20 29 ->3a2fe8 ff 00 20 5e 1e e2 20 dc d4 08 08 c2 20 20 0c 1d ->3a2ff8 20 63 07 a5 23 20 ab 2e c2 20 a5 9e 8f 05 04 af ->3a3008 af 14 f0 3a 8f 08 04 af e2 20 a5 a0 8f 07 04 af ->3a3018 af 16 f0 3a 8f 0a 04 af a9 00 8f 01 04 af a9 85 ->3a3028 8f 00 04 af af 01 04 af 30 fa a9 00 8f 00 04 af ->3a3038 28 60 08 c2 20 a5 59 cf 10 f0 3a 90 1f 08 c2 20 ->3a3048 48 a9 00 08 5b 68 28 e2 20 a9 09 8f d3 08 00 c2 ->3a3058 20 29 ff 00 20 5e 1e e2 20 dc d4 08 c2 30 a5 5d ->3a3068 cf 12 f0 3a b0 d7 8f 08 01 00 af 10 f0 3a 8f 0a ->3a3078 01 00 18 af 0c 01 00 65 59 85 0c af 0e 01 00 69 ->3a3088 00 00 85 0e 18 a5 0c 65 9e 85 0c a5 0e 65 a0 85 ->3a3098 0e e2 20 a5 55 87 0c 28 60 c2 20 a9 01 00 85 dd ->3a30a8 38 a5 61 e5 59 85 69 10 0b 49 ff ff 1a 85 69 a9 ->3a30b8 ff ff 85 dd a9 01 00 85 df 38 a5 65 e5 5d 85 6d ->3a30c8 10 0b 49 ff ff 1a 85 6d a9 ff ff 85 df a5 6d c9 ->3a30d8 01 00 d0 19 a5 69 c9 01 00 d0 10 20 3a 30 a5 61 ->3a30e8 85 59 a5 65 85 5d 20 3a 30 80 5b a5 6d c5 69 b0 ->3a30f8 04 a5 69 80 06 a5 6d 49 ff ff 1a 48 0a 68 6a 85 ->3a3108 71 20 3a 30 a5 59 c5 61 d0 06 a5 5d c5 65 f0 36 ->3a3118 a5 71 85 75 a5 69 49 ff ff 1a c5 75 10 10 f0 0e ->3a3128 38 a5 71 e5 6d 85 71 18 a5 59 65 dd 85 59 a5 75 ->3a3138 c5 6d 10 cd f0 cb 18 a5 71 65 69 85 71 18 a5 5d ->3a3148 65 df 85 5d 80 bb 60 08 c2 20 3b 38 e9 06 00 1b ->3a3158 08 c2 20 48 a9 00 08 5b 68 28 08 e2 20 48 a9 00 ->3a3168 48 ab 68 28 c2 30 20 0c 1d 20 63 07 83 01 a9 2c ->3a3178 00 20 2a 22 20 0c 1d 20 51 06 a5 23 83 03 a9 2c ->3a3188 00 20 2a 22 20 0c 1d 20 51 06 a5 23 83 05 a9 2c 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07 a9 2c 00 20 2a 22 20 0c ->3a32b8 1d 20 51 06 a5 23 83 09 a9 2c 00 20 2a 22 20 0c ->3a32c8 1d 20 63 07 a5 23 83 0b a3 01 20 ab 2e a9 07 00 ->3a32d8 8f 00 04 af c2 20 a3 05 8f 00 01 00 af 10 f0 3a ->3a32e8 8f 02 01 00 18 af 04 01 00 63 03 85 0c e2 20 af ->3a32f8 06 01 00 69 00 85 0e c2 20 18 a5 9e 65 0c 8f 05 ->3a3308 04 af e2 20 a5 a0 65 0e 8f 07 04 af c2 20 38 a3 ->3a3318 07 e3 03 85 0c 8f 08 04 af 38 af 10 f0 3a 8f 0e ->3a3328 04 af 38 a3 09 e3 05 8f 0a 04 af e2 20 a3 0b 8f ->3a3338 01 04 af af 00 04 af 09 80 8f 00 04 af af 01 04 ->3a3348 af 30 fa a9 00 8f 00 04 af c2 20 3b 18 69 0c 00 ->3a3358 1b 28 60 08 c2 20 c9 40 00 b0 13 0a 0a 0a 18 69 ->3a3368 00 0c 85 9e a9 af 00 69 00 00 85 a0 28 60 08 c2 ->3a3378 20 48 a9 00 08 5b 68 28 e2 20 a9 09 8f d3 08 00 ->3a3388 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 08 c2 20 ->3a3398 3b 38 e9 03 00 1b c2 30 20 0c 1d 20 63 07 a5 23 ->3a33a8 83 01 a9 2c 00 20 2a 22 e2 20 20 0c 1d 20 63 07 ->3a33b8 a5 23 c9 08 b0 56 83 03 a9 2c 20 2a 22 20 0c 1d ->3a33c8 20 51 06 c2 20 38 a5 23 e9 00 00 85 23 a5 25 e9 ->3a33d8 b0 00 85 25 30 36 c2 20 a3 01 aa 20 5b 33 a5 23 ->3a33e8 a0 01 00 97 9e e2 20 a5 25 c8 c8 97 9e bf 18 f0 ->3a33f8 3a 29 f1 85 0c a3 03 0a 29 0e 05 0c 87 9e 9f 18 ->3a3408 f0 3a c2 20 3b 18 69 03 00 1b 28 60 08 c2 20 48 ->3a3418 a9 00 08 5b 68 28 e2 20 a9 09 8f d3 08 00 c2 20 ->3a3428 29 ff 00 20 5e 1e e2 20 dc d4 08 08 c2 20 3b 38 ->3a3438 e9 04 00 1b c2 30 20 0c 1d 20 63 07 a5 23 83 01 ->3a3448 a9 2c 00 20 2a 22 20 0c 1d 20 51 06 a5 23 83 03 ->3a3458 a9 2c 00 20 2a 22 20 0c 1d 20 51 06 a3 01 20 5b ->3a3468 33 a3 03 a0 04 00 97 9e a5 23 a0 06 00 97 9e c2 ->3a3478 20 3b 18 69 04 00 1b 28 60 08 c2 20 3b 38 e9 03 ->3a3488 00 1b c2 30 20 0c 1d 20 63 07 a5 23 83 01 a9 2c ->3a3498 00 20 2a 22 e2 20 20 0c 1d 20 51 06 a5 23 d0 04 ->3a34a8 83 03 80 04 a9 01 83 03 a9 2c 85 37 20 5f 22 b0 ->3a34b8 20 c2 30 a3 01 aa 20 5b 33 e2 20 bf 18 f0 3a 29 ->3a34c8 fe 85 0c a3 03 29 01 05 0c 9f 18 f0 3a 87 9e 80 ->3a34d8 36 c2 30 20 1d 21 20 0c 1d 20 63 07 a5 23 c9 08 ->3a34e8 00 b0 2e 0a 0a 0a 0a 85 0c a3 01 aa 20 5b 33 e2 ->3a34f8 20 a3 03 29 01 05 0c 85 0c bf 18 f0 3a 29 8e 05 ->3a3508 0c 87 9e 9f 18 f0 3a c2 20 3b 18 69 03 00 1b 28 ->3a3518 60 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 09 8f ->3a3528 d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 ->3a3538 08 c2 20 c9 04 00 b0 19 8d 00 01 a9 04 00 8d 02 ->3a3548 01 18 ad 04 01 69 80 02 85 9e a9 af 00 85 a0 28 ->3a3558 60 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 09 8f ->3a3568 d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 ->3a3578 08 c2 20 c9 04 00 b0 19 8d 00 01 a9 0c 00 8d 02 ->3a3588 01 18 ad 04 01 69 00 02 85 9e a9 af 00 85 a0 28 ->3a3598 60 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 09 8f ->3a35a8 d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 ->3a35b8 08 c2 20 3b 38 e9 06 00 1b c2 20 20 0c 1d 20 63 ->3a35c8 07 a5 23 83 01 a9 2c 00 20 2a 22 20 0c 1d 20 63 ->3a35d8 07 a5 23 83 03 a9 2c 00 20 2a 22 20 0c 1d 20 63 ->3a35e8 07 a5 23 83 05 a9 2c 00 20 2a 22 20 0c 1d 20 51 ->3a35f8 06 a3 01 20 38 35 a5 23 87 9e e2 20 38 a5 25 e9 ->3a3608 b0 a0 02 00 97 9e a3 05 d0 0d e2 20 a3 03 29 07 ->3a3618 a0 03 00 97 9e 80 0d e2 20 a3 03 29 07 09 08 a0 ->3a3628 03 00 97 9e c2 20 3b 18 69 06 00 1b 28 60 08 c2 ->3a3638 20 3b 38 e9 06 00 1b c2 20 20 0c 1d 20 63 07 a5 ->3a3648 23 83 01 a9 2c 00 20 2a 22 20 0c 1d 20 51 06 a5 ->3a3658 23 83 03 a9 2c 00 20 2a 22 20 0c 1d 20 51 06 a5 ->3a3668 23 83 05 a9 2c 00 20 2a 22 20 0c 1d 20 51 06 a3 ->3a3678 01 20 78 35 a5 23 a0 01 00 97 9e e2 20 38 a5 25 ->3a3688 e9 b0 c8 c8 97 9e c2 20 a3 03 a0 04 00 97 9e a3 ->3a3698 05 a0 06 00 97 9e c2 20 3b 18 69 06 00 1b 28 60 ->3a36a8 08 c2 20 f4 00 00 c2 20 20 0c 1d 20 63 07 a5 23 ->3a36b8 83 01 a9 2c 00 20 2a 22 20 0c 1d 20 51 06 a3 01 ->3a36c8 20 78 35 a5 23 d0 06 e2 20 a9 00 80 04 e2 20 a9 ->3a36d8 01 e2 20 a0 00 00 97 9e c2 20 68 28 60 08 c2 20 ->3a36e8 3b 38 e9 04 00 1b c2 20 20 0c 1d 20 63 07 a5 23 ->3a36f8 83 01 a9 2c 00 20 2a 22 20 0c 1d 20 51 06 a5 23 ->3a3708 83 03 a9 2c 00 20 2a 22 20 0c 1d 20 51 06 a3 01 ->3a3718 20 78 35 a5 23 a0 0a 00 97 9e a3 03 a0 08 00 97 ->3a3728 9e c2 20 3b 18 69 04 00 1b 28 60 0b 08 08 c2 20 ->3a3738 48 a9 00 08 5b 68 28 e2 20 a9 00 8f 58 f0 3a af ->3a3748 5c f0 3a c9 b0 b0 1c 8f 24 04 af af 5b f0 3a 8f ->3a3758 23 04 af af 5a f0 3a 8f 22 04 af a9 10 8f 58 f0 ->3a3768 3a 80 17 38 e9 b0 8f 04 04 af af 5b f0 3a 8f 03 ->3a3778 04 af af 5a f0 3a 8f 02 04 af af 59 f0 3a d0 3c ->3a3788 af 58 f0 3a f0 1b af 5d f0 3a 8f 28 04 af af 5e ->3a3798 f0 3a 8f 29 04 af af 5f f0 3a 8f 2a 04 af 82 8b ->3a37a8 00 af 5d f0 3a 8f 08 04 af af 5e f0 3a 8f 09 04 ->3a37b8 af af 5f f0 3a 8f 0a 04 af 82 70 00 af 58 f0 3a ->3a37c8 09 01 8f 58 f0 3a 89 10 f0 32 af 60 f0 3a 8f 28 ->3a37d8 04 af af 61 f0 3a 8f 29 04 af af 62 f0 3a 8f 2a ->3a37e8 04 af af 63 f0 3a 8f 2b 04 af af 64 f0 3a 8f 2c ->3a37f8 04 af af 65 f0 3a 8f 2d 04 af 80 30 af 60 f0 3a ->3a3808 8f 08 04 af af 61 f0 3a 8f 09 04 af af 62 f0 3a ->3a3818 8f 0a 04 af af 63 f0 3a 8f 0b 04 af af 64 f0 3a ->3a3828 8f 0c 04 af af 65 f0 3a 8f 0d 04 af e2 20 af 69 ->3a3838 f0 3a c9 b0 b0 20 8f 27 04 af af 68 f0 3a 8f 26 ->3a3848 04 af af 67 f0 3a 8f 25 04 af af 58 f0 3a 09 20 ->3a3858 8f 58 f0 3a 80 17 38 e9 b0 8f 07 04 af af 68 f0 ->3a3868 3a 8f 06 04 af af 67 f0 3a 8f 05 04 af af 66 f0 ->3a3878 3a d0 3e af 58 f0 3a 89 20 f0 1b af 6a f0 3a 8f ->3a3888 28 04 af af 6b f0 3a 8f 29 04 af af 6c f0 3a 8f ->3a3898 2a 04 af 82 8b 00 af 6a f0 3a 8f 08 04 af af 6b ->3a38a8 f0 3a 8f 09 04 af af 6c f0 3a 8f 0a 04 af 82 70 ->3a38b8 00 af 58 f0 3a 09 02 8f 58 f0 3a 89 20 f0 32 af ->3a38c8 6d f0 3a 8f 28 04 af af 6e f0 3a 8f 29 04 af af ->3a38d8 6f f0 3a 8f 2a 04 af af 70 f0 3a 8f 2b 04 af af ->3a38e8 71 f0 3a 8f 2e 04 af af 72 f0 3a 8f 2f 04 af 80 ->3a38f8 30 af 6d f0 3a 8f 08 04 af af 6e f0 3a 8f 09 04 ->3a3908 af af 6f f0 3a 8f 0a 04 af af 70 f0 3a 8f 0b 04 ->3a3918 af af 71 f0 3a 8f 0e 04 af af 72 f0 3a 8f 0f 04 ->3a3928 af af 58 f0 3a 29 30 f0 43 c9 10 f0 76 c9 20 d0 ->3a3938 03 82 8a 00 af 58 f0 3a 29 03 f0 23 c9 03 f0 23 ->3a3948 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 0a 8f d3 ->3a3958 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 a9 ->3a3968 01 80 02 a9 03 8f 20 04 af 82 7d 00 af 58 f0 3a ->3a3978 29 03 f0 23 c9 03 f0 23 08 c2 20 48 a9 00 08 5b ->3a3988 68 28 e2 20 a9 0a 8f d3 08 00 c2 20 29 ff 00 20 ->3a3998 5e 1e e2 20 dc d4 08 a9 01 80 02 a9 03 8f 00 04 ->3a39a8 af 80 34 af 58 f0 3a 29 01 0a 09 11 8f 20 04 af ->3a39b8 af 58 f0 3a 29 02 09 11 8f 00 04 af 80 19 af 58 ->3a39c8 f0 3a 29 02 09 21 8f 20 04 af af 58 f0 3a 29 01 ->3a39d8 0a 09 21 8f 00 04 af af 00 04 af 09 80 8f 00 04 ->3a39e8 af af 58 f0 3a 29 30 f0 0f af 20 04 af 09 80 8f ->3a39f8 20 04 af ea ea ea ea ea af 01 04 af 89 80 d0 f8 ->3a3a08 a9 00 8f 20 04 af 8f 00 04 af 28 2b 60 0b 08 e2 ->3a3a18 20 c2 10 a9 00 a2 00 00 8f 59 f0 3a e8 e0 1a 00 ->3a3a28 d0 f6 20 7e 22 c9 e6 f0 23 c9 e7 f0 5e 08 c2 20 ->3a3a38 48 a9 00 08 5b 68 28 e2 20 a9 02 8f d3 08 00 c2 ->3a3a48 20 29 ff 00 20 5e 1e e2 20 dc d4 08 20 2a 22 20 ->3a3a58 0c 1d 20 51 06 c2 20 a5 23 8f 5a f0 3a e2 20 a5 ->3a3a68 25 8f 5c f0 3a a9 2c 20 2a 22 20 0c 1d 20 51 06 ->3a3a78 c2 20 a5 23 8f 5d f0 3a e2 20 a5 25 8f 5f f0 3a ->3a3a88 e2 20 a9 00 8f 59 f0 3a 82 74 00 20 2a 22 20 0c ->3a3a98 1d 20 51 06 c2 20 a5 23 8f 5a f0 3a e2 20 a5 25 ->3a3aa8 8f 5c f0 3a a9 2c 20 2a 22 20 0c 1d 20 0d 07 c2 ->3a3ab8 20 a5 23 8f 60 f0 3a 8d 00 01 a9 2c 00 20 2a 22 ->3a3ac8 20 0c 1d 20 0d 07 c2 20 a5 23 8f 62 f0 3a 8d 02 ->3a3ad8 01 a9 2c 00 20 2a 22 20 0c 1d 20 0d 07 c2 20 a5 ->3a3ae8 23 8f 64 f0 3a c2 20 ad 04 01 8f 5d f0 3a e2 20 ->3a3af8 ad 06 01 8f 5f f0 3a e2 20 a9 01 8f 59 f0 3a e2 ->3a3b08 20 a9 9c 20 2a 22 20 7e 22 c9 e6 f0 23 c9 e7 f0 ->3a3b18 5e 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 02 8f ->3a3b28 d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 ->3a3b38 20 2a 22 20 0c 1d 20 51 06 c2 20 a5 23 8f 67 f0 ->3a3b48 3a e2 20 a5 25 8f 69 f0 3a a9 2c 20 2a 22 20 0c ->3a3b58 1d 20 51 06 c2 20 a5 23 8f 6a f0 3a e2 20 a5 25 ->3a3b68 8f 6c f0 3a e2 20 a9 00 8f 66 f0 3a 82 74 00 20 ->3a3b78 2a 22 20 0c 1d 20 51 06 c2 20 a5 23 8f 67 f0 3a ->3a3b88 e2 20 a5 25 8f 69 f0 3a a9 2c 20 2a 22 20 0c 1d ->3a3b98 20 0d 07 c2 20 a5 23 8f 6d f0 3a 8d 00 01 a9 2c ->3a3ba8 00 20 2a 22 20 0c 1d 20 0d 07 c2 20 a5 23 8f 6f ->3a3bb8 f0 3a 8d 02 01 a9 2c 00 20 2a 22 20 0c 1d 20 0d ->3a3bc8 07 c2 20 a5 23 8f 71 f0 3a c2 20 ad 04 01 8f 6a ->3a3bd8 f0 3a e2 20 ad 06 01 8f 6c f0 3a e2 20 a9 01 8f ->3a3be8 66 f0 3a c2 20 af 5d f0 3a cf 6a f0 3a d0 14 e2 ->3a3bf8 20 af 5f f0 3a cf 6c f0 3a d0 08 c2 20 20 33 37 ->3a3c08 28 2b 60 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 ->3a3c18 0a 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc ->3a3c28 d4 08 08 c2 30 20 0c 1d 20 63 07 a5 23 48 a9 2c ->3a3c38 00 20 2a 22 20 0c 1d 20 63 07 a4 23 fa 20 20 00 ->3a3c48 28 60 08 20 3e 21 e2 20 a7 00 d0 03 4c f2 3c c9 ->3a3c58 3a d0 03 4c f2 3c c9 22 d0 0b 20 18 1c 20 00 46 ->3a3c68 a9 3b 20 2a 22 20 e2 04 90 44 20 20 54 90 3f a9 ->3a3c78 3f 20 18 00 a9 20 20 18 00 20 10 00 e2 20 a5 ea ->3a3c88 c9 02 f0 49 c9 00 d0 03 82 84 00 c9 01 f0 5d 08 ->3a3c98 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 04 8f d3 08 ->3a3ca8 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 08 c2 ->3a3cb8 20 48 a9 00 08 5b 68 28 e2 20 a9 02 8f d3 08 00 ->3a3cc8 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 c2 20 a9 ->3a3cd8 00 4c 85 23 a9 00 00 85 25 e2 20 a9 02 85 27 c2 ->3a3ce8 20 20 83 53 a9 0d 00 20 18 00 28 60 c2 20 a5 00 ->3a3cf8 85 40 a5 02 85 42 a9 00 4c 85 00 a9 00 00 85 02 ->3a3d08 20 42 5a c2 20 a5 40 85 00 a5 42 85 02 80 d0 c2 ->3a3d18 20 a5 00 85 40 a5 02 85 42 a9 00 4c 85 00 a9 00 ->3a3d28 00 85 02 20 d8 08 c2 20 a5 40 85 00 a5 42 85 02 ->3a3d38 80 ad 08 20 3e 21 e2 20 a7 00 f0 47 c9 3a f0 43 ->3a3d48 20 e2 04 90 40 20 20 54 90 3b 20 01 15 20 14 00 ->3a3d58 e2 20 a0 00 00 97 16 a9 00 c8 97 16 c2 20 a5 16 ->3a3d68 85 23 a5 18 85 25 e2 20 a9 02 85 27 20 83 53 20 ->3a3d78 3e 21 a7 00 f0 0d c9 3a f0 09 c9 2c d0 07 20 1d ->3a3d88 21 80 b0 28 60 08 c2 20 48 a9 00 08 5b 68 28 e2 ->3a3d98 20 a9 02 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 ->3a3da8 20 dc d4 08 08 20 0c 1d 20 51 06 e2 20 a9 5c 85 ->3a3db8 a2 c2 20 a5 23 85 a3 e2 20 a5 25 85 a5 e2 20 a9 ->3a3dc8 2c 85 37 20 5f 22 90 41 20 1d 21 20 0c 1d 20 0d ->3a3dd8 07 c2 20 a5 23 85 55 e2 20 a9 2c 85 37 20 5f 22 ->3a3de8 90 27 20 1d 21 20 0c 1d 20 0d 07 c2 20 a5 23 85 ->3a3df8 59 e2 20 a9 2c 85 37 20 5f 22 90 0d 20 1d 21 20 ->3a3e08 0c 1d 20 0d 07 c2 20 a4 23 a6 59 a5 55 0b 8b 08 ->3a3e18 22 a2 08 00 28 ab 2b 20 62 21 28 60 08 c2 20 48 ->3a3e28 a9 00 08 5b 68 28 e2 20 a9 04 8f d3 08 00 c2 20 ->3a3e38 29 ff 00 20 5e 1e e2 20 dc d4 08 08 e2 20 20 3e ->3a3e48 21 20 20 54 90 64 a9 8f 20 2a 22 a9 01 20 28 1a ->3a3e58 a2 01 00 a9 00 8f 00 4d 00 20 0c 1d 20 51 06 c2 ->3a3e68 20 a5 23 9f 00 4d 00 e2 20 af 00 4d 00 1a 8f 00 ->3a3e78 4d 00 30 55 e8 e8 20 3e 21 a7 00 c9 2c f0 25 c9 ->3a3e88 90 d0 27 20 1d 21 20 9e 66 c2 20 a5 c0 85 23 e2 ->3a3e98 20 a5 c2 85 25 64 26 a5 ea 09 80 85 ea 85 27 20 ->3a3ea8 83 53 28 60 20 1d 21 4c 61 3e 08 c2 20 48 a9 00 ->3a3eb8 08 5b 68 28 e2 20 a9 02 8f d3 08 00 c2 20 29 ff ->3a3ec8 00 20 5e 1e e2 20 dc d4 08 08 c2 20 48 a9 00 08 ->3a3ed8 5b 68 28 e2 20 a9 0a 8f d3 08 00 c2 20 29 ff 00 ->3a3ee8 20 5e 1e e2 20 dc d4 08 08 20 3e 21 e2 20 a7 00 ->3a3ef8 f0 28 c9 3a f0 24 20 e2 04 90 21 20 20 54 90 1c ->3a3f08 20 43 3f 20 83 53 20 3e 21 a7 00 f0 0d c9 3a f0 ->3a3f18 09 c9 2c d0 07 20 1d 21 80 cf 28 60 08 c2 20 48 ->3a3f28 a9 00 08 5b 68 28 e2 20 a9 02 8f d3 08 00 c2 20 ->3a3f38 29 ff 00 20 5e 1e e2 20 dc d4 08 08 a5 02 85 42 ->3a3f48 a5 00 85 40 a5 1c 85 46 a5 1a 85 44 c2 20 a5 3a ->3a3f58 d0 04 a5 38 f0 4e a5 38 85 00 a5 3a 85 02 a5 3c ->3a3f68 85 1a a5 3e 85 1c e2 20 a7 00 f0 53 c9 3a f0 4f ->3a3f78 c9 2c d0 03 20 1d 21 20 3e 21 a7 00 c9 22 f0 4e ->3a3f88 20 fb 04 b0 4e 08 c2 20 48 a9 00 08 5b 68 28 e2 ->3a3f98 20 a9 02 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 ->3a3fa8 20 dc d4 08 c2 20 a9 00 00 85 1a a9 36 00 85 1c ->3a3fb8 18 a5 1a 69 04 00 85 00 a5 1c 69 00 00 85 02 e2 ->3a3fc8 20 a9 80 85 35 a9 ab 85 37 20 74 21 80 a9 20 18 ->3a3fd8 1c 80 03 20 0a 1b c2 20 a5 00 85 38 a5 02 85 3a ->3a3fe8 a5 1a 85 3c a5 1c 85 3e a5 44 85 1a a5 46 85 1c ->3a3ff8 a5 40 85 00 a5 42 85 02 28 60 20 62 21 60 64 38 ->3a4008 64 3a 64 3c 64 3e 60 20 24 00 60 20 0c 1d c2 20 ->3a4018 a5 25 48 a5 23 48 e2 20 a7 00 c9 2c d0 22 20 1d ->3a4028 21 20 0c 1d c2 20 a5 26 d0 35 68 85 08 68 85 0a ->3a4038 c2 20 a5 23 87 08 e2 20 a0 02 00 a5 25 97 08 60 ->3a4048 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 02 8f d3 ->3a4058 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 08 ->3a4068 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 09 8f d3 08 ->3a4078 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 20 0c ->3a4088 1d c2 20 a5 25 48 a5 23 48 e2 20 a7 00 c9 2c d0 ->3a4098 19 20 1d 21 20 0c 1d c2 20 a5 25 d0 2c 68 85 08 ->3a40a8 68 85 0a c2 20 a5 23 87 08 60 08 c2 20 48 a9 00 ->3a40b8 08 5b 68 28 e2 20 a9 02 8f d3 08 00 c2 20 29 ff ->3a40c8 00 20 5e 1e e2 20 dc d4 08 08 c2 20 48 a9 00 08 ->3a40d8 5b 68 28 e2 20 a9 09 8f d3 08 00 c2 20 29 ff 00 ->3a40e8 20 5e 1e e2 20 dc d4 08 20 0c 1d c2 20 a5 25 48 ->3a40f8 a5 23 48 e2 20 a7 00 c9 2c d0 1f 20 1d 21 20 0c ->3a4108 1d e2 20 a5 24 d0 32 c2 20 a5 25 d0 2c 68 85 08 ->3a4118 68 85 0a e2 20 a5 23 87 08 60 08 c2 20 48 a9 00 ->3a4128 08 5b 68 28 e2 20 a9 02 8f d3 08 00 c2 20 29 ff ->3a4138 00 20 5e 1e e2 20 dc d4 08 08 c2 20 48 a9 00 08 ->3a4148 5b 68 28 e2 20 a9 09 8f d3 08 00 c2 20 29 ff 00 ->3a4158 20 5e 1e e2 20 dc d4 08 08 c2 20 48 a9 00 08 5b ->3a4168 68 28 e2 20 a9 01 8f d3 08 00 c2 20 29 ff 00 20 ->3a4178 5e 1e e2 20 dc d4 08 08 e2 20 a7 00 f0 05 20 1d ->3a4188 21 80 f7 28 60 08 28 60 08 28 60 08 28 60 08 c2 ->3a4198 20 a5 1c 20 25 1e a5 1a 20 25 1e a5 02 48 a5 00 ->3a41a8 48 20 62 21 a5 02 20 25 1e a5 00 20 25 1e 68 85 ->3a41b8 00 68 85 02 20 3e 21 20 20 54 b0 1f 08 c2 20 48 ->3a41c8 a9 00 08 5b 68 28 e2 20 a9 05 8f d3 08 00 c2 20 ->3a41d8 29 ff 00 20 5e 1e e2 20 dc d4 08 e2 20 a5 ea 20 ->3a41e8 3c 1e a5 e9 20 3c 1e c2 20 a5 e7 20 25 1e 20 3e ->3a41f8 21 e2 20 a7 00 c9 8a d0 6a a5 ea c9 00 f0 04 c9 ->3a4208 01 f0 00 20 1d 21 20 0c 1d 20 83 53 e2 20 a9 9c ->3a4218 20 2a 22 20 0c 1d c2 20 a5 27 20 25 1e a5 25 20 ->3a4228 25 1e a5 23 20 25 1e e2 20 a9 9d 85 37 20 5f 22 ->3a4238 90 1b 20 1d 21 20 0c 1d e2 20 a5 27 20 25 1e c2 ->3a4248 20 a5 25 20 25 1e a5 23 20 25 1e 80 14 c2 20 a9 ->3a4258 00 00 20 25 1e a9 00 00 20 25 1e a9 01 00 20 25 ->3a4268 1e 28 60 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 ->3a4278 02 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc ->3a4288 d4 08 08 8b 08 e2 20 48 a9 00 48 ab 68 28 08 c2 ->3a4298 20 48 a9 00 08 5b 68 28 c2 30 a4 33 c8 c8 c2 20 ->3a42a8 b9 0c 00 85 e7 b9 0e 00 e2 20 85 e9 b9 10 00 85 ->3a42b8 ea c2 20 5a 20 21 52 7a c2 20 b9 00 00 85 29 b9 ->3a42c8 02 00 85 2b e2 20 b9 04 00 85 2d c2 20 5a 20 e3 ->3a42d8 27 20 83 53 7a c2 20 b9 06 00 85 29 b9 08 00 85 ->3a42e8 2b e2 20 b9 0a 00 85 2d c2 20 b9 02 00 30 0a 20 ->3a42f8 6c 2a 20 1a 06 f0 28 80 08 20 2c 2a 20 1a 06 f0 ->3a4308 1e c2 20 b9 12 00 85 00 b9 14 00 85 02 b9 16 00 ->3a4318 85 1a b9 18 00 85 1c e2 20 a9 03 85 dc 80 17 a2 ->3a4328 23 08 20 e9 19 c2 20 18 a5 33 69 1a 00 85 33 a5 ->3a4338 35 69 00 00 85 35 ab 28 60 08 a5 1a 48 a5 1c 48 ->3a4348 20 3e 21 20 d8 08 a5 23 f0 26 20 1d 24 90 42 e2 ->3a4358 20 a9 02 85 dc 20 62 21 c2 20 68 20 25 1e 68 20 ->3a4368 25 1e a5 02 20 25 1e a5 00 20 25 1e e6 31 28 60 ->3a4378 68 68 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 02 ->3a4388 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 ->3a4398 08 68 68 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 ->3a43a8 06 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc ->3a43b8 d4 08 08 c2 30 a5 31 f0 1e 20 47 1e 85 00 20 47 ->3a43c8 1e 85 02 20 47 1e 85 1a 20 47 1e 85 1c c6 31 e2 ->3a43d8 20 a9 03 85 dc 28 60 08 c2 20 48 a9 00 08 5b 68 ->3a43e8 28 e2 20 a9 07 8f d3 08 00 c2 20 29 ff 00 20 5e ->3a43f8 1e e2 20 dc d4 08 08 20 0c 1d 20 1a 06 f0 1c e2 ->3a4408 20 a9 97 20 2a 22 20 d8 08 20 1a 06 f0 12 20 1d ->3a4418 24 90 2c e2 20 a9 02 85 dc 80 03 20 62 21 28 60 ->3a4428 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 02 8f d3 ->3a4438 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 08 ->3a4448 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 06 8f d3 08 ->3a4458 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 08 e2 ->3a4468 20 a9 01 85 dc 28 60 08 20 3e 21 20 d8 08 a5 23 ->3a4478 f0 0d 20 1d 24 90 27 e2 20 a9 02 85 dc 28 60 08 ->3a4488 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 02 8f d3 08 ->3a4498 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 08 c2 ->3a44a8 20 48 a9 00 08 5b 68 28 e2 20 a9 06 8f d3 08 00 ->3a44b8 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 20 8b 19 ->3a44c8 20 ab 10 20 20 51 60 08 a7 00 10 03 20 1d 21 20 ->3a44d8 20 54 b0 03 4c 46 45 e2 20 a5 ea 48 a5 e9 48 a5 ->3a44e8 e8 48 a5 e7 48 20 7e 22 c9 8f d0 0e a9 8f 20 2a ->3a44f8 22 a9 00 8f 00 4d 00 20 0d 1b 20 3e 21 e2 20 a7 ->3a4508 00 c9 8a f0 03 4c 46 45 20 1d 21 20 0c 1d 68 85 ->3a4518 e7 68 85 e8 68 85 e9 68 85 ea 29 80 f0 1b 20 93 ->3a4528 51 90 3a c2 20 a0 09 00 b7 08 85 c0 e2 20 c8 c8 ->3a4538 b7 08 85 c2 20 8a 68 80 03 20 83 53 28 60 08 c2 ->3a4548 20 48 a9 00 08 5b 68 28 e2 20 a9 02 8f d3 08 00 ->3a4558 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 08 c2 20 ->3a4568 48 a9 00 08 5b 68 28 e2 20 a9 05 8f d3 08 00 c2 ->3a4578 20 29 ff 00 20 5e 1e e2 20 dc d4 08 08 e2 20 20 ->3a4588 7e 22 c9 00 f0 6d 20 0c 1d e2 20 a5 27 c9 ff f0 ->3a4598 1b c9 02 d0 05 20 00 46 80 12 c9 00 d0 05 20 1e ->3a45a8 46 80 09 c9 01 d0 4f 20 31 46 80 00 20 3e 21 a7 ->3a45b8 00 f0 40 c9 3a f0 3c c9 2c f0 23 c9 3b f0 24 08 ->3a45c8 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 02 8f d3 08 ->3a45d8 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 a9 09 ->3a45e8 20 18 00 20 1d 21 20 3e 21 a7 00 f0 09 c9 3a f0 ->3a45f8 05 80 93 20 d7 03 28 60 08 8b 08 c2 20 48 a9 00 ->3a4608 08 5b 68 28 e2 20 a0 00 00 b7 23 f0 06 20 18 00 ->3a4618 c8 80 f6 ab 28 60 08 c2 20 20 60 15 a5 16 85 23 ->3a4628 a5 18 85 25 20 00 46 28 60 08 20 e9 5d c2 20 a5 ->3a4638 16 85 23 a5 18 85 25 20 00 46 28 60 08 e2 20 85 ->3a4648 b5 4a 4a 4a 4a 29 0f 18 69 30 97 16 c8 a5 b5 29 ->3a4658 0f 18 69 30 97 16 c8 28 60 e2 20 a9 8f 20 2a 22 ->3a4668 08 20 0c 1d e2 20 c2 10 af 0e 08 af 09 08 8f 0e ->3a4678 08 af 20 01 15 a0 00 00 af 06 08 af 20 44 46 a9 ->3a4688 2f 97 16 c8 af 09 08 af 20 44 46 a9 2f 97 16 c8 ->3a4698 af 0f 08 af 20 44 46 af 0a 08 af 20 44 46 a9 00 ->3a46a8 97 16 af 0e 08 af 29 f7 8f 0e 08 af c2 20 a5 16 ->3a46b8 85 23 a5 18 85 25 e2 20 a9 02 85 27 28 e2 20 20 ->3a46c8 1d 21 60 e2 20 a9 8f 20 2a 22 08 20 0c 1d e2 20 ->3a46d8 c2 10 af 0e 08 af 09 08 8f 0e 08 af 20 01 15 a0 ->3a46e8 00 00 af 04 08 af 29 7f 20 44 46 a9 3a 97 16 c8 ->3a46f8 af 02 08 af 20 44 46 a9 3a 97 16 c8 af 00 08 af ->3a4708 20 44 46 a9 00 97 16 af 0e 08 af 29 f7 8f 0e 08 ->3a4718 af c2 20 a5 16 85 23 a5 18 85 25 e2 20 a9 02 85 ->3a4728 27 28 e2 20 20 1d 21 60 e2 20 a9 8f 20 2a 22 08 ->3a4738 20 0c 1d e2 20 a9 01 85 27 a9 03 8f 00 e2 af a9 ->3a4748 01 8f 01 e2 af c2 30 af 84 e8 af 8f 08 e2 af af ->3a4758 84 e8 af 29 ff 7f 8f 0a e2 af a9 ff ff 8f 0c e2 ->3a4768 af a9 ff 7f 8f 0e e2 af ea ea ea af 08 e2 af 85 ->3a4778 23 af 0a e2 af 85 25 28 e2 20 20 1d 21 60 e2 20 ->3a4788 a9 8f 20 2a 22 08 20 0c 1d 22 28 10 00 e2 20 85 ->3a4798 23 64 24 64 25 64 26 a9 00 85 27 28 e2 20 20 1d ->3a47a8 21 60 e2 20 a9 8f 20 2a 22 08 c2 30 20 0c 1d 20 ->3a47b8 e3 06 c2 20 a5 25 48 a5 23 48 20 3e 21 e2 20 a7 ->3a47c8 00 c9 2c f0 03 4c 21 48 20 1d 21 20 0c 1d 20 0d ->3a47d8 07 c2 20 a5 23 48 20 3e 21 e2 20 a7 00 c9 2c f0 ->3a47e8 03 4c 21 48 20 1d 21 20 0c 1d 20 0d 07 c2 20 a5 ->3a47f8 23 85 8f e2 20 a5 25 85 91 c2 20 68 85 29 a9 00 ->3a4808 00 85 2b 68 85 23 68 85 25 e2 20 a9 02 85 27 20 ->3a4818 59 17 e2 20 20 1d 21 28 60 08 c2 20 48 a9 00 08 ->3a4828 5b 68 28 e2 20 a9 02 8f d3 08 00 c2 20 29 ff 00 ->3a4838 20 5e 1e e2 20 dc d4 08 08 c2 20 48 a9 00 08 5b ->3a4848 68 28 e2 20 a9 09 8f d3 08 00 c2 20 29 ff 00 20 ->3a4858 5e 1e e2 20 dc d4 08 e2 20 a9 8f 20 2a 22 08 c2 ->3a4868 30 20 0c 1d e2 20 a5 27 c9 02 f0 03 4c e3 48 c2 ->3a4878 20 a5 25 48 a5 23 48 20 3e 21 e2 20 a7 00 c9 2c ->3a4888 f0 03 4c 02 49 20 1d 21 20 0c 1d e2 20 a5 27 c9 ->3a4898 00 d0 48 c2 20 a5 23 85 8f c2 20 68 85 23 68 85 ->3a48a8 25 e2 20 a9 02 85 27 e2 20 a0 00 00 b7 23 f0 03 ->3a48b8 c8 80 f9 c2 20 98 38 e5 8f 30 09 85 29 a9 00 00 ->3a48c8 85 2b 80 07 a9 00 00 85 29 85 2b e2 20 a9 00 85 ->3a48d8 2d 20 59 17 e2 20 20 1d 21 28 60 08 c2 20 48 a9 ->3a48e8 00 08 5b 68 28 e2 20 a9 04 8f d3 08 00 c2 20 29 ->3a48f8 ff 00 20 5e 1e e2 20 dc d4 08 08 c2 20 48 a9 00 ->3a4908 08 5b 68 28 e2 20 a9 02 8f d3 08 00 c2 20 29 ff ->3a4918 00 20 5e 1e e2 20 dc d4 08 08 c2 20 48 a9 00 08 ->3a4928 5b 68 28 e2 20 a9 09 8f d3 08 00 c2 20 29 ff 00 ->3a4938 20 5e 1e e2 20 dc d4 08 e2 20 a9 8f 20 2a 22 08 ->3a4948 c2 30 20 0c 1d e2 20 a5 27 c9 02 f0 03 4c ac 49 ->3a4958 c2 20 a5 25 48 a5 23 48 20 3e 21 e2 20 a7 00 c9 ->3a4968 2c f0 03 4c cb 49 20 1d 21 20 0c 1d e2 20 a5 27 ->3a4978 c9 00 d0 30 c2 20 a5 23 85 8f c2 20 a9 00 00 85 ->3a4988 29 a9 00 00 85 2b e2 20 a9 00 85 2d c2 20 68 85 ->3a4998 23 68 85 25 e2 20 a9 02 85 27 20 59 17 e2 20 20 ->3a49a8 1d 21 28 60 08 c2 20 48 a9 00 08 5b 68 28 e2 20 ->3a49b8 a9 04 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 ->3a49c8 dc d4 08 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 ->3a49d8 02 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc ->3a49e8 d4 08 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 09 ->3a49f8 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 ->3a4a08 08 e2 20 a9 8f 20 2a 22 20 0c 1d c2 10 e2 20 a5 ->3a4a18 27 c9 02 d0 23 c2 20 a5 00 85 40 a5 02 85 42 a5 ->3a4a28 23 85 00 a5 25 85 02 20 d8 08 a5 40 85 00 a5 42 ->3a4a38 85 02 e2 20 20 1d 21 60 08 c2 20 48 a9 00 08 5b ->3a4a48 68 28 e2 20 a9 04 8f d3 08 00 c2 20 29 ff 00 20 ->3a4a58 5e 1e e2 20 dc d4 08 e2 20 a9 8f 20 2a 22 08 20 ->3a4a68 0c 1d c2 10 e2 20 a5 27 c9 00 d0 1a 20 60 15 c2 ->3a4a78 20 a5 16 85 23 a5 18 85 25 e2 20 a9 02 85 27 28 ->3a4a88 e2 20 20 1d 21 60 08 c2 20 48 a9 00 08 5b 68 28 ->3a4a98 e2 20 a9 04 8f d3 08 00 c2 20 29 ff 00 20 5e 1e ->3a4aa8 e2 20 dc d4 08 e2 20 a9 8f 20 2a 22 08 20 0c 1d ->3a4ab8 20 e3 06 c2 20 64 0c 64 0e e2 30 a0 00 b7 23 c9 ->3a4ac8 20 f0 04 c9 24 d0 03 c8 80 f3 b7 23 20 0c 05 90 ->3a4ad8 1e c2 20 06 0c 26 0e 06 0c 26 0e 06 0c 26 0e 06 ->3a4ae8 0c 26 0e e2 20 20 2d 05 05 0c 85 0c c8 80 db c2 ->3a4af8 20 a5 0c 85 23 a5 0e 85 25 e2 20 a9 00 85 27 28 ->3a4b08 e2 20 20 1d 21 60 e2 20 a9 8f 20 2a 22 08 20 0c ->3a4b18 1d 20 51 06 20 01 15 e2 30 a0 ff a9 00 97 16 88 ->3a4b28 a5 23 29 0f aa bf 00 d0 3a 97 16 88 a5 23 29 f0 ->3a4b38 4a 4a 4a 4a aa bf 00 d0 3a 97 16 88 a5 24 85 23 ->3a4b48 a5 25 85 24 a5 26 85 25 a9 00 85 26 a5 23 d0 d0 ->3a4b58 a5 24 d0 cc a5 25 d0 c8 98 38 65 16 85 23 a5 17 ->3a4b68 85 24 a5 18 85 25 a5 19 85 26 a9 02 85 27 28 e2 ->3a4b78 20 20 1d 21 60 08 c2 20 48 a9 00 08 5b 68 28 e2 ->3a4b88 20 a9 04 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 ->3a4b98 20 dc d4 08 e2 20 a9 8f 20 2a 22 20 0c 1d e2 20 ->3a4ba8 a5 27 c9 02 d0 1f 8b a5 25 48 ab c2 10 a6 23 20 ->3a4bb8 ed 15 ab 84 23 c2 20 64 25 e2 20 a9 00 85 27 e2 ->3a4bc8 20 20 1d 21 60 08 c2 20 48 a9 00 08 5b 68 28 e2 ->3a4bd8 20 a9 04 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 ->3a4be8 20 dc d4 08 e2 20 a9 8f 20 2a 22 20 0c 1d 20 51 ->3a4bf8 06 e2 20 a5 25 c9 b0 90 10 c9 f0 b0 0c 8b 48 ab ->3a4c08 a6 23 22 44 11 00 ab 80 04 e2 20 a7 23 85 23 64 ->3a4c18 24 64 25 64 26 e2 20 20 1d 21 60 08 c2 20 48 a9 ->3a4c28 00 08 5b 68 28 e2 20 a9 04 8f d3 08 00 c2 20 29 ->3a4c38 ff 00 20 5e 1e e2 20 dc d4 08 e2 20 a9 8f 20 2a ->3a4c48 22 20 0c 1d 20 51 06 e2 20 a5 25 c9 b0 90 22 c9 ->3a4c58 f0 b0 1e 8b 48 ab a6 23 da 22 44 11 00 85 0c fa ->3a4c68 e8 da 22 44 11 00 85 0d fa e8 22 44 11 00 ab 80 ->3a4c78 0d c2 20 a7 23 85 0c e2 20 a0 02 00 b7 23 85 25 ->3a4c88 64 26 c2 20 a5 0c 85 23 e2 20 20 1d 21 60 08 c2 ->3a4c98 20 48 a9 00 08 5b 68 28 e2 20 a9 04 8f d3 08 00 ->3a4ca8 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 e2 20 a9 ->3a4cb8 8f 20 2a 22 20 0c 1d 20 51 06 e2 20 a5 25 c9 b0 ->3a4cc8 90 1d c9 f0 b0 19 8b 48 ab a6 23 da 22 44 11 00 ->3a4cd8 85 23 fa e8 22 44 11 00 85 24 ab c2 20 80 06 c2 ->3a4ce8 20 a7 23 85 23 64 25 e2 20 20 1d 21 60 08 c2 20 ->3a4cf8 48 a9 00 08 5b 68 28 e2 20 a9 04 8f d3 08 00 c2 ->3a4d08 20 29 ff 00 20 5e 1e e2 20 dc d4 08 e2 20 a9 8f ->3a4d18 20 2a 22 20 0c 1d e2 20 a5 27 c9 00 d0 24 20 01 ->3a4d28 15 a5 23 87 16 a9 00 a0 01 00 97 16 c2 20 a5 16 ->3a4d38 85 23 a5 18 85 25 e2 20 a9 02 85 27 e2 20 20 1d ->3a4d48 21 60 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 04 ->3a4d58 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 ->3a4d68 08 e2 20 a9 8f 20 2a 22 20 0c 1d e2 20 a5 27 c9 ->3a4d78 02 d0 14 a7 23 85 23 64 24 64 25 64 26 a9 00 85 ->3a4d88 27 e2 20 20 1d 21 60 08 c2 20 48 a9 00 08 5b 68 ->3a4d98 28 e2 20 a9 04 8f d3 08 00 c2 20 29 ff 00 20 5e ->3a4da8 1e e2 20 dc d4 08 e2 20 a9 8f 20 2a 22 20 0c 1d ->3a4db8 e2 20 a5 27 c9 00 d0 39 e2 20 a5 26 d0 52 a5 25 ->3a4dc8 d0 4e a5 24 d0 4a c2 10 20 01 15 a4 23 e2 20 a9 ->3a4dd8 00 97 16 88 30 07 a9 20 97 16 88 10 fb a9 02 85 ->3a4de8 27 c2 20 a5 16 85 23 a5 18 85 25 e2 20 20 1d 21 ->3a4df8 60 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 04 8f ->3a4e08 d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 ->3a4e18 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 09 8f d3 ->3a4e28 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 e2 ->3a4e38 20 a9 8f 20 2a 22 20 0c 1d e2 20 a5 27 c9 00 d0 ->3a4e48 39 e2 20 a5 26 d0 52 a5 25 d0 4e a5 24 d0 4a c2 ->3a4e58 10 20 01 15 a4 23 e2 20 a9 00 97 16 88 30 07 a9 ->3a4e68 09 97 16 88 10 fb a9 02 85 27 c2 20 a5 16 85 23 ->3a4e78 a5 18 85 25 e2 20 20 1d 21 60 08 c2 20 48 a9 00 ->3a4e88 08 5b 68 28 e2 20 a9 04 8f d3 08 00 c2 20 29 ff ->3a4e98 00 20 5e 1e e2 20 dc d4 08 08 c2 20 48 a9 00 08 ->3a4ea8 5b 68 28 e2 20 a9 09 8f d3 08 00 c2 20 29 ff 00 ->3a4eb8 20 5e 1e e2 20 dc d4 08 e2 20 a9 8f 20 2a 22 20 ->3a4ec8 0c 1d e2 20 a5 27 c9 00 f0 23 c9 01 f0 3e 08 c2 ->3a4ed8 20 48 a9 00 08 5b 68 28 e2 20 a9 04 8f d3 08 00 ->3a4ee8 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 c2 20 a5 ->3a4ef8 25 10 21 49 ff ff 85 25 a5 23 49 ff ff 18 69 01 ->3a4f08 00 85 23 a5 25 69 00 00 85 25 80 08 e2 20 a5 26 ->3a4f18 29 7f 85 26 e2 20 20 1d 21 60 e2 20 a9 8f 20 2a ->3a4f28 22 20 0c 1d e2 20 a5 27 c9 00 d0 25 c2 20 a5 25 ->3a4f38 30 12 d0 04 a5 23 f0 13 a9 00 00 85 25 a9 01 00 ->3a4f48 85 23 80 07 a9 ff ff 85 25 85 23 e2 20 20 1d 21 ->3a4f58 60 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 04 8f ->3a4f68 d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 ->3a4f78 e2 20 a9 8f 20 2a 22 20 0c 1d 20 51 06 e2 20 20 ->3a4f88 1d 21 60 e2 20 a9 8f 20 2a 22 20 0c 1d 20 bf 07 ->3a4f98 20 49 62 e2 20 20 1d 21 60 e2 20 a9 8f 20 2a 22 ->3a4fa8 20 0c 1d 20 bf 07 20 78 62 e2 20 20 1d 21 60 e2 ->3a4fb8 20 a9 8f 20 2a 22 20 0c 1d 20 bf 07 20 a7 62 e2 ->3a4fc8 20 20 1d 21 60 e2 20 a9 8f 20 2a 22 20 0c 1d 20 ->3a4fd8 bf 07 20 d5 62 e2 20 20 1d 21 60 e2 20 a9 8f 20 ->3a4fe8 2a 22 20 0c 1d 20 bf 07 20 fe 63 e2 20 20 1d 21 ->3a4ff8 60 e2 20 a9 8f 20 2a 22 20 0c 1d 20 bf 07 20 d4 ->3a5008 63 e2 20 20 1d 21 60 e2 20 a9 8f 20 2a 22 20 0c ->3a5018 1d 20 bf 07 20 20 64 e2 20 20 1d 21 60 e2 20 a9 ->3a5028 8f 20 2a 22 20 0c 1d 20 bf 07 20 b4 64 e2 20 20 ->3a5038 1d 21 60 e2 20 a9 8f 20 2a 22 20 0c 1d 20 bf 07 ->3a5048 20 36 65 e2 20 20 1d 21 60 00 ea 60 08 0b 08 c2 ->3a5058 20 48 a9 00 08 5b 68 28 c2 30 c2 20 a9 00 00 85 ->3a5068 d9 e2 20 a9 36 85 db c2 30 a9 00 00 a0 00 00 97 ->3a5078 d9 a0 02 00 97 d9 a0 04 00 97 d9 20 f3 20 2b 28 ->3a5088 60 8b 08 c2 20 a9 00 00 85 1a a9 36 00 85 1c 20 ->3a5098 f3 20 20 d3 23 28 ab 60 08 c2 20 64 55 a9 ff 7f ->3a50a8 85 59 20 d7 03 20 7e 22 29 ff 00 c9 00 00 f0 2c ->3a50b8 c9 81 00 f0 1a 20 3e 21 20 d8 08 a5 23 85 55 20 ->3a50c8 7e 22 29 ff 00 c9 00 00 f0 12 c9 81 00 d0 2a 20 ->3a50d8 2a 22 20 3e 21 20 d8 08 a5 23 85 59 a5 1c 48 a5 ->3a50e8 1a 48 a5 02 48 a5 00 48 20 8b 18 68 85 00 68 85 ->3a50f8 02 68 85 1a 68 85 1c 28 60 08 c2 20 48 a9 00 08 ->3a5108 5b 68 28 e2 20 a9 02 8f d3 08 00 c2 20 29 ff 00 ->3a5118 20 5e 1e e2 20 dc d4 08 08 08 c2 20 48 a9 00 08 ->3a5128 5b 68 28 c2 20 64 e4 64 e7 e2 20 64 e6 64 e9 64 ->3a5138 ea c2 20 38 a5 d9 69 04 00 85 e1 e2 20 a5 db 69 ->3a5148 00 85 e3 28 60 c9 5f f0 1a c9 3a b0 04 c9 30 b0 ->3a5158 12 c9 5b b0 04 c9 41 b0 0a c9 7b b0 04 c9 61 b0 ->3a5168 02 18 60 38 60 08 e2 20 c2 10 a0 00 00 b7 0c f0 ->3a5178 0a d7 e7 d0 13 c8 c0 08 00 d0 f2 b7 e7 20 56 05 ->3a5188 20 4d 51 b0 03 28 38 60 28 18 60 08 e2 20 c2 10 ->3a5198 a0 00 00 a2 00 00 b7 e7 f0 0b 20 56 05 9f 00 4e ->3a51a8 00 c8 e8 80 f1 a9 00 9f 00 4e 00 c2 20 a9 00 4e ->3a51b8 85 e7 e2 20 a9 00 85 e9 c2 20 a5 e4 85 08 d0 06 ->3a51c8 e2 20 a5 e6 f0 4d e2 20 a5 e6 85 0a a5 ea a0 00 ->3a51d8 00 d7 08 d0 17 c2 20 18 a5 08 69 01 00 85 0c e2 ->3a51e8 20 a5 0a 69 00 85 0e 20 6d 51 b0 2a a0 0d 00 c2 ->3a51f8 20 b7 08 85 0c c8 c8 e2 20 b7 08 85 0e d0 06 c2 ->3a5208 20 a5 0c f0 0e c2 20 a5 0c 85 08 e2 20 a5 0e 85 ->3a5218 0a 80 b9 28 18 60 28 38 60 08 20 93 51 b0 1f 08 ->3a5228 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 05 8f d3 08 ->3a5238 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 c2 30 ->3a5248 a0 09 00 b7 08 85 23 c8 c8 b7 08 85 25 e2 20 a0 ->3a5258 00 00 b7 08 85 27 28 60 08 c2 20 18 a5 e1 69 10 ->3a5268 00 85 08 e2 20 a5 e3 69 00 85 0a c5 bc 90 27 c2 ->3a5278 20 a5 08 c5 ba 90 1f 08 c2 20 48 a9 00 08 5b 68 ->3a5288 28 e2 20 a9 09 8f d3 08 00 c2 20 29 ff 00 20 5e ->3a5298 1e e2 20 dc d4 08 c2 20 a5 e1 85 c0 e2 20 a5 e3 ->3a52a8 85 c2 c2 20 a5 08 85 e1 e2 20 a5 0a 85 e3 28 60 ->3a52b8 08 e2 20 a5 27 c5 ea f0 33 a5 ea c9 00 d0 05 20 ->3a52c8 51 06 80 2f c9 01 d0 05 20 bf 07 80 26 08 c2 20 ->3a52d8 48 a9 00 08 5b 68 28 e2 20 a9 04 8f d3 08 00 c2 ->3a52e8 20 29 ff 00 20 5e 1e e2 20 dc d4 08 c9 02 d0 03 ->3a52f8 20 f3 16 c2 10 20 60 52 c2 30 18 a5 c0 69 01 00 ->3a5308 85 08 e2 20 a5 c2 69 00 85 0a a0 00 00 a9 00 97 ->3a5318 08 c8 c0 08 00 d0 f8 a0 00 00 b7 e7 f0 10 20 56 ->3a5328 05 20 4d 51 90 08 97 08 c8 c0 08 00 d0 ec c2 20 ->3a5338 a0 09 00 a5 23 97 c0 a5 25 c8 c8 97 c0 a5 e4 a0 ->3a5348 0d 00 97 c0 c8 c8 e2 20 a5 e6 97 c0 c2 20 a5 c0 ->3a5358 85 e4 e2 20 a5 c2 85 e6 e2 20 a0 00 00 a5 27 97 ->3a5368 c0 c9 02 f0 02 28 60 c2 20 a5 23 85 c0 e2 20 a5 ->3a5378 25 85 c2 20 0f 13 20 24 13 80 ea 08 c2 30 a5 e4 ->3a5388 d0 06 e2 20 a5 e6 f0 05 20 93 51 b0 05 20 b8 52 ->3a5398 80 4e e2 20 a5 27 c5 ea f0 33 a5 ea c9 00 d0 05 ->3a53a8 20 51 06 80 2c c9 01 d0 05 20 bf 07 80 23 08 c2 ->3a53b8 20 48 a9 00 08 5b 68 28 e2 20 a9 04 8f d3 08 00 ->3a53c8 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 c9 02 f0 ->3a53d8 11 c2 30 a0 09 00 a5 23 97 08 c8 c8 a5 25 97 08 ->3a53e8 28 60 20 f3 16 a0 09 00 b7 08 85 c0 c8 c8 e2 20 ->3a53f8 b7 08 85 c2 20 0f 13 20 43 13 e2 20 a5 27 c9 02 ->3a5408 f0 02 80 cd c2 20 a5 23 85 c0 e2 20 a5 25 85 c2 ->3a5418 20 0f 13 20 24 13 80 b9 08 20 3e 21 e2 20 a7 00 ->3a5428 20 e2 04 90 42 c2 20 a5 00 85 e7 e2 20 a5 02 85 ->3a5438 e9 20 1d 21 a7 00 f0 0d c9 24 f0 14 c9 25 f0 09 ->3a5448 20 4d 51 b0 ec a9 01 80 0c 20 1d 21 a9 00 80 05 ->3a5458 20 1d 21 a9 02 85 ea 20 7e 22 c9 8f d0 06 a5 ea ->3a5468 09 80 85 ea 28 38 60 28 18 60 08 c2 20 18 a5 23 ->3a5478 65 29 85 23 a5 25 65 2b 85 25 28 60 08 c2 20 38 ->3a5488 a5 23 e5 29 85 23 a5 25 e5 2b 85 25 28 60 08 c2 ->3a5498 20 3b 38 e9 0a 00 1b c2 30 a9 00 00 83 01 83 03 ->3a54a8 83 05 83 07 83 09 a5 25 10 18 a9 00 80 83 01 a5 ->3a54b8 25 49 ff ff 85 25 a5 23 49 ff ff 1a 85 23 d0 02 ->3a54c8 e6 25 a5 2b 10 1a a3 01 49 00 80 83 01 a5 2b 49 ->3a54d8 ff ff 85 2b a5 29 49 ff ff 1a 85 29 d0 02 e6 2b ->3a54e8 a5 25 f0 04 a5 2b d0 5a a5 23 8f 00 01 00 a5 29 ->3a54f8 8f 02 01 00 af 04 01 00 83 03 af 06 01 00 83 05 ->3a5508 a5 25 8f 00 01 00 a5 29 8f 02 01 00 18 af 04 01 ->3a5518 00 63 05 83 05 af 06 01 00 63 07 83 07 a5 23 8f ->3a5528 00 01 00 a5 2b 8f 02 01 00 18 af 04 01 00 63 05 ->3a5538 83 05 af 06 01 00 63 07 83 07 a3 07 f0 23 a3 09 ->3a5548 f0 1f 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 0d ->3a5558 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 ->3a5568 08 c2 30 a3 01 10 16 a3 05 49 ff ff 83 05 a3 03 ->3a5578 49 ff ff 1a 83 03 d0 05 a3 05 1a 83 05 a3 03 85 ->3a5588 23 a3 05 85 25 c2 20 3b 18 69 0a 00 1b 28 60 08 ->3a5598 c2 20 a5 23 c5 29 a5 25 e5 2b 50 03 49 00 80 30 ->3a55a8 06 64 23 64 25 80 07 a9 ff ff 85 23 85 25 28 60 ->3a55b8 08 c2 20 a5 23 c5 29 d0 0c a5 25 c5 2b d0 06 64 ->3a55c8 23 64 25 80 16 a5 29 c5 23 a5 2b e5 25 50 03 49 ->3a55d8 00 80 10 eb a9 ff ff 85 23 85 25 28 60 08 c2 20 ->3a55e8 a5 2b c5 25 d0 0f a5 29 c5 23 d0 09 a9 ff ff 85 ->3a55f8 23 85 25 80 04 64 23 64 25 28 60 08 c2 20 a5 2b ->3a5608 c5 25 d0 0c a5 29 c5 23 d0 06 64 23 64 25 80 07 ->3a5618 a9 ff ff 85 23 85 25 28 60 08 c2 20 a5 23 c5 29 ->3a5628 d0 0f a5 25 c5 2b d0 09 a9 ff ff 85 23 85 25 80 ->3a5638 13 a5 29 c5 23 a5 2b e5 25 50 03 49 00 80 30 e8 ->3a5648 64 23 64 25 28 60 08 c2 20 a5 23 c5 29 d0 0f a5 ->3a5658 25 c5 2b d0 09 a9 ff ff 85 23 85 25 80 13 a5 23 ->3a5668 c5 29 a5 25 e5 2b 50 03 49 00 80 30 e8 64 23 64 ->3a5678 25 28 60 08 c2 20 8f 12 01 00 8a 8f 10 01 00 af ->3a5688 16 01 00 aa af 14 01 00 28 60 08 e2 20 a9 03 8f ->3a5698 00 e2 af a9 00 8f 01 e2 af c2 20 a5 23 8f 08 e2 ->3a56a8 af a5 25 8f 0a e2 af a9 00 00 8f 0c e2 af a9 00 ->3a56b8 01 8f 0e e2 af ea ea ea ea ea ea af 08 e2 af 85 ->3a56c8 23 af 0a e2 af 85 25 a9 01 00 85 27 28 60 08 e2 ->3a56d8 20 a9 40 8f 00 e2 af 80 09 08 e2 20 a9 48 8f 00 ->3a56e8 e2 af a9 02 8f 01 e2 af c2 20 a5 23 8f 08 e2 af ->3a56f8 a5 25 8f 0a e2 af a5 29 8f 0c e2 af a5 2b 8f 0e ->3a5708 e2 af ea ea ea e2 20 af 06 e2 af 29 07 d0 10 c2 ->3a5718 20 af 08 e2 af 85 23 af 0a e2 af 85 25 28 60 20 ->3a5728 c2 57 80 f9 08 e2 20 a9 01 8f 01 e2 af a9 00 8f ->3a5738 00 e2 af c2 20 a5 23 8f 08 e2 af a5 25 8f 0a e2 ->3a5748 af a5 29 8f 0c e2 af a5 2b 8f 0e e2 af ea ea ea ->3a5758 e2 20 af 05 e2 af 29 17 d0 10 c2 20 af 08 e2 af ->3a5768 85 23 af 0a e2 af 85 25 28 60 20 c2 57 80 f9 08 ->3a5778 e2 20 a9 00 8f 01 e2 af a9 00 8f 00 e2 af c2 20 ->3a5788 a5 23 8f 08 e2 af a5 25 8f 0a e2 af a5 29 8f 0c ->3a5798 e2 af a5 2b 8f 0e e2 af ea ea ea e2 20 af 04 e2 ->3a57a8 af 29 07 d0 10 c2 20 af 08 e2 af 85 23 af 0a e2 ->3a57b8 af 85 25 28 60 20 c2 57 80 f9 e2 20 89 01 f0 20 ->3a57c8 00 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 0c 8f ->3a57d8 d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 ->3a57e8 89 02 f0 1f 08 c2 20 48 a9 00 08 5b 68 28 e2 20 ->3a57f8 a9 0d 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 ->3a5808 dc d4 08 89 04 f0 1f 08 c2 20 48 a9 00 08 5b 68 ->3a5818 28 e2 20 a9 0e 8f d3 08 00 c2 20 29 ff 00 20 5e ->3a5828 1e e2 20 dc d4 08 60 08 e2 20 a9 00 8f 01 e2 af ->3a5838 a9 02 8f 00 e2 af c2 20 a9 00 a0 8f 0c e2 af a9 ->3a5848 00 00 8f 0e e2 af a5 23 8f 08 e2 af a5 25 8f 0a ->3a5858 e2 af ea ea ea e2 20 af 04 e2 af 89 07 f0 01 00 ->3a5868 c2 20 af 08 e2 af 85 23 af 0a e2 af 85 25 28 60 ->3a5878 08 e2 20 a9 01 8f 01 e2 af a9 02 8f 00 e2 af c2 ->3a5888 20 a9 00 a0 8f 0c e2 af a9 00 00 8f 0e e2 af a5 ->3a5898 23 8f 08 e2 af a5 25 8f 0a e2 af ea ea ea af 08 ->3a58a8 e2 af 85 23 af 0a e2 af 85 25 28 60 08 c2 20 a5 ->3a58b8 23 d0 0a a5 25 29 ff 7f d0 03 28 38 60 28 18 60 ->3a58c8 08 e2 20 38 e9 30 20 7a 05 c2 20 29 ff 00 18 65 ->3a58d8 23 85 23 a5 25 69 00 00 85 25 28 60 08 e2 20 c9 ->3a58e8 30 90 04 c9 3a 90 1c c9 61 90 04 c9 67 90 0a c9 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57 c2 20 a5 55 85 29 a5 57 ->3a5a18 85 2b 20 e1 56 c2 20 a5 23 85 29 a5 25 85 2b 20 ->3a5a28 52 59 20 77 57 c2 20 a5 65 f0 07 a5 25 09 00 80 ->3a5a38 85 25 e2 20 a9 01 85 27 28 60 5a 08 c2 30 64 23 ->3a5a48 64 25 64 55 64 57 64 65 64 59 64 5b a9 01 00 85 ->3a5a58 5d 64 5f 64 61 64 63 64 69 e2 20 a0 00 00 b7 00 ->3a5a68 c9 2b f0 33 c9 2d f0 2b c9 26 f0 3a 20 fb 04 90 ->3a5a78 03 82 ac 00 08 c2 20 48 a9 00 08 5b 68 28 e2 20 ->3a5a88 a9 02 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 ->3a5a98 dc d4 08 a9 01 85 65 c8 b7 00 c9 26 f0 08 20 fb ->3a5aa8 04 90 d1 82 7a 00 c8 b7 00 c9 68 f0 0e c9 48 f0 ->3a5ab8 0a c9 62 f0 4c c9 42 f0 48 80 b9 c8 b7 00 20 0c ->3a5ac8 05 b0 02 80 af 20 e4 58 c8 b7 00 20 0c 05 b0 f5 ->3a5ad8 e2 20 a5 65 f0 11 c2 20 38 a9 00 00 e5 23 85 23 ->3a5ae8 a9 00 00 e5 25 85 25 e2 20 a9 00 85 27 c2 20 18 ->3a5af8 98 65 00 85 00 a5 02 69 00 00 85 02 e2 20 28 7a ->3a5b08 60 c8 b7 00 c9 30 f0 07 c9 31 f0 03 82 65 ff 20 ->3a5b18 34 59 c8 b7 00 c9 30 f0 f6 c9 31 f0 f2 82 b0 ff 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26 08 29 80 83 01 ad 25 08 ->3a5c48 2a ad 26 08 2a 83 02 a9 00 83 06 ad 25 08 09 80 ->3a5c58 83 05 ad 24 08 83 04 ad 23 08 83 03 a3 02 c9 96 ->3a5c68 f0 3a 90 1f 08 c2 20 48 a9 00 08 5b 68 28 e2 20 ->3a5c78 a9 0d 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 ->3a5c88 dc d4 08 c2 20 a3 05 4a 83 05 a3 03 6a 83 03 e2 ->3a5c98 20 a3 02 1a 83 02 c9 96 f0 02 80 e7 a3 01 f0 1b ->3a5ca8 c2 20 a3 03 49 ff ff 18 69 01 00 8d 23 08 a3 05 ->3a5cb8 49 ff ff 69 00 00 8d 25 08 80 0c c2 20 a3 03 8d ->3a5cc8 23 08 a3 05 8d 25 08 c2 20 68 68 68 e2 20 a9 00 ->3a5cd8 8d 27 08 28 60 da 08 c2 20 a5 25 48 a5 23 48 20 ->3a5ce8 d6 56 20 b4 58 b0 11 a5 25 89 00 80 d0 05 a9 01 ->3a5cf8 00 80 08 a9 ff ff 80 03 a9 00 00 fa 86 23 fa 86 ->3a5d08 25 28 fa 60 08 c2 30 20 dd 5c c9 ff ff d0 05 20 ->3a5d18 2d 06 80 03 20 3f 06 28 60 08 c2 30 20 dd 5c c9 ->3a5d28 01 00 d0 05 20 2d 06 80 03 20 3f 06 28 60 08 c2 ->3a5d38 30 20 dd 5c c9 00 00 d0 05 20 2d 06 80 03 20 3f ->3a5d48 06 28 60 08 c2 30 20 dd 5c c9 01 00 f0 05 20 2d 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00 a5 23 df 92 66 3a a5 25 ->3a60a8 ff 94 66 3a 90 2c bf 8e 66 3a 8f 08 e2 af bf 90 ->3a60b8 66 3a 8f 0a e2 af a5 23 8f 0c e2 af a5 25 8f 0e ->3a60c8 e2 af ea ea ea af 08 e2 af 85 23 af 0a e2 af 85 ->3a60d8 25 38 98 2a a8 e8 e8 e8 e8 e0 0c 00 d0 ba 98 aa ->3a60e8 7a 60 08 c2 30 48 da 20 9c 5f 8b e2 20 a9 3a 48 ->3a60f8 ab c2 20 a2 ce 65 5a a0 05 00 20 0d 5f 7a a9 01 ->3a6108 00 8f 27 08 00 ab fa 68 28 60 08 c2 30 48 da a5 ->3a6118 23 85 29 a5 25 85 2b 20 9c 5f 8b e2 20 a9 3a 48 ->3a6128 ab c2 20 a2 e2 65 5a a0 05 00 20 0d 5f 7a ab 20 ->3a6138 77 57 fa 68 28 60 08 c2 30 48 da a5 23 85 29 a5 ->3a6148 25 85 2b 20 9c 5f 8b e2 20 a9 3a 48 ab c2 20 a2 ->3a6158 f6 65 5a a0 05 00 20 0d 5f 7a ab 20 77 57 fa 68 ->3a6168 28 60 08 c2 30 48 da e2 20 a9 40 8f 00 e2 af a9 ->3a6178 02 8f 01 e2 af c2 20 a5 23 8f 08 e2 af a5 25 8f ->3a6188 0a e2 af af 26 66 3a 8f 0c e2 af af 28 66 3a 8f ->3a6198 0e e2 af ea ea ea af 08 e2 af 85 0c af 0a e2 af ->3a61a8 85 0e e2 20 a9 48 8f 00 e2 af c2 20 ea ea ea af ->3a61b8 08 e2 af 85 10 af 0a e2 af 85 12 e2 20 a9 01 8f ->3a61c8 01 e2 af c2 20 a5 0c 8f 08 e2 af a5 0e 8f 0a e2 ->3a61d8 af a5 10 8f 0c e2 af a5 12 8f 0e e2 af ea ea ea ->3a61e8 af 08 e2 af 85 23 af 0a e2 af 85 25 e2 20 a9 08 ->3a61f8 8f 00 e2 af a9 02 8f 01 e2 af c2 20 a5 23 8f 08 ->3a6208 e2 af a5 25 8f 0a e2 af ea ea ea af 08 e2 af 85 ->3a6218 29 af 0a e2 af 85 2b 20 9c 5f 8b e2 20 a9 3a 48 ->3a6228 ab c2 20 a2 0a 66 5a a0 08 00 20 0d 5f 7a a9 01 ->3a6238 00 8f 27 08 00 8f 2d 08 00 20 77 57 ab fa 68 28 ->3a6248 60 08 c2 30 48 da 20 3c 60 20 99 60 da 8a 29 01 ->3a6258 00 d0 05 20 12 61 80 03 20 ea 60 fa 8a 29 04 00 ->3a6268 f0 0a e2 20 a5 26 09 80 85 26 c2 20 fa 68 28 60 ->3a6278 08 c2 30 48 da 20 3c 60 20 99 60 da 8a 29 01 00 ->3a6288 d0 05 20 ea 60 80 03 20 12 61 fa 8a 29 02 00 f0 ->3a6298 0a e2 20 a5 26 09 80 85 26 c2 20 fa 68 28 60 08 ->3a62a8 c2 30 48 da 20 3c 60 20 99 60 20 3e 61 8a 29 01 ->3a62b8 00 f0 03 20 d2 5f 8a e2 20 4a 4a 69 00 29 01 f0 ->3a62c8 06 a5 26 09 80 85 26 c2 20 fa 68 28 60 08 c2 30 ->3a62d8 48 da 5a a5 25 10 1f 08 c2 20 48 a9 00 08 5b 68 ->3a62e8 28 e2 20 a9 17 8f d3 08 00 c2 20 29 ff 00 20 5e ->3a62f8 1e e2 20 dc d4 08 c2 30 a5 23 cf 26 66 3a a5 25 ->3a6308 cf 28 66 3a b0 04 20 d2 5f 18 a9 00 00 a8 2a 48 ->3a6318 e2 20 a9 00 8f 00 e2 af a9 01 8f 01 e2 af c2 20 ->3a6328 af 7e 66 3a 85 29 8f 0c e2 af af 80 66 3a 85 2b ->3a6338 8f 0e e2 af 20 10 60 8a f0 07 0a 0a 0a 0a 0a 0a ->3a6348 a8 af 82 66 3a 85 29 8f 0c e2 af af 84 66 3a 85 ->3a6358 2b 8f 0e e2 af 20 10 60 8a f0 0b 0a 0a 0a 0a 85 ->3a6368 29 18 98 65 29 a8 af 86 66 3a 85 29 8f 0c e2 af ->3a6378 af 88 66 3a 85 2b 8f 0e e2 af 20 10 60 8a f0 09 ->3a6388 0a 0a 85 29 18 98 65 29 a8 af 8a 66 3a 85 29 8f ->3a6398 0c e2 af af 8c 66 3a 85 2b 8f 0e e2 af 20 10 60 ->3a63a8 86 29 18 98 65 29 a8 20 6a 61 a5 23 85 29 a5 25 ->3a63b8 85 2b 98 85 23 64 25 20 04 5c 20 e1 56 68 d0 07 ->3a63c8 a5 25 09 00 80 85 25 7a fa 68 28 60 08 c2 30 48 ->3a63d8 da a5 23 85 29 a5 25 85 2b 20 9c 5f 8b e2 20 a9 ->3a63e8 3a 48 ab c2 20 a2 2e 66 a0 05 00 20 0d 5f ab 20 ->3a63f8 77 57 fa 68 28 60 08 c2 30 48 da 20 d4 63 af 96 ->3a6408 66 3a 85 29 af 98 66 3a 85 2b 20 d6 56 a5 25 49 ->3a6418 00 80 85 25 fa 68 28 60 08 c2 30 48 da a5 23 85 ->3a6428 29 a5 25 85 2b 20 9c 5f 8b e2 20 a9 3a 48 ab c2 ->3a6438 20 a2 42 66 a0 05 00 20 0d 5f ab 20 77 57 fa 68 ->3a6448 28 60 c2 20 a5 23 85 29 a5 25 85 2b c2 20 af 26 ->3a6458 66 3a 85 23 af 28 66 3a 85 25 8a f0 30 4a aa 90 ->3a6468 03 20 77 57 c2 20 a5 25 48 a5 23 48 c2 20 a5 29 ->3a6478 85 23 a5 2b 85 25 20 9c 5f c2 20 a5 23 85 29 a5 ->3a6488 25 85 2b c2 20 68 85 23 68 85 25 80 cd 60 08 c2 ->3a6498 30 48 da 8b e2 20 a9 3a 48 ab c2 20 a2 56 66 5a ->3a64a8 a0 0a 00 20 0d 5f 7a ab fa 68 28 60 08 c2 30 48 ->3a64b8 da 5a a5 23 05 25 d0 10 c2 20 af 26 66 3a 85 23 ->3a64c8 af 28 66 3a 85 25 80 61 a5 25 29 00 80 a8 f0 07 ->3a64d8 a5 25 29 ff 7f 85 25 c2 20 a5 25 48 a5 23 48 20 ->3a64e8 51 06 a6 23 20 bf 07 c2 20 a5 23 85 29 a5 25 85 ->3a64f8 2b c2 20 68 85 23 68 85 25 20 d6 56 20 96 64 c2 ->3a6508 20 a5 25 48 a5 23 48 c2 20 af 8a 66 3a 85 23 af ->3a6518 8c 66 3a 85 25 20 4a 64 c2 20 68 85 29 68 85 2b ->3a6528 20 77 57 98 f0 03 20 d2 5f 7a fa 68 28 60 08 c2 ->3a6538 30 48 a5 25 10 1f 08 c2 20 48 a9 00 08 5b 68 28 ->3a6548 e2 20 a9 17 8f d3 08 00 c2 20 29 ff 00 20 5e 1e ->3a6558 e2 20 dc d4 08 c2 30 05 23 f0 68 c2 20 af 2a 66 ->3a6568 3a 85 29 af 2c 66 3a 85 2b e2 20 a9 01 85 2d c2 ->3a6578 20 c2 20 a5 25 48 a5 23 48 20 2c 57 a5 25 c5 2b ->3a6588 d0 09 a5 23 45 29 29 f8 ff f0 30 20 e1 56 c2 20 ->3a6598 af 2a 66 3a 85 29 af 2c 66 3a 85 2b 20 2c 57 c2 ->3a65a8 20 a5 23 85 29 a5 25 85 2b c2 20 68 85 23 68 85 ->3a65b8 25 c2 20 a5 25 48 a5 23 48 80 be c2 20 68 85 29 ->3a65c8 68 85 2b 68 28 60 01 0d d0 37 61 0b b6 ba ab aa ->3a65d8 2a 3d 00 00 00 bf 00 00 80 3f 1d ef 38 36 01 0d ->3a65e8 50 b9 89 88 08 3c ab aa 2a be 00 00 80 3f a4 27 ->3a65f8 b3 3c d1 0d 5d 3d 89 88 08 3e ab aa aa 3e 00 00 ->3a6608 80 3f 89 88 88 3d d9 89 9d 3d 8c 2e ba 3d 39 8e ->3a6618 e3 3d 25 49 12 3e cd cc 4c 3e ab aa aa 3e 00 00 ->3a6628 80 3f 00 00 00 40 8e e3 f8 3c 6e db 36 3d 9a 99 ->3a6638 99 3d ab aa 2a 3e 00 00 80 3f 39 8e e3 3d 25 49 ->3a6648 12 be cd cc 4c 3e ab aa aa be 00 00 80 3f 1d ef ->3a6658 38 36 01 0d d0 37 01 0d 50 39 61 0b b6 3a 89 88 ->3a6668 08 3c ab aa 2a 3d ab aa 2a 3e 00 00 00 3f 00 00 ->3a6678 80 3f 00 00 80 3f c1 2c a1 6d 5f 97 07 4b 81 64 ->3a6688 5a 42 54 f8 2d 40 db 0f c9 40 db 0f 49 40 db 0f ->3a6698 c9 3f db 0f 49 3f 08 20 0f 13 c2 20 a9 01 00 85 ->3a66a8 23 a9 00 00 85 25 e2 20 af 00 4d 00 c2 20 29 ff ->3a66b8 00 85 8f a8 a2 01 00 c2 20 bf 00 4d 00 85 29 a9 ->3a66c8 00 00 85 2b e2 20 a9 00 85 2d c2 20 20 5a 28 e8 ->3a66d8 e8 88 d0 e3 c2 20 a9 04 00 85 29 a9 00 00 85 2b ->3a66e8 20 5a 28 e2 20 af 00 4d 00 85 0c a9 00 85 0d c2 ->3a66f8 20 06 0c 38 a5 23 65 0c 85 23 a5 25 69 00 00 85 ->3a6708 25 d0 29 e2 20 a5 ea 09 80 a6 23 20 d3 10 e2 20 ->3a6718 af 00 4d 00 87 c0 a0 01 00 a2 00 00 e2 20 bf 01 ->3a6728 4d 00 97 c0 e4 8f f0 23 e8 c8 80 f0 08 c2 20 48 ->3a6738 a9 00 08 5b 68 28 e2 20 a9 09 8f d3 08 00 c2 20 ->3a6748 29 ff 00 20 5e 1e e2 20 dc d4 08 e2 20 38 a5 c0 ->3a6758 67 c0 85 08 a5 c1 69 00 85 09 a5 c2 69 00 85 0a ->3a6768 64 0b c2 20 a0 05 00 b7 c3 85 0c e2 20 c8 c8 b7 ->3a6778 c3 85 0e 64 0f e2 20 a9 00 87 08 c2 20 18 a5 08 ->3a6788 69 01 00 85 08 a5 0a 69 00 00 85 0a c5 0e d0 e5 ->3a6798 a5 08 c5 0c d0 df 28 60 08 c2 20 64 08 64 0a e2 ->3a67a8 20 af 00 4d 00 85 8f 64 90 a2 01 00 e2 20 a7 c0 ->3a67b8 c5 8f f0 22 a6 8f 00 08 c2 20 48 a9 00 08 5b 68 ->3a67c8 28 e2 20 a9 0a 8f d3 08 00 c2 20 29 ff 00 20 5e ->3a67d8 1e e2 20 dc d4 08 c9 01 f0 3a a0 01 00 e2 20 bf ->3a67e8 00 4d 00 85 23 64 24 64 25 64 26 b7 c0 85 29 64 ->3a67f8 2a 64 2b 64 2c a5 23 c5 29 b0 68 20 5a 28 c2 20 ->3a6808 18 a5 08 65 23 85 08 a5 0a 65 25 85 0a e8 e8 c8 ->3a6818 c4 8f d0 c9 e2 20 18 bf 00 4d 00 85 90 65 08 85 ->3a6828 08 a5 09 69 00 85 09 c2 20 a5 0a 69 00 00 85 0a ->3a6838 c2 20 06 08 26 0a 06 08 26 0a e2 20 38 a5 08 65 ->3a6848 8f 85 08 a5 09 69 00 85 09 c2 20 a5 0a 69 00 00 ->3a6858 85 0a 18 a5 08 65 c0 85 08 e2 20 a5 0a 65 c2 85 ->3a6868 0a 28 60 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 ->3a6878 09 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc ->3a6888 d4 08 08 20 0f 13 e2 20 a0 00 00 b7 c3 29 7f c9 ->3a6898 02 d0 05 20 e3 06 80 10 c9 00 d0 05 20 51 06 80 ->3a68a8 07 c9 01 d0 2b 20 bf 07 a5 27 48 c2 20 a5 25 48 ->3a68b8 a5 23 48 20 a0 67 68 85 23 68 85 25 e2 20 68 85 ->3a68c8 27 c2 20 a5 23 87 08 a0 02 00 a5 25 97 08 28 60 ->3a68d8 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 04 8f d3 ->3a68e8 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 08 ->3a68f8 20 0f 13 f4 00 00 f4 00 00 e2 20 48 20 a0 67 e2 ->3a6908 20 68 c2 20 68 68 c2 20 a7 08 85 23 a0 02 00 b7 ->3a6918 08 85 25 e2 20 a0 00 00 b7 c3 29 7f 85 27 20 63 ->3a6928 18 28 60 da 0b 08 08 c2 20 48 a9 00 08 5b 68 28 ->3a6938 c2 30 a5 25 89 f0 ff d0 29 89 0f 00 d0 0c a5 23 ->3a6948 89 00 fc d0 05 20 1e 46 80 2e a2 0a 00 46 25 66 ->3a6958 23 ca d0 f9 20 1e 46 e2 20 a9 4b 20 18 00 c2 20 ->3a6968 80 16 a2 14 00 46 25 66 23 ca d0 f9 20 1e 46 e2 ->3a6978 20 a9 4d 20 18 00 c2 20 28 2b fa 60 0b 08 c2 30 ->3a6988 a9 00 00 8f b6 08 00 8f b8 08 00 e2 20 20 7e 22 ->3a6998 c9 00 f0 08 20 0c 1d 20 e3 06 80 11 c2 20 a9 00 ->3a69a8 00 85 23 85 25 e2 20 a9 02 85 27 c2 20 20 e5 6a ->3a69b8 22 08 11 00 b0 22 20 96 6b 08 c2 20 48 a9 00 08 ->3a69c8 5b 68 28 e2 20 a9 10 8f d3 08 00 c2 20 29 ff 00 ->3a69d8 20 5e 1e e2 20 dc d4 08 20 d7 03 08 c2 20 48 a9 ->3a69e8 20 03 5b 68 28 e2 20 a0 00 00 b7 18 d0 03 82 a9 ->3a69f8 00 c9 e5 d0 03 82 96 00 a0 0b 00 b7 18 89 08 f0 ->3a6a08 03 82 a9 00 89 02 f0 03 82 83 00 29 0f c9 0f d0 ->3a6a18 03 82 7a 00 a0 00 00 b7 18 20 18 00 c8 c0 08 00 ->3a6a28 d0 f5 a9 20 20 18 00 a0 08 00 b7 18 20 18 00 c8 ->3a6a38 c0 0b 00 d0 f5 a9 09 20 18 00 a0 0b 00 b7 18 89 ->3a6a48 10 d0 1e c2 20 a0 1c 00 b7 18 8f 23 08 00 c8 c8 ->3a6a58 b7 18 8f 25 08 00 e2 20 a9 00 8f 27 08 00 20 2b ->3a6a68 69 a9 09 20 18 00 a0 0b 00 b7 18 89 08 d0 1c 89 ->3a6a78 01 f0 05 a9 52 20 18 00 89 04 f0 05 a9 53 20 18 ->3a6a88 00 89 10 f0 05 a9 44 20 18 00 ea 20 d7 03 20 ee ->3a6a98 03 22 0c 11 00 90 03 82 41 ff 20 96 6b 08 c2 20 ->3a6aa8 48 a9 00 08 5b 68 28 20 62 21 28 2b 60 08 c2 20 ->3a6ab8 48 a9 20 03 5b 68 28 e2 20 29 0f c9 0f f0 cf a9 ->3a6ac8 5b 20 18 00 a0 00 00 b7 18 c9 20 f0 09 20 18 00 ->3a6ad8 c8 c0 08 00 d0 f1 a9 5d 20 18 00 80 ae 0b 08 08 ->3a6ae8 c2 20 48 a9 20 03 5b 68 28 c2 30 a9 73 f2 85 20 ->3a6af8 a9 3a 00 85 22 a0 00 00 e2 20 a9 00 97 20 c8 c0 ->3a6b08 1e 00 d0 f8 c2 20 a9 73 f0 8f 81 f2 3a a9 3a 00 ->3a6b18 8f 83 f2 3a af 23 08 00 8f 75 f2 3a af 25 08 00 ->3a6b28 8f 77 f2 3a 28 2b 60 08 c2 30 20 3e 21 20 0c 1d ->3a6b38 20 e3 06 20 e5 6a e2 20 a9 2c 85 37 20 5f 22 b0 ->3a6b48 0f c2 20 a9 ff ff 8f 54 03 00 8f 56 03 00 80 17 ->3a6b58 20 1d 21 20 0c 1d 20 51 06 c2 20 a5 23 8f 54 03 ->3a6b68 00 a5 25 8f 56 03 00 22 18 11 00 b0 1f 08 c2 20 ->3a6b78 48 a9 00 08 5b 68 28 e2 20 a9 11 8f d3 08 00 c2 ->3a6b88 20 29 ff 00 20 5e 1e e2 20 dc d4 08 28 60 8b 0b ->3a6b98 08 08 c2 20 48 a9 00 08 5b 68 28 08 e2 20 48 a9 ->3a6ba8 00 48 ab 68 28 e2 20 af 2e 03 00 85 23 a9 00 85 ->3a6bb8 24 85 25 85 26 a9 00 85 27 85 ea a9 3a 85 e9 c2 ->3a6bc8 20 a9 f9 6b 85 e7 20 83 53 e2 20 af 20 03 00 85 ->3a6bd8 23 a9 00 85 24 85 25 85 26 a9 00 85 27 85 ea a9 ->3a6be8 3a 85 e9 c2 20 a9 01 6c 85 e7 20 83 53 28 2b ab ->3a6bf8 60 44 4f 53 53 54 41 54 00 42 49 4f 53 53 54 41 ->3a6c08 54 00 08 c2 30 20 3e 21 20 0c 1d 20 e3 06 a5 23 ->3a6c18 8f 60 03 00 a5 25 8f 62 03 00 a9 ff ff 8f 54 03 ->3a6c28 00 8f 56 03 00 22 24 11 00 b0 25 20 5e 1e 20 96 ->3a6c38 6b 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 11 8f ->3a6c48 d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 ->3a6c58 20 5e 1e 28 60 08 c2 30 20 3e 21 20 0c 1d 20 e3 ->3a6c68 06 20 e5 6a a9 00 00 8f 54 03 00 a9 01 00 8f 56 ->3a6c78 03 00 20 54 50 22 18 11 00 b0 22 20 96 6b 08 c2 ->3a6c88 20 48 a9 00 08 5b 68 28 e2 20 a9 11 8f d3 08 00 ->3a6c98 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 20 96 6b ->3a6ca8 c2 20 a2 12 00 18 bf 73 f2 3a 69 00 00 85 92 bf ->3a6cb8 75 f2 3a 69 01 00 85 94 e2 20 a9 00 87 92 c2 20 ->3a6cc8 a9 00 00 85 7a a9 01 00 85 7c a2 00 00 e2 20 a7 ->3a6cd8 7a f0 2a c9 0d f0 12 c9 0a f0 04 9d 00 4f e8 c2 ->3a6ce8 20 e6 7a d0 e8 e6 7c 80 e4 e2 20 a9 00 9d 00 4f ->3a6cf8 20 8d 27 c2 20 e6 7a d0 d1 e6 7c 80 cd e0 00 00 ->3a6d08 f0 0a e2 20 a9 00 9d 00 4f 20 8d 27 28 60 08 c2 ->3a6d18 30 20 3e 21 20 0c 1d 20 e3 06 20 e5 6a e2 20 a9 ->3a6d28 2c 20 2a 22 c2 20 20 0c 1d 20 51 06 a5 23 8f 50 ->3a6d38 03 00 a5 25 8f 52 03 00 e2 20 a9 2c c2 20 20 2a ->3a6d48 22 20 0c 1d 20 51 06 a5 23 8f 58 03 00 a5 25 8f ->3a6d58 5a 03 00 22 1c 11 00 b0 22 20 96 6b 08 c2 20 48 ->3a6d68 a9 00 08 5b 68 28 e2 20 a9 12 8f d3 08 00 c2 20 ->3a6d78 29 ff 00 20 5e 1e e2 20 dc d4 08 20 96 6b 28 60 ->3a6d88 da 5a 08 a2 00 00 a0 00 00 e2 20 b7 23 9d 00 04 ->3a6d98 f0 04 e8 c8 80 f5 28 7a fa 60 08 c2 30 20 3e 21 ->3a6da8 20 0c 1d 20 e3 06 20 e5 6a a9 00 00 85 a6 e2 20 ->3a6db8 a9 01 85 a8 a9 20 85 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->3a6ed8 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 ->3a6ee8 08 e2 20 a9 2c 20 2a 22 c2 20 20 0c 1d 20 e3 06 ->3a6ef8 ad 38 03 85 08 ad 3a 03 85 0a e2 20 a2 00 00 a9 ->3a6f08 20 95 7e e8 e0 0b 00 d0 f8 a2 00 00 a0 00 00 b7 ->3a6f18 23 f0 76 c9 2e f0 39 22 71 6e 3a b0 1f 08 c2 20 ->3a6f28 48 a9 00 08 5b 68 28 e2 20 a9 0a 8f d3 08 00 c2 ->3a6f38 20 29 ff 00 20 5e 1e e2 20 dc d4 08 95 7e c8 e8 ->3a6f48 c0 08 00 d0 ca b7 23 f0 40 c9 2e f0 03 c8 80 f5 ->3a6f58 c8 a2 08 00 b7 23 f0 31 22 71 6e 3a b0 22 20 96 ->3a6f68 6b 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 0a 8f ->3a6f78 d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc d4 08 ->3a6f88 95 7e c8 e8 c0 0c 00 d0 cb a2 00 00 a0 00 00 b5 ->3a6f98 7e 97 08 e8 c8 c0 0b 00 d0 f5 22 14 11 00 b0 22 ->3a6fa8 20 96 6b 08 c2 20 48 a9 00 08 5b 68 28 e2 20 a9 ->3a6fb8 15 8f d3 08 00 c2 20 29 ff 00 20 5e 1e e2 20 dc ->3a6fc8 d4 08 20 96 6b 28 60 08 08 c2 20 48 a9 00 08 5b ->3a6fd8 68 28 c2 30 20 0c 1d 20 e3 06 a5 23 8f 64 03 00 ->3a6fe8 a5 25 8f 66 03 00 e2 20 a9 2c 20 2a 22 c2 20 20 ->3a6ff8 0c 1d 20 e3 06 a5 23 8f 68 03 00 a5 25 8f 6a 03 ->3a7008 00 22 30 11 00 b0 1f 08 c2 20 48 a9 00 08 5b 68 ->3a7018 28 e2 20 a9 16 8f d3 08 00 c2 20 29 ff 00 20 5e ->3a7028 1e e2 20 dc d4 08 28 60 5c ed 89 3a 5c 3e 88 3a ->3a7038 5c ee 89 3a 5c 6a 79 3a 5c c7 79 3a 5c fa 78 3a ->3a7048 5c 80 78 3a 5c fd 7d 3a 5c eb 74 3a 5c 18 78 3a ->3a7058 5c d3 77 3a 5c 5d 77 3a 5c fc 88 3a 5c f9 75 3a ->3a7068 5c 49 74 3a 5c 77 89 3a 5c 27 75 3a 5c f0 89 3a ->3a7078 5c e9 89 3a 5c 16 77 3a 5c f1 89 3a 18 fb 58 5c ->3a7088 8b 70 3a c2 30 22 49 74 3a 20 08 00 20 0c 00 8b ->3a7098 e2 20 a9 00 48 ab a2 00 4f 20 65 05 ab 22 34 70 ->3a70a8 3a 22 3c 70 3a 80 e2 08 8b e2 20 a9 3a 48 ab c2 ->3a70b8 10 a2 c2 70 20 64 04 ab 28 6b 41 20 3c 73 74 61 ->3a70c8 72 74 3e 20 3c 61 73 73 65 6d 62 6c 79 3e 0d 20 ->3a70d8 20 41 73 73 65 6d 62 6c 65 20 61 20 70 72 6f 67 ->3a70e8 72 61 6d 0d 0d 43 20 3c 73 74 61 72 74 31 3e 20 ->3a70f8 3c 73 74 61 72 74 32 3e 20 5b 6c 65 6e 20 28 31 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6e 64 3e 20 3c 62 79 74 65 ->3a7228 3e 20 5b 62 79 74 65 5d 2e 2e 0d 20 20 48 75 6e ->3a7238 74 20 66 6f 72 20 76 61 6c 75 65 73 20 69 6e 20 ->3a7248 6d 65 6d 6f 72 79 0d 0d 4c 20 20 20 20 20 4c 4f ->3a7258 41 44 20 20 20 20 20 20 20 20 20 22 46 69 6c 65 ->3a7268 22 20 5b 64 65 73 74 69 6e 61 74 69 6f 6e 5d 0d ->3a7278 4d 20 3c 73 74 61 72 74 3e 20 5b 65 6e 64 5d 0d ->3a7288 20 20 44 75 6d 70 20 74 68 65 20 76 61 6c 75 65 ->3a7298 20 69 6e 20 6d 65 6d 6f 72 79 0d 0d 52 20 2d 20 ->3a72a8 44 69 73 70 6c 61 79 20 74 68 65 20 76 61 6c 75 ->3a72b8 65 73 20 6f 66 20 74 68 65 20 72 65 67 69 73 74 ->3a72c8 65 72 73 0d 0d 3b 20 3c 50 43 3e 20 3c 41 3e 20 ->3a72d8 3c 58 3e 20 3c 59 3e 20 3c 53 50 3e 20 3c 44 42 ->3a72e8 52 3e 20 3c 44 50 3e 20 3c 4e 56 4d 58 44 49 5a ->3a72f8 43 3e 0d 20 20 43 68 61 6e 67 65 20 74 68 65 20 ->3a7308 63 6f 6e 74 65 6e 74 73 20 6f 66 20 74 68 65 20 ->3a7318 72 65 67 69 73 74 65 72 73 0d 0d 53 20 20 20 20 ->3a7328 20 53 41 56 45 20 20 20 20 20 20 20 20 20 22 46 ->3a7338 69 6c 65 22 20 3c 73 74 61 72 74 3e 20 3c 65 6e ->3a7348 64 3e 0d 54 20 3c 73 74 61 72 74 3e 20 3c 65 6e ->3a7358 64 3e 20 3c 64 65 73 74 69 6e 61 74 69 6f 6e 3e ->3a7368 0d 20 20 54 72 61 6e 73 66 65 72 20 28 63 6f 70 ->3a7378 79 29 20 64 61 74 61 20 77 69 74 68 69 6e 20 6d ->3a7388 65 6d 6f 72 79 0d 0d 57 20 3c 62 79 74 65 3e 0d ->3a7398 20 20 53 65 74 20 74 68 65 20 72 65 67 69 73 74 ->3a73a8 65 72 20 77 69 64 74 68 20 66 6c 61 67 73 20 66 ->3a73b8 6f 72 20 74 68 65 20 64 69 73 61 73 73 65 6d 62 ->3a73c8 6c 65 72 0d 0d 58 20 2d 20 52 65 74 75 72 6e 20 ->3a73d8 74 6f 20 42 41 53 49 43 0d 0d 3e 20 3c 73 74 61 ->3a73e8 72 74 3e 20 3c 62 79 74 65 3e 20 5b 62 79 74 65 ->3a73f8 5d 2e 2e 2e 0d 20 20 45 64 69 74 20 64 61 74 61 ->3a7408 20 69 6e 20 6d 65 6d 6f 72 79 0d 0d 3f 20 2d 20 ->3a7418 44 69 73 70 6c 61 79 20 61 20 73 68 6f 72 74 20 ->3a7428 68 65 6c 70 20 73 63 72 65 65 6e 0d 0d 00 08 08 ->3a7438 c2 20 48 a9 48 08 5b 68 28 e2 20 a5 0d 85 4e 28 ->3a7448 6b 20 3d 02 08 e2 20 48 a9 3a 48 ab 68 28 a2 2e ->3a7458 8a 20 64 04 e2 20 a9 3b 20 18 00 a9 20 20 18 00 ->3a7468 c2 30 08 e2 20 48 a9 00 48 ab 68 28 a0 03 00 a2 ->3a7478 42 02 20 e7 03 c2 20 a9 20 00 20 18 00 af 44 02 ->3a7488 00 20 74 04 a9 20 00 20 18 00 af 46 02 00 20 74 ->3a7498 04 a9 20 00 20 18 00 af 48 02 00 20 74 04 a9 20 ->3a74a8 00 20 18 00 af 4a 02 00 20 74 04 a9 20 00 20 18 ->3a74b8 00 af 4e 02 00 20 8e 04 a9 20 00 20 18 00 a9 20 ->3a74c8 00 20 18 00 af 4c 02 00 20 74 04 a9 20 00 20 18 ->3a74d8 00 08 e2 20 ad 4f 02 22 47 87 3a 28 20 d7 03 20 ->3a74e8 d7 03 6b 08 0b 08 c2 20 48 a9 48 08 5b 68 28 e2 ->3a74f8 20 a5 15 87 0d e2 20 a5 0f c5 13 d0 0e c2 20 a5 ->3a7508 0d c5 11 d0 06 20 d7 03 2b 28 6b c2 20 18 a5 0d ->3a7518 69 01 00 85 0d e2 20 a5 0e 69 00 85 0e 80 d0 08 ->3a7528 0b 08 c2 20 48 a9 48 08 5b 68 28 e2 20 a5 0f c5 ->3a7538 17 90 45 c2 20 a5 0d c5 15 90 3d e2 20 a7 0d 87 ->3a7548 15 a5 0f c5 13 d0 0b c2 20 a5 0d c5 11 d0 03 4c ->3a7558 de 75 c2 20 18 a5 0d 69 01 00 85 0d e2 20 a5 0e ->3a7568 69 00 85 0e c2 20 18 a5 15 69 01 00 85 15 e2 20 ->3a7578 a5 16 69 00 85 16 80 c3 c2 20 38 a5 11 e5 0d 85 ->3a7588 19 e2 20 a5 13 e5 0f 85 1b c2 20 18 a5 19 65 15 ->3a7598 85 15 e2 20 a5 1b 65 17 85 17 e2 20 a7 11 87 15 ->3a75a8 a5 13 c5 0f d0 0a c2 20 a5 11 c5 0d d0 02 80 26 ->3a75b8 c2 20 38 a5 11 e9 01 00 85 11 e2 20 a5 12 e9 00 ->3a75c8 85 12 c2 20 38 a5 15 e9 01 00 85 15 e2 20 a5 16 ->3a75d8 e9 00 85 16 80 c4 20 d7 03 2b 28 6b 08 e2 20 c9 ->3a75e8 21 90 0b c9 7f 90 04 c9 a0 90 03 28 38 6b 28 18 ->3a75f8 6b 08 8b 0b 08 c2 20 48 a9 48 08 5b 68 28 e2 20 ->3a7608 a9 00 8f b6 08 00 a5 31 c9 02 b0 16 c9 01 90 20 ->3a7618 c2 20 18 a5 0d 69 00 01 85 11 e2 20 a5 0f 69 00 ->3a7628 85 13 c2 20 a5 0d 85 32 e2 20 a5 0f 85 34 80 12 ->3a7638 c2 20 18 a5 32 69 00 01 85 11 e2 20 a5 34 69 00 ->3a7648 85 13 e2 20 a0 00 00 c2 20 a5 32 85 19 e2 20 a5 ->3a7658 34 85 1b e2 20 a7 19 22 e4 75 3a b0 02 a9 3f 99 ->3a7668 7e 08 c2 20 18 a5 19 69 01 00 85 19 e2 20 a5 1b ->3a7678 69 00 85 1b c8 c0 08 00 90 db a9 00 99 7e 08 a9 ->3a7688 3e 20 18 00 a9 20 20 18 00 e2 20 a5 34 20 8e 04 ->3a7698 a9 3a 20 18 00 c2 20 a5 32 20 74 04 c2 20 a9 08 ->3a76a8 00 85 47 e2 20 a9 20 20 18 00 a7 32 20 8e 04 22 ->3a76b8 26 87 3a e2 20 c6 47 d0 ea a9 20 20 18 00 a9 20 ->3a76c8 20 18 00 08 e2 20 48 a9 00 48 ab 68 28 a2 7e 08 ->3a76d8 20 64 04 20 d7 03 20 ee 03 a5 34 c5 13 90 0f c2 ->3a76e8 20 a5 32 c5 11 90 07 20 d7 03 2b ab 28 6b 4c 4a ->3a76f8 76 08 8d 92 08 e2 20 bd 00 00 99 00 00 ad 92 08 ->3a7708 f0 0a c8 e8 e8 e8 e8 ce 92 08 80 eb 28 6b 08 0b ->3a7718 8b 08 c2 20 48 a9 48 08 5b 68 28 08 e2 20 48 a9 ->3a7728 00 48 ab 68 28 c2 30 a5 0d 85 32 a5 0f 85 34 e2 ->3a7738 20 a5 31 3a 85 47 a2 59 08 a0 7e 08 22 f9 76 3a ->3a7748 a0 00 00 b9 7e 08 87 32 22 26 87 3a c8 c4 47 d0 ->3a7758 f2 ab 2b 28 6b 08 0b 8b 08 c2 20 48 a9 48 08 5b ->3a7768 68 28 08 e2 20 48 a9 00 48 ab 68 28 e2 20 c2 10 ->3a7778 a5 31 3a 3a 85 47 a2 5d 08 a0 7e 08 22 f9 76 3a ->3a7788 c2 20 a5 0d 85 32 a5 0f 85 34 c2 20 a5 34 c5 13 ->3a7798 d0 06 a5 32 c5 11 f0 2c e2 20 a0 00 00 b7 32 d9 ->3a77a8 7e 08 d0 1a c8 c4 47 d0 f4 c2 20 a5 32 85 4a a5 ->3a77b8 34 85 4c 22 d0 81 3a e2 20 a9 20 20 18 00 22 26 ->3a77c8 87 3a 80 c6 20 d7 03 ab 2b 28 6b 08 c2 20 48 a9 ->3a77d8 48 08 5b 68 28 e2 20 a5 31 f0 0e c2 30 a5 0d 8f ->3a77e8 40 02 00 a5 0f 8f 42 02 00 af 46 02 00 aa af 48 ->3a77f8 02 00 a8 af 4a 02 00 1b af 4c 02 00 5b e2 20 a9 ->3a7808 3a 48 a9 78 48 a9 13 48 4c 4a 78 ea 5c 04 00 3a ->3a7818 08 c2 20 48 a9 48 08 5b 68 28 e2 20 a5 31 f0 c9 ->3a7828 c2 30 a5 0d 8f 40 02 00 a5 0f 8f 42 02 00 af 46 ->3a7838 02 00 aa af 48 02 00 a8 af 4a 02 00 1b af 4c 02 ->3a7848 00 5b e2 20 af 4e 02 00 48 ab a9 5c 8f a2 08 00 ->3a7858 af 42 02 00 8f a5 08 00 af 41 02 00 8f a4 08 00 ->3a7868 af 40 02 00 8f a3 08 00 af 4f 02 00 48 c2 20 af ->3a7878 44 02 00 28 5c a2 08 00 08 0b 8b 08 e2 20 48 a9 ->3a7888 3a 48 ab 68 28 08 c2 20 48 a9 48 08 5b 68 28 c2 ->3a7898 10 e2 20 a5 31 c9 02 f0 0c c9 03 d0 11 c2 20 a5 ->3a78a8 15 85 47 80 11 c2 20 a9 01 00 85 47 80 08 a2 f2 ->3a78b8 89 20 64 04 80 35 a5 0d 85 4a a5 0f 85 4c a0 00 ->3a78c8 00 e2 20 a7 4a d7 11 f0 09 22 d0 81 3a a9 20 20 ->3a78d8 18 00 c2 20 18 a5 4a 69 01 00 85 4a a5 4c 69 00 ->3a78e8 00 85 4c c8 c4 47 d0 d9 20 d7 03 20 d7 03 ab 2b ->3a78f8 28 6b 08 0b 8b 08 e2 20 48 a9 00 48 ab 68 28 08 ->3a7908 c2 20 48 a9 48 08 5b 68 28 e2 20 a5 31 f0 4f a6 ->3a7918 0d 8e 40 02 a6 0f 8e 42 02 c9 01 f0 41 a6 11 8e ->3a7928 44 02 c9 02 f0 38 a6 15 8e 46 02 c9 03 f0 2f a6 ->3a7938 19 8e 48 02 c9 04 f0 26 a6 1d 8e 4a 02 c9 05 f0 ->3a7948 1d e2 10 a6 21 8e 4e 02 c9 06 f0 12 c2 10 a6 25 ->3a7958 8e 4c 02 c9 07 f0 07 e2 10 a6 29 8e 4f 02 ab 2b ->3a7968 28 6b 08 0b 8b 08 c2 20 48 a9 48 08 5b 68 28 e2 ->3a7978 20 c2 10 a2 00 00 bf 5f 8a 3a f0 18 c7 08 f0 03 ->3a7988 e8 80 f3 c2 20 8a 0a aa bf a0 79 3a 8f 2f 08 00 ->3a7998 22 c4 79 3a ab 2b 28 6b 40 70 48 70 4c 70 50 70 ->3a79a8 54 70 58 70 5c 70 60 70 64 70 68 70 44 70 6c 70 ->3a79b8 70 70 74 70 36 74 78 70 7c 70 af 70 6c 2f 08 08 ->3a79c8 8b 0b 08 c2 20 48 a9 48 08 5b 68 28 e2 20 a5 31 ->3a79d8 c9 02 b0 03 4c 6d 7b c2 20 a5 0d 85 32 a5 0f 85 ->3a79e8 34 c2 20 22 6f 7d 3a c9 ff ff f0 10 85 54 e2 20 ->3a79f8 a5 31 c9 03 f0 36 a9 13 85 4f 80 4c 20 d7 03 08 ->3a7a08 e2 20 48 a9 3a 48 ab 68 28 c2 10 a2 a4 7b 20 64 ->3a7a18 04 4c 6d 7b 20 d7 03 08 e2 20 48 a9 3a 48 ab 68 ->3a7a28 28 c2 10 a2 b3 7b 20 64 04 4c 6d 7b e2 20 22 a5 ->3a7a38 7d 3a c9 ff f0 de 85 4f c9 03 f0 62 c9 0b f0 5e ->3a7a48 c9 13 f0 04 c9 08 f0 00 22 9d 7c 3a b0 03 4c 36 ->3a7a58 7b 87 32 22 26 87 3a 08 e2 20 48 a9 00 48 ab 68 ->3a7a68 28 c2 20 a5 32 85 56 a5 34 85 58 e2 20 a5 4f c9 ->3a7a78 12 f0 6c c9 16 f0 68 c9 14 f0 7c 29 3f c9 02 d0 ->3a7a88 03 4c 64 7b c2 20 29 ff 00 aa e2 20 bf 6c 86 3a ->3a7a98 c9 03 f0 57 c9 02 f0 5f c9 01 f0 67 80 71 c2 20 ->3a7aa8 a5 54 c9 e4 82 f0 26 c9 48 83 f0 2a c9 c8 82 f0 ->3a7ab8 1c c9 cc 82 f0 17 c9 d4 82 f0 12 c9 bc 82 f0 0d ->3a7ac8 c9 d0 82 f0 08 c9 b8 82 f0 03 4c 50 7a e2 20 a9 ->3a7ad8 12 85 4f 4c 50 7a e2 20 a9 16 85 4f 4c 50 7a 22 ->3a7ae8 e0 7b 3a 90 60 c9 02 f0 0e 80 18 a0 02 00 b9 98 ->3a7af8 08 97 56 22 26 87 3a a0 01 00 b9 98 08 97 56 22 ->3a7b08 26 87 3a a0 00 00 b9 98 08 97 56 22 26 87 3a e2 ->3a7b18 20 a9 41 20 18 00 a9 20 20 18 00 a6 32 86 4a a6 ->3a7b28 34 86 4c 22 d0 81 3a a9 20 20 18 00 80 37 20 d7 ->3a7b38 03 08 e2 20 48 a9 3a 48 ab 68 28 c2 10 a2 71 7b ->3a7b48 20 64 04 80 20 20 d7 03 08 e2 20 48 a9 3a 48 ab ->3a7b58 68 28 c2 10 a2 c1 7b 20 64 04 80 09 a5 4f 29 c0 ->3a7b68 d0 95 4c 0b 7b 2b ab 28 6b 41 64 64 72 65 73 73 ->3a7b78 69 6e 67 20 6d 6f 64 65 20 6e 6f 74 20 64 65 66 ->3a7b88 69 6e 65 64 20 66 6f 72 20 74 68 61 74 20 69 6e ->3a7b98 73 74 72 75 63 74 69 6f 6e 2e 0d 00 42 61 64 20 ->3a7ba8 6d 6e 65 6d 6f 6e 69 63 2e 0d 00 42 61 64 20 6f ->3a7bb8 70 65 72 61 6e 64 2e 0d 00 52 65 6c 61 74 69 76 ->3a7bc8 65 20 6f 66 66 73 65 74 20 69 73 20 74 6f 6f 20 ->3a7bd8 6c 61 72 67 65 2e 0d 00 08 0b 08 c2 20 48 a9 48 ->3a7be8 08 5b 68 28 e2 20 a5 4f c9 12 f0 0a c2 20 18 a5 ->3a7bf8 32 69 02 00 80 08 c2 20 18 a5 32 69 01 00 85 4a ->3a7c08 a5 34 69 00 00 85 4c 38 a5 50 e5 4a 85 50 a5 52 ->3a7c18 e5 4c 85 52 e2 20 a5 4f c9 16 f0 1e a5 50 30 0c ->3a7c28 a5 51 d0 2a a5 52 d0 26 a9 01 80 26 a5 51 c9 ff ->3a7c38 d0 1c a5 52 c9 ff d0 16 80 18 a5 51 30 06 a5 52 ->3a7c48 d0 0c 80 0e a5 52 c9 ff d0 04 a9 02 80 04 2b 28 ->3a7c58 18 6b 2b 28 38 6b 08 0b c2 10 da 08 c2 20 48 a9 ->3a7c68 48 08 5b 68 28 e2 20 a2 00 00 df 00 d0 3a f0 08 ->3a7c78 e8 e0 10 00 f0 1b 80 f2 c2 20 06 50 26 52 06 50 ->3a7c88 26 52 06 50 26 52 06 50 26 52 e2 20 8a 05 50 85 ->3a7c98 50 fa 2b 28 6b 0b 8b 08 c2 20 48 a9 48 08 5b 68 ->3a7ca8 28 08 e2 20 48 a9 3a 48 ab 68 28 e2 20 a5 4f 29 ->3a7cb8 3f 85 4a c2 30 a2 00 00 a0 00 00 bd 6a 83 f0 1b ->3a7cc8 c5 54 d0 0d e2 20 b9 6c 85 29 3f c5 4a f0 07 c2 ->3a7cd8 20 e8 e8 c8 80 e5 98 38 ab 2b 6b 18 ab 2b 6b 08 ->3a7ce8 0b 08 c2 20 48 a9 48 08 5b 68 28 e2 20 c2 10 a0 ->3a7cf8 00 00 64 50 64 52 b7 03 f0 11 c9 64 f0 19 48 b7 ->3a7d08 36 85 4a 68 c5 4a d0 0b c8 80 eb b7 36 d0 04 2b ->3a7d18 28 38 6b 2b 28 18 6b e2 20 b7 36 c9 3a b0 04 c9 ->3a7d28 30 b0 14 c9 47 b0 04 c9 41 b0 0c c9 67 b0 e4 c9 ->3a7d38 61 b0 02 80 de 29 df 22 5e 7c 3a 80 cb 0b 08 c2 ->3a7d48 20 48 a9 48 08 5b 68 28 a0 00 00 e2 20 b7 03 f0 ->3a7d58 03 c8 80 f9 c2 20 c8 5a 68 18 65 03 85 03 a5 05 ->3a7d68 69 00 00 85 05 2b 6b 0b 08 c2 20 48 a9 48 08 5b ->3a7d78 68 28 c2 20 a5 11 85 36 a5 13 85 38 a9 f8 81 85 ->3a7d88 03 a9 3a 00 85 05 22 e7 7c 3a b0 0d 22 45 7d 3a ->3a7d98 a7 03 d0 f2 a9 ff ff 80 02 a5 03 2b 6b 08 0b 08 ->3a7da8 c2 20 48 a9 48 08 5b 68 28 c2 30 a5 15 85 36 a5 ->3a7db8 17 85 38 a9 84 86 85 03 a9 3a 00 85 05 22 e7 7c ->3a7dc8 3a b0 22 22 45 7d 3a c2 20 18 a5 03 69 01 00 85 ->3a7dd8 03 a5 05 69 00 00 85 05 e2 20 a7 03 d0 df c2 20 ->3a7de8 a9 ff ff 80 0d 22 45 7d 3a e2 20 a7 03 c2 20 29 ->3a7df8 ff 00 2b 28 6b 08 8b 0b 08 c2 20 48 a9 48 08 5b ->3a7e08 68 28 e2 20 a9 00 8f b6 08 00 a5 31 c9 02 b0 16 ->3a7e18 c9 01 90 20 c2 20 18 a5 0d 69 00 01 85 11 e2 20 ->3a7e28 a5 0f 69 00 85 13 c2 20 a5 0d 85 32 e2 20 a5 0f ->3a7e38 85 34 80 12 c2 20 18 a5 32 69 00 01 85 11 e2 20 ->3a7e48 a5 34 69 00 85 13 22 69 7e 3a e2 20 a5 34 c5 13 ->3a7e58 90 f4 c2 20 a5 32 c5 11 90 ec 20 d7 03 2b ab 28 ->3a7e68 6b 08 0b e2 20 a9 41 20 18 00 a9 20 20 18 00 08 ->3a7e78 c2 20 48 a9 7a 08 5b 68 28 c2 20 a5 00 85 18 e2 ->3a7e88 20 a5 02 85 1a 22 d0 81 3a a9 20 20 18 00 c2 20 ->3a7e98 18 a5 00 69 01 00 85 18 e2 20 a5 02 69 00 85 1a ->3a7ea8 e2 20 c2 10 a7 00 c9 c2 d0 0b 48 a7 18 49 ff 2f ->3a7eb8 96 08 00 80 0b c9 e2 d0 0c 48 a7 18 0f 96 08 00 ->3a7ec8 8f 96 08 00 68 c2 20 29 ff 00 0a aa bf 6a 83 3a ->3a7ed8 aa 22 4a 81 3a e2 20 a7 00 aa bf 6c 85 3a 22 26 ->3a7ee8 87 3a 22 f7 7e 3a 20 d7 03 20 ee 03 2b 28 6b 08 ->3a7ef8 e2 20 48 29 3f 0a c2 10 aa 68 7c 05 7f 35 7f 50 ->3a7f08 7f 57 7f 7c 7f 83 7f 9e 7f c0 7f d1 7f 0e 80 16 ->3a7f18 80 27 80 38 80 3f 80 64 80 91 80 fd 7f e2 7f af ->3a7f28 7f 84 80 8e 80 a2 80 d1 80 7f 80 e2 80 a9 28 20 ->3a7f38 18 00 22 f9 80 3a a9 2c 20 18 00 a9 58 20 18 00 ->3a7f48 a9 29 20 18 00 4c f3 80 22 f9 80 3a 4c f3 80 e2 ->3a7f58 20 48 a9 23 20 18 00 68 29 c0 c9 00 f0 0f 4a 4a ->3a7f68 2f 96 08 00 d0 07 22 03 81 3a 4c f3 80 22 f9 80 ->3a7f78 3a 4c f3 80 22 03 81 3a 4c f3 80 a9 28 20 18 00 ->3a7f88 22 f9 80 3a a9 29 20 18 00 a9 2c 20 18 00 a9 59 ->3a7f98 20 18 00 4c f3 80 22 f9 80 3a a9 2c 20 18 00 a9 ->3a7fa8 58 20 18 00 4c f3 80 22 f9 80 3a a9 2c 20 18 00 ->3a7fb8 a9 59 20 18 00 4c f3 80 22 03 81 3a a9 2c 20 18 ->3a7fc8 00 a9 59 20 18 00 4c f3 80 22 03 81 3a a9 2c 20 ->3a7fd8 18 00 a9 58 20 18 00 4c f3 80 a9 28 20 18 00 22 ->3a7fe8 03 81 3a a9 2c 20 18 00 a9 58 20 18 00 a9 29 20 ->3a7ff8 18 00 4c f3 80 a9 28 20 18 00 22 f9 80 3a a9 29 ->3a8008 20 18 00 4c f3 80 a9 41 20 18 00 4c f7 80 22 f9 ->3a8018 80 3a a9 2c 20 18 00 a9 53 20 18 00 4c f3 80 a9 ->3a8028 5b 20 18 00 22 f9 80 3a a9 5d 20 18 00 4c f3 80 ->3a8038 22 11 81 3a 4c f7 80 a9 28 20 18 00 22 f9 80 3a ->3a8048 a9 2c 20 18 00 a9 53 20 18 00 a9 29 20 18 00 a9 ->3a8058 2c 20 18 00 a9 59 20 18 00 4c f3 80 a9 5b 20 18 ->3a8068 00 22 f9 80 3a a9 5d 20 18 00 a9 2c 20 18 00 a9 ->3a8078 59 20 18 00 4c f3 80 a0 02 00 80 03 a0 01 00 22 ->3a8088 77 81 3a 4c f7 80 4c f7 80 22 11 81 3a a9 2c 20 ->3a8098 18 00 a9 58 20 18 00 4c f7 80 a9 23 20 18 00 8b ->3a80a8 a5 02 48 ab a6 00 e8 a0 01 00 22 e7 03 3a a9 2c ->3a80b8 20 18 00 a9 23 20 18 00 a6 00 a0 01 00 22 e7 03 ->3a80c8 3a ab 22 26 87 3a 4c f3 80 a9 28 20 18 00 22 03 ->3a80d8 81 3a a9 29 20 18 00 4c f3 80 a9 5b 20 18 00 22 ->3a80e8 03 81 3a a9 5d 20 18 00 4c f3 80 22 26 87 3a 28 ->3a80f8 6b 08 e2 20 a7 00 20 8e 04 28 6b 08 c2 30 a7 00 ->3a8108 20 74 04 22 26 87 3a 28 6b 08 8b 0b c2 30 5a 08 ->3a8118 c2 20 48 a9 7a 08 5b 68 28 08 e2 20 48 a9 00 48 ->3a8128 ab 68 28 e2 20 a0 00 00 a7 00 99 92 08 22 26 87 ->3a8138 3a c8 c0 03 00 d0 f1 22 d0 81 3a c2 30 7a 2b ab ->3a8148 28 6b 08 8b e2 20 c2 10 08 e2 20 48 a9 3a 48 ab ->3a8158 68 28 bd 00 00 20 18 00 e8 bd 00 00 20 18 00 e8 ->3a8168 bd 00 00 20 18 00 e8 a9 20 20 18 00 ab 28 6b 08 ->3a8178 0b 08 c2 20 48 a9 7a 08 5b 68 28 e2 20 c0 02 00 ->3a8188 f0 14 a7 00 85 18 30 06 64 19 64 1a 80 1e a9 ff ->3a8198 85 19 85 1a 80 16 a7 00 85 18 22 26 87 3a a7 00 ->3a81a8 85 19 30 04 64 1a 80 04 a9 ff 85 1a c2 20 38 a5 ->3a81b8 00 65 18 85 18 e2 20 a5 02 65 1a 85 1a 22 d0 81 ->3a81c8 3a 22 26 87 3a 2b 28 6b 08 0b c2 20 48 08 c2 20 ->3a81d8 48 a9 48 08 5b 68 28 e2 20 a5 4c 20 8e 04 e2 20 ->3a81e8 a9 3a 20 18 00 c2 20 a5 4a 20 74 04 68 2b 28 6b ->3a81f8 4f 52 41 00 41 4e 44 00 45 4f 52 00 41 44 43 00 ->3a8208 53 54 41 00 4c 44 41 00 43 4d 50 00 53 42 43 00 ->3a8218 41 53 4c 00 52 4f 4c 00 4c 53 52 00 52 4f 52 00 ->3a8228 53 54 58 00 4c 44 58 00 44 45 43 00 49 4e 43 00 ->3a8238 42 49 54 00 4a 4d 50 00 53 54 59 00 4c 44 59 00 ->3a8248 43 50 59 00 43 50 58 00 42 52 4b 00 4a 53 52 00 ->3a8258 52 54 49 00 52 54 53 00 50 48 50 00 50 4c 50 00 ->3a8268 50 48 41 00 50 4c 41 00 44 45 59 00 54 41 59 00 ->3a8278 49 4e 59 00 49 4e 58 00 43 4c 43 00 53 45 43 00 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82 18 83 dc 82 f8 81 18 82 ->3a83a8 f8 81 54 82 fc 81 3c 83 fc 81 38 82 fc 81 1c 82 ->3a83b8 fc 81 64 82 fc 81 1c 82 fc 82 38 82 fc 81 1c 82 ->3a83c8 fc 81 bc 82 fc 81 fc 81 fc 81 38 82 fc 81 1c 82 ->3a83d8 fc 81 84 82 fc 81 30 82 1c 83 38 82 fc 81 1c 82 ->3a83e8 fc 81 58 82 00 82 40 83 00 82 54 83 00 82 20 82 ->3a83f8 00 82 68 82 00 82 20 82 00 83 3c 82 00 82 20 82 ->3a8408 00 82 c0 82 00 82 00 82 00 82 58 83 00 82 20 82 ->3a8418 00 82 88 82 00 82 e8 82 20 83 64 83 00 82 20 82 ->3a8428 00 82 5c 82 04 82 44 83 04 82 e0 82 04 82 24 82 ->3a8438 04 82 6c 82 04 82 24 82 04 83 3c 82 04 82 24 82 ->3a8448 04 82 c4 82 04 82 04 82 04 82 e0 82 04 82 24 82 ->3a8458 04 82 8c 82 04 82 ec 82 24 83 3c 82 04 82 24 82 ->3a8468 04 82 e4 82 08 82 48 83 08 82 40 82 08 82 28 82 ->3a8478 08 82 70 82 38 82 a0 82 08 83 40 82 08 82 28 82 ->3a8488 08 82 c8 82 08 82 08 82 08 82 40 82 08 82 28 82 ->3a8498 08 82 90 82 08 82 a4 82 28 83 e0 82 08 82 e0 82 ->3a84a8 08 82 44 82 0c 82 2c 82 0c 82 44 82 0c 82 2c 82 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e6 31 22 1b 87 3a 22 5d 87 +>3a88d8 3a a7 32 f0 bf c2 20 a5 32 85 15 e2 20 a5 34 85 +>3a88e8 17 e6 31 80 af e6 31 80 ab 08 c2 10 e2 20 a5 31 +>3a88f8 d0 0f a2 e7 89 a9 3a 48 ab 20 64 04 20 d7 03 80 +>3a8908 61 c2 20 a5 0d 8f 23 08 00 a5 0f 8f 25 08 00 20 +>3a8918 da 6a e2 20 a5 31 c9 01 d0 0f c2 20 a9 ff ff 8f +>3a8928 54 03 00 8f 56 03 00 80 0e c2 20 a5 11 8f 54 03 +>3a8938 00 a5 13 8f 56 03 00 22 18 11 00 b0 25 e2 20 a2 +>3a8948 0d 8a a9 3a 48 ab 20 64 04 af 2e 03 00 20 8e 04 +>3a8958 a9 20 20 18 00 af 20 03 00 20 8e 04 20 d7 03 20 +>3a8968 d7 03 28 6b 8b 08 c2 10 e2 20 a5 31 c9 03 f0 0f +>3a8978 a2 e7 89 a9 3a 48 ab 20 64 04 20 d7 03 80 54 c2 +>3a8988 20 a5 0d 8f 23 08 00 a5 0f 8f 25 08 00 20 da 6a +>3a8998 a5 11 8f 50 03 00 a5 13 8f 52 03 00 a5 15 8f 58 +>3a89a8 03 00 a5 17 8f 5a 03 00 22 1c 11 00 b0 25 e2 20 +>3a89b8 a2 f7 89 a9 3a 48 ab 20 64 04 af 2e 03 00 20 8e +>3a89c8 04 a9 20 20 18 00 af 20 03 00 20 8e 04 20 d7 03 +>3a89d8 20 d7 03 28 ab 6b 5c b5 27 3a 6b 00 00 00 00 42 +>3a89e8 61 64 20 61 72 67 75 6d 65 6e 74 73 0d 0d 00 55 +>3a89f8 6e 61 62 6c 65 20 74 6f 20 73 61 76 65 20 66 69 +>3a8a08 6c 65 3a 20 00 55 6e 61 62 6c 65 20 74 6f 20 6c +>3a8a18 6f 61 64 20 66 69 6c 65 3a 20 00 0d 20 20 50 43 +>3a8a28 20 20 20 20 20 41 20 20 20 20 58 20 20 20 20 59 +>3a8a38 20 20 20 20 53 50 20 20 20 44 42 52 20 44 50 20 +>3a8a48 20 20 4e 56 4d 58 44 49 5a 43 0d 00 41 43 44 46 +>3a8a58 47 4a 48 4c 4d 52 3b 53 54 56 57 58 3e 3f 00 18 +>3a8a68 fb 08 c2 20 48 a9 00 08 5b 68 28 08 e2 20 48 a9 +>3a8a78 00 48 ab 68 28 c2 30 20 a6 8a a9 ff fe 1b 08 e2 +>3a8a88 20 48 a9 3a 48 ab 68 28 a2 77 d2 20 64 04 08 e2 +>3a8a98 20 48 a9 00 48 ab 68 28 4c b5 27 4c a3 8a 08 20 +>3a8aa8 34 03 20 49 50 28 60 00 00 00 00 00 00 00 00 00 +>3a8ab8 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +; ...repeated 1107 times (17712 bytes)... >3acff8 00 00 00 00 00 00 00 00 30 31 32 33 34 35 36 37 >3ad008 38 39 41 42 43 44 45 46 2b 00 2d 00 2a 00 2f 00 >3ad018 4d 4f 44 00 5e 00 3c 3d 00 3e 3d 00 3c 3e 00 3c @@ -18643,7 +18592,7 @@ >3ad268 00 49 4e 4b 45 59 00 0d 52 45 41 44 59 0d 00 43 >3ad278 32 35 36 20 46 6f 65 6e 69 78 20 42 41 53 49 43 >3ad288 38 31 36 20 76 30 2e 32 2e 30 2d 61 6c 70 68 61 ->3ad298 2b 34 30 38 0d 00 +>3ad298 2b 34 31 31 0d 00 >3b0000 .align 256 .3b0000 CREDITS_TEXT >3b0000 20 20 20 20 20 20 20 20 .text " CREDITS " @@ -19601,7 +19550,7 @@ .3e0688 af 07 e8 af lda $afe807 LDA @lREVOFPCB_A .3e068c 97 9c sta [$9c],y STA [TEXT_DST_PTR_L], Y .3e068e 18 clc CLC -.3e068f af 0d 07 af lda $af070d LDA @lFPGA_DOR ; it is in BCD +.3e068f af 0d 07 af lda $af070d LDA @l FPGA_DOR ; it is in BCD .3e0693 20 f6 07 jsr $3e07f6 JSR HighNibblerBCD .3e0696 8f da 0a 3e sta $3e0ada STA @lLINE8 + 56 ; FAT VICKY in U/U+ Model .3e069a 8f 13 0b 3e sta $3e0b13 STA @lLINE9 + 47 ; GABE in FMX @@ -19907,16 +19856,16 @@ >3e0aba 20 49 49 20 2d 20 52 45 56 3a 30 30 30 30 20 53 >3e0aca 55 42 52 45 56 3a 30 30 30 30 20 44 41 54 45 3a >3e0ada 30 30 2f 30 30 2f 30 30 20 00 ->3e0ae4 50 4e 3a 20 43 46 50 39 LINE9 .text "PN: CFP9533 - GABE - REV:0000 SUBREV:0000 DATE:00/00/00 ", $00 ->3e0aec 35 33 33 20 2d 20 47 41 42 45 20 2d 20 52 45 56 ->3e0afc 3a 30 30 30 30 20 53 55 42 52 45 56 3a 30 30 30 ->3e0b0c 30 20 44 41 54 45 3a 30 30 2f 30 30 2f 30 30 20 ->3e0b1c 20 20 20 20 20 20 20 20 20 00 ->3e0b26 50 4e 3a 20 43 46 50 39 LINE10 .text "PN: CFP9551 - VICKY II - REV:0000 SUBREV:0000 DATE:00/00/00 ", $00 ->3e0b2e 35 35 31 20 2d 20 56 49 43 4b 59 20 49 49 20 2d ->3e0b3e 20 52 45 56 3a 30 30 30 30 20 53 55 42 52 45 56 ->3e0b4e 3a 30 30 30 30 20 44 41 54 45 3a 30 30 2f 30 30 ->3e0b5e 2f 30 30 20 20 20 20 20 20 00 +>3e0ae4 50 4e 3a 20 43 46 50 39 LINE9 .text "PN: CFP9533 - GABE - REV:0000 SUBREV:0000 DATE:00/00/00 ", $00 +>3e0aec 35 33 33 20 20 2d 20 47 41 42 45 20 20 20 20 20 +>3e0afc 2d 20 52 45 56 3a 30 30 30 30 20 53 55 42 52 45 +>3e0b0c 56 3a 30 30 30 30 20 44 41 54 45 3a 30 30 2f 30 +>3e0b1c 30 2f 30 30 20 20 20 20 20 00 +>3e0b26 50 4e 3a 20 43 46 50 39 LINE10 .text "PN: CFP9551 - VICKY II - REV:0000 SUBREV:0000 DATE:00/00/00 ", $00 +>3e0b2e 35 35 31 20 20 2d 20 56 49 43 4b 59 20 49 49 20 +>3e0b3e 2d 20 52 45 56 3a 30 30 30 30 20 53 55 42 52 45 +>3e0b4e 56 3a 30 30 30 30 20 44 41 54 45 3a 30 30 2f 30 +>3e0b5e 30 2f 30 30 20 20 20 20 20 00 >3e0b68 43 52 45 44 49 54 53 3a LINE11 .text "CREDITS: ", $00 >3e0b70 20 00 >3e0b72 43 4f 4e 43 45 50 54 20 LINE12 .text "CONCEPT & SYSTEM DESIGN: STEFANY ALLAIRE", $00