Config.soc.in

config BR2_SOC_FAMILY_INGENIC_T10
	bool
	default y if BR2_SOC_INGENIC_T10L || BR2_SOC_INGENIC_T10N || BR2_SOC_INGENIC_T10A
config BR2_SOC_FAMILY_INGENIC_T20
	bool
	default y if BR2_SOC_INGENIC_T20L || BR2_SOC_INGENIC_T20N || BR2_SOC_INGENIC_T20X
config BR2_SOC_FAMILY_INGENIC_T21
	bool
	default y if BR2_SOC_INGENIC_T21L || BR2_SOC_INGENIC_T21N || BR2_SOC_INGENIC_T21X || BR2_SOC_INGENIC_T21Z || BR2_SOC_INGENIC_T21ZL
config BR2_SOC_FAMILY_INGENIC_T23
	bool
	default y if BR2_SOC_INGENIC_T23N || BR2_SOC_INGENIC_T23ZN
config BR2_SOC_FAMILY_INGENIC_T30
	bool
	default y if BR2_SOC_INGENIC_T30L || BR2_SOC_INGENIC_T30N || BR2_SOC_INGENIC_T30X || BR2_SOC_INGENIC_T30A
config BR2_SOC_FAMILY_INGENIC_T31
	bool
	default y if BR2_SOC_INGENIC_T31L || BR2_SOC_INGENIC_T31LC || BR2_SOC_INGENIC_T31N || BR2_SOC_INGENIC_T31X || BR2_SOC_INGENIC_T31A || BR2_SOC_INGENIC_T31AL || BR2_SOC_INGENIC_T31ZL || BR2_SOC_INGENIC_T31ZX || BR2_SOC_INGENIC_T31XL
config BR2_SOC_FAMILY_INGENIC_T40
	bool
	default y if BR2_SOC_INGENIC_T40N || BR2_SOC_INGENIC_T40XP || BR2_SOC_INGENIC_T40A
config BR2_SOC_FAMILY_INGENIC_T41
	bool
	default y if BR2_SOC_INGENIC_T41LQ || BR2_SOC_INGENIC_T41NQ || BR2_SOC_INGENIC_T41ZL || BR2_SOC_INGENIC_T41ZN || BR2_SOC_INGENIC_T41ZX || BR2_SOC_INGENIC_T41A

if FALSE
config BR2_SOC_FAMILY_64MB
	bool
	default y if BR2_SOC_INGENIC_T10L || BR2_SOC_INGENIC_T10N || BR2_SOC_INGENIC_T10A || BR2_SOC_INGENIC_T20L || BR2_SOC_INGENIC_T20N || BR2_SOC_INGENIC_T21L || BR2_SOC_INGENIC_T21N || BR2_SOC_INGENIC_T21Z || BR2_SOC_INGENIC_T21ZL || BR2_SOC_INGENIC_T21Z || BR2_SOC_INGENIC_T21ZL || BR2_SOC_INGENIC_T23N || BR2_SOC_INGENIC_T23ZN || BR2_SOC_INGENIC_T30L || BR2_SOC_INGENIC_T30N || BR2_SOC_INGENIC_T31L || BR2_SOC_INGENIC_T31LC || BR2_SOC_INGENIC_T31N || BR2_SOC_INGENIC_T31AL || BR2_SOC_INGENIC_T31ZL
config BR2_SOC_FAMILY_128MB
	bool
	default y if BR2_SOC_INGENIC_T20X || BR2_SOC_INGENIC_T21X || BR2_SOC_INGENIC_T30X || BR2_SOC_INGENIC_T30A || BR2_SOC_INGENIC_T31X || BR2_SOC_INGENIC_T31X || BR2_SOC_INGENIC_T31ZX
endif

choice
	prompt "SoC Model"
config BR2_SOC_INGENIC_DUMMY
	bool "Dummy (for toolchain)"
config BR2_SOC_INGENIC_T10L
	bool "Ingenic T10L"
config BR2_SOC_INGENIC_T10N
	bool "Ingenic T10N"
config BR2_SOC_INGENIC_T10A
	bool "Ingenic T10A"
config BR2_SOC_INGENIC_T20L
	bool "Ingenic T20L"
config BR2_SOC_INGENIC_T20N
	bool "Ingenic T20N"
config BR2_SOC_INGENIC_T20X
	bool "Ingenic T20X"
config BR2_SOC_INGENIC_T21L
	bool "Ingenic T21L"
config BR2_SOC_INGENIC_T21N
	bool "Ingenic T21N"
config BR2_SOC_INGENIC_T21X
	bool "Ingenic T21X"
config BR2_SOC_INGENIC_T21Z
	bool "Ingenic T21Z"
config BR2_SOC_INGENIC_T21ZL
	bool "Ingenic T21ZL"
config BR2_SOC_INGENIC_T23N
	bool "Ingenic T23N"
config BR2_SOC_INGENIC_T23ZN
	bool "Ingenic T23ZN"
config BR2_SOC_INGENIC_T30L
	bool "Ingenic T30L"
config BR2_SOC_INGENIC_T30N
	bool "Ingenic T30N"
config BR2_SOC_INGENIC_T30X
	bool "Ingenic T30X"
config BR2_SOC_INGENIC_T30A
	bool "Ingenic T30A"
config BR2_SOC_INGENIC_T31L
	bool "Ingenic T31L"
config BR2_SOC_INGENIC_T31LC
	bool "Ingenic T31LC"
config BR2_SOC_INGENIC_T31N
	bool "Ingenic T31N"
config BR2_SOC_INGENIC_T31X
	bool "Ingenic T31X"
config BR2_SOC_INGENIC_T31A
	bool "Ingenic T31A"
config BR2_SOC_INGENIC_T31AL
	bool "Ingenic T31AL"
config BR2_SOC_INGENIC_T31ZL
	bool "Ingenic T31ZL"
config BR2_SOC_INGENIC_T31ZX
	bool "Ingenic T31ZX"
config BR2_SOC_INGENIC_T31XL
	bool "Ingenic T31XL"
config BR2_SOC_INGENIC_T40N
	bool "Ingenic T40N"
config BR2_SOC_INGENIC_T40XP
	bool "Ingenic T40XP"
config BR2_SOC_INGENIC_T40A
	bool "Ingenic T40A"
config BR2_SOC_INGENIC_T41LQ
	bool "Ingenic T41LQ"
config BR2_SOC_INGENIC_T41NQ
	bool "Ingenic T41NQ"
config BR2_SOC_INGENIC_T41ZL
	bool "Ingenic T41ZL"
config BR2_SOC_INGENIC_T41ZN
	bool "Ingenic T41ZN"
config BR2_SOC_INGENIC_T41ZX
	bool "Ingenic T41ZX"
config BR2_SOC_INGENIC_T41A
	bool "Ingenic T41A"
endchoice

menu "SoC Configuration"

choice
	prompt "ISP Clock Speed"
	default BR2_ISP_CLK_125MHZ if BR2_SOC_FAMILY_INGENIC_T31
	default BR2_ISP_CLK_200MHZ if BR2_SOC_FAMILY_INGENIC_T23
	default BR2_ISP_CLK_90MHZ
	help
	  Choose the ISP clock speed from the predefined options.

config BR2_ISP_CLK_90MHZ
	bool "90 MHz"
config BR2_ISP_CLK_100MHZ
	bool "100 MHz"
config BR2_ISP_CLK_125MHZ
	bool "125 MHz"
config BR2_ISP_CLK_150MHZ
	bool "150 MHz"
	depends on BR2_SOC_FAMILY_INGENIC_T31 || BR2_SOC_FAMILY_INGENIC_T23
config BR2_ISP_CLK_175MHZ
	bool "175 MHz"
	depends on BR2_SOC_FAMILY_INGENIC_T31 || BR2_SOC_FAMILY_INGENIC_T23
config BR2_ISP_CLK_200MHZ
	bool "200 MHz"
	depends on BR2_SOC_FAMILY_INGENIC_T31 || BR2_SOC_FAMILY_INGENIC_T23
config BR2_ISP_CLK_220MHZ
	bool "220 MHz"
	depends on BR2_SOC_FAMILY_INGENIC_T31 || BR2_SOC_FAMILY_INGENIC_T23
config BR2_ISP_CLK_225MHZ
	bool "225 MHz"
	depends on BR2_SOC_FAMILY_INGENIC_T31 || BR2_SOC_FAMILY_INGENIC_T23
config BR2_ISP_CLK_250MHZ
	bool "250 MHz"
	depends on BR2_SOC_FAMILY_INGENIC_T31 || BR2_SOC_FAMILY_INGENIC_T23
config BR2_ISP_CLK_300MHZ
	bool "300 MHz"
	depends on BR2_SOC_FAMILY_INGENIC_T23
endchoice

choice
	prompt "ISP Memory Optimization Level"
	depends on BR2_SOC_FAMILY_INGENIC_T23 || BR2_SOC_FAMILY_INGENIC_T31
	default BR2_ISP_MEMOPT_1 if BR2_SOC_INGENIC_T23N || BR2_SOC_INGENIC_T23ZN || BR2_SOC_INGENIC_T31L || BR2_SOC_INGENIC_T31LC || BR2_SOC_INGENIC_T31N || BR2_SOC_INGENIC_T31AL || BR2_SOC_INGENIC_T31ZL
	help
	  Select the memory optimization level for the ISP.

config BR2_ISP_MEMOPT_0
        bool "Optimize Disabled"
        help
           Disables the ISP memory optimization.

config BR2_ISP_MEMOPT_1
        bool "Optimize Level 1"
        help
           Enable ISP memory optimization - Leve 1 - Bypass Lynne + BGM

config BR2_ISP_MEMOPT_2
        bool "Optimize Level 2"
        help
           Enable ISP memory optimization - Leve 2 - Bypass Lynne + BGM + Ass

config BR2_ISP_MEMOPT_3
        bool "Optimize Level 3"
        help
           Enable ISP memory optimization - Leve 3 - Normal

endchoice

if FALSE
if BR2_SOC_FAMILY_INGENIC_T31
menuconfig BR2_ISP_DAY_NIGHT_SWITCH_DROP_FRAME
	bool "ISP Day/Night switch drop frame number"

if BR2_ISP_DAY_NIGHT_SWITCH_DROP_FRAME
config BR2_ISP_DAY_NIGHT_SWITCH_DROP_FRAME_NUM_VALUE
	int "Number of frames to drop"
	default 0
	help
	  Specify the exact number of frames to drop during the switch.
	  This setting is only active if the drop frame feature is enabled.

endif

menuconfig BR2_ISP_CH0_PRE_DEQUEUE_TIME
	bool "ISP Pre-dequeue Time for Channel 0"

if BR2_ISP_CH0_PRE_DEQUEUE_TIME
config BR2_ISP_CH0_PRE_DEQUEUE_TIME_VALUE
	int "Pre-dequeue time in milliseconds"
	default 0
	help
	  Specify the exact pre-dequeue time for channel 0 in milliseconds.
	  This setting is only active if the pre-dequeue time feature is enabled.

endif

menuconfig BR2_ISP_CH0_PRE_DEQUEUE_INTERRUPT_PROCESS
	bool "ISP Pre-dequeue Interrupt Processing for Channel 0"

if BR2_ISP_CH0_PRE_DEQUEUE_INTERRUPT_PROCESS
config BR2_ISP_CH0_PRE_DEQUEUE_INTERRUPT_PROCESS_VALUE
	int "Interrupt processing time"
	default 0
	help
	  Specify the interrupt processing time for pre-dequeue for channel 0.
	  This setting is only active if the feature is enabled.

endif

menuconfig BR2_ISP_CH0_PRE_DEQUEUE_VALID_LINES
	bool "ISP Valid Lines for Pre-dequeue for Channel 0"

if BR2_ISP_CH0_PRE_DEQUEUE_VALID_LINES
config BR2_ISP_CH0_PRE_DEQUEUE_VALID_LINES_VALUE
	int "Pre-dequeue valid lines"
	default 0
	help
	  Specify the number of valid lines for pre-dequeue for channel 0.
	  This setting is only active if the feature is enabled.

endif
endif
endif

choice
	prompt "AVPU Clock Speed"
	default BR2_AVPU_CLK_400MHZ
	depends on BR2_SOC_FAMILY_INGENIC_T31
	help
	  Choose the ISP clock speed from the predefined options.

config BR2_AVPU_CLK_400MHZ
	bool "400 MHz"
config BR2_AVPU_CLK_450MHZ
	bool "450 MHz"
config BR2_AVPU_CLK_486MHZ
	bool "486 MHz"
config BR2_AVPU_CLK_500MHZ
	bool "500 MHz"
config BR2_AVPU_CLK_550MHZ
	bool "550 MHz"
config BR2_AVPU_CLK_600MHZ
	bool "600 MHz"
config BR2_AVPU_CLK_650MHZ
	bool "650 MHz"
config BR2_AVPU_CLK_700MHZ
	bool "700 MHz"
endchoice

choice
	prompt "AVPU Clock Source"
	default BR2_AVPU_INTERNAL
	depends on BR2_SOC_FAMILY_INGENIC_T31
	help
	  Select the clock source for the AVPU

config BR2_AVPU_MPLL
	bool "MPLL"
config BR2_AVPU_VPLL
	bool "VPLL"
config BR2_AVPU_INTERNAL
	bool "Module Internal"
endchoice

choice
	prompt "ISP Clock Source"
	default BR2_ISP_CLK_SCLKA
	depends on BR2_SOC_FAMILY_INGENIC_T23
	help
	  Select the clock source for the AVPU

config BR2_ISP_CLK_SCLKA
	bool "SCLKA_CLK"
endchoice

choice
	prompt "ISP Clock-A Source"
	default BR2_ISP_CLKA_SCLKA
	depends on BR2_SOC_FAMILY_INGENIC_T23
	help
	  Select the clock source for the AVPU

config BR2_ISP_CLKA_SCLKA
	bool "SCLKA_CLK"
endchoice

choice
	prompt "ISP Clock-A Speed"
	default BR2_ISP_CLKA_400MHZ
	depends on BR2_SOC_FAMILY_INGENIC_T23
	help
	  Choose the ISP clock speed from the predefined options.

config BR2_ISP_CLKA_400MHZ
	bool "400 MHz"
config BR2_ISP_CLKA_450MHZ
	bool "450 MHz"
config BR2_ISP_CLKA_486MHZ
	bool "486 MHz"
config BR2_ISP_CLKA_500MHZ
	bool "500 MHz"
config BR2_ISP_CLKA_550MHZ
	bool "550 MHz"
config BR2_ISP_CLKA_600MHZ
	bool "600 MHz"
config BR2_ISP_CLKA_650MHZ
	bool "650 MHz"
config BR2_ISP_CLKA_700MHZ
	bool "700 MHz"
endchoice

config BR2_AUDIO
	bool "Audio Support"
	help
	  Enable audio suport.
	  The GPIO pin for enabling audio can be specified in the U-Boot environment
	  using the "gpio_speaker" parameter. If not specified, the default value is "-1".

config BR2_AUDIO_PARAMS
	string "Audio Parameters"
	depends on BR2_AUDIO
	help
	  Specify additional parameters to pass when loading the audio kernel module.

config BR2_PWM_ENABLE
	bool "PWM Support"
	help
	  Enable or Disable PWM support.

config BR2_MOTORS
	bool "Pan/Tilt/Zoom Motors"
	help
	  The camera has Pan/Tilt or Zoom motors.

config BR2_MOTORS_TCU
	bool "Pan/Tilt Motors TCU"
	depends on BR2_MOTORS
	help
	  The camera has Pan/Tilt or Zoom motors using PWM/GPIO via TCU

config BR2_MOTORS_SPI
	bool "Pan/Tilt SPI using ms419xx"
	depends on BR2_MOTORS
	help
	  The camera has Pan/Tilt or Zoom motors using the ms419xx chip

config BR2_SDCARD
	bool "SD/MMC Card"
	help
	  The hardware has an SD/MMC card slot.

endmenu

source "$BR2_EXTERNAL_THINGINO_PATH/Config.sensor.in"

choice
	prompt "Flash chip size"
config FLASH_SIZE_8
	bool "8MB (64KBit)"
config FLASH_SIZE_16
	bool "16MB (128KBit)"
config FLASH_SIZE_32
	bool "32MB (256KBit)"
endchoice

choice
	prompt "Kernel version"
config KERNEL_VERSION_3
	bool "Kernel 3.10.14"
config KERNEL_VERSION_4
	bool "Kernel 4.4.94"
endchoice

choice
	prompt "Device type"
	default BR2_THINGINO_DEVICE_TYPE_IPCAM
config BR2_THINGINO_DEVICE_TYPE_IPCAM
	bool "IPCamera"
	help
	   Specifies the device type as a Camera and installs configurations specific to this type.

config BR2_THINGINO_DEVICE_TYPE_IPCAM_PAN_TILT
	bool "IPCamera - Pan/Tilt"
	help
	   Specifies the device type as a Camera with Pan and Tilt functionality, and installs configurations specific to this type.
config BR2_THINGINO_DEVICE_TYPE_IPCAM_PAN_TILT_ZOOM
	bool "IPCamera - Pan/Tilt/Zoom"
	help
	   Specifies the device type as a Camera with Pan, Tilt, and Zoom functionality, and installs configurations specific to this type.
config BR2_THINGINO_DEVICE_TYPE_DOORBELL
	bool "Doorbell"
	help
	   Specifies the device type as a Doorbell and installs configurations specific to this type.
endchoice

config U_BOOT_ENV_TXT
	string "Path to U-Boot environment text file"
	help
	   Path to the U-Boot environment configuration file used to configure the ENV on the device