From 66ba70b5aa3bf085077d71b9091926f4283591de Mon Sep 17 00:00:00 2001 From: Kait Lam Date: Wed, 3 Jul 2024 14:29:17 +1000 Subject: [PATCH] grammar: fix TypeBoolean (#96) * grammar: fix TypeBoolean was previously missing quotation marks. * tests: add opcode with emitting boolean variable --- libASL/Semantics.g4 | 2 +- tests/aslt/ops.txt | 3 + tests/aslt/test_antlr.t | 156 ++++++++++++++++++++- tests/aslt/test_dis.t | 297 ++++++++++++++++++++++++++++++++++++++++ 4 files changed, 456 insertions(+), 2 deletions(-) diff --git a/libASL/Semantics.g4 b/libASL/Semantics.g4 index c72cca86..0bcf24f5 100644 --- a/libASL/Semantics.g4 +++ b/libASL/Semantics.g4 @@ -46,7 +46,7 @@ type_register_slices: type: 'Type_Bits' OPEN_PAREN expr CLOSE_PAREN # TypeBits - | 'Type_Constructor(boolean)' # TypeBoolean + | 'Type_Constructor("boolean")' # TypeBoolean | 'Type_Constructor(' ident ')' # TypeConstructor | 'Type_Register' OPEN_PAREN QUOTE width=integer QUOTE type_register_slices CLOSE_PAREN # TypeRegister ; diff --git a/tests/aslt/ops.txt b/tests/aslt/ops.txt index c7abcec1..49712f69 100644 --- a/tests/aslt/ops.txt +++ b/tests/aslt/ops.txt @@ -24,3 +24,6 @@ // cnt v0.8b, v0.8b https://github.com/UQ-PAC/aslp/issues/43 0x0e205800 + +// sqrdmulh v0.8h, v0.8h, v1.h[3] https://github.com/UQ-PAC/aslp/pull/96 +0x4f71d000 diff --git a/tests/aslt/test_antlr.t b/tests/aslt/test_antlr.t index ff90d7f0..6a5f0b62 100644 --- a/tests/aslt/test_antlr.t +++ b/tests/aslt/test_antlr.t @@ -358,6 +358,160 @@ tests building and running of the antlr grammar. requires java (stmts [ (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " result__5_7 ") )) , (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 4))) ] , [ (expr Expr_Var ( (ident " result__5_7 ") )) ; (expr (bits '0001')) ] )) ))) ]) , [ ] , (stmts [ ]) ))) - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Array ( (lexpr LExpr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) , (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 128))) ] , [ (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 56))) ] , [ (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 4))) ] , [ (expr (bits '0000')) ; (expr Expr_Var ( (ident " result__5_7 ") )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 48))) ] , [ (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 4))) ] , [ (expr (bits '0000')) ; (expr Expr_Var ( (ident " Exp81__5 ") )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 40))) ] , [ (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 4))) ] , [ (expr (bits '0000')) ; (expr Expr_Var ( (ident " Exp70__5 ") )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 4))) ] , [ (expr (bits '0000')) ; (expr Expr_Var ( (ident " Exp59__5 ") )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 24))) ] , [ (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 4))) ] , [ (expr (bits '0000')) ; (expr Expr_Var ( (ident " Exp48__5 ") )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 4))) ] , [ (expr (bits '0000')) ; (expr Expr_Var ( (ident " Exp37__5 ") )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 8))) ] , [ (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 4))) ] , [ (expr (bits '0000')) ; (expr Expr_Var ( (ident " Exp26__5 ") )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 4))) ] , [ (expr (bits '0000')) ; (expr Expr_Var ( (ident " Exp14__5 ") )) ] )) ] )) ] )) ] )) ] )) ] )) ] )) ] )) ; (expr (integer 128)) ] )) ))) ) + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Array ( (lexpr LExpr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) , (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 128))) ] , [ (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 56))) ] , [ (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 4))) ] , [ (expr (bits '0000')) ; (expr Expr_Var ( (ident " result__5_7 ") )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 48))) ] , [ (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 4))) ] , [ (expr (bits '0000')) ; (expr Expr_Var ( (ident " Exp81__5 ") )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 40))) ] , [ (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 4))) ] , [ (expr (bits '0000')) ; (expr Expr_Var ( (ident " Exp70__5 ") )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 4))) ] , [ (expr (bits '0000')) ; (expr Expr_Var ( (ident " Exp59__5 ") )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 24))) ] , [ (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 4))) ] , [ (expr (bits '0000')) ; (expr Expr_Var ( (ident " Exp48__5 ") )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 4))) ] , [ (expr (bits '0000')) ; (expr Expr_Var ( (ident " Exp37__5 ") )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 8))) ] , [ (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 4))) ] , [ (expr (bits '0000')) ; (expr Expr_Var ( (ident " Exp26__5 ") )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 4))) ] , [ (expr (bits '0000')) ; (expr Expr_Var ( (ident " Exp14__5 ") )) ] )) ] )) ] )) ] )) ] )) ] )) ] )) ] )) ; (expr (integer 128)) ] )) ))) + (stmt (assignment_stmt Stmt_ConstDecl ( (type Type_Bits ( (expr (integer 17)) )) , (ident " Cse43__5 ") , (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 17))) ] , [ (expr Expr_Slices ( (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ; (expr (integer 17)) ] )) ))) + (stmt (assignment_stmt Stmt_ConstDecl ( (type Type_Bits ( (expr (integer 17)) )) , (ident " Cse36__5 ") , (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 17))) ] , [ (expr Expr_Slices ( (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) , [ (slice Slice_LoWd ( (expr (integer 16)) , (expr (integer 16)) )) ] )) ; (expr (integer 17)) ] )) ))) + (stmt (assignment_stmt Stmt_ConstDecl ( (type Type_Bits ( (expr (integer 17)) )) , (ident " Cse30__5 ") , (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 17))) ] , [ (expr Expr_Slices ( (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) , [ (slice Slice_LoWd ( (expr (integer 32)) , (expr (integer 16)) )) ] )) ; (expr (integer 17)) ] )) ))) + (stmt (assignment_stmt Stmt_ConstDecl ( (type Type_Bits ( (expr (integer 17)) )) , (ident " Cse24__5 ") , (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 17))) ] , [ (expr Expr_Slices ( (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) , [ (slice Slice_LoWd ( (expr (integer 48)) , (expr (integer 16)) )) ] )) ; (expr (integer 17)) ] )) ))) + (stmt (assignment_stmt Stmt_ConstDecl ( (type Type_Bits ( (expr (integer 17)) )) , (ident " Cse18__5 ") , (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 17))) ] , [ (expr Expr_Slices ( (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) , [ (slice Slice_LoWd ( (expr (integer 64)) , (expr (integer 16)) )) ] )) ; (expr (integer 17)) ] )) ))) + (stmt (assignment_stmt Stmt_ConstDecl ( (type Type_Bits ( (expr (integer 17)) )) , (ident " Cse12__5 ") , (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 17))) ] , [ (expr Expr_Slices ( (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) , [ (slice Slice_LoWd ( (expr (integer 80)) , (expr (integer 16)) )) ] )) ; (expr (integer 17)) ] )) ))) + (stmt (assignment_stmt Stmt_ConstDecl ( (type Type_Bits ( (expr (integer 17)) )) , (ident " Cse6__5 ") , (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 17))) ] , [ (expr Expr_Slices ( (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) , [ (slice Slice_LoWd ( (expr (integer 96)) , (expr (integer 16)) )) ] )) ; (expr (integer 17)) ] )) ))) + (stmt (assignment_stmt Stmt_ConstDecl ( (type Type_Bits ( (expr (integer 17)) )) , (ident " Cse0__5 ") , (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 17))) ] , [ (expr Expr_Slices ( (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) , [ (slice Slice_LoWd ( (expr (integer 112)) , (expr (integer 16)) )) ] )) ; (expr (integer 17)) ] )) ))) + (stmt (assignment_stmt Stmt_ConstDecl ( (type Type_Bits ( (expr (integer 33)) )) , (ident " Cse42__5 ") , (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 33))) ] , [ (expr Expr_Slices ( (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 1)) )) , [ (slice Slice_LoWd ( (expr (integer 48)) , (expr (integer 16)) )) ] )) ; (expr (integer 33)) ] )) ))) + (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Bits ( (expr (integer 16)) )) , [ (ident " SignedSatQ17__5 ") ] ))) + (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Constructor("boolean")) , [ (ident " SignedSatQ18__5 ") ] ))) + (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr (bits '000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 33))) ; (targs (expr (integer 6))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 17))) ; (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 17))) ] , [ (expr (bits '00000000000000010')) ; (expr Expr_Var ( (ident " Cse43__5 ") )) ] )) ; (expr (integer 33)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '000000000000000001000000000000000')) ] )) ; (expr (bits '010000')) ] )) ] )) , + (stmts [ + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ17__5 ") )) , (expr (bits '0111111111111111')) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ18__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , + (stmts [ + (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 33))) ; (targs (expr (integer 6))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 17))) ; (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 17))) ] , [ (expr (bits '00000000000000010')) ; (expr Expr_Var ( (ident " Cse43__5 ") )) ] )) ; (expr (integer 33)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '000000000000000001000000000000000')) ] )) ; (expr (bits '010000')) ] )) ; (expr (bits '111111111111111111000000000000000')) ] )) , + (stmts [ + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ17__5 ") )) , (expr (bits '1000000000000000')) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ18__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , + (stmts [ + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ17__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 33))) ; (targs (expr (integer 6))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 17))) ; (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 17))) ] , [ (expr (bits '00000000000000010')) ; (expr Expr_Var ( (ident " Cse43__5 ") )) ] )) ; (expr (integer 33)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '000000000000000001000000000000000')) ] )) ; (expr (bits '010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ18__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) ]) ))) + (stmt (conditional_stmt Stmt_If ( (expr Expr_Var ( (ident " SignedSatQ18__5 ") )) , + (stmts [ + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " FPSR ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 28))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 28)) , (expr (integer 4)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 1))) ; (targs (expr (integer 27))) ] , [ (expr (bits '1')) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 27)) )) ] )) ] )) ] )) ))) ]) , [ ] , + (stmts [ ]) ))) + (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Bits ( (expr (integer 16)) )) , [ (ident " SignedSatQ31__5 ") ] ))) + (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Constructor("boolean")) , [ (ident " SignedSatQ32__5 ") ] ))) + (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr (bits '000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 33))) ; (targs (expr (integer 6))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 17))) ; (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 17))) ] , [ (expr (bits '00000000000000010')) ; (expr Expr_Var ( (ident " Cse36__5 ") )) ] )) ; (expr (integer 33)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '000000000000000001000000000000000')) ] )) ; (expr (bits '010000')) ] )) ] )) , + (stmts [ + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ31__5 ") )) , (expr (bits '0111111111111111')) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ32__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , + (stmts [ + (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 33))) ; (targs (expr (integer 6))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 17))) ; (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 17))) ] , [ (expr (bits '00000000000000010')) ; (expr Expr_Var ( (ident " Cse36__5 ") )) ] )) ; (expr (integer 33)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '000000000000000001000000000000000')) ] )) ; (expr (bits '010000')) ] )) ; (expr (bits '111111111111111111000000000000000')) ] )) , + (stmts [ + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ31__5 ") )) , (expr (bits '1000000000000000')) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ32__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , + (stmts [ + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ31__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 33))) ; (targs (expr (integer 6))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 17))) ; (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 17))) ] , [ (expr (bits '00000000000000010')) ; (expr Expr_Var ( (ident " Cse36__5 ") )) ] )) ; (expr (integer 33)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '000000000000000001000000000000000')) ] )) ; (expr (bits '010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ32__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) ]) ))) + (stmt (conditional_stmt Stmt_If ( (expr Expr_Var ( (ident " SignedSatQ32__5 ") )) , + (stmts [ + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " FPSR ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 28))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 28)) , (expr (integer 4)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 1))) ; (targs (expr (integer 27))) ] , [ (expr (bits '1')) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 27)) )) ] )) ] )) ] )) ))) ]) , [ ] , + (stmts [ ]) ))) + (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Bits ( (expr (integer 16)) )) , [ (ident " SignedSatQ44__5 ") ] ))) + (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Constructor("boolean")) , [ (ident " SignedSatQ45__5 ") ] ))) + (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr (bits '000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 33))) ; (targs (expr (integer 6))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 17))) ; 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(targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 17))) ] , [ (expr (bits '00000000000000010')) ; (expr Expr_Var ( (ident " Cse6__5 ") )) ] )) ; (expr (integer 33)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '000000000000000001000000000000000')) ] )) ; (expr (bits '010000')) ] )) ; (expr (bits '111111111111111111000000000000000')) ] )) , + (stmts [ + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ96__5 ") )) , (expr (bits '1000000000000000')) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ97__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , + (stmts [ + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ96__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 33))) ; (targs (expr (integer 6))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 17))) ; (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 17))) ] , [ (expr (bits '00000000000000010')) ; (expr Expr_Var ( (ident " Cse6__5 ") )) ] )) ; (expr (integer 33)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '000000000000000001000000000000000')) ] )) ; (expr (bits '010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ97__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) ]) ))) + (stmt (conditional_stmt Stmt_If ( (expr Expr_Var ( (ident " SignedSatQ97__5 ") )) , + (stmts [ + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " FPSR ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 28))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 28)) , (expr (integer 4)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 1))) ; (targs (expr (integer 27))) ] , [ (expr (bits '1')) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 27)) )) ] )) ] )) ] )) ))) ]) , [ ] , + (stmts [ ]) ))) + (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Bits ( (expr (integer 16)) )) , [ (ident " SignedSatQ109__5 ") ] ))) + (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Constructor("boolean")) , [ (ident " SignedSatQ110__5 ") ] ))) + (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr (bits '000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 33))) ; (targs (expr (integer 6))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 17))) ; (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 17))) ] , [ (expr (bits '00000000000000010')) ; (expr Expr_Var ( (ident " Cse0__5 ") )) ] )) ; (expr (integer 33)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '000000000000000001000000000000000')) ] )) ; (expr (bits '010000')) ] )) ] )) , + (stmts [ + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ109__5 ") )) , (expr (bits '0111111111111111')) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ110__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , + (stmts [ + (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 33))) ; (targs (expr (integer 6))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 17))) ; (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 17))) ] , [ (expr (bits '00000000000000010')) ; (expr Expr_Var ( (ident " Cse0__5 ") )) ] )) ; (expr (integer 33)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '000000000000000001000000000000000')) ] )) ; (expr (bits '010000')) ] )) ; (expr (bits '111111111111111111000000000000000')) ] )) , + (stmts [ + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ109__5 ") )) , (expr (bits '1000000000000000')) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ110__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , + (stmts [ + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ109__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 33))) ; (targs (expr (integer 6))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 17))) ; (targs (expr (integer 33))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 17))) ] , [ (expr (bits '00000000000000010')) ; (expr Expr_Var ( (ident " Cse0__5 ") )) ] )) ; (expr (integer 33)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '000000000000000001000000000000000')) ] )) ; (expr (bits '010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ110__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) ]) ))) + (stmt (conditional_stmt Stmt_If ( (expr Expr_Var ( (ident " SignedSatQ110__5 ") )) , + (stmts [ + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " FPSR ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 28))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 28)) , (expr (integer 4)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 1))) ; (targs (expr (integer 27))) ] , [ (expr (bits '1')) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 27)) )) ] )) ] )) ] )) ))) ]) , [ ] , + (stmts [ ]) ))) + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Array ( (lexpr LExpr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 112))) ] , [ (expr Expr_Var ( (ident " SignedSatQ109__5 ") )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 96))) ] , [ (expr Expr_Var ( (ident " SignedSatQ96__5 ") )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 80))) ] , [ (expr Expr_Var ( (ident " SignedSatQ83__5 ") )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 64))) ] , [ (expr Expr_Var ( (ident " SignedSatQ70__5 ") )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 48))) ] , [ (expr Expr_Var ( (ident " SignedSatQ57__5 ") )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Var ( (ident " SignedSatQ44__5 ") )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 16))) ] , [ (expr Expr_Var ( (ident " SignedSatQ31__5 ") )) ; (expr Expr_Var ( (ident " SignedSatQ17__5 ") )) ] )) ] )) ] )) ] )) ] )) ] )) ] )) ))) ) $ cat antlr_err diff --git a/tests/aslt/test_dis.t b/tests/aslt/test_dis.t index 3bf93395..1f61fa05 100644 --- a/tests/aslt/test_dis.t +++ b/tests/aslt/test_dis.t @@ -597,4 +597,301 @@ run asli with these commands Stmt_Assign(LExpr_Var("result__5_7"),Expr_TApply("add_bits.0",[4],[Expr_Var("result__5_7");'0001'])) ],[],[]) Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),0),Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("append_bits.0",[8;56],[Expr_TApply("append_bits.0",[4;4],['0000';Expr_Var("result__5_7")]);Expr_TApply("append_bits.0",[8;48],[Expr_TApply("append_bits.0",[4;4],['0000';Expr_Var("Exp81__5")]);Expr_TApply("append_bits.0",[8;40],[Expr_TApply("append_bits.0",[4;4],['0000';Expr_Var("Exp70__5")]);Expr_TApply("append_bits.0",[8;32],[Expr_TApply("append_bits.0",[4;4],['0000';Expr_Var("Exp59__5")]);Expr_TApply("append_bits.0",[8;24],[Expr_TApply("append_bits.0",[4;4],['0000';Expr_Var("Exp48__5")]);Expr_TApply("append_bits.0",[8;16],[Expr_TApply("append_bits.0",[4;4],['0000';Expr_Var("Exp37__5")]);Expr_TApply("append_bits.0",[8;8],[Expr_TApply("append_bits.0",[4;4],['0000';Expr_Var("Exp26__5")]);Expr_TApply("append_bits.0",[4;4],['0000';Expr_Var("Exp14__5")])])])])])])])]);128])) + " + 0x4f71d000 + " + Decoding instruction A64 4f71d000 + constant bits ( 17 ) Cse43__5 = SignExtend.0 {{ 16,17 }} ( __array _Z [ 0 ] [ 0 +: 16 ],17 ) ; + constant bits ( 17 ) Cse36__5 = SignExtend.0 {{ 16,17 }} ( __array _Z [ 0 ] [ 16 +: 16 ],17 ) ; + constant bits ( 17 ) Cse30__5 = SignExtend.0 {{ 16,17 }} ( __array _Z [ 0 ] [ 32 +: 16 ],17 ) ; + constant bits ( 17 ) Cse24__5 = SignExtend.0 {{ 16,17 }} ( __array _Z [ 0 ] [ 48 +: 16 ],17 ) ; + constant bits ( 17 ) Cse18__5 = SignExtend.0 {{ 16,17 }} ( __array _Z [ 0 ] [ 64 +: 16 ],17 ) ; + constant bits ( 17 ) Cse12__5 = SignExtend.0 {{ 16,17 }} ( __array _Z [ 0 ] [ 80 +: 16 ],17 ) ; + constant bits ( 17 ) Cse6__5 = SignExtend.0 {{ 16,17 }} ( __array _Z [ 0 ] [ 96 +: 16 ],17 ) ; + constant bits ( 17 ) Cse0__5 = SignExtend.0 {{ 16,17 }} ( __array _Z [ 0 ] [ 112 +: 16 ],17 ) ; + constant bits ( 33 ) Cse42__5 = SignExtend.0 {{ 16,33 }} ( __array _Z [ 1 ] [ 48 +: 16 ],33 ) ; + bits ( 16 ) SignedSatQ17__5 ; + boolean SignedSatQ18__5 ; + if slt_bits.0 {{ 33 }} ( '000000000000000000111111111111111',asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse43__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ) ) then { + SignedSatQ17__5 = '0111111111111111' ; + SignedSatQ18__5 = TRUE ; + } else { + if slt_bits.0 {{ 33 }} ( asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse43__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ),'111111111111111111000000000000000' ) then { + SignedSatQ17__5 = '1000000000000000' ; + SignedSatQ18__5 = TRUE ; + } else { + SignedSatQ17__5 = asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse43__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ) [ 0 +: 16 ] ; + SignedSatQ18__5 = FALSE ; + } + } + if SignedSatQ18__5 then { + FPSR = append_bits.0 {{ 4,28 }} ( FPSR [ 28 +: 4 ],append_bits.0 {{ 1,27 }} ( '1',FPSR [ 0 +: 27 ] ) ) ; + } + bits ( 16 ) SignedSatQ31__5 ; + boolean SignedSatQ32__5 ; + if slt_bits.0 {{ 33 }} ( '000000000000000000111111111111111',asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse36__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ) ) then { + SignedSatQ31__5 = '0111111111111111' ; + SignedSatQ32__5 = TRUE ; + } else { + if slt_bits.0 {{ 33 }} ( asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse36__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ),'111111111111111111000000000000000' ) then { + SignedSatQ31__5 = '1000000000000000' ; + SignedSatQ32__5 = TRUE ; + } else { + SignedSatQ31__5 = asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse36__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ) [ 0 +: 16 ] ; + SignedSatQ32__5 = FALSE ; + } + } + if SignedSatQ32__5 then { + FPSR = append_bits.0 {{ 4,28 }} ( FPSR [ 28 +: 4 ],append_bits.0 {{ 1,27 }} ( '1',FPSR [ 0 +: 27 ] ) ) ; + } + bits ( 16 ) SignedSatQ44__5 ; + boolean SignedSatQ45__5 ; + if slt_bits.0 {{ 33 }} ( '000000000000000000111111111111111',asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse30__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ) ) then { + SignedSatQ44__5 = '0111111111111111' ; + SignedSatQ45__5 = TRUE ; + } else { + if slt_bits.0 {{ 33 }} ( asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse30__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ),'111111111111111111000000000000000' ) then { + SignedSatQ44__5 = '1000000000000000' ; + SignedSatQ45__5 = TRUE ; + } else { + SignedSatQ44__5 = asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse30__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ) [ 0 +: 16 ] ; + SignedSatQ45__5 = FALSE ; + } + } + if SignedSatQ45__5 then { + FPSR = append_bits.0 {{ 4,28 }} ( FPSR [ 28 +: 4 ],append_bits.0 {{ 1,27 }} ( '1',FPSR [ 0 +: 27 ] ) ) ; + } + bits ( 16 ) SignedSatQ57__5 ; + boolean SignedSatQ58__5 ; + if slt_bits.0 {{ 33 }} ( '000000000000000000111111111111111',asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse24__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ) ) then { + SignedSatQ57__5 = '0111111111111111' ; + SignedSatQ58__5 = TRUE ; + } else { + if slt_bits.0 {{ 33 }} ( asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse24__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ),'111111111111111111000000000000000' ) then { + SignedSatQ57__5 = '1000000000000000' ; + SignedSatQ58__5 = TRUE ; + } else { + SignedSatQ57__5 = asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse24__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ) [ 0 +: 16 ] ; + SignedSatQ58__5 = FALSE ; + } + } + if SignedSatQ58__5 then { + FPSR = append_bits.0 {{ 4,28 }} ( FPSR [ 28 +: 4 ],append_bits.0 {{ 1,27 }} ( '1',FPSR [ 0 +: 27 ] ) ) ; + } + bits ( 16 ) SignedSatQ70__5 ; + boolean SignedSatQ71__5 ; + if slt_bits.0 {{ 33 }} ( '000000000000000000111111111111111',asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse18__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ) ) then { + SignedSatQ70__5 = '0111111111111111' ; + SignedSatQ71__5 = TRUE ; + } else { + if slt_bits.0 {{ 33 }} ( asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse18__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ),'111111111111111111000000000000000' ) then { + SignedSatQ70__5 = '1000000000000000' ; + SignedSatQ71__5 = TRUE ; + } else { + SignedSatQ70__5 = asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse18__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ) [ 0 +: 16 ] ; + SignedSatQ71__5 = FALSE ; + } + } + if SignedSatQ71__5 then { + FPSR = append_bits.0 {{ 4,28 }} ( FPSR [ 28 +: 4 ],append_bits.0 {{ 1,27 }} ( '1',FPSR [ 0 +: 27 ] ) ) ; + } + bits ( 16 ) SignedSatQ83__5 ; + boolean SignedSatQ84__5 ; + if slt_bits.0 {{ 33 }} ( '000000000000000000111111111111111',asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse12__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ) ) then { + SignedSatQ83__5 = '0111111111111111' ; + SignedSatQ84__5 = TRUE ; + } else { + if slt_bits.0 {{ 33 }} ( asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse12__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ),'111111111111111111000000000000000' ) then { + SignedSatQ83__5 = '1000000000000000' ; + SignedSatQ84__5 = TRUE ; + } else { + SignedSatQ83__5 = asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse12__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ) [ 0 +: 16 ] ; + SignedSatQ84__5 = FALSE ; + } + } + if SignedSatQ84__5 then { + FPSR = append_bits.0 {{ 4,28 }} ( FPSR [ 28 +: 4 ],append_bits.0 {{ 1,27 }} ( '1',FPSR [ 0 +: 27 ] ) ) ; + } + bits ( 16 ) SignedSatQ96__5 ; + boolean SignedSatQ97__5 ; + if slt_bits.0 {{ 33 }} ( '000000000000000000111111111111111',asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse6__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ) ) then { + SignedSatQ96__5 = '0111111111111111' ; + SignedSatQ97__5 = TRUE ; + } else { + if slt_bits.0 {{ 33 }} ( asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse6__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ),'111111111111111111000000000000000' ) then { + SignedSatQ96__5 = '1000000000000000' ; + SignedSatQ97__5 = TRUE ; + } else { + SignedSatQ96__5 = asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse6__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ) [ 0 +: 16 ] ; + SignedSatQ97__5 = FALSE ; + } + } + if SignedSatQ97__5 then { + FPSR = append_bits.0 {{ 4,28 }} ( FPSR [ 28 +: 4 ],append_bits.0 {{ 1,27 }} ( '1',FPSR [ 0 +: 27 ] ) ) ; + } + bits ( 16 ) SignedSatQ109__5 ; + boolean SignedSatQ110__5 ; + if slt_bits.0 {{ 33 }} ( '000000000000000000111111111111111',asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse0__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ) ) then { + SignedSatQ109__5 = '0111111111111111' ; + SignedSatQ110__5 = TRUE ; + } else { + if slt_bits.0 {{ 33 }} ( asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse0__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ),'111111111111111111000000000000000' ) then { + SignedSatQ109__5 = '1000000000000000' ; + SignedSatQ110__5 = TRUE ; + } else { + SignedSatQ109__5 = asr_bits.0 {{ 33,6 }} ( add_bits.0 {{ 33 }} ( mul_bits.0 {{ 33 }} ( SignExtend.0 {{ 17,33 }} ( mul_bits.0 {{ 17 }} ( '00000000000000010',Cse0__5 ),33 ),Cse42__5 ),'000000000000000001000000000000000' ),'010000' ) [ 0 +: 16 ] ; + SignedSatQ110__5 = FALSE ; + } + } + if SignedSatQ110__5 then { + FPSR = append_bits.0 {{ 4,28 }} ( FPSR [ 28 +: 4 ],append_bits.0 {{ 1,27 }} ( '1',FPSR [ 0 +: 27 ] ) ) ; + } + __array _Z [ 0 ] = append_bits.0 {{ 16,112 }} ( SignedSatQ109__5,append_bits.0 {{ 16,96 }} ( SignedSatQ96__5,append_bits.0 {{ 16,80 }} ( SignedSatQ83__5,append_bits.0 {{ 16,64 }} ( SignedSatQ70__5,append_bits.0 {{ 16,48 }} ( SignedSatQ57__5,append_bits.0 {{ 16,32 }} ( SignedSatQ44__5,append_bits.0 {{ 16,16 }} ( SignedSatQ31__5,SignedSatQ17__5 ) ) ) ) ) ) ) ; + "" + Stmt_ConstDecl(Type_Bits(17),"Cse43__5",Expr_TApply("SignExtend.0",[16;17],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(0,16)]);17])) + Stmt_ConstDecl(Type_Bits(17),"Cse36__5",Expr_TApply("SignExtend.0",[16;17],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(16,16)]);17])) + Stmt_ConstDecl(Type_Bits(17),"Cse30__5",Expr_TApply("SignExtend.0",[16;17],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(32,16)]);17])) + Stmt_ConstDecl(Type_Bits(17),"Cse24__5",Expr_TApply("SignExtend.0",[16;17],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(48,16)]);17])) + Stmt_ConstDecl(Type_Bits(17),"Cse18__5",Expr_TApply("SignExtend.0",[16;17],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(64,16)]);17])) + Stmt_ConstDecl(Type_Bits(17),"Cse12__5",Expr_TApply("SignExtend.0",[16;17],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(80,16)]);17])) + Stmt_ConstDecl(Type_Bits(17),"Cse6__5",Expr_TApply("SignExtend.0",[16;17],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(96,16)]);17])) + Stmt_ConstDecl(Type_Bits(17),"Cse0__5",Expr_TApply("SignExtend.0",[16;17],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(112,16)]);17])) + Stmt_ConstDecl(Type_Bits(33),"Cse42__5",Expr_TApply("SignExtend.0",[16;33],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(48,16)]);33])) + Stmt_VarDeclsNoInit(Type_Bits(16),["SignedSatQ17__5"]) + Stmt_VarDeclsNoInit(Type_Constructor("boolean"),["SignedSatQ18__5"]) + Stmt_If(Expr_TApply("slt_bits.0",[33],['000000000000000000111111111111111';Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse43__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000'])]),[ + Stmt_Assign(LExpr_Var("SignedSatQ17__5"),'0111111111111111'); + Stmt_Assign(LExpr_Var("SignedSatQ18__5"),Expr_Var("TRUE")) + ],[],[ + Stmt_If(Expr_TApply("slt_bits.0",[33],[Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse43__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000']);'111111111111111111000000000000000']),[ + Stmt_Assign(LExpr_Var("SignedSatQ17__5"),'1000000000000000'); + Stmt_Assign(LExpr_Var("SignedSatQ18__5"),Expr_Var("TRUE")) + ],[],[ + Stmt_Assign(LExpr_Var("SignedSatQ17__5"),Expr_Slices(Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse43__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000']),[Slice_LoWd(0,16)])); + Stmt_Assign(LExpr_Var("SignedSatQ18__5"),Expr_Var("FALSE")) + ]) + ]) + Stmt_If(Expr_Var("SignedSatQ18__5"),[ + Stmt_Assign(LExpr_Var("FPSR"),Expr_TApply("append_bits.0",[4;28],[Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(28,4)]);Expr_TApply("append_bits.0",[1;27],['1';Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(0,27)])])])) + ],[],[]) + Stmt_VarDeclsNoInit(Type_Bits(16),["SignedSatQ31__5"]) + Stmt_VarDeclsNoInit(Type_Constructor("boolean"),["SignedSatQ32__5"]) + Stmt_If(Expr_TApply("slt_bits.0",[33],['000000000000000000111111111111111';Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse36__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000'])]),[ + Stmt_Assign(LExpr_Var("SignedSatQ31__5"),'0111111111111111'); + Stmt_Assign(LExpr_Var("SignedSatQ32__5"),Expr_Var("TRUE")) + ],[],[ + Stmt_If(Expr_TApply("slt_bits.0",[33],[Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse36__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000']);'111111111111111111000000000000000']),[ + Stmt_Assign(LExpr_Var("SignedSatQ31__5"),'1000000000000000'); + Stmt_Assign(LExpr_Var("SignedSatQ32__5"),Expr_Var("TRUE")) + ],[],[ + Stmt_Assign(LExpr_Var("SignedSatQ31__5"),Expr_Slices(Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse36__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000']),[Slice_LoWd(0,16)])); + Stmt_Assign(LExpr_Var("SignedSatQ32__5"),Expr_Var("FALSE")) + ]) + ]) + Stmt_If(Expr_Var("SignedSatQ32__5"),[ + Stmt_Assign(LExpr_Var("FPSR"),Expr_TApply("append_bits.0",[4;28],[Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(28,4)]);Expr_TApply("append_bits.0",[1;27],['1';Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(0,27)])])])) + ],[],[]) + Stmt_VarDeclsNoInit(Type_Bits(16),["SignedSatQ44__5"]) + Stmt_VarDeclsNoInit(Type_Constructor("boolean"),["SignedSatQ45__5"]) + Stmt_If(Expr_TApply("slt_bits.0",[33],['000000000000000000111111111111111';Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse30__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000'])]),[ + Stmt_Assign(LExpr_Var("SignedSatQ44__5"),'0111111111111111'); + Stmt_Assign(LExpr_Var("SignedSatQ45__5"),Expr_Var("TRUE")) + ],[],[ + Stmt_If(Expr_TApply("slt_bits.0",[33],[Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse30__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000']);'111111111111111111000000000000000']),[ + Stmt_Assign(LExpr_Var("SignedSatQ44__5"),'1000000000000000'); + Stmt_Assign(LExpr_Var("SignedSatQ45__5"),Expr_Var("TRUE")) + ],[],[ + Stmt_Assign(LExpr_Var("SignedSatQ44__5"),Expr_Slices(Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse30__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000']),[Slice_LoWd(0,16)])); + Stmt_Assign(LExpr_Var("SignedSatQ45__5"),Expr_Var("FALSE")) + ]) + ]) + Stmt_If(Expr_Var("SignedSatQ45__5"),[ + Stmt_Assign(LExpr_Var("FPSR"),Expr_TApply("append_bits.0",[4;28],[Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(28,4)]);Expr_TApply("append_bits.0",[1;27],['1';Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(0,27)])])])) + ],[],[]) + Stmt_VarDeclsNoInit(Type_Bits(16),["SignedSatQ57__5"]) + Stmt_VarDeclsNoInit(Type_Constructor("boolean"),["SignedSatQ58__5"]) + Stmt_If(Expr_TApply("slt_bits.0",[33],['000000000000000000111111111111111';Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse24__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000'])]),[ + Stmt_Assign(LExpr_Var("SignedSatQ57__5"),'0111111111111111'); + Stmt_Assign(LExpr_Var("SignedSatQ58__5"),Expr_Var("TRUE")) + ],[],[ + Stmt_If(Expr_TApply("slt_bits.0",[33],[Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse24__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000']);'111111111111111111000000000000000']),[ + Stmt_Assign(LExpr_Var("SignedSatQ57__5"),'1000000000000000'); + Stmt_Assign(LExpr_Var("SignedSatQ58__5"),Expr_Var("TRUE")) + ],[],[ + Stmt_Assign(LExpr_Var("SignedSatQ57__5"),Expr_Slices(Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse24__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000']),[Slice_LoWd(0,16)])); + Stmt_Assign(LExpr_Var("SignedSatQ58__5"),Expr_Var("FALSE")) + ]) + ]) + Stmt_If(Expr_Var("SignedSatQ58__5"),[ + Stmt_Assign(LExpr_Var("FPSR"),Expr_TApply("append_bits.0",[4;28],[Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(28,4)]);Expr_TApply("append_bits.0",[1;27],['1';Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(0,27)])])])) + ],[],[]) + Stmt_VarDeclsNoInit(Type_Bits(16),["SignedSatQ70__5"]) + Stmt_VarDeclsNoInit(Type_Constructor("boolean"),["SignedSatQ71__5"]) + Stmt_If(Expr_TApply("slt_bits.0",[33],['000000000000000000111111111111111';Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse18__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000'])]),[ + Stmt_Assign(LExpr_Var("SignedSatQ70__5"),'0111111111111111'); + Stmt_Assign(LExpr_Var("SignedSatQ71__5"),Expr_Var("TRUE")) + ],[],[ + Stmt_If(Expr_TApply("slt_bits.0",[33],[Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse18__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000']);'111111111111111111000000000000000']),[ + Stmt_Assign(LExpr_Var("SignedSatQ70__5"),'1000000000000000'); + Stmt_Assign(LExpr_Var("SignedSatQ71__5"),Expr_Var("TRUE")) + ],[],[ + Stmt_Assign(LExpr_Var("SignedSatQ70__5"),Expr_Slices(Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse18__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000']),[Slice_LoWd(0,16)])); + Stmt_Assign(LExpr_Var("SignedSatQ71__5"),Expr_Var("FALSE")) + ]) + ]) + Stmt_If(Expr_Var("SignedSatQ71__5"),[ + Stmt_Assign(LExpr_Var("FPSR"),Expr_TApply("append_bits.0",[4;28],[Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(28,4)]);Expr_TApply("append_bits.0",[1;27],['1';Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(0,27)])])])) + ],[],[]) + Stmt_VarDeclsNoInit(Type_Bits(16),["SignedSatQ83__5"]) + Stmt_VarDeclsNoInit(Type_Constructor("boolean"),["SignedSatQ84__5"]) + Stmt_If(Expr_TApply("slt_bits.0",[33],['000000000000000000111111111111111';Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse12__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000'])]),[ + Stmt_Assign(LExpr_Var("SignedSatQ83__5"),'0111111111111111'); + Stmt_Assign(LExpr_Var("SignedSatQ84__5"),Expr_Var("TRUE")) + ],[],[ + Stmt_If(Expr_TApply("slt_bits.0",[33],[Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse12__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000']);'111111111111111111000000000000000']),[ + Stmt_Assign(LExpr_Var("SignedSatQ83__5"),'1000000000000000'); + Stmt_Assign(LExpr_Var("SignedSatQ84__5"),Expr_Var("TRUE")) + ],[],[ + Stmt_Assign(LExpr_Var("SignedSatQ83__5"),Expr_Slices(Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse12__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000']),[Slice_LoWd(0,16)])); + Stmt_Assign(LExpr_Var("SignedSatQ84__5"),Expr_Var("FALSE")) + ]) + ]) + Stmt_If(Expr_Var("SignedSatQ84__5"),[ + Stmt_Assign(LExpr_Var("FPSR"),Expr_TApply("append_bits.0",[4;28],[Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(28,4)]);Expr_TApply("append_bits.0",[1;27],['1';Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(0,27)])])])) + ],[],[]) + Stmt_VarDeclsNoInit(Type_Bits(16),["SignedSatQ96__5"]) + Stmt_VarDeclsNoInit(Type_Constructor("boolean"),["SignedSatQ97__5"]) + Stmt_If(Expr_TApply("slt_bits.0",[33],['000000000000000000111111111111111';Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse6__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000'])]),[ + Stmt_Assign(LExpr_Var("SignedSatQ96__5"),'0111111111111111'); + Stmt_Assign(LExpr_Var("SignedSatQ97__5"),Expr_Var("TRUE")) + ],[],[ + Stmt_If(Expr_TApply("slt_bits.0",[33],[Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse6__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000']);'111111111111111111000000000000000']),[ + Stmt_Assign(LExpr_Var("SignedSatQ96__5"),'1000000000000000'); + Stmt_Assign(LExpr_Var("SignedSatQ97__5"),Expr_Var("TRUE")) + ],[],[ + Stmt_Assign(LExpr_Var("SignedSatQ96__5"),Expr_Slices(Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse6__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000']),[Slice_LoWd(0,16)])); + Stmt_Assign(LExpr_Var("SignedSatQ97__5"),Expr_Var("FALSE")) + ]) + ]) + Stmt_If(Expr_Var("SignedSatQ97__5"),[ + Stmt_Assign(LExpr_Var("FPSR"),Expr_TApply("append_bits.0",[4;28],[Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(28,4)]);Expr_TApply("append_bits.0",[1;27],['1';Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(0,27)])])])) + ],[],[]) + Stmt_VarDeclsNoInit(Type_Bits(16),["SignedSatQ109__5"]) + Stmt_VarDeclsNoInit(Type_Constructor("boolean"),["SignedSatQ110__5"]) + Stmt_If(Expr_TApply("slt_bits.0",[33],['000000000000000000111111111111111';Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse0__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000'])]),[ + Stmt_Assign(LExpr_Var("SignedSatQ109__5"),'0111111111111111'); + Stmt_Assign(LExpr_Var("SignedSatQ110__5"),Expr_Var("TRUE")) + ],[],[ + Stmt_If(Expr_TApply("slt_bits.0",[33],[Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse0__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000']);'111111111111111111000000000000000']),[ + Stmt_Assign(LExpr_Var("SignedSatQ109__5"),'1000000000000000'); + Stmt_Assign(LExpr_Var("SignedSatQ110__5"),Expr_Var("TRUE")) + ],[],[ + Stmt_Assign(LExpr_Var("SignedSatQ109__5"),Expr_Slices(Expr_TApply("asr_bits.0",[33;6],[Expr_TApply("add_bits.0",[33],[Expr_TApply("mul_bits.0",[33],[Expr_TApply("SignExtend.0",[17;33],[Expr_TApply("mul_bits.0",[17],['00000000000000010';Expr_Var("Cse0__5")]);33]);Expr_Var("Cse42__5")]);'000000000000000001000000000000000']);'010000']),[Slice_LoWd(0,16)])); + Stmt_Assign(LExpr_Var("SignedSatQ110__5"),Expr_Var("FALSE")) + ]) + ]) + Stmt_If(Expr_Var("SignedSatQ110__5"),[ + Stmt_Assign(LExpr_Var("FPSR"),Expr_TApply("append_bits.0",[4;28],[Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(28,4)]);Expr_TApply("append_bits.0",[1;27],['1';Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(0,27)])])])) + ],[],[]) + Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),0),Expr_TApply("append_bits.0",[16;112],[Expr_Var("SignedSatQ109__5");Expr_TApply("append_bits.0",[16;96],[Expr_Var("SignedSatQ96__5");Expr_TApply("append_bits.0",[16;80],[Expr_Var("SignedSatQ83__5");Expr_TApply("append_bits.0",[16;64],[Expr_Var("SignedSatQ70__5");Expr_TApply("append_bits.0",[16;48],[Expr_Var("SignedSatQ57__5");Expr_TApply("append_bits.0",[16;32],[Expr_Var("SignedSatQ44__5");Expr_TApply("append_bits.0",[16;16],[Expr_Var("SignedSatQ31__5");Expr_Var("SignedSatQ17__5")])])])])])])]))