From f412e038ae394cc30d6fc782187c2b670f7d6bb1 Mon Sep 17 00:00:00 2001 From: Nicholas Coughlin Date: Tue, 12 Nov 2024 12:04:13 +1000 Subject: [PATCH 1/8] Add ITE Simplification Transform Reduce flag setting pattern in CCMP instruction, from: if cond then X1 := E1 ... XN := EN else X1 := F1 ... XN := FN to: const ITESimp_0 := cond X1 := (ITESimp_0 & E1) | (!ITESimp_0 & F1) ... XN := (ITESimp_0 & EN) | (!ITESimp_0 & FN) --- libASL/dis.ml | 1 + libASL/symbolic.ml | 5 +- libASL/transforms.ml | 103 ++ tests/aslt/test_cntlm.t | 2272 ++++++++++++--------------------------- 4 files changed, 818 insertions(+), 1563 deletions(-) diff --git a/libASL/dis.ml b/libASL/dis.ml index 1d7cb52b..f6351acb 100644 --- a/libASL/dis.ml +++ b/libASL/dis.ml @@ -1580,6 +1580,7 @@ let dis_core (env: Eval.Env.t) (unroll_bound) ((lenv,globals): env) (decode: dec let stmts' = Transforms.CaseSimp.do_transform stmts' in let stmts' = Transforms.RemoveRegisters.run stmts' in let stmts' = Transforms.AppendZeros.run stmts' in + let stmts' = Transforms.BitITESimp.do_transform stmts' in if !debug_level >= 2 then begin let stmts' = Asl_visitor.visit_stmts (new Asl_utils.resugarClass (!TC.binop_table)) stmts' in diff --git a/libASL/symbolic.ml b/libASL/symbolic.ml index 0a12970a..119825ef 100644 --- a/libASL/symbolic.ml +++ b/libASL/symbolic.ml @@ -454,13 +454,16 @@ let sym_inmask loc v mask = let v = Val (VBits {v = mask.v; n}) in sym_eq_bits loc (sym_and_bits loc ne (Exp e) m) v -let sym_or_bits loc w (x: sym) (y: sym) = +let rec sym_or_bits loc w (x: sym) (y: sym) = match x, y with | Val x, Val y -> Val (VBits (prim_or_bits (to_bits loc x) (to_bits loc y))) | Val x, y when is_one_bits x -> Val x | x, Val y when is_one_bits y -> Val y | Val x, y when is_zero_bits x -> y | x, Val y when is_zero_bits y -> x + (* (a /\ b) \/ !a ~> b \/ !a *) + | Exp (Expr_TApply (FIdent ("and_bits", 0), _, [a; x])), Exp (Expr_TApply (FIdent ("not_bits", 0), _, [a'])) when a = a' -> + sym_or_bits loc w (sym_of_expr x) y | _ -> Exp (Expr_TApply (FIdent ("or_bits", 0), [w], [sym_expr x; sym_expr y]) ) (** Construct a ITE expression from bitvector operations. Expects arguments to be 1 bit wide. *) diff --git a/libASL/transforms.ml b/libASL/transforms.ml index 5ddae29b..8e6cacae 100644 --- a/libASL/transforms.ml +++ b/libASL/transforms.ml @@ -21,6 +21,7 @@ let pure_prims = let infer_type (e: expr): ty option = match e with + | Expr_LitBits bv -> (Some(Type_Bits(Expr_LitInt (string_of_int (String.length bv))))) | Expr_Slices(x, [Slice_LoWd(l,w)]) -> Some(Type_Bits(w)) | Expr_TApply((FIdent(name, _) | Ident(name)), [], _) -> begin match name with @@ -1680,6 +1681,108 @@ module CaseSimp = struct xs end +(* Transform the following to remove control flow: + + if cond then ITESimp_0 := cond + X1 := E1 X1 := (ITESimp_0 & E1) | (!ITESimp_0 & F1) + ... ... + XN := EN XN := (ITESimp_0 & EN) | (!ITESimp_0 & F1) + else ~> + X1 := F1 + ... + XN := F2 + + Where: + - XNs are written on both edges in the same order. + - XNs are single bit variables. + - ENs and FNs are pure. + + TODO: + - Could generalise to mismatched XNs, as long as self-assign is safe. + Not clear if this is okay semantically. + - Could generalise to arbitrary bitvectors, if worthwhile. + Resulting mask might be worse than branch however. + - Generalised order is difficult given dependencies. + *) +module BitITESimp = struct + let one = Expr_LitInt "1" + let type_bit = Type_Bits one + + (* Test if we can freely perform the operation, even if it wouldn't + have been performed in the original branching version *) + let rec is_pure e = + match e with + | Expr_Var _ -> true + | Expr_LitBits _ -> true + | Expr_LitInt _ -> true + | Expr_Slices(e, [Slice_LoWd(lo, wd)]) -> + is_pure e && is_pure lo && is_pure wd + | Expr_TApply(f, tes, es) -> + List.mem f pure_prims && + List.for_all is_pure tes && + List.for_all is_pure es + | Expr_Field(e,_) -> is_pure e + | Expr_Array(e,i) -> is_pure e && is_pure i + | _ -> false + + (* Walk both branches in sync, collect necessary information *) + let rec match_body t f = + match t, f with + | Stmt_Assign(ti,te,loc)::ts, Stmt_Assign(fi,fe,_)::fs + when ti = fi && is_pure te && is_pure fe && + infer_type te = Some type_bit -> + Option.map (fun rest -> ((ti,te,fe,loc)::rest)) (match_body ts fs) + | [], [] -> Some [] + | _ -> None + + (* Utility to convert a bool test into a bit value, with some cleanup *) + let rec bool_to_bit c = + match c with + | Expr_TApply (FIdent("and_bool", 0), [], ls) -> + Expr_TApply (FIdent("and_bits", 0), [one], List.map bool_to_bit ls) + | Expr_TApply (FIdent("eq_bits", 0), _, [e; Expr_LitBits "1"]) + | Expr_TApply (FIdent("eq_bits", 0), _, [Expr_LitBits "1"; e]) -> e + | Expr_TApply (FIdent("eq_bits", 0), _, [e; Expr_LitBits "0"]) + | Expr_TApply (FIdent("eq_bits", 0), _, [Expr_LitBits "0"; e]) -> + Expr_TApply (FIdent ("not_bits", 0), [one], [e]) + | _ -> Expr_TApply (FIdent("cvt_bool_bv", 0), [], [c]) + + (* Generate the assignment for a paired expression *) + let build_stmt cond (i,e,e',loc) = + let e' = sym_or_bits loc one + (sym_and_bits loc one cond (sym_of_expr e)) + (sym_and_bits loc one (sym_not_bits loc one cond) (sym_of_expr e')) in + Stmt_Assign (i, sym_expr e', loc) + + (* Given the analysis has succeeded, build the equivalent series of assignments *) + let build_assigns cond assigns loc nv = + let cond_write = Stmt_ConstDecl(type_bit, nv, bool_to_bit cond, loc) in + let cond_load = Exp (Expr_Var nv) in + (cond_write::List.map (build_stmt cond_load) assigns) + + class visit_if = object + inherit Asl_visitor.nopAslVisitor + val mutable next_var = 0 + method! vstmt (s: stmt): stmt list visitAction = + match s with + | Stmt_If (cond, t, [], f, loc) -> + (match match_body t f with + | None -> DoChildren + | Some assigns -> + let nv = Ident ("ITESimp_" ^ string_of_int next_var) in + next_var <- next_var + 1; + ChangeTo (build_assigns cond assigns loc nv)) + | _ -> DoChildren + end + + let do_transform (xs: stmt list): stmt list = + let stmt_visitor = new visit_if in + let xs = visit_stmts stmt_visitor xs in + xs +end + + + (* Rewrite expressions with temporary dynamic width bitvectors into equivalent versions with only static bitvectors *) module RemoveTempBVs = struct diff --git a/tests/aslt/test_cntlm.t b/tests/aslt/test_cntlm.t index 1deae408..5d1c19e4 100644 --- a/tests/aslt/test_cntlm.t +++ b/tests/aslt/test_cntlm.t @@ -41847,82 +41847,46 @@ strip opcode information before passing to antlr. Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("SignExtend.0",[8;32],[Expr_TApply("Mem.read.0",[1],[Expr_TApply("add_bits.0",[64],[Expr_Var("SP_EL0");'0000000000000000000000000000000000000000000000000000000000101000']);1;0]);32]);64])) "0x3a410804" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'00000000000000000000000000000001'])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x3a410ac4" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);'00000000000000000000000000000001'])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x3a410b20" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);'00000000000000000000000000000001'])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x3a411824" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);'00000000000000000000000000000001'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x3a411aa4" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);'00000000000000000000000000000001'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x3a411ac4" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);'00000000000000000000000000000001'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x3c206820" Stmt_TCall("Mem.set.0",[1],[Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),1);Expr_Array(Expr_Var("_R"),0)]);1;1;Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(0,8)])]) "0x3c604840" @@ -85395,1237 +85359,679 @@ strip opcode information before passing to antlr. "0x7a400020" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a400040" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a400080" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a400260" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a4002a0" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a4002c0" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a400804" - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(31,1)])])) "0x7a400824" - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(31,1)])])) "0x7a400844" - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(31,1)])])) "0x7a400884" - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(31,1)])])) "0x7a400a80" - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(31,1)])])) "0x7a400aa0" - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(31,1)])])) "0x7a400ae4" - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(31,1)])])) "0x7a401024" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a401800" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(31,1)])])) "0x7a401804" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(31,1)])])) "0x7a401824" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(31,1)])])) "0x7a401840" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(31,1)])])) "0x7a401844" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(31,1)])])) "0x7a401864" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(31,1)])])) "0x7a401884" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(31,1)])])) "0x7a401a64" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(31,1)])])) "0x7a401a84" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(31,1)])])) "0x7a401ac1" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(31,1)])])) "0x7a401ae4" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(31,1)])])) "0x7a402062" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"C")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("or_bits.0",[1],[Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a408044" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("and_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");Expr_TApply("not_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a409020" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a409060" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a409aa4" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(31,1)])])) "0x7a40a020" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a40a380" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),28),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),28),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),28),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),28),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),28),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a40ab64" - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(31,1)])])) "0x7a40c804" - Stmt_If(Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("and_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")])]);Expr_TApply("not_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(31,1)])])) "0x7a40d040" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a410000" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a410040" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a4102e0" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a411002" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("or_bits.0",[1],[Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a411004" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a411040" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a411044" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a411804" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'11111111111111111111111111111111'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111111'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111111'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111111'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111111'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a411820" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);'11111111111111111111111111111111'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111111'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111111'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111111'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111111'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a419040" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a41a0c4" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a41c944" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),10),[Slice_LoWd(0,32)]);'11111111111111111111111111111111'])) - Stmt_If(Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),10),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111111'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),10),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111111'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("and_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")])]);Expr_TApply("not_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),10),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111111'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),10),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111111'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a420800" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'11111111111111111111111111111110'])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a420880" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);'11111111111111111111111111111110'])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a420aa0" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);'11111111111111111111111111111110'])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a421004" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a421024" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a421800" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'11111111111111111111111111111110'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a42c344" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),26),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),26),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),26),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("and_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")])]);Expr_TApply("not_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),26),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),26),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a42d121" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),9),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),9),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),9),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("or_bits.0",[1],[Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),9),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),9),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a431004" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a431264" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a441804" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'11111111111111111111111111111100'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111100'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111100'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111100'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111100'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a46a000" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a47b800" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'11111111111111111111111111111001'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a480840" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);'11111111111111111111111111111000'])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111000'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111000'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111111000'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111111000'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a490860" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);'11111111111111111111111111110111'])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110111'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110111'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110111'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110111'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a491804" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'11111111111111111111111111110111'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110111'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110111'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110111'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110111'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a4a1804" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'11111111111111111111111111110110'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a4a1840" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);'11111111111111111111111111110110'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a4a1884" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);'11111111111111111111111111110110'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a4a1b04" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)]);'11111111111111111111111111110110'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a4a8a60" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);'11111111111111111111111111110110'])) - Stmt_If(Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("and_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");Expr_TApply("not_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a4adae0" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);'11111111111111111111111111110110'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a4b1024" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),11),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),11),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a4b1804" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'11111111111111111111111111110101'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110101'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110101'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110101'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110101'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a4d1804" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'11111111111111111111111111110011'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110011'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110011'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110011'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110011'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a4d1824" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);'11111111111111111111111111110011'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110011'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110011'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110011'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110011'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a4d1844" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);'11111111111111111111111111110011'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110011'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110011'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110011'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110011'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a4d1884" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);'11111111111111111111111111110011'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110011'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110011'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110011'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110011'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a4d1aa4" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);'11111111111111111111111111110011'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110011'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110011'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110011'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110011'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a4d1b64" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);'11111111111111111111111111110011'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110011'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110011'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111110011'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111110011'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7a531324" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a540364" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a555300" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a55b2e4" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a561004" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a561284" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a569282" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("or_bits.0",[1],[Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a581060" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a581320" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a588364" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("and_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");Expr_TApply("not_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a590040" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a590282" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("or_bits.0",[1],[Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a5a8020" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),26),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),26),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("and_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");Expr_TApply("not_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a5ad324" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),26),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),26),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a5c0364" Stmt_ConstDecl(Type_Bits(32),"Cse2__5",Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),28),[Slice_LoWd(0,32)])])) Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),28),[Slice_LoWd(0,32)])])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);64]);Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse2__5");64])]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']);'00000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000001']),[Slice_LoWd(31,1)])])) "0x7a5f1820" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);'11111111111111111111111111100001'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111100001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111100001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);'1111111111111111111111111111111111111111111111111111111111100001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000011111111111111111111111111100001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[32],[Expr_Var("Cse0__5");'00000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(31,1)])])) "0x7e61d800" Stmt_VarDeclsNoInit(Type_Bits(4),["FPDecodeRounding9__6"]) Stmt_Assign(LExpr_Var("FPDecodeRounding9__6"),Expr_TApply("ZeroExtend.0",[2;4],[Expr_Slices(Expr_Var("FPCR"),[Slice_LoWd(22,2)]);4])) @@ -145346,43 +144752,25 @@ strip opcode information before passing to antlr. Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("Mem.read.0",[4],[Expr_TApply("add_bits.0",[64],[Expr_Var("SP_EL0");'0000000000000000000000000000000000000000000000000000100111010100']);4;0]);64])) "0xba410800" Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),0);'0000000000000000000000000000000000000000000000000000000000000001'])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),0);128]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),0);128]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),0);128]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),0);128]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(63,1)])])) "0xba411804" Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),0);'0000000000000000000000000000000000000000000000000000000000000001'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),0);128]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),0);128]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),0);128]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),0);128]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(63,1)])])) "0xba411a64" Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),19);'0000000000000000000000000000000000000000000000000000000000000001'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),19);128]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),19);128]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),19);128]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),19);128]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(63,1)])])) "0xbd000680" Stmt_TCall("Mem.set.0",[4],[Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),20);'0000000000000000000000000000000000000000000000000000000000000100']);4;1;Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(0,32)])]) "0xbd002260" @@ -156950,526 +156338,286 @@ strip opcode information before passing to antlr. "0xf94a5d21" Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("Mem.read.0",[8],[Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),9);'0000000000000000000000000000000000000000000000000001010010111000']);8;0])) "0xfa400824" - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),1);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),1);'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(63,1)])])) "0xfa400840" - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),2);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),2);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(63,1)])])) "0xfa400864" - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),3);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),3);'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(63,1)])])) "0xfa400a64" - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),19);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),19);'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(63,1)])])) "0xfa400a84" - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),20);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),20);'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(63,1)])])) "0xfa400aa4" - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),21);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),21);'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(63,1)])])) "0xfa400b04" - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),24);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),24);'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(63,1)])])) "0xfa401040" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),0)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),2);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),0)])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),2);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),2);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),2);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),2);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa401804" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),0);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),0);'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(63,1)])])) "0xfa401824" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),1);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),1);'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(63,1)])])) "0xfa401844" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),2);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),2);'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(63,1)])])) "0xfa401864" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),3);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),3);'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(63,1)])])) "0xfa401a84" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),20);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),20);'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(63,1)])])) "0xfa401aa4" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),21);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),21);'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(63,1)])])) "0xfa401ac4" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),22);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),22);'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(63,1)])])) "0xfa401ae4" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),23);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),23);'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(63,1)])])) "0xfa401b24" - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),25);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),25);'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(63,1)])])) "0xfa408260" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),0)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),19);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),0)])])) - Stmt_If(Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),19);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),19);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("and_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");Expr_TApply("not_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),19);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),19);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa409040" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),0)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),2);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),0)])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),2);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),2);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),2);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),2);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa40a804" - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),0);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),0);'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(63,1)])])) "0xfa40a860" - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),3);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"N");Expr_Field(Expr_Var("PSTATE"),"V")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_Var("ITESimp_0")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),3);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(63,1)])])) "0xfa421022" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),2)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),1);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),2)])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),1);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),1);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),1);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("or_bits.0",[1],[Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),1);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa422082" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),2)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),4);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),2)])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),4);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),4);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"C")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),4);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("or_bits.0",[1],[Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),4);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa429060" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),2)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),3);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),2)])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),3);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),3);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),3);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),3);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa429ae2" Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),23);'1111111111111111111111111111111111111111111111111111111111111110'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),23);128]);'11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),23);128]);'00000000000000000000000000000000000000000000000000000000000000001111111111111111111111111111111111111111111111111111111111111110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),23);128]);'11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("or_bits.0",[1],[Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),23);128]);'00000000000000000000000000000000000000000000000000000000000000001111111111111111111111111111111111111111111111111111111111111110'])])])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(63,1)])])) "0xfa431324" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),3)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),25);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),3)])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),25);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),25);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),25);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),25);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("or_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa4390a0" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),3)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),5);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),3)])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),5);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),5);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),5);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),5);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa441860" Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),3);'1111111111111111111111111111111111111111111111111111111111111100'])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),3);128]);'11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),3);128]);'00000000000000000000000000000000000000000000000000000000000000001111111111111111111111111111111111111111111111111111111111111100'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),3);128]);'11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),3);128]);'00000000000000000000000000000000000000000000000000000000000000001111111111111111111111111111111111111111111111111111111111111100'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(63,1)])])) "0xfa442060" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),4)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),3);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),4)])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),3);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),3);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"C")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),3);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),3);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa4a8860" Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),3);'1111111111111111111111111111111111111111111111111111111111110110'])) - Stmt_If(Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),3);128]);'11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),3);128]);'00000000000000000000000000000000000000000000000000000000000000001111111111111111111111111111111111111111111111111111111111110110'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("and_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");Expr_TApply("not_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),3);128]);'11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse0__5");128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),3);128]);'00000000000000000000000000000000000000000000000000000000000000001111111111111111111111111111111111111111111111111111111111110110'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_Var("Cse0__5"),[Slice_LoWd(63,1)])])) "0xfa5312a0" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),19)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),21);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),19)])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),21);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),21);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),21);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),21);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa532042" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),19)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),2);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),19)])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),2);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),2);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"C")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),2);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("or_bits.0",[1],[Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),2);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa5322e2" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),19)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),23);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),19)])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),23);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),23);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"C")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),23);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("or_bits.0",[1],[Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),23);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa539020" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),19)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),1);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),19)])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),1);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),1);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),1);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),1);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa5492a0" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),20)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),21);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),20)])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),21);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),21);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("and_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1']);Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'0'])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),21);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),21);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa5502c2" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),21)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),22);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),21)])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),22);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),22);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),22);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("or_bits.0",[1],[Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),22);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa551360" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),21)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),27);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),21)])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),27);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),27);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),27);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),27);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa571300" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),23)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),24);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),23)])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),24);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),24);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),24);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),24);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa590300" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),25)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),24);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),25)])])) - Stmt_If(Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"Z");'1']),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),24);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),24);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_Field(Expr_Var("PSTATE"),"Z")) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),24);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),24);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfa5a3282" Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),26)])) Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),20);Expr_TApply("not_bits.0",[64],[Expr_Array(Expr_Var("_R"),26)])])) - Stmt_If(Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1'])]),[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),20);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),20);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) - ],[],[ - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'1'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),'0'); - Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),'0') - ]) + Stmt_ConstDecl(Type_Bits(1),"ITESimp_0",Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("not_bool.0",[],[Expr_TApply("eq_bits.0",[1],[Expr_Field(Expr_Var("PSTATE"),"C");'1'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),20);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("or_bits.0",[1],[Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),20);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("Cse2__5");128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])]);Expr_TApply("not_bits.0",[1],[Expr_Var("ITESimp_0")])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])])) + Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_TApply("and_bits.0",[1],[Expr_Var("ITESimp_0");Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])])) "0xfc0243e0" Stmt_TCall("Mem.set.0",[8],[Expr_TApply("add_bits.0",[64],[Expr_Var("SP_EL0");'0000000000000000000000000000000000000000000000000000000000100100']);8;1;Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(0,64)])]) "0xfc044028" From 78b416f2316b7b919f14e80580a5768a642dd01f Mon Sep 17 00:00:00 2001 From: Nicholas Coughlin Date: Tue, 26 Nov 2024 13:51:29 +1000 Subject: [PATCH 2/8] Vector Fixes * Extend coverage testing to init vector state * Add two new fp ops * Support slice write to integer * Don't consider an impure operation dead * Don't CSE mutable variables, as location of CSE var is fixed to top * Fix defs for take and drop --- libASL/asl_utils.ml | 5 +++++ libASL/dis.ml | 2 ++ libASL/eval.ml | 9 ++++++++- libASL/primops.ml | 10 ++++++++++ libASL/transforms.ml | 39 +++++++++++++++++++++++++++++++++------ libASL/utils.ml | 4 ++-- libASL/value.ml | 5 +++++ 7 files changed, 65 insertions(+), 9 deletions(-) diff --git a/libASL/asl_utils.ml b/libASL/asl_utils.ml index a282ebc1..f7af12f2 100644 --- a/libASL/asl_utils.ml +++ b/libASL/asl_utils.ml @@ -371,6 +371,11 @@ let calls_of_expr expr = ignore (visit_expr (cc :> aslVisitor) expr); cc#result +let calls_of_stmt stmt = + let cc = new callsClass in + ignore (visit_stmt (cc :> aslVisitor) stmt); + cc#result + let calls_of_stmts stmts = let cc = new callsClass in ignore (visit_stmts (cc :> aslVisitor) stmts); diff --git a/libASL/dis.ml b/libASL/dis.ml index f6351acb..6c8080a0 100644 --- a/libASL/dis.ml +++ b/libASL/dis.ml @@ -100,6 +100,8 @@ let no_inline = [ "BFAdd",0; "BFMul",0; "FPRecipEstimate",0; + "FPRSqrtEstimate",0; + "UnsignedRSqrtEstimate",0; "Mem.read",0; "Mem.set",0; "AtomicStart",0; diff --git a/libASL/eval.ml b/libASL/eval.ml index ffca6e57..f8de9dad 100644 --- a/libASL/eval.ml +++ b/libASL/eval.ml @@ -502,6 +502,13 @@ let initializeRegistersAndMemory (env: Env.t) (xs: bigint list): unit = vals in Env.setVar Unknown env (Ident "_R") (VArray (arr, d)); + let vals = List.mapi (fun i v -> (i, VBits {n=128; v})) xs in + let arr = List.fold_left + (fun a (k,v) -> ImmutableArray.add k v a) + ImmutableArray.empty + vals + in + Env.setVar Unknown env (Ident "_Z") (VArray (arr, d)); let ram = Primops.init_ram (char_of_int 0) in ram.default <- None; Env.setVar Unknown env (Ident "__Memory") (VRAM ram) @@ -811,7 +818,7 @@ and eval_lexpr (loc: l) (env: Env.t) (x: AST.lexpr) (r: value): unit = | (s :: ss) -> let (i, w) = eval_slice loc env s in let v = extract_bits'' loc r o w in - eval (eval_add_int loc o w) ss (insert_bits loc prev i w v) + eval (eval_add_int loc o w) ss (insert_bits'' loc prev i w v) ) in eval_lexpr_modify loc env l (eval (VInt Z.zero) (List.rev ss)) diff --git a/libASL/primops.ml b/libASL/primops.ml index 890f8aa3..97b453bb 100644 --- a/libASL/primops.ml +++ b/libASL/primops.ml @@ -213,6 +213,16 @@ let prim_insert (x: bitvector) (i: bigint) (w: bigint) (y: bitvector): bitvector let y' = Z.shift_left (z_extract y.v 0 w') i' in mkBits x.n (Z.logor (Z.logand nmsk x.v) (Z.logand msk y')) +let prim_insert_int (x: Z.t) (i: bigint) (w: bigint) (y: bitvector): Z.t = + let i' = Z.to_int i in + let w' = Z.to_int w in + assert (0 <= i'); + assert (0 <= w'); + assert (w' = y.n); + let msk = (Z.sub (Z.shift_left Z.one (i'+w')) (Z.shift_left Z.one i')) in + let nmsk = Z.lognot msk in + let y' = Z.shift_left (z_extract y.v 0 w') i' in + (Z.logor (Z.logand nmsk x) (Z.logand msk y')) (****************************************************************) (** {2 Mask primops} *) diff --git a/libASL/transforms.ml b/libASL/transforms.ml index 8e6cacae..2f30112d 100644 --- a/libASL/transforms.ml +++ b/libASL/transforms.ml @@ -17,6 +17,12 @@ let pure_prims = FIdent("lsl_bits",0); FIdent("slt_bits",0); FIdent("sle_bits",0); + FIdent("sdiv_bits",0); + FIdent("LSL",0); + FIdent("LSR",0); + FIdent("ASR",0); + FIdent("Elem.set",0); + FIdent("Elem.read",0); ] let infer_type (e: expr): ty option = @@ -97,6 +103,9 @@ let infer_type (e: expr): ty option = | "LSL" -> Some(Type_Bits(num)) | "LSR" -> Some(Type_Bits(num)) | "ASR" -> Some(Type_Bits(num)) + | "lsl_bits" -> Some(Type_Bits(num)) + | "lsr_bits" -> Some(Type_Bits(num)) + | "asr_bits" -> Some(Type_Bits(num)) | "cvt_bits_uint" -> Some(type_integer) | "cvt_bits_sint" -> Some(type_integer) | "eq_bits" -> Some(type_bool) @@ -134,6 +143,9 @@ module RemoveUnused = struct | Expr_TApply (FIdent ("or_bool", 0), [], [a;b]) -> is_true a || is_true b | _ -> false + let pure_fns = IdentSet.of_seq (List.to_seq (FIdent("Mem.read",0) :: pure_prims)) + let contains_impure s = not (IdentSet.subset (calls_of_stmt s) pure_fns) + let rec remove_unused (globals: IdentSet.t) xs = fst (remove_unused' globals IdentSet.empty xs) and remove_unused' globals (used: IdentSet.t) (xs: stmt list): (stmt list * IdentSet.t) = @@ -151,16 +163,16 @@ module RemoveUnused = struct | [] -> pass | _ -> emit (Stmt_VarDeclsNoInit(ty, vs', loc))) | Stmt_VarDecl(ty, v, i, loc) -> - if IdentSet.mem v used + if IdentSet.mem v used || contains_impure stmt then emit stmt else pass | Stmt_ConstDecl(ty, v, i, loc) -> - if IdentSet.mem v used + if IdentSet.mem v used || contains_impure stmt then emit stmt else pass | Stmt_Assign(le, r, loc) -> let lvs = assigned_vars_of_stmts [stmt] in - if not (IdentSet.disjoint lvs used) || not (IdentSet.disjoint lvs globals) + if not (IdentSet.disjoint lvs used) || not (IdentSet.disjoint lvs globals) || contains_impure stmt then emit stmt else pass @@ -1472,7 +1484,19 @@ module CommonSubExprElim = struct *) exception CSEError of string - class gather_expressions = object + class gather_consts = object + inherit nopAslVisitor + val mutable consts : IdentSet.t = IdentSet.empty + method! vstmt s = + (match s with + | Stmt_ConstDecl(_, n, _, _) -> + consts <- IdentSet.add n consts; + SkipChildren + | _ -> DoChildren) + method get_info = consts + end + + class gather_expressions consts = object inherit Asl_visitor.nopAslVisitor val mutable exprs: expr list = ([]: expr list); @@ -1488,7 +1512,7 @@ module CommonSubExprElim = struct let () = match e with (* For now, only gather TApply's that we've seen more than once See eval_prim in value.ml for the list of what that covers. *) - | Expr_TApply(f,_,_) when List.mem f pure_prims -> + | Expr_TApply(f,_,_) when List.mem f pure_prims && IdentSet.subset (fv_expr e) consts -> (match infer_type e with | Some (Type_Bits _) -> if (List.mem e cand_exprs) && not (List.mem e exprs) then @@ -1592,7 +1616,10 @@ module CommonSubExprElim = struct ) let do_transform (xs: stmt list): stmt list = - let expression_visitor = new gather_expressions in + let const_visitor = new gather_consts in + let _ = visit_stmts const_visitor xs in + + let expression_visitor = new gather_expressions (const_visitor#get_info) in let expression_replacer = new replace_all_instances in let xs = visit_stmts expression_visitor xs in diff --git a/libASL/utils.ml b/libASL/utils.ml index b0e08dcb..dc6a4382 100644 --- a/libASL/utils.ml +++ b/libASL/utils.ml @@ -37,14 +37,14 @@ let to_string (d: PPrint.document): string = let rec take (n: int) (xs: 'a list) = match xs with | _ when n < 0 -> failwith "take: negative" - | [] when n = 0 -> [] + | l when n = 0 -> [] | [] -> failwith "take: list too short" | x::rest -> x :: take (n-1) rest let rec drop (n: int) (xs: 'a list) = match xs with | _ when n < 0 -> failwith "drop: negative" - | [] when n = 0 -> [] + | l when n = 0 -> l | [] -> failwith "drop: list too short" | _::rest -> drop (n-1) rest diff --git a/libASL/value.ml b/libASL/value.ml index f67e0073..75864d03 100644 --- a/libASL/value.ml +++ b/libASL/value.ml @@ -425,6 +425,11 @@ let insert_bits (loc: AST.l) (x: value) (i: value) (w: value) (y: value): value let insert_bits' (loc: AST.l) (x: value) (i: int) (w: int) (y: value): value = VBits (prim_insert (to_bits loc x) (Z.of_int i) (Z.of_int w) (to_bits loc y)) +let insert_bits'' (loc: AST.l) (x: value) (i: value) (w: value) (y: value): value = + (match x with + | VInt(x') -> VInt (prim_insert_int x' (to_integer loc i) (to_integer loc w) (to_bits loc y)) + | _ -> insert_bits loc x i w y) + let rec eval_eq (loc: AST.l) (x: value) (y: value): bool = (match (x, y) with | (VBool x', VBool y') -> prim_eq_bool x' y' From eeba88d686b1f1caf8fab8dfb55cc79f14f7ba04 Mon Sep 17 00:00:00 2001 From: Nicholas Coughlin Date: Tue, 26 Nov 2024 14:01:55 +1000 Subject: [PATCH 3/8] Improve post-dis type inference * Extend to perform expression evaluation * Support types on globals * Support types on arrays --- libASL/dis_tc.ml | 158 ++++++++++++++++++++++++++--------------------- 1 file changed, 89 insertions(+), 69 deletions(-) diff --git a/libASL/dis_tc.ml b/libASL/dis_tc.ml index 39609f15..a94370b9 100644 --- a/libASL/dis_tc.ml +++ b/libASL/dis_tc.ml @@ -1,12 +1,21 @@ open Asl_visitor open Asl_ast open Asl_utils +open Symbolic (* Get the types of expressions in a function body after performing dis. *) module LocalVarTypes = struct + let weak_add v t m = + match Bindings.find_opt v m with + | Some t' when t = t' -> m + | None -> Bindings.add v t m + | Some t' -> + failwith @@ "LocalVarTypes: Variable redecl with different type " ^ + pprint_ident v ^ ": " ^ pp_type t' ^ " -> " ^ pp_type t + class var_visitor = object inherit nopAslVisitor val mutable types = Bindings.empty @@ -14,7 +23,7 @@ module LocalVarTypes = struct (match s with | Stmt_VarDeclsNoInit(ty, [v], _) | Stmt_VarDecl(ty, v, _, _) - | Stmt_ConstDecl(ty, v, _, _) -> types <- Bindings.add v ty types + | Stmt_ConstDecl(ty, v, _, _) -> types <- weak_add v ty types | _ -> ()); DoChildren method get_types = types @@ -28,54 +37,57 @@ module LocalVarTypes = struct List.fold_right (fun i -> Bindings.add i Value.type_integer) targs types end +(* Basic ops for bv types *) +let add_int x y = Expr_TApply (FIdent ("add_int", 0), [], [x; y]) +let mul_int x y = Expr_TApply (FIdent ("mul_int", 0), [], [x; y]) + let prim_type fi targs = match name_of_FIdent fi, targs with - | ("eq_enum", [ ]) -> Some (Symbolic.type_bool ) - | ("ne_enum", [ ]) -> Some (Symbolic.type_bool ) - | ("eq_bool", [ ]) -> Some (Symbolic.type_bool ) - | ("ne_bool", [ ]) -> Some (Symbolic.type_bool ) - | ("or_bool", [ ]) -> Some (Symbolic.type_bool ) - | ("and_bool", [ ]) -> Some (Symbolic.type_bool ) - | ("implies_bool", [ ]) -> Some (Symbolic.type_bool ) - | ("equiv_bool", [ ]) -> Some (Symbolic.type_bool ) - | ("not_bool", [ ]) -> Some (Symbolic.type_bool ) - | ("eq_int", [ ]) -> Some (Symbolic.type_bool ) - | ("ne_int", [ ]) -> Some (Symbolic.type_bool ) - | ("le_int", [ ]) -> Some (Symbolic.type_bool ) - | ("lt_int", [ ]) -> Some (Symbolic.type_bool ) - | ("ge_int", [ ]) -> Some (Symbolic.type_bool ) - | ("gt_int", [ ]) -> Some (Symbolic.type_bool ) - | ("is_pow2_int", [ ]) -> Some (Symbolic.type_bool ) - | ("neg_int", [ ]) -> Some (Value.type_integer ) - | ("add_int", [ ]) -> Some (Value.type_integer ) - | ("sub_int", [ ]) -> Some (Value.type_integer ) - | ("shl_int", [ ]) -> Some (Value.type_integer ) - | ("shr_int", [ ]) -> Some (Value.type_integer ) - | ("mul_int", [ ]) -> Some (Value.type_integer ) - | ("zdiv_int", [ ]) -> Some (Value.type_integer ) - | ("zrem_int", [ ]) -> Some (Value.type_integer ) - | ("sdiv_int", [ ]) -> Some (Value.type_integer ) - | ("fdiv_int", [ ]) -> Some (Value.type_integer ) - | ("frem_int", [ ]) -> Some (Value.type_integer ) - | ("mod_pow2_int", [ ]) -> Some (Value.type_integer ) - | ("align_int", [ ]) -> Some (Value.type_integer ) - | ("pow2_int", [ ]) -> Some (Value.type_integer ) - | ("pow_int_int", [ ]) -> Some (Value.type_integer ) + | ("eq_enum", [ ]) -> Some (type_bool) + | ("ne_enum", [ ]) -> Some (type_bool) + | ("eq_bool", [ ]) -> Some (type_bool) + | ("ne_bool", [ ]) -> Some (type_bool) + | ("or_bool", [ ]) -> Some (type_bool) + | ("and_bool", [ ]) -> Some (type_bool) + | ("implies_bool", [ ]) -> Some (type_bool) + | ("equiv_bool", [ ]) -> Some (type_bool) + | ("not_bool", [ ]) -> Some (type_bool) + | ("eq_int", [ ]) -> Some (type_bool) + | ("ne_int", [ ]) -> Some (type_bool) + | ("le_int", [ ]) -> Some (type_bool) + | ("lt_int", [ ]) -> Some (type_bool) + | ("ge_int", [ ]) -> Some (type_bool) + | ("gt_int", [ ]) -> Some (type_bool) + | ("is_pow2_int", [ ]) -> Some (type_bool) + | ("neg_int", [ ]) -> Some (Value.type_integer) + | ("add_int", [ ]) -> Some (Value.type_integer) + | ("sub_int", [ ]) -> Some (Value.type_integer) + | ("shl_int", [ ]) -> Some (Value.type_integer) + | ("shr_int", [ ]) -> Some (Value.type_integer) + | ("mul_int", [ ]) -> Some (Value.type_integer) + | ("zdiv_int", [ ]) -> Some (Value.type_integer) + | ("zrem_int", [ ]) -> Some (Value.type_integer) + | ("fdiv_int", [ ]) -> Some (Value.type_integer) + | ("frem_int", [ ]) -> Some (Value.type_integer) + | ("mod_pow2_int", [ ]) -> Some (Value.type_integer) + | ("align_int", [ ]) -> Some (Value.type_integer) + | ("pow2_int", [ ]) -> Some (Value.type_integer) + | ("pow_int_int", [ ]) -> Some (Value.type_integer) | ("round_tozero_real", [ ]) -> Some (Value.type_integer) - | ("round_down_real", [ ]) -> Some (Value.type_integer ) - | ("round_up_real", [ ]) -> Some (Value.type_integer ) - | ("cvt_bits_sint", [ n]) -> Some (Value.type_integer ) - | ("cvt_bits_uint", [ n]) -> Some (Value.type_integer ) - | ("eq_real", [ ]) -> Some (Symbolic.type_bool ) - | ("ne_real", [ ]) -> Some (Symbolic.type_bool ) - | ("le_real", [ ]) -> Some (Symbolic.type_bool ) - | ("lt_real", [ ]) -> Some (Symbolic.type_bool ) - | ("ge_real", [ ]) -> Some (Symbolic.type_bool ) - | ("gt_real", [ ]) -> Some (Symbolic.type_bool ) - | ("in_mask", [ n]) -> Some (Symbolic.type_bool ) - | ("notin_mask", [ n]) -> Some (Symbolic.type_bool ) - | ("eq_bits", [ n]) -> Some (Symbolic.type_bool ) - | ("ne_bits", [ n]) -> Some (Symbolic.type_bool ) + | ("round_down_real", [ ]) -> Some (Value.type_integer) + | ("round_up_real", [ ]) -> Some (Value.type_integer) + | ("cvt_bits_sint", [ n]) -> Some (Value.type_integer) + | ("cvt_bits_uint", [ n]) -> Some (Value.type_integer) + | ("eq_real", [ ]) -> Some (type_bool) + | ("ne_real", [ ]) -> Some (type_bool) + | ("le_real", [ ]) -> Some (type_bool) + | ("lt_real", [ ]) -> Some (type_bool) + | ("ge_real", [ ]) -> Some (type_bool) + | ("gt_real", [ ]) -> Some (type_bool) + | ("in_mask", [ n]) -> Some (type_bool) + | ("notin_mask", [ n]) -> Some (type_bool) + | ("eq_bits", [ n]) -> Some (type_bool) + | ("ne_bits", [ n]) -> Some (type_bool) | ("add_bits", [ n]) -> Some (Type_Bits n) | ("sub_bits", [ n]) -> Some (Type_Bits n) | ("mul_bits", [ n]) -> Some (Type_Bits n) @@ -85,50 +97,58 @@ let prim_type fi targs = | ("not_bits", [ n]) -> Some (Type_Bits n) | ("zeros_bits", [ n]) -> Some (Type_Bits n) | ("ones_bits", [ n]) -> Some (Type_Bits n) - | ("replicate_bits", [n; m ]) -> Some (Type_Bits (Expr_TApply (FIdent ("mul_int", 0), [], [n;m]))) - | ("append_bits", [n; m ]) -> Some (Type_Bits (Expr_TApply (FIdent ("add_int", 0), [], [n;m]))) + | ("replicate_bits", [n; m ]) -> Some (Type_Bits (mul_int n m)) + | ("append_bits", [n; m ]) -> Some (Type_Bits (add_int n m)) | ("cvt_int_bits", [ n]) -> Some (Type_Bits n) - | ("lsl_bits", [ n]) -> Some (Type_Bits n) - | ("lsr_bits", [ n]) -> Some (Type_Bits n) - | ("asr_bits", [ n]) -> Some (Type_Bits n) - | ("sle_bits", [ n]) -> Some (Symbolic.type_bool) - | ("slt_bits", [ n]) -> Some (Symbolic.type_bool) - | ("eq_str", [ ]) -> Some(Symbolic.type_bool) - | ("ne_str", [ ]) -> Some(Symbolic.type_bool) - | ("is_cunpred_exc", [ ]) -> Some(Symbolic.type_bool) - | ("is_exctaken_exc", [ ]) -> Some(Symbolic.type_bool) - | ("is_impdef_exc", [ ]) -> Some(Symbolic.type_bool) - | ("is_see_exc", [ ]) -> Some(Symbolic.type_bool) - | ("is_undefined_exc", [ ]) -> Some(Symbolic.type_bool) - | ("is_unpred_exc", [ ]) -> Some(Symbolic.type_bool) + | ("eq_str", [ ]) -> Some(type_bool) + | ("ne_str", [ ]) -> Some(type_bool) + | ("is_cunpred_exc", [ ]) -> Some(type_bool) + | ("is_exctaken_exc", [ ]) -> Some(type_bool) + | ("is_impdef_exc", [ ]) -> Some(type_bool) + | ("is_see_exc", [ ]) -> Some(type_bool) + | ("is_undefined_exc", [ ]) -> Some(type_bool) + | ("is_unpred_exc", [ ]) -> Some(type_bool) | ("asl_file_open", [ ]) -> Some(Value.type_integer) | ("asl_file_getc", [ ]) -> Some(Value.type_integer) | ("cvt_bool_bv", [ ]) -> Some(Type_Bits(Expr_LitInt("1"))) - | ("cvt_bv_bool", [ ]) -> Some(Symbolic.type_bool) + | ("cvt_bv_bool", [ ]) -> Some(type_bool) | _ -> None let get_ret_type f targs env = match Eval.Env.getFun Unknown env f with - | (Some ty,_,targs_s,_,_,_) -> + | (Some ty,_,targs_s,_,_,_) -> let subst = List.fold_right2 Bindings.add targs_s targs Bindings.empty in Some (subst_type subst ty) | _ -> None -let infer_type (e: expr) vars env = - match e with +let eval_type t env = + let eval e = val_expr (Eval.eval_expr Unknown env e) in + match t with + | Some (Type_Bits e) -> Some (Type_Bits (eval e)) + | t -> t + +let rec infer_type (e: expr) vars env = + let t = match e with | Expr_Var (Ident "TRUE") | Expr_Var (Ident "FALSE") -> (Some(Type_Constructor(Ident ("boolean")))) - | Expr_Var v -> Bindings.find_opt v vars + | Expr_Var v -> + (match Bindings.find_opt v vars with + | Some t -> Some t + | None -> Tcheck.GlobalEnv.getGlobalVar (!Tcheck.env0) v) | Expr_LitInt _ -> (Some(Value.type_integer)) | Expr_LitBits bv -> (Some(Type_Bits(Expr_LitInt (string_of_int (String.length bv))))) | Expr_Slices(x, [Slice_LoWd(l,w)]) -> (Some(Type_Bits(w))) | Expr_If(ty, c, t, els, e) -> (Some(ty)) | Expr_Unknown(ty) -> (Some(ty)) - | Expr_TApply(FIdent("extract_int", 0), _, [_;_;w]) -> (Some(Type_Bits(w))) | Expr_TApply(f, targs, args) -> (match prim_type f targs with - | Some t -> Some t + | Some t -> Some t | None -> get_ret_type f targs env) - | _ -> None + | Expr_Array(a,i) -> + (match infer_type a vars env with + | Some(Type_Array(_,ety)) -> Some ety + | _ -> None) + | _ -> None in + eval_type t env From e0e3a03ec7b90088f31cfb5524674a365c6bc696 Mon Sep 17 00:00:00 2001 From: Nicholas Coughlin Date: Tue, 26 Nov 2024 14:06:56 +1000 Subject: [PATCH 4/8] Rework Shifting * Change shifts to take unsigned shift amounts * Change shifts to take two args of the same width * Add ROR operation, ror_bits * Remove mistaken use of 'sdiv_int' * Add x * 0 = 0 reduction --- libASL/dis.ml | 1 + libASL/offline_transform.ml | 1 + libASL/symbolic.ml | 42 +++++- libASL/transforms.ml | 188 ++++++++++++++---------- libASL/value.ml | 2 +- tests/aslt/test_antlr.t | 104 +++++--------- tests/aslt/test_cntlm.t | 278 ++++++++++++++++++------------------ tests/aslt/test_cntlm_vec.t | 24 +--- tests/aslt/test_dis.t | 176 +++++++---------------- tests/override.asl | 20 +-- 10 files changed, 390 insertions(+), 446 deletions(-) diff --git a/libASL/dis.ml b/libASL/dis.ml index 6c8080a0..5f3d65d5 100644 --- a/libASL/dis.ml +++ b/libASL/dis.ml @@ -114,6 +114,7 @@ let no_inline_pure () = [ "LSL",0; "LSR",0; "ASR",0; + "ROR",0; "SignExtend",0; "ZeroExtend",0; ] @ (if !Symbolic.use_vectoriser then [ diff --git a/libASL/offline_transform.ml b/libASL/offline_transform.ml index 046dea21..c9f7c83e 100644 --- a/libASL/offline_transform.ml +++ b/libASL/offline_transform.ml @@ -179,6 +179,7 @@ let pure_prims = "sle_bits"; "lsl_bits"; "asr_bits"; + "ror_bits"; "slt_bits"; "sdiv_bits"; ] diff --git a/libASL/symbolic.ml b/libASL/symbolic.ml index 119825ef..a9c65683 100644 --- a/libASL/symbolic.ml +++ b/libASL/symbolic.ml @@ -369,14 +369,38 @@ let rec sym_mul_int (loc: l) (x: sym) (y: sym) = (* x * 1 = x *) | Val x, y | y, Val x when is_one x -> y + | Val x, y + | y, Val x when is_zero x -> Val (VInt Z.zero) (* (x + c) * c' = x * c' + c * c' *) | Exp (Expr_TApply (FIdent ("add_int", 0), [], [x; Expr_LitInt lit])), Val (VInt c') -> let c = Z.of_string lit in let offset = Val (VInt (Z.mul c c')) in - let base = sym_mul_int loc (Exp x) y in + let base = sym_mul_int loc (sym_of_expr x) y in sym_add_int loc base offset | _ -> Exp (Expr_TApply (FIdent ("mul_int", 0), [], [sym_expr x; sym_expr y])) +let sym_shl_int (loc: l) (x: sym) (y: sym) = + match x, y with + | Val x, Val y -> Val (VInt (prim_shl_int (to_integer loc x) (to_integer loc y))) + | _, Val y when is_zero y -> x + | _ -> Exp (Expr_TApply (FIdent ("shl_int", 0), [], [sym_expr x; sym_expr y])) + +let sym_shr_int (loc: l) (x: sym) (y: sym) = + match x, y with + | Val x, Val y -> Val (VInt (prim_shr_int (to_integer loc x) (to_integer loc y))) + | _, Val y when is_zero y -> x + | _ -> Exp (Expr_TApply (FIdent ("shr_int", 0), [], [sym_expr x; sym_expr y])) + +let sym_lt_int (loc: l) (x: sym) (y: sym) = + match x, y with + | Val x, Val y -> Val (VBool (prim_lt_int (to_integer loc x) (to_integer loc y))) + | _ -> Exp (Expr_TApply (FIdent ("lt_int", 0), [], [sym_expr x; sym_expr y])) + +let sym_zrem_int (loc: l) (x: sym) (y: sym) = + match x, y with + | Val x, Val y -> Val (VInt (prim_zrem_int (to_integer loc x) (to_integer loc y))) + | _ -> Exp (Expr_TApply (FIdent ("zrem_int", 0), [], [sym_expr x; sym_expr y])) + (*** Symbolic Boolean Operations ***) let sym_not_bool loc (x: sym) = @@ -643,11 +667,11 @@ let sym_lsl_bits loc w x y = | _ -> sym_prim (FIdent ("LSL", 0)) [sym_of_int w] [x;y] -let zdiv_int x y = +let sym_zdiv_int loc x y = match x, y with | Val (VInt i), Val (VInt j) -> Val (VInt (Z.div i j)) | _, Val (VInt i) when i = Z.one -> x - | _ -> Exp (Expr_TApply (FIdent ("sdiv_int", 0), [], [sym_expr x; sym_expr y])) + | _ -> Exp (Expr_TApply (FIdent ("zdiv_int", 0), [], [sym_expr x; sym_expr y])) (** Overwrite bits from position lo up to (lo+wd) exclusive of old with the value v. Needs to know the widths of both old and v to perform the operation. @@ -668,7 +692,7 @@ let sym_insert_bits loc (old_width: int) (old: sym) (lo: sym) (wd: sym) (v: sym) (sym_append_bits loc wd lo v (sym_slice loc old 0 lo)) | (_, _, Val wd', _) when Primops.prim_zrem_int (Z.of_int old_width) (to_integer Unknown wd') = Z.zero && !use_vectoriser -> (* Elem.set *) - let pos = zdiv_int lo wd in + let pos = sym_zdiv_int loc lo wd in Exp ( Expr_TApply (FIdent("Elem.set", 0), [expr_of_int old_width ; sym_expr wd], List.map sym_expr [old ; pos ; wd ; v]) ) | (_, Val (VInt l), _, _) when l = Z.zero && !use_vectoriser -> @@ -746,6 +770,8 @@ let sym_prim_simplify (name: string) (tes: sym list) (es: sym list): sym option | ("add_int", [ ], [x1; x2]) -> Some (sym_add_int loc x1 x2) | ("sub_int", [ ], [x1; x2]) -> Some (sym_sub_int loc x1 x2) | ("mul_int", [ ], [x1; x2]) -> Some (sym_mul_int loc x1 x2) + | ("shl_int", [ ], [x1; x2]) -> Some (sym_shl_int loc x1 x2) + | ("shr_int", [ ], [x1; x2]) -> Some (sym_shr_int loc x1 x2) | ("eq_int", [ ], [x1; x2]) -> Some (sym_eq_int loc x1 x2) | ("add_bits", [w], [x1; x2]) -> Some (sym_add_bits loc (sym_expr w) x1 x2) @@ -768,6 +794,14 @@ let sym_prim_simplify (name: string) (tes: sym list) (es: sym list): sym option let lower = sym_slice loc x1 si u in Some (sym_append_bits loc si u z lower) + (* ROR{w}(x,y) = x[0 +: s]:x[s +: (w - s)] where s = y mod w, when y >= 0 *) + | ("ROR", [Val (VInt w)], [x; Val (VInt y)]) when Z.geq y Z.zero -> + let s = Z.to_int (prim_frem_int y w) in + let w' = Z.to_int w - s in + let upper = sym_slice loc x 0 s in + let lower = sym_slice loc x s w' in + Some (sym_append_bits loc s w' upper lower) + | ("ZeroExtend", [Val (VInt v1); Val (VInt v2)], [x1;_]) when Z.equal v1 v2 -> Some x1 | ("eq_enum", _, [x; Val (VBool true)]) diff --git a/libASL/transforms.ml b/libASL/transforms.ml index 2f30112d..e0fe199a 100644 --- a/libASL/transforms.ml +++ b/libASL/transforms.ml @@ -13,6 +13,7 @@ let pure_prims = FIdent("SignExtend",0); FIdent("ZeroExtend",0); FIdent("asr_bits",0); + FIdent("ror_bits",0); FIdent("lsr_bits",0); FIdent("lsl_bits",0); FIdent("slt_bits",0); @@ -21,6 +22,7 @@ let pure_prims = FIdent("LSL",0); FIdent("LSR",0); FIdent("ASR",0); + FIdent("ROR",0); FIdent("Elem.set",0); FIdent("Elem.read",0); ] @@ -103,9 +105,11 @@ let infer_type (e: expr): ty option = | "LSL" -> Some(Type_Bits(num)) | "LSR" -> Some(Type_Bits(num)) | "ASR" -> Some(Type_Bits(num)) + | "ROR" -> Some(Type_Bits(num)) | "lsl_bits" -> Some(Type_Bits(num)) | "lsr_bits" -> Some(Type_Bits(num)) | "asr_bits" -> Some(Type_Bits(num)) + | "ror_bits" -> Some(Type_Bits(num)) | "cvt_bits_uint" -> Some(type_integer) | "cvt_bits_sint" -> Some(type_integer) | "eq_bits" -> Some(type_bool) @@ -114,15 +118,11 @@ let infer_type (e: expr): ty option = | "slt_bits" -> Some(type_bool) | _ -> None end - | Expr_TApply((FIdent(name, _) | Ident(name)), [Expr_LitInt(v1) as num1; Expr_LitInt(v2) as num2], _) -> begin + | Expr_TApply((FIdent(name, _) | Ident(name)), [Expr_LitInt(v1); Expr_LitInt(v2) as num2], _) -> begin (* These are... dubious. None appear in value.ml, so they're all based on what "looks correct". *) match name with | "ZeroExtend" -> Some(Type_Bits(num2)) | "SignExtend" -> Some(Type_Bits(num2)) - | "lsl_bits" -> Some(Type_Bits(num1)) - | "lsr_bits" -> Some(Type_Bits(num1)) - | "asl_bits" -> Some(Type_Bits(num1)) - | "asr_bits" -> Some(Type_Bits(num1)) | "append_bits" -> Some(Type_Bits(Expr_LitInt(string_of_int((int_of_string v1) + (int_of_string v2))))) | _ -> None @@ -222,6 +222,11 @@ end module StatefulIntToBits = struct type interval = (Z.t * Z.t) type abs = (int * bool * interval) + + let pp_abs (w,s,(u,l)) = + "{width: " ^ string_of_int w ^ ", signed: " ^ (if s then "true" else "false") ^ ", upper: " ^ Z.to_string u ^ + ", lower: " ^ Z.to_string l ^ "}" + (* Track vars we change to bvs, ints we leave as ints *) type state = { changed: bool; @@ -343,6 +348,16 @@ module StatefulIntToBits = struct let abs = (width old * 2, true, interval old) in (sym_zero_extend (width old) (width old) e, abs) + (* We need certain values to be positive, but can't necessarily show it. Use this to + enforce an assumption. *) + let assume_unsigned (y,a) = + if signed a then begin + if Z.lt (upper a) Z.zero then failwith "violated assumption, negative unsigned value"; + (*if Z.lt (lower a) Z.zero then Printf.printf "Warning: Cannot prove value is non-negative\n";*) + let i = (upper a, Z.zero) in + (y,(width a,false,i)) + end else (y,a) + (** Extend an expression coupled with its abstract information to a width *) let extend (abs) ((e,old) : sym * abs) = (* Only extending *) @@ -375,32 +390,56 @@ module StatefulIntToBits = struct let wrapper_ident = FIdent ("StatefulIntToBit_wrapper", 0) let build_div x y = - let wx = width (snd x) in - let wy = width (snd y) in - let abs = abs_of_div (snd x) (snd y) in - let mgr = merge_abs (snd x) (snd y) in - let base_div = sym_prim (FIdent ("sdiv_bits", 0)) [sym_of_abs mgr] [extend mgr x; extend mgr y] in - if wy > wx then begin + let wx = width (snd x) in + let wy = width (snd y) in + let abs = abs_of_div (snd x) (snd y) in + let mgr = merge_abs (snd x) (snd y) in + let base_div = sym_prim (FIdent ("sdiv_bits", 0)) [sym_of_abs mgr] [extend mgr x; extend mgr y] in + if wy > wx then begin + (base_div, abs) + end + else begin + assert (width mgr = wx); + if width abs = wx then begin (base_div, abs) + end else begin + let ex = extend abs in + (* Test if denom is -1 *) + let negone = VBits {n = wy ; v = Z.pred (Z.pow (Z.succ Z.one) wy)} in + let den = sym_prim (FIdent ("eq_bits", 0)) [sym_of_abs (snd y)] [fst y; Val negone] in + (* Test if num is INT_MIN *) + let intmin = VBits {n = wx ; v = Z.pow (Z.succ Z.one) (wx - 1)} in + let num = sym_prim (FIdent ("eq_bits", 0)) [sym_of_abs (snd x)] [fst x; Val intmin] in + (* Overflow result *) + let res = VBits {n = width abs; v = Z.pow (Z.succ Z.one) (wx - 1)} in + let test = sym_prim (FIdent ("and_bool", 0)) [] [num;den] in + (sym_prim (FIdent ("ite", 0)) [sym_of_abs abs] [test; Val res; ex (base_div,mgr)], abs) end - else begin - assert (width mgr = wx); - if width abs = wx then begin - (base_div, abs) - end else begin - let ex = extend abs in - (* Test if denom is -1 *) - let negone = VBits {n = wy ; v = Z.pred (Z.pow (Z.succ Z.one) wy)} in - let den = sym_prim (FIdent ("eq_bits", 0)) [sym_of_abs (snd y)] [fst y; Val negone] in - (* Test if num is INT_MIN *) - let intmin = VBits {n = wx ; v = Z.pow (Z.succ Z.one) (wx - 1)} in - let num = sym_prim (FIdent ("eq_bits", 0)) [sym_of_abs (snd x)] [fst x; Val intmin] in - (* Overflow result *) - let res = VBits {n = width abs; v = Z.pow (Z.succ Z.one) (wx - 1)} in - let test = sym_prim (FIdent ("and_bool", 0)) [] [num;den] in - (sym_prim (FIdent ("ite", 0)) [sym_of_abs abs] [test; Val res; ex (base_div,mgr)], abs) - end - end + end + + let build_shift f wx x y = + (* First, adjust the shift to be unsigned *) + let y = assume_unsigned y in + let (w',_) = width_of_interval (interval (snd y)) in + (* Case 1: We can match by zero extending the shift amount *) + if width (snd y) <= wx then + let y' = extend (wx, false, interval (snd y)) y in + expr_prim' f [Expr_LitInt (string_of_int wx)] [x;sym_expr y'] + (* Case 2: We can match by slicing the shift amount *) + else if w' <= wx then + let y' = sym_slice Unknown (fst y) 0 wx in + expr_prim' f [Expr_LitInt (string_of_int wx)] [x;sym_expr y'] + else if f = "lsl_bits" || f = "lsr_bits" then + (* if y >= wx then zero[0:wx] else f (x,y[0:wx]) *) + failwith @@ "Cannot match shift width to that of value: " ^ (string_of_int wx) ^ " " ^ (pp_abs (snd y)) + else if f = "asr_bits" then + (* if y >= wx then repeat(x[wx]) else f (x,y[0:wx]]) *) + failwith @@ "Cannot match shift width to that of value: " ^ (string_of_int wx) ^ " " ^ (pp_abs (snd y)) + else if f = "ror_bits" then + (* f (x,(mod y wx)[]) *) + failwith @@ "Cannot match shift width to that of value: " ^ (string_of_int wx) ^ " " ^ (pp_abs (snd y)) + else + failwith @@ "Unknown shift: " ^ f (** Covert an integer expression tree into a bitvector equivalent *) let rec bv_of_int_expr (st: state) (e: expr): (sym * abs) = @@ -448,6 +487,13 @@ module StatefulIntToBits = struct let ex = extend w in let f = sym_prim (FIdent ("sub_bits", 0)) [sym_of_abs w] [ex x;ex y] in (f,w) + | Expr_TApply (FIdent ("neg_int", 0), [], [x]) -> + let x = bv_of_int_expr st x in + let w = abs_of_uop (snd x) Primops.prim_neg_int in + let ex = extend w in + let z = Val (VBits {v=Z.zero; n=width w}) in + let f = sym_prim (FIdent ("sub_bits", 0)) [sym_of_abs w] [z; ex x] in + (f,w) | Expr_TApply (FIdent ("mul_int", 0), [], [x;y]) -> let x = bv_of_int_expr st x in let y = bv_of_int_expr st y in @@ -473,39 +519,24 @@ module StatefulIntToBits = struct let w = abs_of_uwidth digits in (f,w) - | Expr_TApply (FIdent ("neg_int", 0), [], [x]) -> + (* Integer shifts, corresponding to mult or div by 2^n. Assumes n is positive. *) + | Expr_TApply (FIdent ("shl_int", 0), [], [x; n]) -> let x = bv_of_int_expr st x in - let w = abs_of_uop (snd x) Primops.prim_neg_int in - let ex = extend w in - let z = Val (VBits {v=Z.zero; n=width w}) in - let f = sym_prim (FIdent ("sub_bits", 0)) [sym_of_abs w] [z; ex x] in - (f,w) - - (* TODO: Somewhat haphazard translation from old approach *) - | Expr_TApply (FIdent ("shl_int", 0), [], [x; y]) -> + let n = assume_unsigned (bv_of_int_expr st n) in + let abs = abs_of_bop (snd x) (snd n) (fun i j -> Z.shift_left i (Z.to_int j)) in + let xe = extend abs x in + let ne = extend (width abs, signed (snd n), interval (snd n)) n in + let e = expr_prim' "lsl_bits" [expr_of_abs abs] [sym_expr xe; sym_expr ne] in + (Exp e,abs) + | Expr_TApply (FIdent ("shr_int", 0), [], [x; n]) -> let x = bv_of_int_expr st x in - let y = force_signed (bv_of_int_expr st y) in - (match fst y with - | Val (VBits bv) -> - let yshift = Z.to_int (Primops.prim_cvt_bits_sint bv) in - let size = width (snd x) + yshift in - let abs = if signed (snd x) then abs_of_width size else abs_of_uwidth size in - (sym_append_bits Unknown (width (snd x)) yshift (fst x) (sym_zeros yshift),abs) - | _ -> - let (u,_) = interval (snd y) in - (* in worst case, could shift upper bound on y, adding y bits *) - let size = width (snd x) + (Z.to_int (Z.max u Z.zero)) in - let abs = if signed (snd x) then abs_of_width size else abs_of_uwidth size in - let ex = extend abs in - let f = sym_prim (FIdent ("lsl_bits", 0)) [sym_of_int size; sym_of_abs (snd y)] [ex x;fst y] in - (f,abs) - ) - - (* TODO: Over-approximate range on result, could be a little closer *) - | Expr_TApply (FIdent ("shr_int", 0), [], [x; y]) -> - let x = force_signed (bv_of_int_expr st x) in - let y = force_signed (bv_of_int_expr st y) in - (sym_prim (FIdent ("asr_bits", 0)) [sym_of_abs (snd x); sym_of_abs (snd y)] [fst x;fst y],snd x) + let n = assume_unsigned (bv_of_int_expr st n) in + let abs = abs_of_bop (snd x) (snd n) (fun i j -> Z.shift_right i (Z.to_int j)) in + let xe = extend abs x in + let ne = extend (width abs, signed (snd n), interval (snd n)) n in + let f = if signed (snd x) then "asr_bits" else "lsr_bits" in + let e = expr_prim' f [expr_of_abs abs] [sym_expr xe; sym_expr ne] in + (Exp e,abs) | Expr_TApply (FIdent ("round_tozero_real",0), [], [x]) -> bv_of_real_expr st x @@ -637,18 +668,24 @@ module StatefulIntToBits = struct let ex = extend w in (sym_expr @@ sym_prim (FIdent ("ne_bits", 0)) [sym_of_abs w] [ex x; ex y]) - (* these functions take bits as first argument and integer as second. just coerce second to bits. *) - (* TODO: primitive implementations of these expressions expect the shift amount to be signed, - but a negative shift is invalid anyway. Can't it just be unsigned? *) - | Expr_TApply (FIdent ("LSL", 0), [size], [x; n]) -> - let (n,w) = force_signed (bv_of_int_expr st n) in - expr_prim' "lsl_bits" [size; expr_of_abs w] [x;sym_expr n] - | Expr_TApply (FIdent ("LSR", 0), [size], [x; n]) -> - let (n,w) = force_signed (bv_of_int_expr st n) in - expr_prim' "lsr_bits" [size; expr_of_abs w] [x;sym_expr n] - | Expr_TApply (FIdent ("ASR", 0), [size], [x; n]) -> - let (n,w) = force_signed (bv_of_int_expr st n) in - expr_prim' "asr_bits" [size; expr_of_abs w] [x;sym_expr n] + (* these functions take bits as first argument and integer as second. just coerce second to + unsigned bits of the same size as the first argument. *) + | Expr_TApply (FIdent ("LSL", 0), [Expr_LitInt size], [x; n]) -> + let w = int_of_string size in + let n = bv_of_int_expr st n in + build_shift "lsl_bits" w x n + | Expr_TApply (FIdent ("LSR", 0), [Expr_LitInt size], [x; n]) -> + let w = int_of_string size in + let n = bv_of_int_expr st n in + build_shift "lsr_bits" w x n + | Expr_TApply (FIdent ("ASR", 0), [Expr_LitInt size], [x; n]) -> + let w = int_of_string size in + let n = bv_of_int_expr st n in + build_shift "asr_bits" w x n + | Expr_TApply (FIdent ("ROR", 0), [Expr_LitInt size], [x; n]) -> + let w = int_of_string size in + let n = bv_of_int_expr st n in + build_shift "ror_bits" w x n | e -> e in @@ -911,9 +948,10 @@ module IntToBits = struct | FIdent ("eor_bits", 0), [Expr_LitInt n], _ | FIdent ("not_bits", 0), [Expr_LitInt n], _ | FIdent ("zeros_bits", 0), [Expr_LitInt n], _ - | FIdent ("lsl_bits", 0), [Expr_LitInt n; _], _ - | FIdent ("lsr_bits", 0), [Expr_LitInt n; _], _ - | FIdent ("asr_bits", 0), [Expr_LitInt n; _], _ + | FIdent ("lsl_bits", 0), [Expr_LitInt n], _ + | FIdent ("lsr_bits", 0), [Expr_LitInt n], _ + | FIdent ("asr_bits", 0), [Expr_LitInt n], _ + | FIdent ("ror_bits", 0), [Expr_LitInt n], _ | FIdent ("ones_bits", 0), [Expr_LitInt n], _ -> int_of_string n | FIdent ("append_bits", 0), [Expr_LitInt n; Expr_LitInt m], _ -> int_of_string n + int_of_string m | FIdent ("replicate_bits", 0), [Expr_LitInt n; Expr_LitInt m], _ -> int_of_string n * int_of_string m diff --git a/libASL/value.ml b/libASL/value.ml index 75864d03..4b106365 100644 --- a/libASL/value.ml +++ b/libASL/value.ml @@ -387,7 +387,7 @@ let eval_prim (f: string) (tvs: value list) (vs: value list): value option = let prims_pure = [ "eq_enum"; "eq_enum"; "ne_enum"; "ne_enum"; "eq_bool"; "ne_bool"; "equiv_bool"; "not_bool"; "eq_int"; "ne_int"; "le_int"; "lt_int"; "ge_int"; "gt_int"; "is_pow2_int"; "neg_int"; "add_int"; "sub_int"; "shl_int"; "shr_int"; "mul_int"; "zdiv_int"; - "zrem_int"; "sdiv_int"; "fdiv_int"; "frem_int"; "mod_pow2_int"; "align_int"; "pow2_int"; "pow_int_int"; "cvt_int_real"; "eq_real"; + "zrem_int"; "fdiv_int"; "frem_int"; "mod_pow2_int"; "align_int"; "pow2_int"; "pow_int_int"; "cvt_int_real"; "eq_real"; "ne_real"; "le_real"; "lt_real"; "ge_real"; "gt_real"; "add_real"; "neg_real"; "sub_real"; "mul_real"; "divide_real"; "pow2_real"; "round_tozero_real"; "round_down_real"; "round_up_real"; "sqrt_real"; "cvt_int_bits"; "cvt_bits_sint"; "cvt_bits_uint"; "in_mask"; "notin_mask"; "eq_bits"; "ne_bits"; "add_bits"; "sub_bits"; "mul_bits"; "and_bits"; "or_bits"; diff --git a/tests/aslt/test_antlr.t b/tests/aslt/test_antlr.t index 8b718a4d..5f5afa6d 100644 --- a/tests/aslt/test_antlr.t +++ b/tests/aslt/test_antlr.t @@ -49,42 +49,42 @@ tests building and running of the antlr grammar. requires java (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 16))) ] , [ (expr Expr_Var ( (ident " Cse15__5 ") )) ; (expr (bits '0000000000010000')) ] )) , (stmts [ (stmt (assignment_stmt Stmt_Assert ( (expr Expr_TApply ( (ident " and_bool.0 ") , [ ] , [ (expr Expr_Var ( (ident " TRUE ") )) ; (expr Expr_TApply ( (ident " sle_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 16))) ] , [ (expr Expr_Var ( (ident " Cse14__5 ") )) ; (expr (bits '0000000000001000')) ] )) ; (expr (integer 32)) ] )) ; (expr (bits '00000000000000000000000010000000')) ] )) ] )) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " result__4 ") )) , (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 64))) ] , [ (expr Expr_Slices ( (expr Expr_TApply ( (ident " lsr_bits.0 ") , [ (targs (expr (integer 128))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) ; (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Var ( (ident " Cse14__5 ") )) ; (expr (integer 32)) ] )) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ; (expr (integer 64)) ] )) ))) ]) , [ ] , + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " result__4 ") )) , (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 64))) ] , [ (expr Expr_Slices ( (expr Expr_TApply ( (ident " lsr_bits.0 ") , [ (targs (expr (integer 128))) ] , [ (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) ; (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 128))) ] , [ (expr Expr_Var ( (ident " Cse14__5 ") )) ; (expr (integer 128)) ] )) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ; (expr (integer 64)) ] )) ))) ]) , [ ] , (stmts [ ]) ))) (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 16))) ] , [ (expr Expr_Var ( (ident " Cse13__5 ") )) ; (expr (bits '0000000000010000')) ] )) , (stmts [ (stmt (assignment_stmt Stmt_Assert ( (expr Expr_TApply ( (ident " and_bool.0 ") , [ ] , [ (expr Expr_Var ( (ident " TRUE ") )) ; (expr Expr_TApply ( (ident " sle_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 16))) ] , [ (expr Expr_Var ( (ident " Cse12__5 ") )) ; (expr (bits '0000000000001000')) ] )) ; (expr (integer 32)) ] )) ; (expr (bits '00000000000000000000000010000000')) ] )) ] )) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " result__4 ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 48))) ; (targs (expr (integer 16))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 16)) , (expr (integer 48)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 8))) ] , [ (expr Expr_Slices ( (expr Expr_TApply ( (ident " lsr_bits.0 ") , [ (targs (expr (integer 128))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) ; (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Var ( (ident " Cse12__5 ") )) ; (expr (integer 32)) ] )) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ] )) ] )) ))) ]) , [ ] , + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " result__4 ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 48))) ; (targs (expr (integer 16))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 16)) , (expr (integer 48)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 8))) ] , [ (expr Expr_Slices ( (expr Expr_TApply ( (ident " lsr_bits.0 ") , [ (targs (expr (integer 128))) ] , [ (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) ; (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 128))) ] , [ (expr Expr_Var ( (ident " Cse12__5 ") )) ; (expr (integer 128)) ] )) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ] )) ] )) ))) ]) , [ ] , (stmts [ ]) ))) (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 16))) ] , [ (expr Expr_Var ( (ident " Cse11__5 ") )) ; (expr (bits '0000000000010000')) ] )) , (stmts [ (stmt (assignment_stmt Stmt_Assert ( (expr Expr_TApply ( (ident " and_bool.0 ") , [ ] , [ (expr Expr_Var ( (ident " TRUE ") )) ; (expr Expr_TApply ( (ident " sle_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 16))) ] , [ (expr Expr_Var ( (ident " Cse10__5 ") )) ; (expr (bits '0000000000001000')) ] )) ; (expr (integer 32)) ] )) ; (expr (bits '00000000000000000000000010000000')) ] )) ] )) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " result__4 ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 40))) ; (targs (expr (integer 24))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 24)) , (expr (integer 40)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 16))) ] , [ (expr Expr_Slices ( (expr Expr_TApply ( (ident " lsr_bits.0 ") , [ (targs (expr (integer 128))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) ; (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Var ( (ident " Cse10__5 ") )) ; (expr (integer 32)) ] )) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ] )) ] )) ))) ]) , [ ] , + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " result__4 ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 40))) ; (targs (expr (integer 24))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 24)) , (expr (integer 40)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 16))) ] , [ (expr Expr_Slices ( (expr Expr_TApply ( (ident " lsr_bits.0 ") , [ (targs (expr (integer 128))) ] , [ (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) ; (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 128))) ] , [ (expr Expr_Var ( (ident " Cse10__5 ") )) ; (expr (integer 128)) ] )) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ] )) ] )) ))) ]) , [ ] , (stmts [ ]) ))) (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 16))) ] , [ (expr Expr_Var ( (ident " Cse9__5 ") )) ; (expr (bits '0000000000010000')) ] )) , (stmts [ (stmt (assignment_stmt Stmt_Assert ( (expr Expr_TApply ( (ident " and_bool.0 ") , [ ] , [ (expr Expr_Var ( (ident " TRUE ") )) ; (expr Expr_TApply ( (ident " sle_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 16))) ] , [ (expr Expr_Var ( (ident " Cse8__5 ") )) ; (expr (bits '0000000000001000')) ] )) ; (expr (integer 32)) ] )) ; (expr (bits '00000000000000000000000010000000')) ] )) ] )) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " result__4 ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 32)) , (expr (integer 32)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 24))) ] , [ (expr Expr_Slices ( (expr Expr_TApply ( (ident " lsr_bits.0 ") , [ (targs (expr (integer 128))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) ; (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Var ( (ident " Cse8__5 ") )) ; (expr (integer 32)) ] )) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 24)) )) ] )) ] )) ] )) ))) ]) , [ ] , + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " result__4 ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 32)) , (expr (integer 32)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 24))) ] , [ (expr Expr_Slices ( (expr Expr_TApply ( (ident " lsr_bits.0 ") , [ (targs (expr (integer 128))) ] , [ (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) ; (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 128))) ] , [ (expr Expr_Var ( (ident " Cse8__5 ") )) ; (expr (integer 128)) ] )) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 24)) )) ] )) ] )) ] )) ))) ]) , [ ] , (stmts [ ]) ))) (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 16))) ] , [ (expr Expr_Var ( (ident " Cse7__5 ") )) ; (expr (bits '0000000000010000')) ] )) , (stmts [ (stmt (assignment_stmt Stmt_Assert ( (expr Expr_TApply ( (ident " and_bool.0 ") , [ ] , [ (expr Expr_Var ( (ident " TRUE ") )) ; (expr Expr_TApply ( (ident " sle_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 16))) ] , [ (expr Expr_Var ( (ident " Cse6__5 ") )) ; (expr (bits '0000000000001000')) ] )) ; (expr (integer 32)) ] )) ; (expr (bits '00000000000000000000000010000000')) ] )) ] )) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " result__4 ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 24))) ; (targs (expr (integer 40))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 40)) , (expr (integer 24)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Slices ( (expr Expr_TApply ( (ident " lsr_bits.0 ") , [ (targs (expr (integer 128))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) ; (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Var ( (ident " Cse6__5 ") )) ; (expr (integer 32)) ] )) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 32)) )) ] )) ] )) ] )) ))) ]) , [ ] , + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " result__4 ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 24))) ; (targs (expr (integer 40))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 40)) , (expr (integer 24)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Slices ( (expr Expr_TApply ( (ident " lsr_bits.0 ") , [ (targs (expr (integer 128))) ] , [ (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) ; (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 128))) ] , [ (expr Expr_Var ( (ident " Cse6__5 ") )) ; (expr (integer 128)) ] )) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 32)) )) ] )) ] )) ] )) ))) ]) , [ ] , (stmts [ ]) ))) (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 16))) ] , [ (expr Expr_Var ( (ident " Cse5__5 ") )) ; (expr (bits '0000000000010000')) ] )) , (stmts [ (stmt (assignment_stmt Stmt_Assert ( (expr Expr_TApply ( (ident " and_bool.0 ") , [ ] , [ (expr Expr_Var ( (ident " TRUE ") )) ; (expr Expr_TApply ( (ident " sle_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 16))) ] , [ (expr Expr_Var ( (ident " Cse4__5 ") )) ; (expr (bits '0000000000001000')) ] )) ; (expr (integer 32)) ] )) ; (expr (bits '00000000000000000000000010000000')) ] )) ] )) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " result__4 ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 48))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 48)) , (expr (integer 16)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 40))) ] , [ (expr Expr_Slices ( (expr Expr_TApply ( (ident " lsr_bits.0 ") , [ (targs (expr (integer 128))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) ; (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Var ( (ident " Cse4__5 ") )) ; (expr (integer 32)) ] )) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 40)) )) ] )) ] )) ] )) ))) ]) , [ ] , + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " result__4 ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 48))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 48)) , (expr (integer 16)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 40))) ] , [ (expr Expr_Slices ( (expr Expr_TApply ( (ident " lsr_bits.0 ") , [ (targs (expr (integer 128))) ] , [ (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) ; (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 128))) ] , [ (expr Expr_Var ( (ident " Cse4__5 ") )) ; (expr (integer 128)) ] )) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 40)) )) ] )) ] )) ] )) ))) ]) , [ ] , (stmts [ ]) ))) (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 16))) ] , [ (expr Expr_Var ( (ident " Cse3__5 ") )) ; (expr (bits '0000000000010000')) ] )) , (stmts [ (stmt (assignment_stmt Stmt_Assert ( (expr Expr_TApply ( (ident " and_bool.0 ") , [ ] , [ (expr Expr_Var ( (ident " TRUE ") )) ; (expr Expr_TApply ( (ident " sle_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 16))) ] , [ (expr Expr_Var ( (ident " Cse2__5 ") )) ; (expr (bits '0000000000001000')) ] )) ; (expr (integer 32)) ] )) ; (expr (bits '00000000000000000000000010000000')) ] )) ] )) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " result__4 ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 56))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 56)) , (expr (integer 8)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 48))) ] , [ (expr Expr_Slices ( (expr Expr_TApply ( (ident " lsr_bits.0 ") , [ (targs (expr (integer 128))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) ; (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Var ( (ident " Cse2__5 ") )) ; (expr (integer 32)) ] )) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 48)) )) ] )) ] )) ] )) ))) ]) , [ ] , + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " result__4 ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 56))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 56)) , (expr (integer 8)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 48))) ] , [ (expr Expr_Slices ( (expr Expr_TApply ( (ident " lsr_bits.0 ") , [ (targs (expr (integer 128))) ] , [ (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) ; (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 128))) ] , [ (expr Expr_Var ( (ident " Cse2__5 ") )) ; (expr (integer 128)) ] )) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 48)) )) ] )) ] )) ] )) ))) ]) , [ ] , (stmts [ ]) ))) (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 16))) ] , [ (expr Expr_Var ( (ident " Cse1__5 ") )) ; (expr (bits '0000000000010000')) ] )) , (stmts [ (stmt (assignment_stmt Stmt_Assert ( (expr Expr_TApply ( (ident " and_bool.0 ") , [ ] , [ (expr Expr_Var ( (ident " TRUE ") )) ; (expr Expr_TApply ( (ident " sle_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 32))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 16))) ] , [ (expr Expr_Var ( (ident " Cse0__5 ") )) ; (expr (bits '0000000000001000')) ] )) ; (expr (integer 32)) ] )) ; (expr (bits '00000000000000000000000010000000')) ] )) ] )) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " result__4 ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 56))) ] , [ (expr Expr_Slices ( (expr Expr_TApply ( (ident " lsr_bits.0 ") , [ (targs (expr (integer 128))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) ; (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 32))) ] , [ (expr Expr_Var ( (ident " Cse0__5 ") )) ; (expr (integer 32)) ] )) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 56)) )) ] )) ] )) ))) ]) , [ ] , + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " result__4 ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 8))) ; (targs (expr (integer 56))) ] , [ (expr Expr_Slices ( (expr Expr_TApply ( (ident " lsr_bits.0 ") , [ (targs (expr (integer 128))) ] , [ (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) ; (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 128))) ] , [ (expr Expr_Var ( (ident " Cse0__5 ") )) ; (expr (integer 128)) ] )) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 8)) )) ] )) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " result__4 ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 56)) )) ] )) ] )) ))) ]) , [ ] , (stmts [ ]) ))) (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Array ( (lexpr LExpr_Var ( (ident " _Z ") )) , (expr (integer 0)) )) , (expr Expr_TApply ( (ident " ZeroExtend.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 128))) ] , [ (expr Expr_Var ( (ident " result__4 ") )) ; (expr (integer 128)) ] )) ))) (stmt (assignment_stmt Stmt_VarDecl ( (type Type_Bits ( (expr (integer 4)) )) , (ident " result__5 ") , (expr (bits '0000')) ))) @@ -363,144 +363,104 @@ tests building and running of the antlr grammar. requires java (stmt (assignment_stmt Stmt_ConstDecl ( (type Type_Bits ( (expr (integer 64)) )) , (ident " Cse42__5 ") , (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 16))) ; (targs (expr (integer 64))) ] , [ (expr Expr_Slices ( (expr Expr_Array ( (expr Expr_Var ( (ident " _Z ") )) , (expr (integer 1)) )) , [ (slice Slice_LoWd ( (expr (integer 48)) , (expr (integer 16)) )) ] )) ; (expr (integer 64)) ] )) ))) (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Bits ( (expr (integer 16)) )) , [ (ident " SignedSatQ17__5 ") ] ))) (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Constructor("boolean")) , [ (ident " SignedSatQ18__5 ") ] ))) - (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr (bits '0000000000000000000000000000000000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse43__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) ] )) , + (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr (bits '0000000000000000000000000000000000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse43__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000000000000000010000')) ] )) ] )) , (stmts [ (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ17__5 ") )) , (expr (bits '0111111111111111')) ))) ; (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ18__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , (stmts [ - (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse43__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) ; (expr (bits '1111111111111111111111111111111111111111111111111000000000000000')) ] )) , - (stmts [ - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ17__5 ") )) , (expr (bits '1000000000000000')) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ18__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , - (stmts [ - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ17__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse43__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ18__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) ]) ))) + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ17__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse43__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000000000000000010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ18__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) (stmt (conditional_stmt Stmt_If ( (expr Expr_Var ( (ident " SignedSatQ18__5 ") )) , (stmts [ (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " FPSR ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 28))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 28)) , (expr (integer 4)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 1))) ; (targs (expr (integer 27))) ] , [ (expr (bits '1')) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 27)) )) ] )) ] )) ] )) ))) ]) , [ ] , (stmts [ ]) ))) (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Bits ( (expr (integer 16)) )) , [ (ident " SignedSatQ31__5 ") ] ))) (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Constructor("boolean")) , [ (ident " SignedSatQ32__5 ") ] ))) - (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr (bits '0000000000000000000000000000000000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse36__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) ] )) , + (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr (bits '0000000000000000000000000000000000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse36__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000000000000000010000')) ] )) ] )) , (stmts [ (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ31__5 ") )) , (expr (bits '0111111111111111')) ))) ; (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ32__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , (stmts [ - (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse36__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) ; (expr (bits '1111111111111111111111111111111111111111111111111000000000000000')) ] )) , - (stmts [ - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ31__5 ") )) , (expr (bits '1000000000000000')) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ32__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , - (stmts [ - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ31__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse36__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ32__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) ]) ))) + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ31__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse36__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000000000000000010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ32__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) (stmt (conditional_stmt Stmt_If ( (expr Expr_Var ( (ident " SignedSatQ32__5 ") )) , (stmts [ (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " FPSR ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 28))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 28)) , (expr (integer 4)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 1))) ; (targs (expr (integer 27))) ] , [ (expr (bits '1')) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 27)) )) ] )) ] )) ] )) ))) ]) , [ ] , (stmts [ ]) ))) (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Bits ( (expr (integer 16)) )) , [ (ident " SignedSatQ44__5 ") ] ))) (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Constructor("boolean")) , [ (ident " SignedSatQ45__5 ") ] ))) - (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr (bits '0000000000000000000000000000000000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse30__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) ] )) , + (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr (bits '0000000000000000000000000000000000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse30__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000000000000000010000')) ] )) ] )) , (stmts [ (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ44__5 ") )) , (expr (bits '0111111111111111')) ))) ; (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ45__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , (stmts [ - (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse30__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) ; (expr (bits '1111111111111111111111111111111111111111111111111000000000000000')) ] )) , - (stmts [ - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ44__5 ") )) , (expr (bits '1000000000000000')) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ45__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , - (stmts [ - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ44__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse30__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ45__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) ]) ))) + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ44__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse30__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000000000000000010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ45__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) (stmt (conditional_stmt Stmt_If ( (expr Expr_Var ( (ident " SignedSatQ45__5 ") )) , (stmts [ (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " FPSR ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 28))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 28)) , (expr (integer 4)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 1))) ; (targs (expr (integer 27))) ] , [ (expr (bits '1')) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 27)) )) ] )) ] )) ] )) ))) ]) , [ ] , (stmts [ ]) ))) (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Bits ( (expr (integer 16)) )) , [ (ident " SignedSatQ57__5 ") ] ))) (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Constructor("boolean")) , [ (ident " SignedSatQ58__5 ") ] ))) - (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr (bits '0000000000000000000000000000000000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse24__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) ] )) , + (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr (bits '0000000000000000000000000000000000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse24__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000000000000000010000')) ] )) ] )) , (stmts [ (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ57__5 ") )) , (expr (bits '0111111111111111')) ))) ; (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ58__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , (stmts [ - (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse24__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) ; (expr (bits '1111111111111111111111111111111111111111111111111000000000000000')) ] )) , - (stmts [ - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ57__5 ") )) , (expr (bits '1000000000000000')) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ58__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , - (stmts [ - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ57__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse24__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ58__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) ]) ))) + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ57__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse24__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000000000000000010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ58__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) (stmt (conditional_stmt Stmt_If ( (expr Expr_Var ( (ident " SignedSatQ58__5 ") )) , (stmts [ (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " FPSR ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 28))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 28)) , (expr (integer 4)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 1))) ; (targs (expr (integer 27))) ] , [ (expr (bits '1')) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 27)) )) ] )) ] )) ] )) ))) ]) , [ ] , (stmts [ ]) ))) (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Bits ( (expr (integer 16)) )) , [ (ident " SignedSatQ70__5 ") ] ))) (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Constructor("boolean")) , [ (ident " SignedSatQ71__5 ") ] ))) - (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr (bits '0000000000000000000000000000000000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse18__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) ] )) , + (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr (bits '0000000000000000000000000000000000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse18__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000000000000000010000')) ] )) ] )) , (stmts [ (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ70__5 ") )) , (expr (bits '0111111111111111')) ))) ; (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ71__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , (stmts [ - (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse18__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) ; (expr (bits '1111111111111111111111111111111111111111111111111000000000000000')) ] )) , - (stmts [ - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ70__5 ") )) , (expr (bits '1000000000000000')) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ71__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , - (stmts [ - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ70__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse18__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ71__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) ]) ))) + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ70__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse18__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000000000000000010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ71__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) (stmt (conditional_stmt Stmt_If ( (expr Expr_Var ( (ident " SignedSatQ71__5 ") )) , (stmts [ (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " FPSR ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 28))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 28)) , (expr (integer 4)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 1))) ; (targs (expr (integer 27))) ] , [ (expr (bits '1')) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 27)) )) ] )) ] )) ] )) ))) ]) , [ ] , (stmts [ ]) ))) (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Bits ( (expr (integer 16)) )) , [ (ident " SignedSatQ83__5 ") ] ))) (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Constructor("boolean")) , [ (ident " SignedSatQ84__5 ") ] ))) - (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr (bits '0000000000000000000000000000000000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse12__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) ] )) , + (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr (bits '0000000000000000000000000000000000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse12__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000000000000000010000')) ] )) ] )) , (stmts [ (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ83__5 ") )) , (expr (bits '0111111111111111')) ))) ; (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ84__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , (stmts [ - (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse12__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) ; (expr (bits '1111111111111111111111111111111111111111111111111000000000000000')) ] )) , - (stmts [ - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ83__5 ") )) , (expr (bits '1000000000000000')) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ84__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , - (stmts [ - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ83__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse12__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ84__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) ]) ))) + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ83__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse12__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000000000000000010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ84__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) (stmt (conditional_stmt Stmt_If ( (expr Expr_Var ( (ident " SignedSatQ84__5 ") )) , (stmts [ (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " FPSR ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 28))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 28)) , (expr (integer 4)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 1))) ; (targs (expr (integer 27))) ] , [ (expr (bits '1')) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 27)) )) ] )) ] )) ] )) ))) ]) , [ ] , (stmts [ ]) ))) (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Bits ( (expr (integer 16)) )) , [ (ident " SignedSatQ96__5 ") ] ))) (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Constructor("boolean")) , [ (ident " SignedSatQ97__5 ") ] ))) - (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr (bits '0000000000000000000000000000000000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse6__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) ] )) , + (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr (bits '0000000000000000000000000000000000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse6__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000000000000000010000')) ] )) ] )) , (stmts [ (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ96__5 ") )) , (expr (bits '0111111111111111')) ))) ; (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ97__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , (stmts [ - (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse6__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) ; (expr (bits '1111111111111111111111111111111111111111111111111000000000000000')) ] )) , - (stmts [ - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ96__5 ") )) , (expr (bits '1000000000000000')) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ97__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , - (stmts [ - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ96__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse6__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ97__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) ]) ))) + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ96__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse6__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000000000000000010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ97__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) (stmt (conditional_stmt Stmt_If ( (expr Expr_Var ( (ident " SignedSatQ97__5 ") )) , (stmts [ (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " FPSR ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 28))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 28)) , (expr (integer 4)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 1))) ; (targs (expr (integer 27))) ] , [ (expr (bits '1')) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 27)) )) ] )) ] )) ] )) ))) ]) , [ ] , (stmts [ ]) ))) (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Bits ( (expr (integer 16)) )) , [ (ident " SignedSatQ109__5 ") ] ))) (stmt (assignment_stmt Stmt_VarDeclsNoInit ( (type Type_Constructor("boolean")) , [ (ident " SignedSatQ110__5 ") ] ))) - (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr (bits '0000000000000000000000000000000000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse0__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) ] )) , + (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr (bits '0000000000000000000000000000000000000000000000000111111111111111')) ; (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse0__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000000000000000010000')) ] )) ] )) , (stmts [ (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ109__5 ") )) , (expr (bits '0111111111111111')) ))) ; (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ110__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , (stmts [ - (stmt (conditional_stmt Stmt_If ( (expr Expr_TApply ( (ident " slt_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse0__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) ; (expr (bits '1111111111111111111111111111111111111111111111111000000000000000')) ] )) , - (stmts [ - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ109__5 ") )) , (expr (bits '1000000000000000')) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ110__5 ") )) , (expr Expr_Var ( (ident " TRUE ") )) ))) ]) , [ ] , - (stmts [ - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ109__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ; (targs (expr (integer 16))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse0__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; - (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ110__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) ]) ))) + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ109__5 ") )) , (expr Expr_Slices ( (expr Expr_TApply ( (ident " asr_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " add_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " SignExtend.0 ") , [ (targs (expr (integer 32))) ; (targs (expr (integer 64))) ] , [ (expr Expr_TApply ( (ident " mul_bits.0 ") , [ (targs (expr (integer 32))) ] , [ (expr (bits '00000000000000000000000000000010')) ; (expr Expr_Var ( (ident " Cse0__5 ") )) ] )) ; (expr (integer 64)) ] )) ; (expr Expr_Var ( (ident " Cse42__5 ") )) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000001000000000000000')) ] )) ; (expr (bits '0000000000000000000000000000000000000000000000000000000000010000')) ] )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 16)) )) ] )) ))) ; + (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " SignedSatQ110__5 ") )) , (expr Expr_Var ( (ident " FALSE ") )) ))) ]) ))) (stmt (conditional_stmt Stmt_If ( (expr Expr_Var ( (ident " SignedSatQ110__5 ") )) , (stmts [ (stmt (assignment_stmt Stmt_Assign ( (lexpr LExpr_Var ( (ident " FPSR ") )) , (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 4))) ; (targs (expr (integer 28))) ] , [ (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 28)) , (expr (integer 4)) )) ] )) ; (expr Expr_TApply ( (ident " append_bits.0 ") , [ (targs (expr (integer 1))) ; (targs (expr (integer 27))) ] , [ (expr (bits '1')) ; (expr Expr_Slices ( (expr Expr_Var ( (ident " FPSR ") )) , [ (slice Slice_LoWd ( (expr (integer 0)) , (expr (integer 27)) )) ] )) ] )) ] )) ))) ]) , [ ] , diff --git a/tests/aslt/test_cntlm.t b/tests/aslt/test_cntlm.t index 5d1c19e4..07227368 100644 --- a/tests/aslt/test_cntlm.t +++ b/tests/aslt/test_cntlm.t @@ -1409,11 +1409,11 @@ strip opcode information before passing to antlr. "0x0b437c63" Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[1;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(31,1)]);32])]);64])) "0x0b820800" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("asr_bits.0",[32;4],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);'0010'])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("asr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);'00000000000000000000000000000010'])]);64])) "0x0b850863" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("asr_bits.0",[32;4],[Expr_Slices(Expr_Array(Expr_Var("_R"),5),[Slice_LoWd(0,32)]);'0010'])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("asr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),5),[Slice_LoWd(0,32)]);'00000000000000000000000000000010'])]);64])) "0x0b882800" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("asr_bits.0",[32;8],[Expr_Slices(Expr_Array(Expr_Var("_R"),8),[Slice_LoWd(0,32)]);'00001010'])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("asr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),8),[Slice_LoWd(0,32)]);'00000000000000000000000000001010'])]);64])) "0x0e011800" Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),0),Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("append_bits.0",[8;56],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(48,8)]);Expr_TApply("append_bits.0",[8;48],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(32,8)]);Expr_TApply("append_bits.0",[8;40],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(16,8)]);Expr_TApply("append_bits.0",[8;32],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(0,8)]);Expr_TApply("append_bits.0",[8;24],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(48,8)]);Expr_TApply("append_bits.0",[8;16],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(32,8)]);Expr_TApply("append_bits.0",[8;8],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(16,8)]);Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(0,8)])])])])])])])]);128])) "0x0e040ea8" @@ -17305,69 +17305,69 @@ strip opcode information before passing to antlr. Stmt_Assign(LExpr_Array(LExpr_Var("_R"),26),'0000000000000000000000000000000000000000000000000000000000000001') ]) "0x1ac02062" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac02298" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),24),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),24),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac022e0" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac02318" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),24),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),24),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac02421" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac02422" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac02424" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),4),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),4),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac02446" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),6),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),6),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac02694" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),20),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),20),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac026b5" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),21),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),21),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac026f7" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),23),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),23),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac02701" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac02739" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),25),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),25),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac12000" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac12061" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac12063" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac12097" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),23),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),23),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac122b5" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),21),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),21),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac12400" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac12401" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac12404" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),4),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),4),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac12407" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),7),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),7),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac1240f" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),15),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),15),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac12441" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac12442" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac12444" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),4),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),4),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac12800" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("asr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("asr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac22420" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac22422" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac22423" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac2243b" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),27),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),27),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac22884" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),4),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("asr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),4),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("asr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac30821" Stmt_If(Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);'00000000000000000000000000000000']),[ Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),'0000000000000000000000000000000000000000000000000000000000000000') @@ -17375,65 +17375,65 @@ strip opcode information before passing to antlr. Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_TApply("sdiv_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);64])]),[Slice_LoWd(0,32)]);64])) ]) "0x1ac322e3" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac32401" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac32403" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac32420" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac32421" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac32422" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac32423" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac32428" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),8),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),8),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac32442" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac42400" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac42401" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac42407" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),7),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),7),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac42408" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),8),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),8),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac42420" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac42460" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac42463" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac42821" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("asr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("asr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac42842" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("asr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("asr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac5231a" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),26),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),5),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),26),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),5),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac52441" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),5),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),5),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac52444" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),4),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),5),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),4),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),5),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac52445" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),5),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),5),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),5),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),5),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac52523" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),9),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),5),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),9),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),5),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac62400" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac62401" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac62440" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac62442" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac62465" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),5),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),5),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac72464" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),4),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),7),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),4),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),7),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac72465" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),5),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),7),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),5),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),7),[Slice_LoWd(0,5)]);32])]);64])) "0x1ac809e1" Stmt_If(Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),8),[Slice_LoWd(0,32)]);'00000000000000000000000000000000']),[ Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),'0000000000000000000000000000000000000000000000000000000000000000') @@ -17441,13 +17441,13 @@ strip opcode information before passing to antlr. Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_TApply("sdiv_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),15),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),8),[Slice_LoWd(0,32)]);64])]),[Slice_LoWd(0,32)]);64])) ]) "0x1ac82401" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),8),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),8),[Slice_LoWd(0,5)]);32])]);64])) "0x1acd2000" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),13),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),13),[Slice_LoWd(0,5)]);32])]);64])) "0x1acd2044" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),4),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),13),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),4),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),13),[Slice_LoWd(0,5)]);32])]);64])) "0x1ad02631" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),17),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),17),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),16),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),17),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),17),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),16),[Slice_LoWd(0,5)]);32])]);64])) "0x1ad30842" Stmt_If(Expr_TApply("eq_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);'00000000000000000000000000000000']),[ Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),'0000000000000000000000000000000000000000000000000000000000000000') @@ -17461,39 +17461,39 @@ strip opcode information before passing to antlr. Stmt_Assign(LExpr_Array(LExpr_Var("_R"),4),Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_TApply("sdiv_bits.0",[64],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);64]);Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);64])]),[Slice_LoWd(0,32)]);64])) ]) "0x1ad32000" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,5)]);32])]);64])) "0x1ad42063" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,5)]);32])]);64])) "0x1ad42273" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),19),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),19),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),19),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,5)]);32])]);64])) "0x1ad422d6" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),22),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),22),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,5)]);32])]);64])) "0x1ad42400" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,5)]);32])]);64])) "0x1ad42414" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),20),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),20),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,5)]);32])]);64])) "0x1ad42421" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,5)]);32])]);64])) "0x1ad622b5" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),21),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),21),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),21),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,5)]);32])]);64])) "0x1ad722d6" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),22),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),22),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,5)]);32])]);64])) "0x1ad726d6" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),22),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),22),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,5)]);32])]);64])) "0x1ad72ad6" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),22),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("asr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),22),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("asr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),23),[Slice_LoWd(0,5)]);32])]);64])) "0x1adb201a" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),26),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),26),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,5)]);32])]);64])) "0x1adb229a" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),26),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),26),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,5)]);32])]);64])) "0x1adb275b" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),27),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),26),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),27),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),26),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),27),[Slice_LoWd(0,5)]);32])]);64])) "0x1adc229a" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),26),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),28),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),26),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),28),[Slice_LoWd(0,5)]);32])]);64])) "0x1adc22d6" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),22),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),28),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),22),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("lsl_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),28),[Slice_LoWd(0,5)]);32])]);64])) "0x1adc2ad6" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),22),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("asr_bits.0",[32;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;10],[Expr_Slices(Expr_Array(Expr_Var("_R"),28),[Slice_LoWd(0,5)]);10])]);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),22),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("asr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,32)]);Expr_TApply("ZeroExtend.0",[5;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),28),[Slice_LoWd(0,5)]);32])]);64])) "0x1b007e94" Stmt_Assign(LExpr_Array(LExpr_Var("_R"),20),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),20),[Slice_LoWd(0,32)]);Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)])]);64])) "0x1b014c61" @@ -21133,17 +21133,17 @@ strip opcode information before passing to antlr. "0x2f07e601" Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),1),'00000000000000000000000000000000000000000000000000000000000000001111111111111111111111111111111100000000000000000000000000000000') "0x2f280400" - Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),0),Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("append_bits.0",[32;32],[Expr_Slices(Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(32,32)]);64]);'0000000000011000']),[Slice_LoWd(0,32)]);Expr_Slices(Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(0,32)]);64]);'0000000000011000']),[Slice_LoWd(0,32)])]);128])) + Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),0),Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("append_bits.0",[32;32],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(32,32)]);'00000000000000000000000000011000']);Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(0,32)]);'00000000000000000000000000011000'])]);128])) "0x2f280424" - Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),4),Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("append_bits.0",[32;32],[Expr_Slices(Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(32,32)]);64]);'0000000000011000']),[Slice_LoWd(0,32)]);Expr_Slices(Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(0,32)]);64]);'0000000000011000']),[Slice_LoWd(0,32)])]);128])) + Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),4),Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("append_bits.0",[32;32],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(32,32)]);'00000000000000000000000000011000']);Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(0,32)]);'00000000000000000000000000011000'])]);128])) "0x2f300423" - Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),3),Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("append_bits.0",[32;32],[Expr_Slices(Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(32,32)]);64]);'0000000000010000']),[Slice_LoWd(0,32)]);Expr_Slices(Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(0,32)]);64]);'0000000000010000']),[Slice_LoWd(0,32)])]);128])) + Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),3),Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("append_bits.0",[32;32],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(32,32)]);'00000000000000000000000000010000']);Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(0,32)]);'00000000000000000000000000010000'])]);128])) "0x2f300446" - Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),6),Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("append_bits.0",[32;32],[Expr_Slices(Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_Z"),2),[Slice_LoWd(32,32)]);64]);'0000000000010000']),[Slice_LoWd(0,32)]);Expr_Slices(Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_Z"),2),[Slice_LoWd(0,32)]);64]);'0000000000010000']),[Slice_LoWd(0,32)])]);128])) + Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),6),Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("append_bits.0",[32;32],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_Z"),2),[Slice_LoWd(32,32)]);'00000000000000000000000000010000']);Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_Z"),2),[Slice_LoWd(0,32)]);'00000000000000000000000000010000'])]);128])) "0x2f380422" - Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),2),Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("append_bits.0",[32;32],[Expr_Slices(Expr_TApply("asr_bits.0",[64;8],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(32,32)]);64]);'00001000']),[Slice_LoWd(0,32)]);Expr_Slices(Expr_TApply("asr_bits.0",[64;8],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(0,32)]);64]);'00001000']),[Slice_LoWd(0,32)])]);128])) + Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),2),Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("append_bits.0",[32;32],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(32,32)]);'00000000000000000000000000001000']);Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(0,32)]);'00000000000000000000000000001000'])]);128])) "0x2f380445" - Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),5),Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("append_bits.0",[32;32],[Expr_Slices(Expr_TApply("asr_bits.0",[64;8],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_Z"),2),[Slice_LoWd(32,32)]);64]);'00001000']),[Slice_LoWd(0,32)]);Expr_Slices(Expr_TApply("asr_bits.0",[64;8],[Expr_TApply("ZeroExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_Z"),2),[Slice_LoWd(0,32)]);64]);'00001000']),[Slice_LoWd(0,32)])]);128])) + Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),5),Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("append_bits.0",[32;32],[Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_Z"),2),[Slice_LoWd(32,32)]);'00000000000000000000000000001000']);Expr_TApply("lsr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_Z"),2),[Slice_LoWd(0,32)]);'00000000000000000000000000001000'])]);128])) "0x3100041f" Stmt_ConstDecl(Type_Bits(32),"Cse0__5",Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'00000000000000000000000000000001'])) Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Var("Cse0__5");64]);Expr_TApply("add_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);64]);'0000000000000000000000000000000000000000000000000000000000000001'])])])])) @@ -43234,21 +43234,21 @@ strip opcode information before passing to antlr. "0x4b440fe3" Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_TApply("not_bits.0",[32],[Expr_TApply("ZeroExtend.0",[29;32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(3,29)]);32])]);'00000000000000000000000000000001']);64])) "0x4b807c20" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_TApply("asr_bits.0",[32;16],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'0000000000011111'])])]);'00000000000000000000000000000001']);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_TApply("asr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'00000000000000000000000000011111'])])]);'00000000000000000000000000000001']);64])) "0x4b807cc6" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),6),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_TApply("asr_bits.0",[32;16],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'0000000000011111'])])]);'00000000000000000000000000000001']);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),6),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_TApply("asr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);'00000000000000000000000000011111'])])]);'00000000000000000000000000000001']);64])) "0x4b817c42" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_TApply("asr_bits.0",[32;16],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);'0000000000011111'])])]);'00000000000000000000000000000001']);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_TApply("asr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);'00000000000000000000000000011111'])])]);'00000000000000000000000000000001']);64])) "0x4b817c63" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_TApply("asr_bits.0",[32;16],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);'0000000000011111'])])]);'00000000000000000000000000000001']);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_TApply("asr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);'00000000000000000000000000011111'])])]);'00000000000000000000000000000001']);64])) "0x4b827c21" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_TApply("asr_bits.0",[32;16],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);'0000000000011111'])])]);'00000000000000000000000000000001']);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_TApply("asr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,32)]);'00000000000000000000000000011111'])])]);'00000000000000000000000000000001']);64])) "0x4b837c00" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_TApply("asr_bits.0",[32;16],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);'0000000000011111'])])]);'00000000000000000000000000000001']);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_TApply("asr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),3),[Slice_LoWd(0,32)]);'00000000000000000000000000011111'])])]);'00000000000000000000000000000001']);64])) "0x4b847c21" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_TApply("asr_bits.0",[32;16],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);'0000000000011111'])])]);'00000000000000000000000000000001']);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_TApply("asr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);'00000000000000000000000000011111'])])]);'00000000000000000000000000000001']);64])) "0x4b867c84" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),4),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_TApply("asr_bits.0",[32;16],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,32)]);'0000000000011111'])])]);'00000000000000000000000000000001']);64])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),4),Expr_TApply("ZeroExtend.0",[32;64],[Expr_TApply("add_bits.0",[32],[Expr_TApply("add_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),4),[Slice_LoWd(0,32)]);Expr_TApply("not_bits.0",[32],[Expr_TApply("asr_bits.0",[32],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,32)]);'00000000000000000000000000011111'])])]);'00000000000000000000000000000001']);64])) "0x4cdf0860" Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),0),Expr_TApply("append_bits.0",[96;32],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(32,96)]);Expr_TApply("Mem.read.0",[4],[Expr_Array(Expr_Var("_R"),3);4;1])])) Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),1),Expr_TApply("append_bits.0",[96;32],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(32,96)]);Expr_TApply("Mem.read.0",[4],[Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),3);'0000000000000000000000000000000000000000000000000000000000000100']);4;1])])) @@ -43357,67 +43357,67 @@ strip opcode information before passing to antlr. Stmt_Assign(LExpr_Var("result__4"),'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000') Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse32__5");'0000000000100000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse31__5");'0000000000001000']);32]);'00000000000000000000000100000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("ZeroExtend.0",[8;128],[Expr_Slices(Expr_TApply("lsr_bits.0",[256;32],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse31__5");32])]),[Slice_LoWd(0,8)]);128])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("ZeroExtend.0",[8;128],[Expr_Slices(Expr_TApply("lsr_bits.0",[256],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;256],[Expr_Var("Cse31__5");256])]),[Slice_LoWd(0,8)]);128])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse30__5");'0000000000100000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse28__5");'0000000000001000']);32]);'00000000000000000000000100000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[112;16],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(16,112)]);Expr_TApply("append_bits.0",[8;8],[Expr_Slices(Expr_TApply("lsr_bits.0",[256;32],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse28__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,8)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[112;16],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(16,112)]);Expr_TApply("append_bits.0",[8;8],[Expr_Slices(Expr_TApply("lsr_bits.0",[256],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;256],[Expr_Var("Cse28__5");256])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,8)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse27__5");'0000000000100000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse26__5");'0000000000001000']);32]);'00000000000000000000000100000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[104;24],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(24,104)]);Expr_TApply("append_bits.0",[8;16],[Expr_Slices(Expr_TApply("lsr_bits.0",[256;32],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse26__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,16)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[104;24],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(24,104)]);Expr_TApply("append_bits.0",[8;16],[Expr_Slices(Expr_TApply("lsr_bits.0",[256],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;256],[Expr_Var("Cse26__5");256])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,16)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse25__5");'0000000000100000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse24__5");'0000000000001000']);32]);'00000000000000000000000100000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[96;32],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(32,96)]);Expr_TApply("append_bits.0",[8;24],[Expr_Slices(Expr_TApply("lsr_bits.0",[256;32],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse24__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,24)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[96;32],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(32,96)]);Expr_TApply("append_bits.0",[8;24],[Expr_Slices(Expr_TApply("lsr_bits.0",[256],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;256],[Expr_Var("Cse24__5");256])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,24)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse23__5");'0000000000100000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse22__5");'0000000000001000']);32]);'00000000000000000000000100000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[88;40],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(40,88)]);Expr_TApply("append_bits.0",[8;32],[Expr_Slices(Expr_TApply("lsr_bits.0",[256;32],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse22__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,32)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[88;40],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(40,88)]);Expr_TApply("append_bits.0",[8;32],[Expr_Slices(Expr_TApply("lsr_bits.0",[256],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;256],[Expr_Var("Cse22__5");256])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,32)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse21__5");'0000000000100000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse20__5");'0000000000001000']);32]);'00000000000000000000000100000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[80;48],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(48,80)]);Expr_TApply("append_bits.0",[8;40],[Expr_Slices(Expr_TApply("lsr_bits.0",[256;32],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse20__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,40)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[80;48],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(48,80)]);Expr_TApply("append_bits.0",[8;40],[Expr_Slices(Expr_TApply("lsr_bits.0",[256],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;256],[Expr_Var("Cse20__5");256])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,40)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse19__5");'0000000000100000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse18__5");'0000000000001000']);32]);'00000000000000000000000100000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[72;56],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(56,72)]);Expr_TApply("append_bits.0",[8;48],[Expr_Slices(Expr_TApply("lsr_bits.0",[256;32],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse18__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,48)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[72;56],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(56,72)]);Expr_TApply("append_bits.0",[8;48],[Expr_Slices(Expr_TApply("lsr_bits.0",[256],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;256],[Expr_Var("Cse18__5");256])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,48)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse17__5");'0000000000100000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse16__5");'0000000000001000']);32]);'00000000000000000000000100000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[64;64],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(64,64)]);Expr_TApply("append_bits.0",[8;56],[Expr_Slices(Expr_TApply("lsr_bits.0",[256;32],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse16__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,56)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[64;64],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(64,64)]);Expr_TApply("append_bits.0",[8;56],[Expr_Slices(Expr_TApply("lsr_bits.0",[256],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;256],[Expr_Var("Cse16__5");256])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,56)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse15__5");'0000000000100000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse14__5");'0000000000001000']);32]);'00000000000000000000000100000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[56;72],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(72,56)]);Expr_TApply("append_bits.0",[8;64],[Expr_Slices(Expr_TApply("lsr_bits.0",[256;32],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse14__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,64)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[56;72],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(72,56)]);Expr_TApply("append_bits.0",[8;64],[Expr_Slices(Expr_TApply("lsr_bits.0",[256],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;256],[Expr_Var("Cse14__5");256])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,64)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse13__5");'0000000000100000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse12__5");'0000000000001000']);32]);'00000000000000000000000100000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[48;80],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(80,48)]);Expr_TApply("append_bits.0",[8;72],[Expr_Slices(Expr_TApply("lsr_bits.0",[256;32],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse12__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,72)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[48;80],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(80,48)]);Expr_TApply("append_bits.0",[8;72],[Expr_Slices(Expr_TApply("lsr_bits.0",[256],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;256],[Expr_Var("Cse12__5");256])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,72)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse11__5");'0000000000100000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse10__5");'0000000000001000']);32]);'00000000000000000000000100000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[40;88],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(88,40)]);Expr_TApply("append_bits.0",[8;80],[Expr_Slices(Expr_TApply("lsr_bits.0",[256;32],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse10__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,80)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[40;88],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(88,40)]);Expr_TApply("append_bits.0",[8;80],[Expr_Slices(Expr_TApply("lsr_bits.0",[256],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;256],[Expr_Var("Cse10__5");256])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,80)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse9__5");'0000000000100000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse8__5");'0000000000001000']);32]);'00000000000000000000000100000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[32;96],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(96,32)]);Expr_TApply("append_bits.0",[8;88],[Expr_Slices(Expr_TApply("lsr_bits.0",[256;32],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse8__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,88)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[32;96],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(96,32)]);Expr_TApply("append_bits.0",[8;88],[Expr_Slices(Expr_TApply("lsr_bits.0",[256],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;256],[Expr_Var("Cse8__5");256])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,88)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse7__5");'0000000000100000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse6__5");'0000000000001000']);32]);'00000000000000000000000100000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[24;104],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(104,24)]);Expr_TApply("append_bits.0",[8;96],[Expr_Slices(Expr_TApply("lsr_bits.0",[256;32],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse6__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,96)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[24;104],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(104,24)]);Expr_TApply("append_bits.0",[8;96],[Expr_Slices(Expr_TApply("lsr_bits.0",[256],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;256],[Expr_Var("Cse6__5");256])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,96)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse5__5");'0000000000100000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse4__5");'0000000000001000']);32]);'00000000000000000000000100000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[16;112],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(112,16)]);Expr_TApply("append_bits.0",[8;104],[Expr_Slices(Expr_TApply("lsr_bits.0",[256;32],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse4__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,104)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[16;112],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(112,16)]);Expr_TApply("append_bits.0",[8;104],[Expr_Slices(Expr_TApply("lsr_bits.0",[256],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;256],[Expr_Var("Cse4__5");256])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,104)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse3__5");'0000000000100000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse2__5");'0000000000001000']);32]);'00000000000000000000000100000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[8;120],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(120,8)]);Expr_TApply("append_bits.0",[8;112],[Expr_Slices(Expr_TApply("lsr_bits.0",[256;32],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse2__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,112)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[8;120],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(120,8)]);Expr_TApply("append_bits.0",[8;112],[Expr_Slices(Expr_TApply("lsr_bits.0",[256],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;256],[Expr_Var("Cse2__5");256])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,112)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse1__5");'0000000000100000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse0__5");'0000000000001000']);32]);'00000000000000000000000100000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[8;120],[Expr_Slices(Expr_TApply("lsr_bits.0",[256;32],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse0__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,120)])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[8;120],[Expr_Slices(Expr_TApply("lsr_bits.0",[256],[Expr_Var("Cse29__5");Expr_TApply("ZeroExtend.0",[16;256],[Expr_Var("Cse0__5");256])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,120)])])) ],[],[]) Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),2),Expr_Var("result__4")) "0x4e071c00" @@ -78549,7 +78549,7 @@ strip opcode information before passing to antlr. "0x5ef1b880" Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),0),Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Slices(Expr_Array(Expr_Var("_Z"),4),[Slice_LoWd(0,64)]);Expr_Slices(Expr_Array(Expr_Var("_Z"),4),[Slice_LoWd(64,64)])]);128])) "0x5f780400" - Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),0),Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("asr_bits.0",[64;8],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(0,64)]);'00001000']);128])) + Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),0),Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("asr_bits.0",[64],[Expr_Slices(Expr_Array(Expr_Var("_Z"),0),[Slice_LoWd(0,64)]);'0000000000000000000000000000000000000000000000000000000000001000']);128])) "0x6a00003f" Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),'0') Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),'0') @@ -87619,9 +87619,9 @@ strip opcode information before passing to antlr. "0x8b5c0b5a" Stmt_Assign(LExpr_Array(LExpr_Var("_R"),26),Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),26);Expr_TApply("ZeroExtend.0",[62;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),28),[Slice_LoWd(2,62)]);64])])) "0x8b810c41" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),2);Expr_TApply("asr_bits.0",[64;4],[Expr_Array(Expr_Var("_R"),1);'0011'])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),2);Expr_TApply("asr_bits.0",[64],[Expr_Array(Expr_Var("_R"),1);'0000000000000000000000000000000000000000000000000000000000000011'])])) "0x8b8112a1" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),21);Expr_TApply("asr_bits.0",[64;8],[Expr_Array(Expr_Var("_R"),1);'00000100'])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),21);Expr_TApply("asr_bits.0",[64],[Expr_Array(Expr_Var("_R"),1);'0000000000000000000000000000000000000000000000000000000000000100'])])) "0x90000000" Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("append_bits.0",[52;12],[Expr_Slices(Expr_Var("_PC"),[Slice_LoWd(12,52)]);'000000000000'])) "0x90000001" @@ -126215,29 +126215,29 @@ strip opcode information before passing to antlr. Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),'0000000000000000000000000000000000000000000000000000000000000000') ]) "0x9ac02080" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("lsl_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),4);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("lsl_bits.0",[64],[Expr_Array(Expr_Var("_R"),4);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,6)]);64])])) "0x9ac02420" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("lsr_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),1);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("lsr_bits.0",[64],[Expr_Array(Expr_Var("_R"),1);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,6)]);64])])) "0x9ac02560" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("lsr_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),11);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("lsr_bits.0",[64],[Expr_Array(Expr_Var("_R"),11);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,6)]);64])])) "0x9ac02720" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("lsr_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),25);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("lsr_bits.0",[64],[Expr_Array(Expr_Var("_R"),25);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),0),[Slice_LoWd(0,6)]);64])])) "0x9ac12000" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("lsl_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),0);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("lsl_bits.0",[64],[Expr_Array(Expr_Var("_R"),0);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,6)]);64])])) "0x9ac12043" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("lsl_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),2);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),3),Expr_TApply("lsl_bits.0",[64],[Expr_Array(Expr_Var("_R"),2);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,6)]);64])])) "0x9ac12061" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("lsl_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),3);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("lsl_bits.0",[64],[Expr_Array(Expr_Var("_R"),3);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,6)]);64])])) "0x9ac12400" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("lsr_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),0);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("lsr_bits.0",[64],[Expr_Array(Expr_Var("_R"),0);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,6)]);64])])) "0x9ac12461" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("lsr_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),3);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("lsr_bits.0",[64],[Expr_Array(Expr_Var("_R"),3);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,6)]);64])])) "0x9ac12861" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("asr_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),3);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("asr_bits.0",[64],[Expr_Array(Expr_Var("_R"),3);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),1),[Slice_LoWd(0,6)]);64])])) "0x9ac22462" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("lsr_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),3);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("lsr_bits.0",[64],[Expr_Array(Expr_Var("_R"),3);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,6)]);64])])) "0x9ac22562" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("lsr_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),11);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("lsr_bits.0",[64],[Expr_Array(Expr_Var("_R"),11);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),2),[Slice_LoWd(0,6)]);64])])) "0x9ac30842" Stmt_If(Expr_TApply("eq_bits.0",[64],[Expr_Array(Expr_Var("_R"),3);'0000000000000000000000000000000000000000000000000000000000000000']),[ Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),'0000000000000000000000000000000000000000000000000000000000000000') @@ -126245,17 +126245,17 @@ strip opcode information before passing to antlr. Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_Slices(Expr_TApply("sdiv_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),2);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),3);128])]),[Slice_LoWd(0,64)])) ]) "0x9ac62042" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("lsl_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),2);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),2),Expr_TApply("lsl_bits.0",[64],[Expr_Array(Expr_Var("_R"),2);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,6)]);64])])) "0x9ac62126" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),6),Expr_TApply("lsl_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),9);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),6),Expr_TApply("lsl_bits.0",[64],[Expr_Array(Expr_Var("_R"),9);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),6),[Slice_LoWd(0,6)]);64])])) "0x9ac92400" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("lsr_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),0);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),9),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),0),Expr_TApply("lsr_bits.0",[64],[Expr_Array(Expr_Var("_R"),0);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),9),[Slice_LoWd(0,6)]);64])])) "0x9ad622a1" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("lsl_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),21);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("lsl_bits.0",[64],[Expr_Array(Expr_Var("_R"),21);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),22),[Slice_LoWd(0,6)]);64])])) "0x9ad8235a" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),26),Expr_TApply("lsl_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),26);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),26),Expr_TApply("lsl_bits.0",[64],[Expr_Array(Expr_Var("_R"),26);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),24),[Slice_LoWd(0,6)]);64])])) "0x9ad92356" - Stmt_Assign(LExpr_Array(LExpr_Var("_R"),22),Expr_TApply("lsl_bits.0",[64;12],[Expr_Array(Expr_Var("_R"),26);Expr_TApply("ZeroExtend.0",[6;12],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,6)]);12])])) + Stmt_Assign(LExpr_Array(LExpr_Var("_R"),22),Expr_TApply("lsl_bits.0",[64],[Expr_Array(Expr_Var("_R"),26);Expr_TApply("ZeroExtend.0",[6;64],[Expr_Slices(Expr_Array(Expr_Var("_R"),25),[Slice_LoWd(0,6)]);64])])) "0x9b027c21" Stmt_Assign(LExpr_Array(LExpr_Var("_R"),1),Expr_TApply("mul_bits.0",[64],[Expr_Array(Expr_Var("_R"),1);Expr_Array(Expr_Var("_R"),2)])) "0x9b030819" @@ -149455,8 +149455,8 @@ strip opcode information before passing to antlr. Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])) Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"N"),Expr_Slices(Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']),[Slice_LoWd(63,1)])) "0xeb80283f" - Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("asr_bits.0",[64;8],[Expr_Array(Expr_Var("_R"),0);'00001010'])) - Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),1);Expr_TApply("not_bits.0",[64],[Expr_TApply("asr_bits.0",[64;8],[Expr_Array(Expr_Var("_R"),0);'00001010'])])])) + Stmt_ConstDecl(Type_Bits(64),"Cse2__5",Expr_TApply("asr_bits.0",[64],[Expr_Array(Expr_Var("_R"),0);'0000000000000000000000000000000000000000000000000000000000001010'])) + Stmt_ConstDecl(Type_Bits(64),"Cse0__5",Expr_TApply("add_bits.0",[64],[Expr_Array(Expr_Var("_R"),1);Expr_TApply("not_bits.0",[64],[Expr_TApply("asr_bits.0",[64],[Expr_Array(Expr_Var("_R"),0);'0000000000000000000000000000000000000000000000000000000000001010'])])])) Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"V"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("SignExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),1);128]);Expr_TApply("SignExtend.0",[64;128],[Expr_TApply("not_bits.0",[64],[Expr_Var("Cse2__5")]);128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])) Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"C"),Expr_TApply("not_bits.0",[1],[Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);128]);Expr_TApply("add_bits.0",[128],[Expr_TApply("add_bits.0",[128],[Expr_TApply("ZeroExtend.0",[64;128],[Expr_Array(Expr_Var("_R"),1);128]);Expr_TApply("ZeroExtend.0",[64;128],[Expr_TApply("not_bits.0",[64],[Expr_Var("Cse2__5")]);128])]);'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001'])])])])) Stmt_Assign(LExpr_Field(LExpr_Var("PSTATE"),"Z"),Expr_TApply("cvt_bool_bv.0",[],[Expr_TApply("eq_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_Var("Cse0__5");'0000000000000000000000000000000000000000000000000000000000000001']);'0000000000000000000000000000000000000000000000000000000000000000'])])) diff --git a/tests/aslt/test_cntlm_vec.t b/tests/aslt/test_cntlm_vec.t index 0e870663..8a5f19c6 100644 --- a/tests/aslt/test_cntlm_vec.t +++ b/tests/aslt/test_cntlm_vec.t @@ -93,40 +93,28 @@ __array _Z [ 0 ] = '00000000000000000000000000000000000000000000000000000000000000001111111101111111111111111111111111111111011111111111111111111111' ; "0x2f280400" Decoding instruction A64 2f280400 - constant bits ( 128 ) Exp7__5 = __array _Z [ 0 ] ; bits ( 64 ) result__4 ; - result__4 = add_vec.0 {{ 2,32 }} ( '0000000000000000000000000000000000000000000000000000000000000000',trunc_vec.0 {{ 2,32,64 }} ( asr_vec.0 {{ 2,64 }} ( zcast_vec.0 {{ 2,64,32 }} ( Exp7__5 [ 0 +: 64 ],2,64 ),scast_vec.0 {{ 2,64,16 }} ( replicate_bits.0 {{ 16,2 }} ( '0000000000011000',2 ),2,64 ),2 ),2,32 ),2 ) ; - __array _Z [ 0 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; + __array _Z [ 0 ] = ZeroExtend.0 {{ 64,128 }} ( Elem.set.0 {{ 64,32 }} ( Elem.set.0 {{ 64,32 }} ( result__4,0,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 0 ] [ 0 +: 64 ],0,32 ),'00000000000000000000000000011000' ) ),1,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 0 ] [ 0 +: 64 ],1,32 ),'00000000000000000000000000011000' ) ),128 ) ; "0x2f280424" Decoding instruction A64 2f280424 - constant bits ( 128 ) Exp7__5 = __array _Z [ 1 ] ; bits ( 64 ) result__4 ; - result__4 = add_vec.0 {{ 2,32 }} ( '0000000000000000000000000000000000000000000000000000000000000000',trunc_vec.0 {{ 2,32,64 }} ( asr_vec.0 {{ 2,64 }} ( zcast_vec.0 {{ 2,64,32 }} ( Exp7__5 [ 0 +: 64 ],2,64 ),scast_vec.0 {{ 2,64,16 }} ( replicate_bits.0 {{ 16,2 }} ( '0000000000011000',2 ),2,64 ),2 ),2,32 ),2 ) ; - __array _Z [ 4 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; + __array _Z [ 4 ] = ZeroExtend.0 {{ 64,128 }} ( Elem.set.0 {{ 64,32 }} ( Elem.set.0 {{ 64,32 }} ( result__4,0,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 1 ] [ 0 +: 64 ],0,32 ),'00000000000000000000000000011000' ) ),1,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 1 ] [ 0 +: 64 ],1,32 ),'00000000000000000000000000011000' ) ),128 ) ; "0x2f300423" Decoding instruction A64 2f300423 - constant bits ( 128 ) Exp7__5 = __array _Z [ 1 ] ; bits ( 64 ) result__4 ; - result__4 = add_vec.0 {{ 2,32 }} ( '0000000000000000000000000000000000000000000000000000000000000000',trunc_vec.0 {{ 2,32,64 }} ( asr_vec.0 {{ 2,64 }} ( zcast_vec.0 {{ 2,64,32 }} ( Exp7__5 [ 0 +: 64 ],2,64 ),scast_vec.0 {{ 2,64,16 }} ( replicate_bits.0 {{ 16,2 }} ( '0000000000010000',2 ),2,64 ),2 ),2,32 ),2 ) ; - __array _Z [ 3 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; + __array _Z [ 3 ] = ZeroExtend.0 {{ 64,128 }} ( Elem.set.0 {{ 64,32 }} ( Elem.set.0 {{ 64,32 }} ( result__4,0,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 1 ] [ 0 +: 64 ],0,32 ),'00000000000000000000000000010000' ) ),1,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 1 ] [ 0 +: 64 ],1,32 ),'00000000000000000000000000010000' ) ),128 ) ; "0x2f300446" Decoding instruction A64 2f300446 - constant bits ( 128 ) Exp7__5 = __array _Z [ 2 ] ; bits ( 64 ) result__4 ; - result__4 = add_vec.0 {{ 2,32 }} ( '0000000000000000000000000000000000000000000000000000000000000000',trunc_vec.0 {{ 2,32,64 }} ( asr_vec.0 {{ 2,64 }} ( zcast_vec.0 {{ 2,64,32 }} ( Exp7__5 [ 0 +: 64 ],2,64 ),scast_vec.0 {{ 2,64,16 }} ( replicate_bits.0 {{ 16,2 }} ( '0000000000010000',2 ),2,64 ),2 ),2,32 ),2 ) ; - __array _Z [ 6 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; + __array _Z [ 6 ] = ZeroExtend.0 {{ 64,128 }} ( Elem.set.0 {{ 64,32 }} ( Elem.set.0 {{ 64,32 }} ( result__4,0,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 2 ] [ 0 +: 64 ],0,32 ),'00000000000000000000000000010000' ) ),1,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 2 ] [ 0 +: 64 ],1,32 ),'00000000000000000000000000010000' ) ),128 ) ; "0x2f380422" Decoding instruction A64 2f380422 - constant bits ( 128 ) Exp7__5 = __array _Z [ 1 ] ; bits ( 64 ) result__4 ; - result__4 = add_vec.0 {{ 2,32 }} ( '0000000000000000000000000000000000000000000000000000000000000000',trunc_vec.0 {{ 2,32,64 }} ( asr_vec.0 {{ 2,64 }} ( zcast_vec.0 {{ 2,64,32 }} ( Exp7__5 [ 0 +: 64 ],2,64 ),scast_vec.0 {{ 2,64,8 }} ( replicate_bits.0 {{ 8,2 }} ( '00001000',2 ),2,64 ),2 ),2,32 ),2 ) ; - __array _Z [ 2 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; + __array _Z [ 2 ] = ZeroExtend.0 {{ 64,128 }} ( Elem.set.0 {{ 64,32 }} ( Elem.set.0 {{ 64,32 }} ( result__4,0,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 1 ] [ 0 +: 64 ],0,32 ),'00000000000000000000000000001000' ) ),1,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 1 ] [ 0 +: 64 ],1,32 ),'00000000000000000000000000001000' ) ),128 ) ; "0x2f380445" Decoding instruction A64 2f380445 - constant bits ( 128 ) Exp7__5 = __array _Z [ 2 ] ; bits ( 64 ) result__4 ; - result__4 = add_vec.0 {{ 2,32 }} ( '0000000000000000000000000000000000000000000000000000000000000000',trunc_vec.0 {{ 2,32,64 }} ( asr_vec.0 {{ 2,64 }} ( zcast_vec.0 {{ 2,64,32 }} ( Exp7__5 [ 0 +: 64 ],2,64 ),scast_vec.0 {{ 2,64,8 }} ( replicate_bits.0 {{ 8,2 }} ( '00001000',2 ),2,64 ),2 ),2,32 ),2 ) ; - __array _Z [ 5 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; + __array _Z [ 5 ] = ZeroExtend.0 {{ 64,128 }} ( Elem.set.0 {{ 64,32 }} ( Elem.set.0 {{ 64,32 }} ( result__4,0,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 2 ] [ 0 +: 64 ],0,32 ),'00000000000000000000000000001000' ) ),1,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 2 ] [ 0 +: 64 ],1,32 ),'00000000000000000000000000001000' ) ),128 ) ; "0x4cdf0860" Decoding instruction A64 4cdf0860 __array _Z [ 0 ] = Elem.set.0 {{ 128,32 }} ( __array _Z [ 0 ],0,32,Mem.read.0 {{ 4 }} ( __array _R [ 3 ],4,1 ) ) ; diff --git a/tests/aslt/test_dis.t b/tests/aslt/test_dis.t index aa1812cb..62330a08 100644 --- a/tests/aslt/test_dis.t +++ b/tests/aslt/test_dis.t @@ -93,35 +93,35 @@ run asli with these commands result__4 = '0000000000000000000000000000000000000000000000000000000000000000' ; if slt_bits.0 {{ 16 }} ( Cse15__5,'0000000000010000' ) then { assert and_bool.0 {{ }} ( TRUE,sle_bits.0 {{ 32 }} ( ZeroExtend.0 {{ 16,32 }} ( add_bits.0 {{ 16 }} ( Cse14__5,'0000000000001000' ),32 ),'00000000000000000000000010000000' ) ) ; - result__4 = ZeroExtend.0 {{ 8,64 }} ( lsr_bits.0 {{ 128,32 }} ( __array _Z [ 0 ],ZeroExtend.0 {{ 16,32 }} ( Cse14__5,32 ) ) [ 0 +: 8 ],64 ) ; + result__4 = ZeroExtend.0 {{ 8,64 }} ( lsr_bits.0 {{ 128 }} ( __array _Z [ 0 ],ZeroExtend.0 {{ 16,128 }} ( Cse14__5,128 ) ) [ 0 +: 8 ],64 ) ; } if slt_bits.0 {{ 16 }} ( Cse13__5,'0000000000010000' ) then { assert and_bool.0 {{ }} ( TRUE,sle_bits.0 {{ 32 }} ( ZeroExtend.0 {{ 16,32 }} ( add_bits.0 {{ 16 }} ( Cse12__5,'0000000000001000' ),32 ),'00000000000000000000000010000000' ) ) ; - result__4 = append_bits.0 {{ 48,16 }} ( result__4 [ 16 +: 48 ],append_bits.0 {{ 8,8 }} ( lsr_bits.0 {{ 128,32 }} ( __array _Z [ 0 ],ZeroExtend.0 {{ 16,32 }} ( Cse12__5,32 ) ) [ 0 +: 8 ],result__4 [ 0 +: 8 ] ) ) ; + result__4 = append_bits.0 {{ 48,16 }} ( result__4 [ 16 +: 48 ],append_bits.0 {{ 8,8 }} ( lsr_bits.0 {{ 128 }} ( __array _Z [ 0 ],ZeroExtend.0 {{ 16,128 }} ( Cse12__5,128 ) ) [ 0 +: 8 ],result__4 [ 0 +: 8 ] ) ) ; } if slt_bits.0 {{ 16 }} ( Cse11__5,'0000000000010000' ) then { assert and_bool.0 {{ }} ( TRUE,sle_bits.0 {{ 32 }} ( ZeroExtend.0 {{ 16,32 }} ( add_bits.0 {{ 16 }} ( Cse10__5,'0000000000001000' ),32 ),'00000000000000000000000010000000' ) ) ; - result__4 = append_bits.0 {{ 40,24 }} ( result__4 [ 24 +: 40 ],append_bits.0 {{ 8,16 }} ( lsr_bits.0 {{ 128,32 }} ( __array _Z [ 0 ],ZeroExtend.0 {{ 16,32 }} ( Cse10__5,32 ) ) [ 0 +: 8 ],result__4 [ 0 +: 16 ] ) ) ; + result__4 = append_bits.0 {{ 40,24 }} ( result__4 [ 24 +: 40 ],append_bits.0 {{ 8,16 }} ( lsr_bits.0 {{ 128 }} ( __array _Z [ 0 ],ZeroExtend.0 {{ 16,128 }} ( Cse10__5,128 ) ) [ 0 +: 8 ],result__4 [ 0 +: 16 ] ) ) ; } if slt_bits.0 {{ 16 }} ( Cse9__5,'0000000000010000' ) then { assert and_bool.0 {{ }} ( TRUE,sle_bits.0 {{ 32 }} ( ZeroExtend.0 {{ 16,32 }} ( add_bits.0 {{ 16 }} ( Cse8__5,'0000000000001000' ),32 ),'00000000000000000000000010000000' ) ) ; - result__4 = append_bits.0 {{ 32,32 }} ( result__4 [ 32 +: 32 ],append_bits.0 {{ 8,24 }} ( lsr_bits.0 {{ 128,32 }} ( __array _Z [ 0 ],ZeroExtend.0 {{ 16,32 }} ( Cse8__5,32 ) ) [ 0 +: 8 ],result__4 [ 0 +: 24 ] ) ) ; + result__4 = append_bits.0 {{ 32,32 }} ( result__4 [ 32 +: 32 ],append_bits.0 {{ 8,24 }} ( lsr_bits.0 {{ 128 }} ( __array _Z [ 0 ],ZeroExtend.0 {{ 16,128 }} ( Cse8__5,128 ) ) [ 0 +: 8 ],result__4 [ 0 +: 24 ] ) ) ; } if slt_bits.0 {{ 16 }} ( Cse7__5,'0000000000010000' ) then { assert and_bool.0 {{ }} ( TRUE,sle_bits.0 {{ 32 }} ( ZeroExtend.0 {{ 16,32 }} ( add_bits.0 {{ 16 }} ( Cse6__5,'0000000000001000' ),32 ),'00000000000000000000000010000000' ) ) ; - result__4 = append_bits.0 {{ 24,40 }} ( result__4 [ 40 +: 24 ],append_bits.0 {{ 8,32 }} ( lsr_bits.0 {{ 128,32 }} ( __array _Z [ 0 ],ZeroExtend.0 {{ 16,32 }} ( Cse6__5,32 ) ) [ 0 +: 8 ],result__4 [ 0 +: 32 ] ) ) ; + result__4 = append_bits.0 {{ 24,40 }} ( result__4 [ 40 +: 24 ],append_bits.0 {{ 8,32 }} ( lsr_bits.0 {{ 128 }} ( __array _Z [ 0 ],ZeroExtend.0 {{ 16,128 }} ( Cse6__5,128 ) ) [ 0 +: 8 ],result__4 [ 0 +: 32 ] ) ) ; } if slt_bits.0 {{ 16 }} ( Cse5__5,'0000000000010000' ) then { assert and_bool.0 {{ }} ( TRUE,sle_bits.0 {{ 32 }} ( ZeroExtend.0 {{ 16,32 }} ( add_bits.0 {{ 16 }} ( Cse4__5,'0000000000001000' ),32 ),'00000000000000000000000010000000' ) ) ; - result__4 = append_bits.0 {{ 16,48 }} ( result__4 [ 48 +: 16 ],append_bits.0 {{ 8,40 }} ( lsr_bits.0 {{ 128,32 }} ( __array _Z [ 0 ],ZeroExtend.0 {{ 16,32 }} ( Cse4__5,32 ) ) [ 0 +: 8 ],result__4 [ 0 +: 40 ] ) ) ; + result__4 = append_bits.0 {{ 16,48 }} ( result__4 [ 48 +: 16 ],append_bits.0 {{ 8,40 }} ( lsr_bits.0 {{ 128 }} ( __array _Z [ 0 ],ZeroExtend.0 {{ 16,128 }} ( Cse4__5,128 ) ) [ 0 +: 8 ],result__4 [ 0 +: 40 ] ) ) ; } if slt_bits.0 {{ 16 }} ( Cse3__5,'0000000000010000' ) then { assert and_bool.0 {{ }} ( TRUE,sle_bits.0 {{ 32 }} ( ZeroExtend.0 {{ 16,32 }} ( add_bits.0 {{ 16 }} ( Cse2__5,'0000000000001000' ),32 ),'00000000000000000000000010000000' ) ) ; - result__4 = append_bits.0 {{ 8,56 }} ( result__4 [ 56 +: 8 ],append_bits.0 {{ 8,48 }} ( lsr_bits.0 {{ 128,32 }} ( __array _Z [ 0 ],ZeroExtend.0 {{ 16,32 }} ( Cse2__5,32 ) ) [ 0 +: 8 ],result__4 [ 0 +: 48 ] ) ) ; + result__4 = append_bits.0 {{ 8,56 }} ( result__4 [ 56 +: 8 ],append_bits.0 {{ 8,48 }} ( lsr_bits.0 {{ 128 }} ( __array _Z [ 0 ],ZeroExtend.0 {{ 16,128 }} ( Cse2__5,128 ) ) [ 0 +: 8 ],result__4 [ 0 +: 48 ] ) ) ; } if slt_bits.0 {{ 16 }} ( Cse1__5,'0000000000010000' ) then { assert and_bool.0 {{ }} ( TRUE,sle_bits.0 {{ 32 }} ( ZeroExtend.0 {{ 16,32 }} ( add_bits.0 {{ 16 }} ( Cse0__5,'0000000000001000' ),32 ),'00000000000000000000000010000000' ) ) ; - result__4 = append_bits.0 {{ 8,56 }} ( lsr_bits.0 {{ 128,32 }} ( __array _Z [ 0 ],ZeroExtend.0 {{ 16,32 }} ( Cse0__5,32 ) ) [ 0 +: 8 ],result__4 [ 0 +: 56 ] ) ; + result__4 = append_bits.0 {{ 8,56 }} ( lsr_bits.0 {{ 128 }} ( __array _Z [ 0 ],ZeroExtend.0 {{ 16,128 }} ( Cse0__5,128 ) ) [ 0 +: 8 ],result__4 [ 0 +: 56 ] ) ; } __array _Z [ 0 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; "" @@ -145,35 +145,35 @@ run asli with these commands Stmt_Assign(LExpr_Var("result__4"),'0000000000000000000000000000000000000000000000000000000000000000') Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse15__5");'0000000000010000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse14__5");'0000000000001000']);32]);'00000000000000000000000010000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("ZeroExtend.0",[8;64],[Expr_Slices(Expr_TApply("lsr_bits.0",[128;32],[Expr_Array(Expr_Var("_Z"),0);Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse14__5");32])]),[Slice_LoWd(0,8)]);64])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("ZeroExtend.0",[8;64],[Expr_Slices(Expr_TApply("lsr_bits.0",[128],[Expr_Array(Expr_Var("_Z"),0);Expr_TApply("ZeroExtend.0",[16;128],[Expr_Var("Cse14__5");128])]),[Slice_LoWd(0,8)]);64])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse13__5");'0000000000010000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse12__5");'0000000000001000']);32]);'00000000000000000000000010000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[48;16],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(16,48)]);Expr_TApply("append_bits.0",[8;8],[Expr_Slices(Expr_TApply("lsr_bits.0",[128;32],[Expr_Array(Expr_Var("_Z"),0);Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse12__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,8)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[48;16],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(16,48)]);Expr_TApply("append_bits.0",[8;8],[Expr_Slices(Expr_TApply("lsr_bits.0",[128],[Expr_Array(Expr_Var("_Z"),0);Expr_TApply("ZeroExtend.0",[16;128],[Expr_Var("Cse12__5");128])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,8)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse11__5");'0000000000010000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse10__5");'0000000000001000']);32]);'00000000000000000000000010000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[40;24],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(24,40)]);Expr_TApply("append_bits.0",[8;16],[Expr_Slices(Expr_TApply("lsr_bits.0",[128;32],[Expr_Array(Expr_Var("_Z"),0);Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse10__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,16)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[40;24],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(24,40)]);Expr_TApply("append_bits.0",[8;16],[Expr_Slices(Expr_TApply("lsr_bits.0",[128],[Expr_Array(Expr_Var("_Z"),0);Expr_TApply("ZeroExtend.0",[16;128],[Expr_Var("Cse10__5");128])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,16)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse9__5");'0000000000010000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse8__5");'0000000000001000']);32]);'00000000000000000000000010000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[32;32],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(32,32)]);Expr_TApply("append_bits.0",[8;24],[Expr_Slices(Expr_TApply("lsr_bits.0",[128;32],[Expr_Array(Expr_Var("_Z"),0);Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse8__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,24)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[32;32],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(32,32)]);Expr_TApply("append_bits.0",[8;24],[Expr_Slices(Expr_TApply("lsr_bits.0",[128],[Expr_Array(Expr_Var("_Z"),0);Expr_TApply("ZeroExtend.0",[16;128],[Expr_Var("Cse8__5");128])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,24)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse7__5");'0000000000010000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse6__5");'0000000000001000']);32]);'00000000000000000000000010000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[24;40],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(40,24)]);Expr_TApply("append_bits.0",[8;32],[Expr_Slices(Expr_TApply("lsr_bits.0",[128;32],[Expr_Array(Expr_Var("_Z"),0);Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse6__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,32)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[24;40],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(40,24)]);Expr_TApply("append_bits.0",[8;32],[Expr_Slices(Expr_TApply("lsr_bits.0",[128],[Expr_Array(Expr_Var("_Z"),0);Expr_TApply("ZeroExtend.0",[16;128],[Expr_Var("Cse6__5");128])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,32)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse5__5");'0000000000010000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse4__5");'0000000000001000']);32]);'00000000000000000000000010000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[16;48],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(48,16)]);Expr_TApply("append_bits.0",[8;40],[Expr_Slices(Expr_TApply("lsr_bits.0",[128;32],[Expr_Array(Expr_Var("_Z"),0);Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse4__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,40)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[16;48],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(48,16)]);Expr_TApply("append_bits.0",[8;40],[Expr_Slices(Expr_TApply("lsr_bits.0",[128],[Expr_Array(Expr_Var("_Z"),0);Expr_TApply("ZeroExtend.0",[16;128],[Expr_Var("Cse4__5");128])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,40)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse3__5");'0000000000010000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse2__5");'0000000000001000']);32]);'00000000000000000000000010000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[8;56],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(56,8)]);Expr_TApply("append_bits.0",[8;48],[Expr_Slices(Expr_TApply("lsr_bits.0",[128;32],[Expr_Array(Expr_Var("_Z"),0);Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse2__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,48)])])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[8;56],[Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(56,8)]);Expr_TApply("append_bits.0",[8;48],[Expr_Slices(Expr_TApply("lsr_bits.0",[128],[Expr_Array(Expr_Var("_Z"),0);Expr_TApply("ZeroExtend.0",[16;128],[Expr_Var("Cse2__5");128])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,48)])])])) ],[],[]) Stmt_If(Expr_TApply("slt_bits.0",[16],[Expr_Var("Cse1__5");'0000000000010000']),[ Stmt_Assert(Expr_TApply("and_bool.0",[],[Expr_Var("TRUE");Expr_TApply("sle_bits.0",[32],[Expr_TApply("ZeroExtend.0",[16;32],[Expr_TApply("add_bits.0",[16],[Expr_Var("Cse0__5");'0000000000001000']);32]);'00000000000000000000000010000000'])])); - Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[8;56],[Expr_Slices(Expr_TApply("lsr_bits.0",[128;32],[Expr_Array(Expr_Var("_Z"),0);Expr_TApply("ZeroExtend.0",[16;32],[Expr_Var("Cse0__5");32])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,56)])])) + Stmt_Assign(LExpr_Var("result__4"),Expr_TApply("append_bits.0",[8;56],[Expr_Slices(Expr_TApply("lsr_bits.0",[128],[Expr_Array(Expr_Var("_Z"),0);Expr_TApply("ZeroExtend.0",[16;128],[Expr_Var("Cse0__5");128])]),[Slice_LoWd(0,8)]);Expr_Slices(Expr_Var("result__4"),[Slice_LoWd(0,56)])])) ],[],[]) Stmt_Assign(LExpr_Array(LExpr_Var("_Z"),0),Expr_TApply("ZeroExtend.0",[64;128],[Expr_Var("result__4");128])) " @@ -598,137 +598,97 @@ run asli with these commands constant bits ( 64 ) Cse42__5 = SignExtend.0 {{ 16,64 }} ( __array _Z [ 1 ] [ 48 +: 16 ],64 ) ; bits ( 16 ) SignedSatQ17__5 ; boolean SignedSatQ18__5 ; - if slt_bits.0 {{ 64 }} ( '0000000000000000000000000000000000000000000000000111111111111111',asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse43__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ) ) then { + if slt_bits.0 {{ 64 }} ( '0000000000000000000000000000000000000000000000000111111111111111',asr_bits.0 {{ 64 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse43__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000000000000000000000000000000000000000000000000000010000' ) ) then { SignedSatQ17__5 = '0111111111111111' ; SignedSatQ18__5 = TRUE ; } else { - if slt_bits.0 {{ 64 }} ( asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse43__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ),'1111111111111111111111111111111111111111111111111000000000000000' ) then { - SignedSatQ17__5 = '1000000000000000' ; - SignedSatQ18__5 = TRUE ; - } else { - SignedSatQ17__5 = asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse43__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ) [ 0 +: 16 ] ; + SignedSatQ17__5 = asr_bits.0 {{ 64 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse43__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000000000000000000000000000000000000000000000000000010000' ) [ 0 +: 16 ] ; SignedSatQ18__5 = FALSE ; } - } if SignedSatQ18__5 then { FPSR = append_bits.0 {{ 4,28 }} ( FPSR [ 28 +: 4 ],append_bits.0 {{ 1,27 }} ( '1',FPSR [ 0 +: 27 ] ) ) ; } bits ( 16 ) SignedSatQ31__5 ; boolean SignedSatQ32__5 ; - if slt_bits.0 {{ 64 }} ( '0000000000000000000000000000000000000000000000000111111111111111',asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse36__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ) ) then { + if slt_bits.0 {{ 64 }} ( '0000000000000000000000000000000000000000000000000111111111111111',asr_bits.0 {{ 64 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse36__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000000000000000000000000000000000000000000000000000010000' ) ) then { SignedSatQ31__5 = '0111111111111111' ; SignedSatQ32__5 = TRUE ; } else { - if slt_bits.0 {{ 64 }} ( asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse36__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ),'1111111111111111111111111111111111111111111111111000000000000000' ) then { - SignedSatQ31__5 = '1000000000000000' ; - SignedSatQ32__5 = TRUE ; - } else { - SignedSatQ31__5 = asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse36__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ) [ 0 +: 16 ] ; + SignedSatQ31__5 = asr_bits.0 {{ 64 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse36__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000000000000000000000000000000000000000000000000000010000' ) [ 0 +: 16 ] ; SignedSatQ32__5 = FALSE ; } - } if SignedSatQ32__5 then { FPSR = append_bits.0 {{ 4,28 }} ( FPSR [ 28 +: 4 ],append_bits.0 {{ 1,27 }} ( '1',FPSR [ 0 +: 27 ] ) ) ; } bits ( 16 ) SignedSatQ44__5 ; boolean SignedSatQ45__5 ; - if slt_bits.0 {{ 64 }} ( '0000000000000000000000000000000000000000000000000111111111111111',asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse30__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ) ) then { + if slt_bits.0 {{ 64 }} ( '0000000000000000000000000000000000000000000000000111111111111111',asr_bits.0 {{ 64 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse30__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000000000000000000000000000000000000000000000000000010000' ) ) then { SignedSatQ44__5 = '0111111111111111' ; SignedSatQ45__5 = TRUE ; } else { - if slt_bits.0 {{ 64 }} ( asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse30__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ),'1111111111111111111111111111111111111111111111111000000000000000' ) then { - SignedSatQ44__5 = '1000000000000000' ; - SignedSatQ45__5 = TRUE ; - } else { - SignedSatQ44__5 = asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse30__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ) [ 0 +: 16 ] ; + SignedSatQ44__5 = asr_bits.0 {{ 64 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse30__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000000000000000000000000000000000000000000000000000010000' ) [ 0 +: 16 ] ; SignedSatQ45__5 = FALSE ; } - } if SignedSatQ45__5 then { FPSR = append_bits.0 {{ 4,28 }} ( FPSR [ 28 +: 4 ],append_bits.0 {{ 1,27 }} ( '1',FPSR [ 0 +: 27 ] ) ) ; } bits ( 16 ) SignedSatQ57__5 ; boolean SignedSatQ58__5 ; - if slt_bits.0 {{ 64 }} ( '0000000000000000000000000000000000000000000000000111111111111111',asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse24__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ) ) then { + if slt_bits.0 {{ 64 }} ( '0000000000000000000000000000000000000000000000000111111111111111',asr_bits.0 {{ 64 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse24__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000000000000000000000000000000000000000000000000000010000' ) ) then { SignedSatQ57__5 = '0111111111111111' ; SignedSatQ58__5 = TRUE ; } else { - if slt_bits.0 {{ 64 }} ( asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse24__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ),'1111111111111111111111111111111111111111111111111000000000000000' ) then { - SignedSatQ57__5 = '1000000000000000' ; - SignedSatQ58__5 = TRUE ; - } else { - SignedSatQ57__5 = asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse24__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ) [ 0 +: 16 ] ; + SignedSatQ57__5 = asr_bits.0 {{ 64 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse24__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000000000000000000000000000000000000000000000000000010000' ) [ 0 +: 16 ] ; SignedSatQ58__5 = FALSE ; } - } if SignedSatQ58__5 then { FPSR = append_bits.0 {{ 4,28 }} ( FPSR [ 28 +: 4 ],append_bits.0 {{ 1,27 }} ( '1',FPSR [ 0 +: 27 ] ) ) ; } bits ( 16 ) SignedSatQ70__5 ; boolean SignedSatQ71__5 ; - if slt_bits.0 {{ 64 }} ( '0000000000000000000000000000000000000000000000000111111111111111',asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse18__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ) ) then { + if slt_bits.0 {{ 64 }} ( '0000000000000000000000000000000000000000000000000111111111111111',asr_bits.0 {{ 64 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse18__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000000000000000000000000000000000000000000000000000010000' ) ) then { SignedSatQ70__5 = '0111111111111111' ; SignedSatQ71__5 = TRUE ; } else { - if slt_bits.0 {{ 64 }} ( asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse18__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ),'1111111111111111111111111111111111111111111111111000000000000000' ) then { - SignedSatQ70__5 = '1000000000000000' ; - SignedSatQ71__5 = TRUE ; - } else { - SignedSatQ70__5 = asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse18__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ) [ 0 +: 16 ] ; + SignedSatQ70__5 = asr_bits.0 {{ 64 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse18__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000000000000000000000000000000000000000000000000000010000' ) [ 0 +: 16 ] ; SignedSatQ71__5 = FALSE ; } - } if SignedSatQ71__5 then { FPSR = append_bits.0 {{ 4,28 }} ( FPSR [ 28 +: 4 ],append_bits.0 {{ 1,27 }} ( '1',FPSR [ 0 +: 27 ] ) ) ; } bits ( 16 ) SignedSatQ83__5 ; boolean SignedSatQ84__5 ; - if slt_bits.0 {{ 64 }} ( '0000000000000000000000000000000000000000000000000111111111111111',asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse12__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ) ) then { + if slt_bits.0 {{ 64 }} ( '0000000000000000000000000000000000000000000000000111111111111111',asr_bits.0 {{ 64 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse12__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000000000000000000000000000000000000000000000000000010000' ) ) then { SignedSatQ83__5 = '0111111111111111' ; SignedSatQ84__5 = TRUE ; } else { - if slt_bits.0 {{ 64 }} ( asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse12__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ),'1111111111111111111111111111111111111111111111111000000000000000' ) then { - SignedSatQ83__5 = '1000000000000000' ; - SignedSatQ84__5 = TRUE ; - } else { - SignedSatQ83__5 = asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse12__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ) [ 0 +: 16 ] ; + SignedSatQ83__5 = asr_bits.0 {{ 64 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse12__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000000000000000000000000000000000000000000000000000010000' ) [ 0 +: 16 ] ; SignedSatQ84__5 = FALSE ; } - } if SignedSatQ84__5 then { FPSR = append_bits.0 {{ 4,28 }} ( FPSR [ 28 +: 4 ],append_bits.0 {{ 1,27 }} ( '1',FPSR [ 0 +: 27 ] ) ) ; } bits ( 16 ) SignedSatQ96__5 ; boolean SignedSatQ97__5 ; - if slt_bits.0 {{ 64 }} ( '0000000000000000000000000000000000000000000000000111111111111111',asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse6__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ) ) then { + if slt_bits.0 {{ 64 }} ( '0000000000000000000000000000000000000000000000000111111111111111',asr_bits.0 {{ 64 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse6__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000000000000000000000000000000000000000000000000000010000' ) ) then { SignedSatQ96__5 = '0111111111111111' ; SignedSatQ97__5 = TRUE ; } else { - if slt_bits.0 {{ 64 }} ( asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse6__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ),'1111111111111111111111111111111111111111111111111000000000000000' ) then { - SignedSatQ96__5 = '1000000000000000' ; - SignedSatQ97__5 = TRUE ; - } else { - SignedSatQ96__5 = asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse6__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ) [ 0 +: 16 ] ; + SignedSatQ96__5 = asr_bits.0 {{ 64 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse6__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000000000000000000000000000000000000000000000000000010000' ) [ 0 +: 16 ] ; SignedSatQ97__5 = FALSE ; } - } if SignedSatQ97__5 then { FPSR = append_bits.0 {{ 4,28 }} ( FPSR [ 28 +: 4 ],append_bits.0 {{ 1,27 }} ( '1',FPSR [ 0 +: 27 ] ) ) ; } bits ( 16 ) SignedSatQ109__5 ; boolean SignedSatQ110__5 ; - if slt_bits.0 {{ 64 }} ( '0000000000000000000000000000000000000000000000000111111111111111',asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse0__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ) ) then { + if slt_bits.0 {{ 64 }} ( '0000000000000000000000000000000000000000000000000111111111111111',asr_bits.0 {{ 64 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse0__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000000000000000000000000000000000000000000000000000010000' ) ) then { SignedSatQ109__5 = '0111111111111111' ; SignedSatQ110__5 = TRUE ; } else { - if slt_bits.0 {{ 64 }} ( asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse0__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ),'1111111111111111111111111111111111111111111111111000000000000000' ) then { - SignedSatQ109__5 = '1000000000000000' ; - SignedSatQ110__5 = TRUE ; - } else { - SignedSatQ109__5 = asr_bits.0 {{ 64,16 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse0__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000010000' ) [ 0 +: 16 ] ; + SignedSatQ109__5 = asr_bits.0 {{ 64 }} ( add_bits.0 {{ 64 }} ( mul_bits.0 {{ 64 }} ( SignExtend.0 {{ 32,64 }} ( mul_bits.0 {{ 32 }} ( '00000000000000000000000000000010',Cse0__5 ),64 ),Cse42__5 ),'0000000000000000000000000000000000000000000000001000000000000000' ),'0000000000000000000000000000000000000000000000000000000000010000' ) [ 0 +: 16 ] ; SignedSatQ110__5 = FALSE ; } - } if SignedSatQ110__5 then { FPSR = append_bits.0 {{ 4,28 }} ( FPSR [ 28 +: 4 ],append_bits.0 {{ 1,27 }} ( '1',FPSR [ 0 +: 27 ] ) ) ; } @@ -745,137 +705,97 @@ run asli with these commands Stmt_ConstDecl(Type_Bits(64),"Cse42__5",Expr_TApply("SignExtend.0",[16;64],[Expr_Slices(Expr_Array(Expr_Var("_Z"),1),[Slice_LoWd(48,16)]);64])) Stmt_VarDeclsNoInit(Type_Bits(16),["SignedSatQ17__5"]) Stmt_VarDeclsNoInit(Type_Constructor("boolean"),["SignedSatQ18__5"]) - Stmt_If(Expr_TApply("slt_bits.0",[64],['0000000000000000000000000000000000000000000000000111111111111111';Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse43__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000'])]),[ + Stmt_If(Expr_TApply("slt_bits.0",[64],['0000000000000000000000000000000000000000000000000111111111111111';Expr_TApply("asr_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse43__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000000000000000000000000000000000000000000000000000010000'])]),[ Stmt_Assign(LExpr_Var("SignedSatQ17__5"),'0111111111111111'); Stmt_Assign(LExpr_Var("SignedSatQ18__5"),Expr_Var("TRUE")) ],[],[ - Stmt_If(Expr_TApply("slt_bits.0",[64],[Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse43__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000']);'1111111111111111111111111111111111111111111111111000000000000000']),[ - Stmt_Assign(LExpr_Var("SignedSatQ17__5"),'1000000000000000'); - Stmt_Assign(LExpr_Var("SignedSatQ18__5"),Expr_Var("TRUE")) - ],[],[ - Stmt_Assign(LExpr_Var("SignedSatQ17__5"),Expr_Slices(Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse43__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000']),[Slice_LoWd(0,16)])); + Stmt_Assign(LExpr_Var("SignedSatQ17__5"),Expr_Slices(Expr_TApply("asr_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse43__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000000000000000000000000000000000000000000000000000010000']),[Slice_LoWd(0,16)])); Stmt_Assign(LExpr_Var("SignedSatQ18__5"),Expr_Var("FALSE")) ]) - ]) Stmt_If(Expr_Var("SignedSatQ18__5"),[ Stmt_Assign(LExpr_Var("FPSR"),Expr_TApply("append_bits.0",[4;28],[Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(28,4)]);Expr_TApply("append_bits.0",[1;27],['1';Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(0,27)])])])) ],[],[]) Stmt_VarDeclsNoInit(Type_Bits(16),["SignedSatQ31__5"]) Stmt_VarDeclsNoInit(Type_Constructor("boolean"),["SignedSatQ32__5"]) - Stmt_If(Expr_TApply("slt_bits.0",[64],['0000000000000000000000000000000000000000000000000111111111111111';Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse36__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000'])]),[ + Stmt_If(Expr_TApply("slt_bits.0",[64],['0000000000000000000000000000000000000000000000000111111111111111';Expr_TApply("asr_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse36__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000000000000000000000000000000000000000000000000000010000'])]),[ Stmt_Assign(LExpr_Var("SignedSatQ31__5"),'0111111111111111'); Stmt_Assign(LExpr_Var("SignedSatQ32__5"),Expr_Var("TRUE")) ],[],[ - Stmt_If(Expr_TApply("slt_bits.0",[64],[Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse36__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000']);'1111111111111111111111111111111111111111111111111000000000000000']),[ - Stmt_Assign(LExpr_Var("SignedSatQ31__5"),'1000000000000000'); - Stmt_Assign(LExpr_Var("SignedSatQ32__5"),Expr_Var("TRUE")) - ],[],[ - Stmt_Assign(LExpr_Var("SignedSatQ31__5"),Expr_Slices(Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse36__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000']),[Slice_LoWd(0,16)])); + Stmt_Assign(LExpr_Var("SignedSatQ31__5"),Expr_Slices(Expr_TApply("asr_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse36__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000000000000000000000000000000000000000000000000000010000']),[Slice_LoWd(0,16)])); Stmt_Assign(LExpr_Var("SignedSatQ32__5"),Expr_Var("FALSE")) ]) - ]) Stmt_If(Expr_Var("SignedSatQ32__5"),[ Stmt_Assign(LExpr_Var("FPSR"),Expr_TApply("append_bits.0",[4;28],[Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(28,4)]);Expr_TApply("append_bits.0",[1;27],['1';Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(0,27)])])])) ],[],[]) Stmt_VarDeclsNoInit(Type_Bits(16),["SignedSatQ44__5"]) Stmt_VarDeclsNoInit(Type_Constructor("boolean"),["SignedSatQ45__5"]) - Stmt_If(Expr_TApply("slt_bits.0",[64],['0000000000000000000000000000000000000000000000000111111111111111';Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse30__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000'])]),[ + Stmt_If(Expr_TApply("slt_bits.0",[64],['0000000000000000000000000000000000000000000000000111111111111111';Expr_TApply("asr_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse30__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000000000000000000000000000000000000000000000000000010000'])]),[ Stmt_Assign(LExpr_Var("SignedSatQ44__5"),'0111111111111111'); Stmt_Assign(LExpr_Var("SignedSatQ45__5"),Expr_Var("TRUE")) ],[],[ - Stmt_If(Expr_TApply("slt_bits.0",[64],[Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse30__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000']);'1111111111111111111111111111111111111111111111111000000000000000']),[ - Stmt_Assign(LExpr_Var("SignedSatQ44__5"),'1000000000000000'); - Stmt_Assign(LExpr_Var("SignedSatQ45__5"),Expr_Var("TRUE")) - ],[],[ - Stmt_Assign(LExpr_Var("SignedSatQ44__5"),Expr_Slices(Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse30__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000']),[Slice_LoWd(0,16)])); + Stmt_Assign(LExpr_Var("SignedSatQ44__5"),Expr_Slices(Expr_TApply("asr_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse30__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000000000000000000000000000000000000000000000000000010000']),[Slice_LoWd(0,16)])); Stmt_Assign(LExpr_Var("SignedSatQ45__5"),Expr_Var("FALSE")) ]) - ]) Stmt_If(Expr_Var("SignedSatQ45__5"),[ Stmt_Assign(LExpr_Var("FPSR"),Expr_TApply("append_bits.0",[4;28],[Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(28,4)]);Expr_TApply("append_bits.0",[1;27],['1';Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(0,27)])])])) ],[],[]) Stmt_VarDeclsNoInit(Type_Bits(16),["SignedSatQ57__5"]) Stmt_VarDeclsNoInit(Type_Constructor("boolean"),["SignedSatQ58__5"]) - Stmt_If(Expr_TApply("slt_bits.0",[64],['0000000000000000000000000000000000000000000000000111111111111111';Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse24__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000'])]),[ + Stmt_If(Expr_TApply("slt_bits.0",[64],['0000000000000000000000000000000000000000000000000111111111111111';Expr_TApply("asr_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse24__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000000000000000000000000000000000000000000000000000010000'])]),[ Stmt_Assign(LExpr_Var("SignedSatQ57__5"),'0111111111111111'); Stmt_Assign(LExpr_Var("SignedSatQ58__5"),Expr_Var("TRUE")) ],[],[ - Stmt_If(Expr_TApply("slt_bits.0",[64],[Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse24__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000']);'1111111111111111111111111111111111111111111111111000000000000000']),[ - Stmt_Assign(LExpr_Var("SignedSatQ57__5"),'1000000000000000'); - Stmt_Assign(LExpr_Var("SignedSatQ58__5"),Expr_Var("TRUE")) - ],[],[ - Stmt_Assign(LExpr_Var("SignedSatQ57__5"),Expr_Slices(Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse24__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000']),[Slice_LoWd(0,16)])); + Stmt_Assign(LExpr_Var("SignedSatQ57__5"),Expr_Slices(Expr_TApply("asr_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse24__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000000000000000000000000000000000000000000000000000010000']),[Slice_LoWd(0,16)])); Stmt_Assign(LExpr_Var("SignedSatQ58__5"),Expr_Var("FALSE")) ]) - ]) Stmt_If(Expr_Var("SignedSatQ58__5"),[ Stmt_Assign(LExpr_Var("FPSR"),Expr_TApply("append_bits.0",[4;28],[Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(28,4)]);Expr_TApply("append_bits.0",[1;27],['1';Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(0,27)])])])) ],[],[]) Stmt_VarDeclsNoInit(Type_Bits(16),["SignedSatQ70__5"]) Stmt_VarDeclsNoInit(Type_Constructor("boolean"),["SignedSatQ71__5"]) - Stmt_If(Expr_TApply("slt_bits.0",[64],['0000000000000000000000000000000000000000000000000111111111111111';Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse18__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000'])]),[ + Stmt_If(Expr_TApply("slt_bits.0",[64],['0000000000000000000000000000000000000000000000000111111111111111';Expr_TApply("asr_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse18__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000000000000000000000000000000000000000000000000000010000'])]),[ Stmt_Assign(LExpr_Var("SignedSatQ70__5"),'0111111111111111'); Stmt_Assign(LExpr_Var("SignedSatQ71__5"),Expr_Var("TRUE")) ],[],[ - Stmt_If(Expr_TApply("slt_bits.0",[64],[Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse18__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000']);'1111111111111111111111111111111111111111111111111000000000000000']),[ - Stmt_Assign(LExpr_Var("SignedSatQ70__5"),'1000000000000000'); - Stmt_Assign(LExpr_Var("SignedSatQ71__5"),Expr_Var("TRUE")) - ],[],[ - Stmt_Assign(LExpr_Var("SignedSatQ70__5"),Expr_Slices(Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse18__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000']),[Slice_LoWd(0,16)])); + Stmt_Assign(LExpr_Var("SignedSatQ70__5"),Expr_Slices(Expr_TApply("asr_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse18__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000000000000000000000000000000000000000000000000000010000']),[Slice_LoWd(0,16)])); Stmt_Assign(LExpr_Var("SignedSatQ71__5"),Expr_Var("FALSE")) ]) - ]) Stmt_If(Expr_Var("SignedSatQ71__5"),[ Stmt_Assign(LExpr_Var("FPSR"),Expr_TApply("append_bits.0",[4;28],[Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(28,4)]);Expr_TApply("append_bits.0",[1;27],['1';Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(0,27)])])])) ],[],[]) Stmt_VarDeclsNoInit(Type_Bits(16),["SignedSatQ83__5"]) Stmt_VarDeclsNoInit(Type_Constructor("boolean"),["SignedSatQ84__5"]) - Stmt_If(Expr_TApply("slt_bits.0",[64],['0000000000000000000000000000000000000000000000000111111111111111';Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse12__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000'])]),[ + Stmt_If(Expr_TApply("slt_bits.0",[64],['0000000000000000000000000000000000000000000000000111111111111111';Expr_TApply("asr_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse12__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000000000000000000000000000000000000000000000000000010000'])]),[ Stmt_Assign(LExpr_Var("SignedSatQ83__5"),'0111111111111111'); Stmt_Assign(LExpr_Var("SignedSatQ84__5"),Expr_Var("TRUE")) ],[],[ - Stmt_If(Expr_TApply("slt_bits.0",[64],[Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse12__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000']);'1111111111111111111111111111111111111111111111111000000000000000']),[ - Stmt_Assign(LExpr_Var("SignedSatQ83__5"),'1000000000000000'); - Stmt_Assign(LExpr_Var("SignedSatQ84__5"),Expr_Var("TRUE")) - ],[],[ - Stmt_Assign(LExpr_Var("SignedSatQ83__5"),Expr_Slices(Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse12__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000']),[Slice_LoWd(0,16)])); + Stmt_Assign(LExpr_Var("SignedSatQ83__5"),Expr_Slices(Expr_TApply("asr_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse12__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000000000000000000000000000000000000000000000000000010000']),[Slice_LoWd(0,16)])); Stmt_Assign(LExpr_Var("SignedSatQ84__5"),Expr_Var("FALSE")) ]) - ]) Stmt_If(Expr_Var("SignedSatQ84__5"),[ Stmt_Assign(LExpr_Var("FPSR"),Expr_TApply("append_bits.0",[4;28],[Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(28,4)]);Expr_TApply("append_bits.0",[1;27],['1';Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(0,27)])])])) ],[],[]) Stmt_VarDeclsNoInit(Type_Bits(16),["SignedSatQ96__5"]) Stmt_VarDeclsNoInit(Type_Constructor("boolean"),["SignedSatQ97__5"]) - Stmt_If(Expr_TApply("slt_bits.0",[64],['0000000000000000000000000000000000000000000000000111111111111111';Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse6__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000'])]),[ + Stmt_If(Expr_TApply("slt_bits.0",[64],['0000000000000000000000000000000000000000000000000111111111111111';Expr_TApply("asr_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse6__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000000000000000000000000000000000000000000000000000010000'])]),[ Stmt_Assign(LExpr_Var("SignedSatQ96__5"),'0111111111111111'); Stmt_Assign(LExpr_Var("SignedSatQ97__5"),Expr_Var("TRUE")) ],[],[ - Stmt_If(Expr_TApply("slt_bits.0",[64],[Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse6__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000']);'1111111111111111111111111111111111111111111111111000000000000000']),[ - Stmt_Assign(LExpr_Var("SignedSatQ96__5"),'1000000000000000'); - Stmt_Assign(LExpr_Var("SignedSatQ97__5"),Expr_Var("TRUE")) - ],[],[ - Stmt_Assign(LExpr_Var("SignedSatQ96__5"),Expr_Slices(Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse6__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000']),[Slice_LoWd(0,16)])); + Stmt_Assign(LExpr_Var("SignedSatQ96__5"),Expr_Slices(Expr_TApply("asr_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse6__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000000000000000000000000000000000000000000000000000010000']),[Slice_LoWd(0,16)])); Stmt_Assign(LExpr_Var("SignedSatQ97__5"),Expr_Var("FALSE")) ]) - ]) Stmt_If(Expr_Var("SignedSatQ97__5"),[ Stmt_Assign(LExpr_Var("FPSR"),Expr_TApply("append_bits.0",[4;28],[Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(28,4)]);Expr_TApply("append_bits.0",[1;27],['1';Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(0,27)])])])) ],[],[]) Stmt_VarDeclsNoInit(Type_Bits(16),["SignedSatQ109__5"]) Stmt_VarDeclsNoInit(Type_Constructor("boolean"),["SignedSatQ110__5"]) - Stmt_If(Expr_TApply("slt_bits.0",[64],['0000000000000000000000000000000000000000000000000111111111111111';Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse0__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000'])]),[ + Stmt_If(Expr_TApply("slt_bits.0",[64],['0000000000000000000000000000000000000000000000000111111111111111';Expr_TApply("asr_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse0__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000000000000000000000000000000000000000000000000000010000'])]),[ Stmt_Assign(LExpr_Var("SignedSatQ109__5"),'0111111111111111'); Stmt_Assign(LExpr_Var("SignedSatQ110__5"),Expr_Var("TRUE")) ],[],[ - Stmt_If(Expr_TApply("slt_bits.0",[64],[Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse0__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000']);'1111111111111111111111111111111111111111111111111000000000000000']),[ - Stmt_Assign(LExpr_Var("SignedSatQ109__5"),'1000000000000000'); - Stmt_Assign(LExpr_Var("SignedSatQ110__5"),Expr_Var("TRUE")) - ],[],[ - Stmt_Assign(LExpr_Var("SignedSatQ109__5"),Expr_Slices(Expr_TApply("asr_bits.0",[64;16],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse0__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000010000']),[Slice_LoWd(0,16)])); + Stmt_Assign(LExpr_Var("SignedSatQ109__5"),Expr_Slices(Expr_TApply("asr_bits.0",[64],[Expr_TApply("add_bits.0",[64],[Expr_TApply("mul_bits.0",[64],[Expr_TApply("SignExtend.0",[32;64],[Expr_TApply("mul_bits.0",[32],['00000000000000000000000000000010';Expr_Var("Cse0__5")]);64]);Expr_Var("Cse42__5")]);'0000000000000000000000000000000000000000000000001000000000000000']);'0000000000000000000000000000000000000000000000000000000000010000']),[Slice_LoWd(0,16)])); Stmt_Assign(LExpr_Var("SignedSatQ110__5"),Expr_Var("FALSE")) ]) - ]) Stmt_If(Expr_Var("SignedSatQ110__5"),[ Stmt_Assign(LExpr_Var("FPSR"),Expr_TApply("append_bits.0",[4;28],[Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(28,4)]);Expr_TApply("append_bits.0",[1;27],['1';Expr_Slices(Expr_Var("FPSR"),[Slice_LoWd(0,27)])])])) ],[],[]) diff --git a/tests/override.asl b/tests/override.asl index 21205aad..72d15e0a 100644 --- a/tests/override.asl +++ b/tests/override.asl @@ -37,20 +37,22 @@ bits(N) sdiv_bits(bits(N) x, bits(N) y) integer yn = SInt(y); return RoundTowardsZero(Real(xn) / Real (yn))[N-1:0]; -bits(N1) lsl_bits(bits(N1) x, bits(N2) y) - integer yn = SInt(y); - // LSL will assert if yn is negative, but we assume this - // operation is pure. Wrap it to be identity in this case. - return if yn < 0 then x else LSL(x, yn); +bits(N) lsl_bits(bits(N) x, bits(N) y) + integer yn = UInt(y); + return LSL(x, yn); -bits(N1) lsr_bits(bits(N1) x, bits(N2) y) - integer yn = SInt(y); +bits(N) lsr_bits(bits(N) x, bits(N) y) + integer yn = UInt(y); return LSR(x, yn); -bits(N1) asr_bits(bits(N1) x, bits(N2) y) - integer yn = SInt(y); +bits(N) asr_bits(bits(N) x, bits(N) y) + integer yn = UInt(y); return ASR(x, yn); +bits(N) ror_bits(bits(N) x, bits(N) y) + integer yn = UInt(y); + return ROR(x, yn); + integer HighestSetBit(bits(N) x) assert 0 < N && N <= 64; if (63 < N && x[63] == '1') then From 294c0cbd7b8fd361ef00896727c84de22a8d3d37 Mon Sep 17 00:00:00 2001 From: Nicholas Coughlin Date: Tue, 26 Nov 2024 14:24:19 +1000 Subject: [PATCH 5/8] Vector Rework * Pull inductive variable reasoning out of vectorizer, into pre-pass instead * Pull vector expression cleanup and lowering into sub-passes * Simplify vectorizer to focus on correctness and simple pattern matching --- libASL/dis.ml | 3 +- libASL/dune | 1 + libASL/loops.ml | 1289 ++++++++++++++++++++++++++++++++++++++++++ libASL/transforms.ml | 1004 +------------------------------- tests/override.asl | 168 +++++- 5 files changed, 1443 insertions(+), 1022 deletions(-) create mode 100644 libASL/loops.ml diff --git a/libASL/dis.ml b/libASL/dis.ml index 5f3d65d5..a818dcb9 100644 --- a/libASL/dis.ml +++ b/libASL/dis.ml @@ -1574,6 +1574,7 @@ let dis_core (env: Eval.Env.t) (unroll_bound) ((lenv,globals): env) (decode: dec let stmts' = Transforms.RemoveUnused.remove_unused globals @@ stmts in let stmts' = Transforms.RedundantSlice.do_transform Bindings.empty stmts' in let stmts' = Transforms.FixRedefinitions.run (globals : IdentSet.t) stmts' in + let stmts' = Loops.LoopNorm.do_transform stmts' in let stmts' = Transforms.StatefulIntToBits.run (enum_types env) stmts' in let stmts' = Transforms.IntToBits.ints_to_bits stmts' in let stmts' = Transforms.CommonSubExprElim.do_transform stmts' in @@ -1604,7 +1605,7 @@ let dis_decode_entry_with_inst (env: Eval.Env.t) ((lenv,globals): env) (decode: | false -> dis_core env max_upper_bound (lenv,globals) decode op | true -> let enc,stmts' = dis_core env Z.one (lenv,globals) decode op in - let (res,stmts') = Transforms.LoopClassify.run stmts' env in + let (res,stmts') = Loops.do_transform stmts' env in if res then (enc,stmts') else dis_core env max_upper_bound (lenv,globals) decode op diff --git a/libASL/dune b/libASL/dune index 6ebc82e3..6d5586fc 100644 --- a/libASL/dune +++ b/libASL/dune @@ -43,6 +43,7 @@ cpp_backend scala_backend arm_env pretransforms flags + loops ) (preprocessor_deps (alias ../asl_files) (alias cpp_backend_files)) (preprocess (pps ppx_blob)) diff --git a/libASL/loops.ml b/libASL/loops.ml new file mode 100644 index 00000000..6f1ff10e --- /dev/null +++ b/libASL/loops.ml @@ -0,0 +1,1289 @@ +open Asl_utils +open AST +open Asl_visitor +open Symbolic +open Value + +let is_int = function Expr_LitInt _ -> true | _ -> false + +(* Operations that are applied bitwise. *) +let bit_ops = [ + ("not_bool", "not_bits"); + ("and_bool", "and_bits"); + ("or_bool", "or_bits"); + ("not_bits", "not_bits"); + ("and_bits", "and_bits"); + ("or_bits", "or_bits"); + ("eor_bits", "eor_bits"); +] + +(* Operations that are applied element wise, with a element + count argument in the final position. *) +let elem_ops = [ + ("add_bits", "add_vec"); + ("sub_bits", "sub_vec"); + ("mul_bits", "mul_vec"); + ("sdiv_bits", "sdiv_vec"); + ("sle_bits", "sle_vec"); + ("slt_bits", "slt_vec"); + ("eq_bits", "eq_vec"); + ("asr_bits", "asr_vec"); + ("lsr_bits", "lsr_vec"); + ("lsl_bits", "lsl_vec"); + ("ite", "ite_vec"); + ("BFMul", "bf_mul_vec"); + ("BFAdd", "bf_add_vec"); +] + +(* Operations expecting an additional, final scalar argument. *) +let sv_final_ops = [ + ("FPAdd", "fp_add_vec"); + ("FPSub", "fp_sub_vec"); + ("FPMul", "fp_mul_vec"); + ("FPDiv", "fp_div_vec"); + ("FPMulAdd", "fp_mul_add_vec"); + ("FPSqrt", "fp_sqrt_vec"); + ("FPMax", "fp_max_vec"); + ("FPMaxNum", "fp_max_num_vec"); + ("FPMin", "fp_min_vec"); + ("FPMinNum", "fp_min_num_vec"); + ("FPMulX", "fp_mulx_vec"); + ("FPMulAddH", "fp_mul_addh_vec"); + ("FPCompareEQ", "fp_cmp_eq_vec"); + ("FPCompareGE", "fp_cmp_ge_vec"); + ("FPCompareGT", "fp_cmp_gt_vec"); + ("FPRSqrtEstimate", "fpr_sqrt_est_vec"); + ("ZeroExtend", "zcast_vec"); + ("SignExtend", "scast_vec"); + ("trunc", "trunc_vec"); +] + +(* Trivial vector operations, with a iteration count as the final argument. *) +let vec_ops = List.map snd elem_ops +(* Subset of vector operations that perform a size cast. *) +let size_cast_vec_ops = ["zcast_vec"; "scast_vec"; "trunc_vec"] +(* Vector operations with an iteration and final scalar argument. *) +let sv_final_vec_ops = (List.map snd sv_final_ops) +(* Vector reduce operations. *) +let reduce_ops = ["reduce_add" ; "reduce_eor"] + +(* Normalise for loops, such that: + - Iterate up from 0 to a fixed value + - Recognise variables that can be derived from the loop variable + and rephrase accordingly. + + TODO: Extend to support mod. +*) +module LoopNorm = struct + let error m = + failwith ("LoopNorm: " ^ m) + + let log m = + if false then Printf.printf "LoopNorm: %s\n" m + + (* + Map all values to a base value and multiples + of the current loop depth. Otherwise, simply mark as Top. + *) + type abs = + Index of sym * sym list | + Top + + let is_index = function Index _ -> true | _ -> false + let is_const = function + | Index (b,m) -> List.for_all (fun e -> e = sym_of_int 0) m + | _ -> false + let is_complex i = is_index i && not (is_const i) + + let pp_bm (b,m) = "(" ^ pp_sym b ^ ", " ^ Utils.pp_list pp_sym m ^ ")" + let pp_abs a = + match a with + | Index (b,m) -> "Index" ^ pp_bm (b,m) + | Top -> "Top" + + type st = { + vars: (sym * sym list) Bindings.t; + next: int; + iters: sym list; + ivars: ident list; + } + + (* Map an abstract point back to an expression *) + let rec generate_expr base mults ivars loc = + match mults, ivars with + | [], [] -> base + | s::mults, v::ivars -> + sym_add_int loc (sym_mul_int loc (Exp (Expr_Var v)) s) (generate_expr base mults ivars loc) + | _ -> error "Mismatched mult and inductive vars" + + let rec get_max base mults iters loc = + match mults, iters with + | [], [] -> base + | s::mults, i::iters -> + sym_add_int loc (sym_mul_int loc (sym_sub_int loc i (sym_of_int 1)) s) (get_max base mults iters loc) + | _ -> error "Mismatched mult and iteration count" + + let expr_of_abs st loc b m = sym_expr (generate_expr b m st.ivars loc) + + let distrib_op f l r = + match l, r with + | Index (b,m), Index (b',m') -> Index (f b b', List.map2 f m m') + | _ -> Top + + let map_op f l = + match l with + | Index (b,m) -> Index (f b, List.map f m) + | _ -> Top + + (* State Variable Operations *) + let decl st v a = + match Bindings.find_opt v st.vars with + | Some _ -> error "Redecl" + | None -> + match a with + | Index(b,m) -> {st with vars = Bindings.add v (b,m) st.vars} + | _ -> st + let assign st v a = + match a with + | Index(b,m) -> {st with vars = Bindings.add v (b,m) st.vars} + | _ -> {st with vars = Bindings.remove v st.vars} + let load st v = + match Bindings.find_opt v st.vars with + | Some (b,m) -> Index (b,m) + | _ -> Top + let fresh_ivar st = + let n = Ident ("Loop_" ^ string_of_int st.next) in + (n, {st with next = st.next + 1}) + + let padding st = List.map (fun _ -> sym_of_int 0) st.iters + + (* State Join *) + let join tst fst = + let vars = Bindings.merge (fun k v1 v2 -> + match v1, v2 with + | Some v1, Some v2 when v1 = v2 -> Some v1 + | _ -> None) tst.vars fst.vars in + { fst with vars } + + let is_val s = + match s with Val _ -> true | _ -> false + + (* Loop Entry TF *) + let enter_loop st var start dir stop loc = + let start = sym_of_expr start in + let stop = sym_of_expr stop in + assert (is_val start && is_val stop); + (* Create an inductive var *) + let (ivar,st) = fresh_ivar st in + let ivars = ivar::st.ivars in + (* Determine the iterations of this loop *) + let iter = match dir with + | Direction_Up -> sym_add_int loc (sym_sub_int loc stop start) (sym_of_int 1) + | Direction_Down -> sym_add_int loc (sym_sub_int loc start stop) (sym_of_int 1) in + let iters = iter::st.iters in + (* Create a point for the old inductive variable *) + let abs = match dir with + | Direction_Up -> (start, (sym_of_int 1)::(padding st)) + | Direction_Down -> (start, (sym_of_int (-1))::(padding st)) in + (* Pad out the existing variables and add the old inductive variable *) + let vars = Bindings.map (fun (b,m) -> (b,(sym_of_int 0)::m)) st.vars in + let vars = Bindings.add var abs vars in + (* Generate bounds for the new loop *) + let stop = sym_expr (sym_sub_int loc iter (sym_of_int 1)) in + (ivar, stop, { st with vars ; iters ; ivars }) + + (* Loop Exit TF *) + let exit_loop st loc = + match st.iters, st.ivars with + | i::iters, _::ivars -> + let vars = Bindings.map (function + | (b,m::ms) -> (sym_add_int loc b (sym_mul_int loc i m),ms) + | _ -> error "Mismatched iteration count and factor in loop exit" + ) st.vars in + { st with vars ; iters ; ivars } + | _ -> error "Mismatched iteraton count and inductive vars in loop exit" + + let div_test loc e s = + match sym_zrem_int loc e s with + | Val (VInt i) -> i = Z.zero + | _ -> false + + (* Expression TF *) + let tf_prim st f i tes es loc = + match f, i, tes, es with + | "add_int", 0, [], [l;r] -> + distrib_op (sym_add_int loc) l r + | "sub_int", 0, [], [l;r] -> + distrib_op (sym_sub_int loc) l r + | "mul_int", 0, [], [l;(Index(b,_) as r)] when is_const r -> + map_op (sym_mul_int loc b) l + | "mul_int", 0, [], [(Index(b,_) as r);l] when is_const r -> + map_op (sym_mul_int loc b) l + (* Support zdiv if all values divide perfectly *) + | "zdiv_int", 0, [], [Index(b,m) as l;(Index(b',_) as r)] when is_const r -> + if List.for_all (fun i -> div_test loc i b') (b::m) then + map_op (fun v -> sym_zdiv_int loc v b') l + else + Top + (* Support frem if all values are within bound *) + | "frem_int", 0, [], [Index(b,m);(Index(b',_) as r)] when is_const r -> + let max = get_max b m st.iters loc in + (match sym_lt_int loc max b' with + | Val (VBool true) -> Index(b,m) + | _ -> Top) + + (* Expected uses of loop index *) + | "Elem.set", _, _, _ + | "Elem.read", _, _, _ + (* Shift by index, can't do much with this *) + | "LSL", _, _, _ -> Top + + | _ -> + if List.exists is_complex es then log @@ "Precision loss for " ^ f ^ " " ^ Utils.pp_list pp_abs es; + Top + + let rec tf st loc e = + match e with + | Expr_Var v -> load st v + | Expr_LitInt i -> Index (sym_of_expr e, padding st) + | Expr_TApply (FIdent (f, i), tes, es) -> + tf_prim st f i tes (List.map (tf st loc) es) loc + (* Ignore these *) + | Expr_LitBits _ + | Expr_Array _ + | Expr_Field _ + | Expr_Slices _ -> Top + (* Log otherwise *) + | _ -> log @@ "Unknown expr: " ^ pp_expr e; Top + + class subst st loc = object + inherit nopAslVisitor + method! vexpr e = + match tf st loc e with + | Index (b,m) -> ChangeTo ( expr_of_abs st loc b m ) + | _ -> DoChildren + end + + let subst_stmt st loc s = visit_stmt_single (new subst st loc) s + let subst_expr st loc s = visit_expr (new subst st loc) s + + let rec walk st s = + List.fold_left (fun (acc,st) stmt -> + match stmt with + (* Local variable tracking *) + | Stmt_VarDecl(ty, v, e, loc) + | Stmt_ConstDecl(ty, v, e, loc) -> + let stmt = subst_stmt st loc stmt in + let st = decl st v (tf st loc e) in + (acc@[stmt], st) + | Stmt_Assign(LExpr_Var v, e, loc) -> + let stmt = subst_stmt st loc stmt in + let st = assign st v (tf st loc e) in + (acc@[stmt], st) + (* Default, state preserving stmt *) + | Stmt_Assert _ + | Stmt_Assign _ + | Stmt_VarDeclsNoInit _ + | Stmt_TCall _ -> + let stmt = subst_stmt st (get_loc stmt) stmt in + (acc@[stmt], st) + (* Nested stmts *) + | Stmt_For(var, start, dir, stop, body, loc) -> + let (var',stop',st) = enter_loop st var start dir stop loc in + let (body',st) = fp st body loc in + let st = exit_loop st loc in + (acc@[Stmt_For(var',Expr_LitInt "0",Direction_Up,stop',body', loc)], st) + | Stmt_If(c, t, [], f, loc) -> + let c = subst_expr st loc c in + let (t,tst) = walk st t in + let (f,fst) = walk {st with next = tst.next} f in + let st = join tst fst in + (acc@[Stmt_If(c, t, [], f, loc)], st) + | _ -> error @@ "Unknown stmt: " ^ pp_stmt stmt + ) ([],st) s + + and fp st s loc = + log "Performing FP\n"; + (* Do one walk of the loop body *) + let (s',st') = walk st s in + (* Perform the join, test if we have a fixed-point *) + let repeat = ref false in + let vars = Bindings.merge (fun k v1 v2 -> + match v1, v2 with + (* If equal, fixed *) + | Some v1, Some v2 when v1 = v2 -> + log @@ "Equivalent " ^ pprint_ident k ^ " - " ^ pp_bm v1; + Some v1 + (* Given distinct values, consider the loop effects *) + | Some (b1,m1::ms1), Some (b2,m2::ms2) -> + (* If mult factors are the same and the value is just offset by + a single iteration, then this is actually a fixed-point *) + if b2 = sym_add_int loc b1 m1 && ms1 = ms2 && m1 = m2 then begin + log @@ "Stable " ^ pprint_ident k; + v1 + (* If mult factors are the same and the current loop is 0, + guess a value to produce a 'join'. Guess is the difference + in base values as the loop mult *) + end else if m1 = sym_of_int 0 && ms1 = ms2 && m1 = m2 then begin + log @@ "Repeating, guess for " ^ pprint_ident k; + repeat := true; + Some (b1,(sym_sub_int loc b2 b1)::ms1) + (* Otherwise, can't unify these *) + end else begin + log @@ "Repeating, can't unify " ^ pprint_ident k; + repeat := true; + None + end + (* Value went to top, need to clear it and try again *) + | Some _, _ -> + log @@ "Repeating, modified " ^ pprint_ident k; + repeat := true; + None + (* Nothing else makes sense *) + | _ -> None) st.vars st'.vars in + (* Try again with the join or return *) + let st = {st' with vars} in + if !repeat then fp st s loc + else (s',st) + + let do_transform s = + let st = { vars = Bindings.empty ; next = 0 ; iters = [] ; ivars = [] } in + let (s,_) = walk st s in + s + +end + +module Symbol = struct + type sym = expr + + (**************************************************************** + * Symbolic Helpers + ****************************************************************) + + let cvt_bool_bv b = + match b with + | Expr_Var (Ident "TRUE") -> Expr_LitBits "1" + | Expr_Var (Ident "FALSE") -> Expr_LitBits "0" + | _ -> Expr_TApply (FIdent("cvt_bool_bv", 0), [], [b]) + + let expr_of_Z i = Expr_LitInt (Z.to_string i) + let print_bv ({n;v} : Primops.bitvector) = (Z.format ("%0" ^ string_of_int n ^ "b") v) + let expr_of_bv (bv : Primops.bitvector) = Expr_LitBits(print_bv bv) + + let parse_bits s = + match from_bitsLit s with + | VBits v -> v + | _ -> failwith @@ "parse_bits: " ^ s + + let parse_signed_bits s = + match from_bitsLit s with + | VBits v -> Primops.z_signed_extract v.v 0 v.n + | _ -> failwith @@ "parse_signed_bits: " ^ s + + let cvt_int_bits a w = + match a, w with + | Expr_LitInt a, Expr_LitInt w -> + expr_of_bv (Primops.prim_cvt_int_bits (Z.of_string w) (Z.of_string a)) + | _ -> Expr_TApply(FIdent("cvt_int_bits",0), [w], [a; w]) + + let add_int a b = + match a, b with + | Expr_LitInt a, Expr_LitInt b -> Expr_LitInt (Z.to_string (Z.add (Z.of_string a) (Z.of_string b))) + | Expr_LitInt "0", b -> b + | a, Expr_LitInt "0" -> a + | _ -> Expr_TApply(FIdent("add_int",0), [], [a;b]) + + let sub_int a b = + match a, b with + | Expr_LitInt a, Expr_LitInt b -> Expr_LitInt (Z.to_string (Z.sub (Z.of_string a) (Z.of_string b))) + | _ -> Expr_TApply(FIdent("sub_int",0), [], [a;b]) + + let mul_int a b = + match a, b with + | Expr_LitInt a, Expr_LitInt b -> Expr_LitInt (Z.to_string (Z.mul (Z.of_string a) (Z.of_string b))) + | _ -> Expr_TApply(FIdent("mul_int",0), [], [a;b]) + + let zdiv_int a b = + match a, b with + | Expr_LitInt a, Expr_LitInt b -> Expr_LitInt (Z.to_string (Z.div (Z.of_string a) (Z.of_string b))) + | a, Expr_LitInt "1" -> a + | a, Expr_LitInt "-1" -> mul_int a b + | _ -> Expr_TApply(FIdent("zdiv_int",0), [], [a;b]) + + let mod_int a b = + match a, b with + | Expr_LitInt a, Expr_LitInt b -> Expr_LitInt (Z.to_string (Z.rem (Z.of_string a) (Z.of_string b))) + | _, Expr_LitInt "1" + | _, Expr_LitInt "-1" -> Expr_LitInt "0" + | _ -> Expr_TApply(FIdent("zrem_int",0), [], [a;b]) + + let eq_int a b = + match a, b with + | Expr_LitInt a, Expr_LitInt b when Z.of_string a = Z.of_string b -> Expr_Var (Ident "TRUE") + | Expr_LitInt a, Expr_LitInt b -> Expr_Var (Ident "FALSE") + | _ -> Expr_TApply(FIdent("eq_int",0), [], [a;b]) + + let ite_int c a b = + match c, a, b with + | Expr_Var (Ident "TRUE"), _, _ -> a + | Expr_Var (Ident "FALSE"), _, _ -> b + | _, a,b when a = b -> a + | _ -> Expr_TApply(FIdent("ite_int",0), [], [c;a;b]) + + let zero_int = Expr_LitInt "0" + + let add_bits w a b = + match a, b with + | Expr_LitBits a, Expr_LitBits b -> expr_of_bv (Primops.prim_add_bits (parse_bits a) (parse_bits b)) + | _ -> Expr_TApply(FIdent("add_bits",0), [w], [a;b]) + + let sub_bits w a b = + match a, b with + | Expr_LitBits a, Expr_LitBits b -> expr_of_bv (Primops.prim_sub_bits (parse_bits a) (parse_bits b)) + | _ -> Expr_TApply(FIdent("sub_bits",0), [w], [a;b]) + + let mul_bits w a b = + match a, b with + | Expr_LitBits a, Expr_LitBits b -> expr_of_bv (Primops.prim_mul_bits (parse_bits a) (parse_bits b)) + | _ -> Expr_TApply(FIdent("mul_bits",0), [w], [a;b]) + + let zeroes w = + match w with + | Expr_LitInt w -> expr_of_bv { v = Z.zero ; n = int_of_string w } + | _ -> failwith "" + + let neg_bits w a = + sub_bits w (zeroes w) a + + let cvt_bits_sint a w = + match a, w with + | Expr_LitBits bv, Expr_LitInt w -> + let v = parse_signed_bits bv in + Expr_LitInt (Z.to_string v) + | _ -> Expr_TApply(FIdent("cvt_bits_sint",0), [w], [a]) + + let cvt_bits_uint a w = + match a, w with + | Expr_LitBits bv, Expr_LitInt w -> + let v = parse_bits bv in + Expr_LitInt (Z.to_string v.v) + | _ -> Expr_TApply(FIdent("cvt_bits_uint",0), [w], [a]) + + let sign_extend a w = + match a, w with + | _ -> Expr_TApply(FIdent("SignExtend",0), [w], [a]) + + let zero_extend a w = + match a, w with + | _ -> Expr_TApply(FIdent("ZeroExtend",0), [w], [a]) + + let append_bits w1 w2 x y = + match x, y with + | Expr_LitBits x, Expr_LitBits y -> Expr_LitBits (x ^ y) + | _ -> Expr_TApply (FIdent ("append_bits", 0), [w1;w2], [x;y]) + + let concat_bits ls = + let body = fun (w,x) (yw,y) -> let b = append_bits w yw x y in (add_int w yw,b) in + match List.rev ls with + | x::xs -> let (_,r) = List.fold_left body x xs in r + | _ -> failwith "concat" + + let expr_is_int e i = + match e with + | Expr_LitInt s -> int_of_string s = i + | _ -> false + + let replicate elems elemw x = + match elems, x with + | i, _ when expr_is_int i 1 -> x + | Expr_LitInt i, Expr_LitBits b -> Expr_LitBits (String.concat "" (List.init (int_of_string i) (fun _ -> b))) + | _ -> Expr_TApply(FIdent("replicate_bits", 0), [elemw; elems], [x; elems]) + + let is_factor e f = + expr_is_int (mod_int e f) 0 + +end + +module LoopOpt = struct + open Symbol + + let rec triv_sel i is = + match is with + | j::is when i = j -> triv_sel (i+1) is + | [] -> true + | _ -> false + + + let rec select_veci elems sels elemw e sel = + match e, sel with + | _, _ when elems = sels && triv_sel 0 sel -> e + | _, i::is when List.length is > 0 && triv_sel i sel && Z.rem (Z.of_int i) (Z.of_int (List.length sel)) = Z.zero && is_factor elems sels -> + let elems = zdiv_int elems sels in + let elemw = mul_int sels elemw in + let sels = expr_of_int 1 in + let sel = [i / List.length sel] in + select_veci elems sels elemw e sel + + | _, i::is when List.length is > 0 && List.for_all (fun j -> i = j) is -> + let e = select_veci elems (expr_of_int 1) elemw e [i] in + replicate sels elemw e + + (* Element-wise vector operations *) + | Expr_TApply(FIdent("ite_vec" as f,0), [iters;w], c::es), _ when is_factor elemw w -> + let n = zdiv_int elemw w in + let iters = mul_int n sels in + let (es,_) = Utils.getlast es in + let es = List.map (fun e -> select_veci elems sels elemw e sel) es in + let c = select_veci elems sels n c sel in + Expr_TApply(FIdent(f,0), [iters;w], c::es@[iters]) + | Expr_TApply(FIdent(f,0), [iters;w], es), _ when List.mem f vec_ops && is_factor iters elems -> + let n = zdiv_int iters elems in + let iters = mul_int n sels in + let (es,_) = Utils.getlast es in + let es = List.map (fun e -> select_veci elems sels (mul_int n w) e sel) es in + Expr_TApply(FIdent(f,0), [iters;w], es@[iters]) + (* Cast operations *) + | Expr_TApply(FIdent(f,0), elems'::ow::tes, es), _ when List.mem f size_cast_vec_ops && is_factor elems' elems -> + let subelems = mul_int (zdiv_int elems' elems) sels in + let elemw = mul_int (zdiv_int elems' elems) ow in + let (es,_) = Utils.getlast es in + let (es,l) = Utils.getlast es in + let es = List.map (fun e -> select_veci elems sels elemw e sel) es in + Expr_TApply(FIdent(f,0), subelems::ow::tes, es@[l;subelems]) + + | Expr_TApply(FIdent("select_vec",0), [elems'; sels'; elemw'], [e; Expr_TApply(FIdent("int_list", 0), [], sel')]), _ + when is_factor elemw elemw' -> + let n = zdiv_int elemw elemw' in + let sels = mul_int sels n in + let sel = List.flatten (List.map (fun s -> + let n = int_of_expr n in + Utils.take n (Utils.drop (s * n) sel') + ) sel) in + select_vec elems' sels elemw' e sel + + (* Replicate, given same element count no difference in result *) + | Expr_TApply (FIdent ("replicate_bits", 0), [_; reps], [e;_]), _ when reps = elems -> + e + + (* Slice from 0 to some width is redundant, just slice full expression directly *) + (*| Expr_Slices (e, [Slice_LoWd(lo, wd)]), _ when is_factor lo elemw -> + let offset = zdiv_int lo elemw in + let sel = List.map (fun e -> add_int offset (expr_of_int e)) sel in + select_vec elems sels elemw e sel *) + + | Expr_LitBits bv, _ -> + let w = int_of_expr elemw in + let ins = (String.length bv) / w in + let vals = List.init ins (fun i -> String.sub bv (i * w) w) in + let vals = List.rev vals in + let res = List.map (fun i -> List.nth vals i) sel in + let res = List.rev res in + Expr_LitBits (String.concat "" res) + + | Expr_Slices _, _ + | Expr_Var _, _ -> + Expr_TApply(FIdent("select_vec",0), [elems; sels; elemw], [e; Expr_TApply (FIdent ("int_list", 0), [], List.map expr_of_int sel)]) + | _ -> + (*Printf.printf "Selecti: %s %s %s %s %s\n" (pp_expr elems) (pp_expr sels) (pp_expr elemw) (pp_expr e) (Utils.pp_list string_of_int sel);*) + Expr_TApply(FIdent("select_vec",0), [elems; sels; elemw], [e; Expr_TApply (FIdent ("int_list", 0), [], List.map expr_of_int sel)]) + + and select_vec elems sels elemw e sel = + if List.for_all is_int sel then + select_veci elems sels elemw e (List.map int_of_expr sel) + else begin + (*Printf.printf "Select: %s %s %s %s %s\n" (pp_expr elems) (pp_expr sels) (pp_expr elemw) (pp_expr e) (Utils.pp_list pp_expr sel);*) + Expr_TApply(FIdent("select_vec",0), [elems; sels; elemw], [e; Expr_TApply (FIdent ("int_list", 0), [], sel)]) + end + + (* For a trivial update: + - all positions must be integers + - the original expression must be fully over-written + - all writes must be unique + *) + let trivial_update i is = + triv_sel i (List.sort (-) is) + let update_vec elems sels elemw e sel a = + match sels with + | _ when elems = sels && List.for_all is_int sel && trivial_update 0 (List.map int_of_expr sel) -> + select_vec elems sels elemw a sel + | _ -> + (*Printf.printf "Update: %s %s %s %s %s %s\n" (pp_expr elems) (pp_expr sels) (pp_expr elemw) (pp_expr e) (Utils.pp_list pp_expr sel) (pp_expr a);*) + Expr_TApply(FIdent("update_vec",0), [elems; sels; elemw], [e; Expr_TApply (FIdent ("int_list", 0), [], sel);a]) + + class opt = object + inherit nopAslVisitor + method !vexpr e = + (match e with + | Expr_TApply(FIdent("select_vec",0), [elems; sels; elemw], [e;Expr_TApply (FIdent ("int_list", 0), [], is)]) -> + ChangeDoChildrenPost(select_vec elems sels elemw e is,fun e -> e) + | Expr_TApply(FIdent("update_vec",0), [elems; sels; elemw], [e;Expr_TApply (FIdent ("int_list", 0), [], is);a]) -> + ChangeDoChildrenPost(update_vec elems sels elemw e is a,fun e -> e) + | _ -> DoChildren) + end + + let do_transform s = + visit_stmts (new opt) s + +end + +(* + A simple pass to sanity check the produced select and update operations. + Ideally, all selects should operate over a constant position argument and update + operations should be fully eliminated. +*) +module LoopLower = struct + + class lower = object + inherit nopAslVisitor + method !vexpr e = + match e with + | Expr_TApply(FIdent("select_vec",0), [elems; sels; elemw], [e'; Expr_TApply (FIdent ("int_list", 0), [], is)]) -> + if List.for_all is_int is then + let is = List.map (fun e -> (Primops.({n = 32 ; v = Z.of_int (int_of_expr e)}))) is in + let bv = List.fold_left Primops.prim_append_bits Primops.empty_bits (List.rev is) in + let m = Z.format ("%0" ^ string_of_int bv.n ^ "b") bv.v in + ChangeDoChildrenPost (Expr_TApply(FIdent("select_vec",0), [elems; sels; elemw], [e'; Expr_LitBits m]), fun e -> e) + else + failwith @@ "LoopLower: Cannot lower non-constant select_vec position argument " ^ pp_expr e + | Expr_TApply(FIdent("update_vec",0), _, _) -> + failwith @@ "LoopLower: update_vec operation left in body " ^ pp_expr e + | _ -> DoChildren + end + + let do_transform = visit_stmts (new lower) + +end + +(* + Vectorize loops, without much concern for optimal representation. + Just focus on the correctness of the transform, we can cleanup later. + *) +module Vectorize = struct + open Symbol + + let elist i fn = + List.init (int_of_expr i) (fun i -> fn (expr_of_int i)) + let mk_int_list l = + Expr_TApply (FIdent("int_list",0), [], l) + + let rec triv_sel i is = + match is with + | j::is when expr_is_int j i -> triv_sel (i+1) is + | [] -> true + | _ -> false + + let select_vec elems sels elemw e sel = + match sel with + | Expr_TApply(FIdent("int_list", 0), [], is) when elems = sels && triv_sel 0 is -> e + | _ -> Expr_TApply(FIdent("select_vec", 0), [elems; sels; elemw], [e; sel]) + + let update_vec elems sels elemw e sel arg = + Expr_TApply(FIdent("update_vec", 0), [elems; sels; elemw], [e; sel; arg]) + + let error m = + failwith @@ "LoopClassify: " ^ m + + (**************************************************************** + * Abstract Domain + ****************************************************************) + + type abs = + (* A single value expression, equivalent across iters *) + Value of sym | + (* A parallel write operation *) + Map of string * sym list * abs list | + (* A value directly derived from the loop index, as a base and multiplier *) + Index of (sym * sym) list | + (* Bot *) + Undecl + + let rec pp_abs e = + match e with + | Value e -> "Value(" ^ pp_expr e ^ ")" + | Map(f,tes,ves) -> "Map(" ^ f ^ ", " ^ Utils.pp_list pp_expr tes ^ ", " ^ Utils.pp_list pp_abs ves ^ ")" + | Index l -> "Index(" ^ Utils.pp_list (fun (e,m) -> pp_expr e ^ "," ^ pp_expr m) l ^ ")" + | Undecl -> "Undecl" + + let rec deps e = + match e with + | Value e -> fv_expr e + | Map(f,tes,ves) -> IdentSet.union (unionSets (List.map fv_expr tes)) (unionSets (List.map deps ves)) + | Index l -> unionSets (List.map (fun (b,m) -> IdentSet.union (fv_expr b) (fv_expr m)) l) + | Undecl -> IdentSet.empty + + let is_val e = + match e with + | Value _ -> true + | _ -> false + + let force_val e = + match e with + | Value e -> e + | _ -> error @@ "force_val: " ^ pp_abs e + + let is_index e = + match e with + | Index _ -> true + | _ -> false + + let force_index e = + match e with + | Index e -> e + | _ -> error @@ "force_index: " ^ pp_abs e + + (**************************************************************** + * Analysis State + ****************************************************************) + + type state = { + (* Base Loop Properties *) + iterations: expr; + (* Variable Classification *) + vars: abs Bindings.t; + (* Loop Defined *) + ld: abs Bindings.t; + + (* Type Info *) + types: ty Bindings.t; + env: Eval.Env.t; + } + + (* Create the state for a single loop analysis, from its definition *) + let init_state var start stop dir types env = + let abs = match dir with + | Direction_Up -> Index[start, expr_of_Z Z.one] + | Direction_Down -> Index[start, expr_of_Z (Z.neg Z.one)] in + let iterations = match dir with + | Direction_Up -> add_int (sub_int stop start) (expr_of_Z Z.one) + | Direction_Down -> add_int (sub_int start stop) (expr_of_Z Z.one) in + { iterations ; vars = Bindings.empty ; ld = Bindings.add var abs Bindings.empty ; types ; env } + + let get_var v st = + match Bindings.find_opt v st.ld with + | Some v -> Some v + | None -> Bindings.find_opt v st.vars + + let decl_ld v i st = + {st with ld = Bindings.add v i st.ld} + + let assign_var v i st = + if Bindings.mem v st.ld then + {st with ld = Bindings.add v i st.ld} + else + {st with vars = Bindings.add v i st.vars} + + let type_of_expr st e = + match Dis_tc.infer_type e st.types st.env with + | Some t -> t + | None -> error @@ "type_of_expr: Unknown type " ^ (pp_expr e) + + let width_of_expr st e = + match type_of_expr st e with + | Type_Bits e -> e + | Type_Constructor (Ident "boolean") -> expr_of_int 1 + | Type_Register (w,_) -> expr_of_int (int_of_string w) + | t -> failwith @@ "width_of_expr: Unknown width " ^ (pp_expr e) ^ " :: " ^ pp_type t + + (**************************************************************** + * Phase 1: Produce a candidate loop summary + ****************************************************************) + + (* Construct a vector read *) + let read_vec elems iters elemw e sels = + Map ("read_vec", [elems; iters; elemw], [e; sels]) + + (* Construct a vector write *) + let write_vec elems iters elemw e sels a = + match e, sels with + | Map("write_vec", [elemsi;itersi;elemwi], [e; Index[bi,mi]; ai]), Index[bo,mo] + when expr_is_int bi 0 && expr_is_int bo 1 && expr_is_int mi 2 && expr_is_int mo 2 && + elemsi = elems && elemwi = elemw && itersi = iters -> + let arg = Map("append_bits", [elemw;elemw], [a;ai]) in + let elemw = mul_int elemw mi in + let elems = zdiv_int elems mi in + let sel = Index[bi,bo] in + Map ("write_vec", [elems; iters; elemw], [e; sel; arg]) + | _ -> Map("write_vec", [elems; iters; elemw], [e; sels; a]) + + (* Construct an ITE expression between a & b, conditional on c. + Requires a & b to be bvs of width w. *) + let ite_vec (iters: expr) (w: expr) (c: abs) (a: abs) (b: abs) = + match c, a, b with + (* Trivial conditions to collapse an ite *) + | _, a, b when a = b -> a + | Value (Expr_Var (Ident "TRUE")), a, b -> a + | Value (Expr_Var (Ident "FALSE")), a, b -> b + | c, Value (Expr_Var (Ident "TRUE")), Value (Expr_Var (Ident "FALSE")) -> c + (* This is a trivial result, constant for all loop iterations *) + | Value c, Value a, Value b -> + Value (Expr_TApply(FIdent("ite",0), [w], [c;a;b])) + (* Vector ite *) + | _ -> Map ("ite", [w], [c;a;b]) + + (* Construct a vector slice *) + let slice_vec (iters: expr) (ow: expr) (e: abs) (lo: abs) (nw: abs) = + match e, lo, nw with + (* Entirely constant, pass it through *) + | Value e, Value lo, Value wd when wd = ow && expr_is_int lo 0 -> + Value e + | Value e, Value lo, Value wd -> + Value (Expr_Slices(e, [Slice_LoWd(lo, wd)])) + (* A truncate operation *) + | Map _, Value lo, Value nw when expr_is_int lo 0 -> + Map ("trunc", [ow; nw], [e; Value nw]) + (* A shift and truncate operation *) + | Map _, Value lo, Value nw -> + let lo = cvt_int_bits lo ow in + let e' = Map("asr_bits", [ow], [e; Value lo]) in + Map ("trunc", [ow; nw], [e'; Value nw]) + (* Slice that can be converted to Elem.read *) + | Value e, Index[b,m], Value wd + when is_factor b wd && is_factor m wd && is_factor ow wd -> + let elems = zdiv_int ow wd in + let b = zdiv_int b wd in + let m = zdiv_int m wd in + read_vec elems iters wd (Value e) (Index[b,m]) + | a, b, c -> error @@ "slice_vec: " ^ Utils.pp_list pp_abs [a;b;c] + + (* Transfer function for a primitive application *) + let tf_prim st f i tes es = + match f, i, tes, es with + (* Everything is constant, can skip *) + | f, i, tes, es when List.for_all is_val es -> + Value (Expr_TApply(FIdent(f,i), tes, List.map force_val es)) + + (* Supported operations over Index expressions *) + | "add_int", 0, [], [Index [base,mul];Value offset] + | "add_int", 0, [], [Value offset;Index [base,mul]] -> + Index [add_int base offset, mul] + | "sub_int", 0, [], [Index [base,mul];Value offset] -> + Index [sub_int base offset, mul] + | "sub_int", 0, [], [Value offset;Index [base,mul]] -> + Index [sub_int offset base, mul_int mul (Expr_LitInt "-1")] + | "mul_int", 0, [], [Index [base,mul];Value offset] + | "mul_int", 0, [], [Value offset;Index [base,mul]] -> + Index [mul_int base offset, mul_int mul offset] + | "int_list", 0, [], is when List.for_all is_index is -> + Index (List.flatten (List.map force_index is)) + | "cvt_int_bits", 0, [w], [Index l; _] -> + Map ("cvt_int_bits", [w], [Index l]) + + (* Read Operations *) + | "Elem.read", 0, [vecw ; elemw], [e; sel; _] when is_factor vecw elemw -> + read_vec (zdiv_int vecw elemw) (expr_of_int 1) elemw e sel + | "select_vec", 0, [elems; sels; elemw], [e; sel] -> + read_vec elems sels elemw e sel + | "Elem.set", 0, [vecw ; elemw], [e; sel; _; arg] when is_factor vecw elemw -> + write_vec (zdiv_int vecw elemw) (expr_of_int 1) elemw e sel arg + | "update_vec", 0, [elems; sels; elemw], [e; sel; arg] -> + write_vec elems sels elemw e sel arg + | "replicate_bits", 0, [w; reps], [e; _] -> + let sel = elist reps (fun _ -> expr_of_int 0) in + let sel = mk_int_list sel in + read_vec (expr_of_int 1) reps w e (Value sel) + + (* TODO: Doesn't seem to fit in any existing generalisation *) + | "append_bits", 0, tes, es -> Map("append_bits", tes, es) + + (* Boolean Vector Operations *) + | f, 0, tes, es when List.mem_assoc f bit_ops -> Map(f, tes, es) + (* Element-wise Vector Operations *) + | f, 0, tes, es when List.mem_assoc f elem_ops -> Map(f, tes, es) + (* Element-wise + Scalar Arg Operations *) + | f, 0, tes, es when List.mem_assoc f sv_final_ops -> Map(f, tes, es) + (* Vec Ops *) + | f, 0, tes, es when List.mem f vec_ops -> Map(f, tes, es) + | f, 0, tes, es when List.mem f sv_final_vec_ops -> Map(f, tes, es) + | f, 0, tes, es when List.mem f reduce_ops -> Map(f, tes, es) + | _ -> error @@ "tf_prim: Unknown prim " ^ f ^ " " ^ Utils.pp_list pp_expr tes ^ " " ^ Utils.pp_list pp_abs es + + (* Transfer function for an expression *) + let rec tf_expr st e = + let iters = st.iterations in + match e with + | Expr_LitBits _ -> Value e + | Expr_LitInt _ -> Value e + | Expr_Var v -> + (match get_var v st with + | Some abs -> abs + | None -> Value e) + | Expr_Array(e,i) -> + (match tf_expr st e, tf_expr st i with + | Value e, Value i -> Value (Expr_Array(e,i)) + | Value e, Index[b,m] -> Map ("array", [], [Value e; Index[b,m]]) + | e, i -> error @@ "tf_expr: Unsupported array op " ^ Utils.pp_list pp_abs [e;i]) + | Expr_TApply(FIdent(f,i), tes, es) -> + let tes = List.map (tf_expr st) tes in + if List.for_all is_val tes then + let es = List.map (tf_expr st) es in + tf_prim st f i (List.map force_val tes) es + else + error @@ "tf_expr: Loop defined type argument " ^ f ^ " " ^ Utils.pp_list pp_abs tes + | Expr_Slices(e, [Slice_LoWd(lo,wd)]) -> + let ow = width_of_expr st e in + let e = tf_expr st e in + let lo = tf_expr st lo in + let wd = tf_expr st wd in + slice_vec iters ow e lo wd + | _ -> error @@ "tf_expr: Unknown expr " ^ pp_expr e + + (* Join states a & b given the condition cond. *) + let join_st cond st1 st2 = + let iters = st1.iterations in + (* Merge loop defined constructs, assume they are defined + on both paths. *) + let ld = Bindings.merge (fun k l r -> + match l, r with + (* Same effect *) + | Some l, Some r when l = r -> Some l + | Some l, Some r -> + let w = width_of_expr st1 (Expr_Var k) in + Some (ite_vec iters w cond l r) + | _ -> None) st1.ld st2.ld in + (* Merge external constructs, support conditional effects *) + let vars = Bindings.merge (fun k l r -> + match l, r with + (* Same effect *) + | Some l, Some r when l = r -> Some l + (* Conditional write *) + | Some e, None -> + let w = width_of_expr st1 (Expr_Var k) in + Some (ite_vec iters w cond e (Value (Expr_Var k))) + | None, Some e -> + let w = width_of_expr st1 (Expr_Var k) in + Some (ite_vec iters w cond (Value (Expr_Var k)) e) + (* Conditional write *) + | _ -> + failwith @@ "Failed to join vars: " ^ pprint_ident k ^ ":" ^ + (Utils.pp_option pp_abs l) ^ " " ^ Utils.pp_option pp_abs r + ) st1.vars st2.vars in + { st1 with vars; ld } + + (* Transfer function for a list of statements *) + let rec tf_stmts st s = + List.fold_left (fun st stmt -> + match stmt with + (* Loop Internal Calculations *) + | Stmt_ConstDecl(ty, v, e, loc) -> + let abs = tf_expr st e in + decl_ld v abs st + | Stmt_VarDecl(ty, v, e, loc) -> + let abs = tf_expr st e in + decl_ld v abs st + | Stmt_VarDeclsNoInit(ty, [v], loc) -> + decl_ld v Undecl st + | Stmt_Assign(LExpr_Var v, e, loc) -> + let abs = tf_expr st e in + assign_var v abs st + | Stmt_If(c, t, [], f, loc) -> + let abs = tf_expr st c in + let tst = tf_stmts st t in + let fst = tf_stmts st f in + join_st abs tst fst + | Stmt_Assert(e, loc) -> + (* TODO: We should actually validate or keep this around *) + st + | _ -> failwith @@ "Unknown loop stmt: " ^ pp_stmt stmt) st s + + (**************************************************************** + * Phase 2: Fixed Point Identification + ****************************************************************) + + (* + Given summaries of each externally scoped variable write, + determine if they are trivially parallelized. + We attempt to show all externally scoped variables + are only self-referential, i.e., there is no dependence relation + between externally scoped variables. + Once we know variables are at most self-referential, we determine the + necessary reduction to capture their cumulative effects. + This occurs in Phase 3. + *) + + let pp_assign v d = + pprint_ident v ^ " := " ^ pp_abs d + + (* Determine if the summary is valid: + 1. All constants are actually constant + 2. Modified variables are at most self-referential + *) + let validate_summary effects = + (* Nested iteration to find cases of cross-references *) + Bindings.iter (fun var def -> + Bindings.iter (fun var' def' -> + match var,def,var',def' with + (* Ignore self *) + | v,_,v',_ when v = v' -> () + (* Outer variable referenced by inner variable *) + | v,d,v',d' when IdentSet.mem v (deps d') -> + failwith @@ "Cross-reference: " ^ pp_assign v d ^ " && " ^ + pp_assign v' d' + | _ -> () + ) effects + ) effects + + (* Run the analysis from an initial state. *) + let fixed_point init_st body = + let cand_st = tf_stmts init_st body in + let _ = validate_summary cand_st.vars in + cand_st + + (**************************************************************** + * Phase 3: Cycle Reduction + ****************************************************************) + + (* + Convert abstract points into expressions that summarize the loop + effects. Requires pattern matching on any cyclic definitions + to identify a sound reduction. + *) + + (* + This is essentially the concretization function for an + abstract element, converting it back into a valid expression. + *) + let rec unroll st a = + let iters = st.iterations in + match a with + (* Replicated values *) + | Value e -> + (match type_of_expr st e with + | Type_Bits w -> replicate iters w e + | t when t = type_bool -> replicate iters (expr_of_int 1) (cvt_bool_bv e) + | t when t = type_integer -> mk_int_list (elist iters (fun _ -> e)) + | t -> error @@ "unroll: value with unexpected type: " ^ pp_expr e ^ " " ^ pp_type t) + + (* Boolean Vector Operations *) + | Map(f,[],es) when List.mem_assoc f bit_ops -> + Expr_TApply(FIdent(List.assoc f bit_ops,0), [iters], List.map (unroll st) es) + (* Bit-wise Vector Operations *) + | Map(f,[w],es) when List.mem_assoc f bit_ops -> + Expr_TApply(FIdent(List.assoc f bit_ops,0), [mul_int iters w], List.map (unroll st) es) + (* Element-wise Vector Operations *) + | Map(f,[w],es) when List.mem_assoc f elem_ops -> + Expr_TApply(FIdent(List.assoc f elem_ops,0), [iters; w], (List.map (unroll st) es)@[iters]) + (* Element-wise + Scalar Arg Operations *) + | Map(f, tes, es) as abs when List.mem_assoc f sv_final_ops -> + let (es,l) = Utils.getlast es in + (match l with + | Value l -> + Expr_TApply(FIdent(List.assoc f sv_final_ops,0), iters::tes, (List.map (unroll st) es)@[l;st.iterations]) + | _ -> error @@ "unroll: sv_final_ops with final vector argument: " ^ pp_abs abs ) + + (* Element-wise Vector Operations *) + | Map(f, iters::tes, es) when List.mem f vec_ops -> + let (es,_) = Utils.getlast es in + let es = List.map (unroll st) es in + let iters = mul_int st.iterations iters in + Expr_TApply (FIdent(f,0), iters::tes, es@[iters]) + (* Element-wise + Scalar Arg Vector Operations *) + | Map(f, iters::tes, es) as abs when List.mem f sv_final_vec_ops -> + let (es,_) = Utils.getlast es in + let (es,l) = Utils.getlast es in + let es = List.map (unroll st) es in + let iters = mul_int st.iterations iters in + (match l with + | Value l -> + Expr_TApply (FIdent(f,0), iters::tes, es@[l;iters]) + | _ -> error @@ "unroll: sv_final_vec_ops with vector argument" ^ pp_abs abs) + (* Vector Reduce Operations *) + | Map(f, [iters;w], [e;b;_]) when List.mem f reduce_ops -> + (* Unroll and slice out the parts of e we want *) + let e = unroll st e in + let b = unroll st b in + let ew = mul_int iters w in + (* One reduce per iteration *) + let es = elist st.iterations (fun i -> + let sel = mk_int_list [i] in + let a = select_vec st.iterations (expr_of_int 1) ew e sel in + let b = select_vec st.iterations (expr_of_int 1) w b sel in + Expr_TApply(FIdent(f,0), [iters;w], [a;b;iters])) in + let es = List.map (fun i -> (w,i)) es in + concat_bits es + + (* Read Operations *) + | Map("read_vec", [elems; _; elemw], [Value e; Index l]) -> + let sel = unroll st (Index l) in + let iters = mul_int (expr_of_int (List.length l)) iters in + select_vec elems iters elemw e sel + | Map("read_vec", [elems; _; elemw], [e; Value (Expr_TApply(FIdent("int_list",0), [], is))]) -> + let e = unroll st e in + let sel = elist st.iterations (fun i -> List.map (add_int (mul_int i elems)) is) in + let sel = (List.flatten sel) in + let elems = mul_int elems st.iterations in + let iters = expr_of_int (List.length sel) in + select_vec elems iters elemw e (mk_int_list sel) + + | Map("append_bits", [w1;w2], [e1;e2]) when w1 = w2 -> + let e1 = unroll st e1 in + let e2 = unroll st e2 in + let w = mul_int st.iterations w1 in + let e = append_bits w w e1 e2 in + let sel = List.flatten (elist st.iterations (fun i -> [i; add_int st.iterations i])) in + let sel = mk_int_list sel in + let i = mul_int st.iterations (expr_of_int 2) in + select_vec i i w1 e sel + + (* Array Loads *) + | Map("array", [], [Value v; Index[b,m]]) -> + let is = elist st.iterations (fun i -> add_int b (mul_int i m)) in + let w = width_of_expr st (Expr_Array(v, expr_of_int 0)) in + let z = List.map (fun i -> (w,Expr_Array(v, i))) is in + concat_bits z + + (* Index unrolling *) + | Index l -> + let is = elist iters (fun i -> List.map (fun (b,m) -> add_int b (mul_int i m)) l) in + let is = List.flatten is in + Expr_TApply(FIdent("int_list",0), [], is) + | Map ("cvt_int_bits", [w], [Index l]) -> + let is = elist iters (fun i -> List.map (fun (b,m) -> add_int b (mul_int i m)) l) in + let is = List.flatten is in + concat_bits (List.map (fun i -> (w, cvt_int_bits i w)) is) + | a -> failwith @@ "unroll: " ^ pp_abs a + + + let no_fv var abs = not (IdentSet.mem var (deps abs)) + + let abs_leq pos pos' = + match pos, pos' with + | Index[Expr_LitInt b,Expr_LitInt m], Index[Expr_LitInt b',Expr_LitInt m'] -> + Z.leq (Z.of_string b) (Z.of_string b') && Z.leq (Z.of_string m) (Z.of_string m') + | _ -> false + + (* Ensure a vector write does not create a write-read dependency *) + let rec no_write_read var pos abs = + match abs with + | Map("read_vec", _, [Value(Expr_Var var'); pos']) when var = var' -> abs_leq pos pos' + | Map(f, tes, es) -> + let tes = not (IdentSet.mem var (unionSets (List.map fv_expr tes))) in + let es = List.for_all (no_write_read var pos) es in + tes && es + | _ -> no_fv var abs + + (* Ensure a vector write does not create a write-write dependency. + Takes the position argument of an update_vec and ensures all locations + are distinct. + *) + let no_write_write_dep sel = + match sel with + | Index l -> + let fn = function (_,Expr_LitInt i) -> int_of_string i <> 0 | _ -> false in + List.for_all fn l + | _ -> false + + (* For a variable and abstract point, produce an expression equivalent to the + parallel evaluation of the abstract point. + Assumes we have established at most self reference. *) + let summarize_assign st var abs = + match abs with + (* When not dependent on any loop written vars, simply build the operation. *) + | Value e when not (IdentSet.mem var (deps abs)) -> e + | _ when not (IdentSet.mem var (deps abs))-> + let e = unroll st abs in + let wd = width_of_expr st e in + let w = zdiv_int wd st.iterations in + let lo = mul_int (sub_int st.iterations (expr_of_int 1)) w in + Expr_Slices(e, [Slice_LoWd(lo,w)]) + (* Id *) + | Value (Expr_Var a) when a = var -> Expr_Var a + + (* Vector update *) + | Map ("write_vec", [elems; iters; elemw], [Value (Expr_Var var'); sel; arg]) + when var = var' && no_fv var sel && no_write_read var sel arg && no_write_write_dep sel -> + let sel = unroll st sel in + let arg = unroll st arg in + let iters = mul_int iters st.iterations in + update_vec elems iters elemw (Expr_Var var) sel arg + + (* Reduce Add/EOR *) + | Map(("add_bits" | "eor_bits") as f, [w], [Value (Expr_Var var') ; e]) + when var' = var && not (IdentSet.mem var (deps e)) -> + let e = unroll st e in + let op = if f = "add_bits" then "reduce_add" else "reduce_eor" in + Expr_TApply (FIdent(op,0), [st.iterations; w], [e ; Expr_Var var; st.iterations]) + | Map("ite", [w], [c; Map("eor_bits" as f, _, [Value (Expr_Var var') ; e]); Value (Expr_Var var'')]) + when var' = var && var'' = var && not (IdentSet.mem var (deps e)) -> + let z = zeroes (mul_int st.iterations w) in + let e = unroll st e in + let c = unroll st c in + let f = if f = "add_bits" then "reduce_add" else "reduce_eor" in + let i = Expr_TApply (FIdent("ite_vec", 0), [st.iterations; w], [c ; e ; z ; st.iterations]) in + Expr_TApply (FIdent(f,0), [st.iterations; w], [i;Expr_Var var;st.iterations]) + + (* Signed Min : var <= e ? var : e *) + | Map("ite", [w], [Map("sle_bits", _, [Value (Expr_Var var'); e]); Value (Expr_Var var''); e']) + when var' = var'' && var = var' && e = e' && no_fv var e -> + let e = unroll st e in + Expr_TApply (FIdent("reduce_smin",0), [st.iterations; w], [e; Expr_Var var]) + (* Signed Max : e <= var ? var : e *) + | Map("ite", [w], [Map("sle_bits", _, [e; Value (Expr_Var var')]); Value (Expr_Var var''); e']) + when var' = var'' && var = var' && e = e' && no_fv var e -> + let e = unroll st e in + Expr_TApply (FIdent("reduce_smax",0), [st.iterations; w], [e; Expr_Var var]) + (* Unsigned Min : zcast var <= zcast e ? var : e *) + | Map("ite", [w], [Map("sle_bits", _, [Value (Expr_TApply (FIdent("ZeroExtend", 0), _, [Expr_Var var';_])); Map("ZeroExtend", _, [e;_])]); Value (Expr_Var var''); e']) + when var' = var'' && var = var' && e = e' && no_fv var e -> + let e = unroll st e in + Expr_TApply (FIdent("reduce_smin",0), [st.iterations; w], [e; Expr_Var var]) + (* Unsigned Max : zcast e <= zcast var ? var : e *) + | Map("ite", [w], [Map("sle_bits", _, [Map("ZeroExtend", _, [e;_]); Value (Expr_TApply (FIdent("ZeroExtend", 0), _, [Expr_Var var';_]))]); Value (Expr_Var var''); e']) + when var' = var'' && var = var' && e = e' && no_fv var e -> + let e = unroll st e in + Expr_TApply (FIdent("reduce_smax",0), [st.iterations; w], [e; Expr_Var var]) + + (* Conditional Bit Set *) + (*| Map("ite", tes, [c;Value t;Value f]) when var = Ident "FPSR" -> + let ew = width_of_expr st t in + let c = unroll st c in + let w = width_of_expr st c in + let test = Expr_TApply(FIdent("eq_bits", 0), [w], [c; zeroes w]) in + Expr_TApply(FIdent("ite", 0), [ew], [test; f; t]) *) + + | _ -> error @@ "Failed to summarize " ^ pprint_ident var ^ " <- " ^ pp_abs abs + + (* Given a successful abstract representation of a loop, reduce its observable + effects into a series of assignments. + *) + let loop_summary st loc = + Bindings.fold (fun var abs acc -> + let c = summarize_assign st var abs in + let s = Stmt_Assign(LExpr_Var var, c, loc) in + s::acc + ) st.vars [] + + (**************************************************************** + * Analysis Entry Point + ****************************************************************) + + (* Reduce inner loops first *) + let rec walk s types env : stmt list = + List.fold_left (fun acc stmt -> + match stmt with + | Stmt_For(var, start, dir, stop, body, loc) -> + let body = walk body types env in + let st = init_state var start stop dir types env in + let st' = fixed_point st body in + let sum = loop_summary st' loc in + let sum = LoopOpt.do_transform sum in + acc@sum + | Stmt_If(c, t, [], f, loc) -> + let t = walk t types env in + let f = walk f types env in + acc@[Stmt_If(c, t, [], f, loc)] + | _ -> acc@[stmt]) [] s + + let do_transform (s: stmt list) env : stmt list = + let tys = Dis_tc.LocalVarTypes.run [] [] s in + walk s tys env + +end + +let do_transform s env = + try + let s = Vectorize.do_transform s env in + let s = LoopLower.do_transform s in + (true,s) + with e -> + (*Printf.printf "\nVec Failure: %s\n" (Printexc.to_string e);*) + (false,s) diff --git a/libASL/transforms.ml b/libASL/transforms.ml index e0fe199a..1e827f4a 100644 --- a/libASL/transforms.ml +++ b/libASL/transforms.ml @@ -2863,1010 +2863,8 @@ module BDDSimp = struct Bindings.mapi (fun nm fnsig -> let i = match nm with FIdent(s,_) -> Ident s | s -> s in match Bindings.find_opt i st.instrs with - | Some reach -> fnsig_upd_body (fun b -> + | Some reach -> fnsig_upd_body (fun b -> if log then Printf.printf "transforming %s\n" (pprint_ident nm); do_transform nm b reach) fnsig | None -> fnsig) instrs end - -(* - The analysis attempts to argue that all loop computations - are in parallel, by encoding their simultaneous calculation given - the loop's initial state. - - This is encoded in the abstract domain as the following: - f: var -> state -> value list - where f(var,state) returns a list of values, where the Nth value - of the list corresponds to the value of 'var' on the Nth loop - iteration, when the loop started with state 'state'. - - This function encoding (state -> value list) is encoded in type abs, - which we conceptually consider as type 'abs = {expr list}'. - The semantics of this encoding is listed below: - - collate es = - if List.exists empty es then [] else - let hds = map hd es in - let tails = map tail es in - hds::(collate tails) - - (* - sem : state -> {expr list} -> value list - We use {expr list} to represent our abstract type, corresponding to a list - of expressions implicitly. - Note that state never changes. - N is the number of loop iterations. - *) - - sem state VecOp(op : ident, tes : expr list, es : {expr list} list) : value list = - (* Types should be constant *) - let tes' = map (eval state) tes in - (* Evaluate each argument *) - let es' = map (sem state) es in - (* Collapse list of vector args into vector of args *) - let es' = collate es' in - (* Apply op to each collection of args *) - map (fun es -> op(tes', es)) es' - - sem state Read(vec : expr, pos : {expr list}, width : expr) : value list = - (* Types and width should be constant *) - let vec' = eval state val in - let width' = eval state width in - (* Evaluate pos encoding into a list of values *) - let pos' = sem state pos in - (* Map each position to a result *) - map (fun pos -> Elem.read(vec',pos,width')) pos' - - sem state Constant(e : expr) : value list = - (* Evaluate the constant expression once *) - let e' = eval state e in - (* Produce a vector of this constant N times *) - init N (fun _ -> e') - - sem state Index(e : expr, mul : expr) : value list = - (* Evaluate the constant base & mul expressions once *) - let e' = eval state e in - let m' = eval state mul in - (* Produce a vector of this base + mul * i N times *) - init N (fun i -> e' + m' * i) - - sem state BV(e : {expr list}, w : expr, s : bool) : value list = - let e' = sem state e in - let w' = eval state w in - map (fun e -> int_to_bits(e,w',s)) e' - - sem state Write(var : ident, pos : {expr list}, width : expr, e : {expr list}) : value list = - let pos' = sem state pos in - let width' = eval state width in - let e' = sem state e in - (* This write corresponds to a full definition of var *) - (* Knowing this simplifies its subsequent transform into a vector op *) - assert (unique pos'); - assert (length pos' * width' = width_of_var var); - (* Sort values based on their position *) - map snd (sort fst (zip pos' e')) - - We derive these encodings in a single loop pass, assuming no - interference between loop iterations and no failed assertions. - These are then validated given the summary of loop effects: - - asserts over the Write operation are checked - - interference between loop bodies is checked - - Interference may occur when expressions depend on the results - of prior loop iterators, e.g., a loop counter i := i + 1. - In some cases, such as the loop counter, these values can - be rephrased to be order independent, e.g., Index(i,1) for - the given example. - We apply these transforms and re-attempt the summary. -*) -module LoopClassify = struct - (**************************************************************** - * Symbolic Helpers - ****************************************************************) - - let mk_ite c w a b = - match c with - | Expr_Var (Ident "TRUE" ) -> a - | Expr_Var (Ident "FALSE") -> b - | _ -> Expr_TApply (FIdent("ite", 0), [w], [c;a;b]) - - let expr_of_Z i = Expr_LitInt (Z.to_string i) - let print_bv ({n;v} : Primops.bitvector) = (Z.format ("%0" ^ string_of_int n ^ "b") v) - let expr_of_bv (bv : Primops.bitvector) = Expr_LitBits(print_bv bv) - - let parse_bits s = - match from_bitsLit s with - | VBits v -> v - | _ -> failwith @@ "parse_bits: " ^ s - - let parse_signed_bits s = - match from_bitsLit s with - | VBits v -> Primops.z_signed_extract v.v 0 v.n - | _ -> failwith @@ "parse_signed_bits: " ^ s - - let cvt_int_bits a w = - match a, w with - | Expr_LitInt a, Expr_LitInt w -> - expr_of_bv (Primops.prim_cvt_int_bits (Z.of_string w) (Z.of_string a)) - | _ -> Expr_TApply(FIdent("cvt_int_bits",0), [w], [a; w]) - - let add_int a b = - match a, b with - | Expr_LitInt a, Expr_LitInt b -> Expr_LitInt (Z.to_string (Z.add (Z.of_string a) (Z.of_string b))) - | Expr_LitInt "0", b -> b - | a, Expr_LitInt "0" -> a - | _ -> Expr_TApply(FIdent("add_int",0), [], [a;b]) - - let sub_int a b = - match a, b with - | Expr_LitInt a, Expr_LitInt b -> Expr_LitInt (Z.to_string (Z.sub (Z.of_string a) (Z.of_string b))) - | _ -> Expr_TApply(FIdent("sub_int",0), [], [a;b]) - - let mul_int a b = - match a, b with - | Expr_LitInt a, Expr_LitInt b -> Expr_LitInt (Z.to_string (Z.mul (Z.of_string a) (Z.of_string b))) - | _ -> Expr_TApply(FIdent("mul_int",0), [], [a;b]) - - let div_int a b = - match a, b with - | Expr_LitInt a, Expr_LitInt b -> Expr_LitInt (Z.to_string (Z.div (Z.of_string a) (Z.of_string b))) - | _ -> Expr_TApply(FIdent("div_int",0), [], [a;b]) - - let mod_int a b = - match a, b with - | Expr_LitInt a, Expr_LitInt b -> Expr_LitInt (Z.to_string (Z.rem (Z.of_string a) (Z.of_string b))) - | _ -> Expr_TApply(FIdent("mod_int",0), [], [a;b]) - - let eq_int a b = - match a, b with - | Expr_LitInt a, Expr_LitInt b when Z.of_string a = Z.of_string b -> Expr_Var (Ident "TRUE") - | Expr_LitInt a, Expr_LitInt b -> Expr_Var (Ident "FALSE") - | _ -> Expr_TApply(FIdent("eq_int",0), [], [a;b]) - - let ite_int c a b = - match c, a, b with - | Expr_Var (Ident "TRUE"), _, _ -> a - | Expr_Var (Ident "FALSE"), _, _ -> b - | _, a,b when a = b -> a - | _ -> Expr_TApply(FIdent("ite_int",0), [], [c;a;b]) - - let zero_int = Expr_LitInt "0" - - let add_bits w a b = - match a, b with - | Expr_LitBits a, Expr_LitBits b -> expr_of_bv (Primops.prim_add_bits (parse_bits a) (parse_bits b)) - | _ -> Expr_TApply(FIdent("add_bits",0), [w], [a;b]) - - let sub_bits w a b = - match a, b with - | Expr_LitBits a, Expr_LitBits b -> expr_of_bv (Primops.prim_sub_bits (parse_bits a) (parse_bits b)) - | _ -> Expr_TApply(FIdent("sub_bits",0), [w], [a;b]) - - let mul_bits w a b = - match a, b with - | Expr_LitBits a, Expr_LitBits b -> expr_of_bv (Primops.prim_mul_bits (parse_bits a) (parse_bits b)) - | _ -> Expr_TApply(FIdent("mul_bits",0), [w], [a;b]) - - let zeroes w = - match w with - | Expr_LitInt w -> expr_of_bv { v = Z.zero ; n = int_of_string w } - | _ -> failwith "" - - let neg_bits w a = - sub_bits w (zeroes w) a - - let cvt_bits_sint a w = - match a, w with - | Expr_LitBits bv, Expr_LitInt w -> - let v = parse_signed_bits bv in - Expr_LitInt (Z.to_string v) - | _ -> Expr_TApply(FIdent("cvt_bits_sint",0), [w], [a]) - - let cvt_bits_uint a w = - match a, w with - | Expr_LitBits bv, Expr_LitInt w -> - let v = parse_bits bv in - Expr_LitInt (Z.to_string v.v) - | _ -> Expr_TApply(FIdent("cvt_bits_uint",0), [w], [a]) - - let sign_extend a w = - match a, w with - | _ -> Expr_TApply(FIdent("SignExtend",0), [w], [a]) - - let zero_extend a w = - match a, w with - | _ -> Expr_TApply(FIdent("ZeroExtend",0), [w], [a]) - - let append_bits w1 w2 x y = - match x, y with - | Expr_LitBits x, Expr_LitBits y -> Expr_LitBits (x ^ y) - | _ -> Expr_TApply (FIdent ("append_bits", 0), [w1;w2], [x;y]) - - (**************************************************************** - * Abstract Domain - ****************************************************************) - - type abs = - (* An expression that does not change across loop iterations *) - Constant of expr | - (* A vectorized operation, taking a series of type and standard arguments *) - VecOp of ident * expr list * abs list | - (* A read operation, given position, element width, vector width *) - Read of expr * abs * expr * expr | - (* A write operation, given destination, position, element width, vector width, value *) - Write of ident * abs * expr * expr * abs | - (* Base, mult *) - Index of expr * expr | - (* Base, mult, width *) - BVIndex of expr * expr * expr | - Undecl - - let rec pp_abs e = - match e with - | Constant e -> "Constant(" ^ pp_expr e ^ ")" - | VecOp (f,l,r) -> "VecOp(" ^ pprint_ident f ^ "," ^ Utils.pp_list pp_expr l ^ "," ^ Utils.pp_list pp_abs r ^ ")" - | Read (v,p,w,w') -> "Read(" ^ pp_expr v ^ "," ^ pp_abs p ^ "," ^ pp_expr w ^ "," ^ pp_expr w' ^ ")" - | Write (v,p,w,_,e) -> "Write(" ^ pprint_ident v ^ "," ^ pp_abs p ^ "," ^ pp_expr w ^ "," ^ pp_abs e ^ ")" - | Index (e,m) -> "Index(" ^ pp_expr e ^ "," ^ pp_expr m ^ ")" - | BVIndex (b,m,w) -> "BVIndex(" ^ pp_expr b ^ "," ^ pp_expr m ^ "," ^ pp_expr w ^ ")" - | Undecl -> "Undecl" - - let rec deps e = - match e with - | Constant e -> fv_expr e - | VecOp (_,tes,es) -> - let tes_deps = unionSets (List.map fv_expr tes) in - let es_deps = unionSets (List.map deps es) in - IdentSet.union tes_deps es_deps - | Read (v,p,w,ew) -> unionSets [fv_expr v; deps p; fv_expr w; fv_expr ew] - | Write (v,p,w,vw,e) -> IdentSet.add v (unionSets [deps p; fv_expr w; deps e; fv_expr vw]) - | Index (b,m) -> IdentSet.union (fv_expr b) (fv_expr m) - | BVIndex (b,m,_) -> IdentSet.union (fv_expr b) (fv_expr m) - | Undecl -> IdentSet.empty - - let is_vec_op e = - match e with - | Read _ -> true - | VecOp _ -> true - | _ -> false - - let is_constant e = - match e with - | Constant _ -> true - | _ -> false - - let force_constant e = - match e with - | Constant e -> e - | _ -> failwith @@ "force_constant: " ^ pp_abs e - - let concat_bits ls = - let body = fun (w,x) (yw,y) -> let b = append_bits w yw x y in (add_int w yw,b) in - match ls with - | x::xs -> let (_,r) = List.fold_left body x xs in r - | _ -> failwith "concat" - - (* - Helper to build a select vector operation, where x is bits(elems * elemw) and - integers in sels are less than elems. - *) - let select_vec elems elemw x sels = - let sels_len = Expr_LitInt (string_of_int (List.length sels)) in - let w = Expr_LitInt "32" in - let sels = List.rev sels in - let sels = concat_bits (List.map (fun e -> (w, cvt_int_bits e w)) sels) in - (match sels with - | Expr_LitBits _ -> () - | _ -> failwith @@ "Non-constant sels: " ^ pp_expr sels ); - Expr_TApply(FIdent("select_vec",0), [elems; sels_len; elemw], [x; sels]) - - let shuffle_vec elems elemw x y sels = - let sels_len = Expr_LitInt (string_of_int (List.length sels)) in - let w = Expr_LitInt "32" in - let sels = List.rev sels in - let sels = concat_bits (List.map (fun e -> (w, cvt_int_bits e w)) sels) in - (match sels with - | Expr_LitBits _ -> () - | _ -> failwith @@ "Non-constant sels: " ^ pp_expr sels ); - Expr_TApply(FIdent("shuffle_vec",0), [elems; sels_len; elemw], [x; y; sels]) - - let replicate elems elemw x = - Expr_TApply(FIdent("replicate_bits", 0), [elemw; elems], [x; elems]) - - let build_sels length fn = - match length with - | Expr_LitInt v -> (List.init (int_of_string v) (fun i -> fn (expr_of_int i))) - | _ -> failwith @@ "Non-constant length to build_sels: " ^ pp_expr length - - (**************************************************************** - * Analysis State - ****************************************************************) - - type state = { - (* Base Loop Properties *) - iterations: expr; - (* Variable Classification *) - vars: abs Bindings.t; - (* Loop Defined *) - ld: abs Bindings.t; - - (* Type Info *) - types: ty Bindings.t; - env: Eval.Env.t; - } - - (* Create the state for a single loop analysis, from its definition *) - let init_state var start stop dir types env = - let abs = match dir with - | Direction_Up -> Index(start, expr_of_Z Z.one) - | Direction_Down -> Index(stop, expr_of_Z (Z.neg Z.one)) in - let iterations = match dir with - | Direction_Up -> add_int (sub_int stop start) (expr_of_Z Z.one) - | Direction_Down -> add_int (sub_int start stop) (expr_of_Z Z.one) in - { iterations ; vars = Bindings.empty ; ld = Bindings.add var abs Bindings.empty ; types ; env } - - let get_var v st = - match Bindings.find_opt v st.ld with - | Some v -> Some v - | None -> Bindings.find_opt v st.vars - - let decl_ld v i st = - {st with ld = Bindings.add v i st.ld} - - let assign_var v i st = - if Bindings.mem v st.ld then - {st with ld = Bindings.add v i st.ld} - else - {st with vars = Bindings.add v i st.vars} - - let width_of_expr e st = - match Dis_tc.infer_type e st.types st.env with - | Some (Type_Bits(Expr_LitInt i)) -> (int_of_string i) - | Some (Type_Constructor (Ident "boolean")) -> 1 - | Some (Type_Register(w, _)) -> (int_of_string w) - | _ -> failwith @@ "Unknown expression type: " ^ (pp_expr e) - - (**************************************************************** - * Phase 1: Produce a candidate loop summary - ****************************************************************) - - let vector_ops = [ - "not_bool"; - "and_bool"; - "or_bool"; - "add_bits"; - "sub_bits"; - "mul_bits"; - "sdiv_bits"; - "sle_bits"; - "slt_bits"; - "eq_bits"; - "asr_bits"; - "lsl_bits"; - "not_bits"; - "and_bits"; - "or_bits"; - "eor_bits"; - "append_bits"; - "ZeroExtend"; - "SignExtend"; - ] - - (* Transfer function for a primitive application *) - let tf_prim st f i tes es = - match f, i, tes, es with - (* Everything is constant, can skip *) - | f, i, tes, es when List.for_all is_constant tes && List.for_all is_constant es -> - Constant (Expr_TApply(FIdent(f,i), List.map force_constant tes, List.map force_constant es)) - - (* Supported operations over Index expressions *) - | "cvt_int_bits", 0, [Constant w], [Index(b,m);_] -> - let base = cvt_int_bits b w in - let mult = cvt_int_bits m w in - BVIndex (base, mult, w) - | "add_int", 0, [], [Index (base,mul);Constant offset] - | "add_int", 0, [], [Constant offset;Index (base,mul)] -> - Index (add_int base offset, mul) - | "sub_int", 0, [], [Index (base,mul);Constant offset] -> - Index (sub_int base offset, mul) - | "sub_int", 0, [], [Constant offset;Index (base,mul)] -> - Index (sub_int offset base, mul_int mul (Expr_LitInt "-1")) - | "mul_int", 0, [], [Index (base,mul);Constant offset] - | "mul_int", 0, [], [Constant offset;Index (base,mul)] -> - Index (mul_int base offset, mul_int mul offset) - | "sdiv_int", 0, [], [Index(base,mul);Constant div] -> - Index (div_int base div, div_int mul div) - - (* Supported operations over BVIndex TODO: These don't really handle overflow properly *) - | "cvt_bits_sint", 0, [Constant w], [BVIndex(b,m,_)] -> - let base = cvt_bits_sint b w in - let mult = cvt_bits_sint m w in - Index (base, mult) - | "cvt_bits_uint", 0, [Constant w], [BVIndex(b,m,_)] -> - let base = cvt_bits_uint b w in - let mult = cvt_bits_uint m w in - Index (base, mult) - | "ZeroExtend", 0, [Constant oldw; Constant neww], [BVIndex(b,m,_); _] -> - let base = zero_extend b neww in - let mult = zero_extend m neww in - BVIndex (base, mult, neww) - | "SignExtend", 0, [Constant oldw; Constant neww], [BVIndex(b,m,_); _] -> - let base = sign_extend b neww in - let mult = sign_extend m neww in - BVIndex (base, mult, neww) - | "add_bits", 0, [Constant w], [BVIndex(base,mul,_);Constant offset] -> - BVIndex(add_bits w base offset, mul, w) - | "sub_bits", 0, [Constant w], [BVIndex(base,mul,_);Constant offset] -> - BVIndex(sub_bits w base offset, mul, w) - - (* Reading Operations *) - | "Elem.read", 0, [Constant vecw ; Constant elemw], [Constant v; pos; _] -> - Read (v, pos, elemw, vecw) - - (* Writing Operations *) - | "Elem.set", 0, [Constant vecw ; Constant elemw], [Constant (Expr_Var v); pos; _; arg] -> - Write (v, pos, elemw, vecw, arg) - (* Match offset Elem.set operations TODO: This would be cleaner as a simp rule later on *) - | "Elem.set", 0, [Constant vecw ; Constant elemw], [ - Write(v,Index(Expr_LitInt "0",Expr_LitInt "2"),elemw',_,arg'); - Index(Expr_LitInt "1",Expr_LitInt "2"); _; arg] - when elemw = elemw' -> - let a = VecOp(FIdent("append_bits",0), [elemw;elemw], [arg;arg']) in - Write (v, Index(Expr_LitInt "0",Expr_LitInt "1"), add_int elemw elemw', vecw, a) - - (* Vector Operations *) - | f, 0, tes, es when List.mem f vector_ops && List.exists is_vec_op es && List.for_all is_constant tes -> - VecOp (FIdent (f,0), List.map force_constant tes, es) - - | _ -> failwith @@ "Unknown loop prim: " ^ f ^ " " ^ Utils.pp_list pp_abs tes ^ " " ^ Utils.pp_list pp_abs es - - (* Transfer function for an expression *) - let rec tf_expr st e = - match e with - | Expr_Var v -> - (match get_var v st with - | Some abs -> abs - | None -> Constant e) - | Expr_LitBits _ -> Constant e - | Expr_LitInt _ -> Constant e - | Expr_TApply(FIdent(f,i), tes, es) -> - let tes = List.map (tf_expr st) tes in - let es = List.map (tf_expr st) es in - tf_prim st f i tes es - | Expr_Slices(e', [Slice_LoWd(lo,wd)]) -> - let ow = Expr_LitInt (string_of_int (width_of_expr e' st)) in - (match tf_expr st e', tf_expr st lo, tf_expr st wd with - (* Entirely constant, pass it through *) - | Constant e', Constant lo, Constant wd -> - Constant (Expr_Slices(e', [Slice_LoWd(lo, wd)])) - (* Constant slice position over vectorized expression *) - | e', Constant lo, Constant wd when is_vec_op e' -> - VecOp(FIdent("slice",0), [ow; wd; lo], [e']) - (* Index based slice over constant, corresponding to a vector read. - TODO: There is a more general approach to this. - *) - | Constant e', Index(b,m), Constant (Expr_LitInt "1") -> - Read(e', Index(b,m), Expr_LitInt "1", ow) - | Constant e', Index(b,m), Constant w when m = w -> - Read(e', Index(b,Expr_LitInt "1"), w, ow) - | a, b, c -> failwith @@ "Failed loop slice: " ^ Utils.pp_list pp_abs [a;b;c]) - | _ -> failwith @@ "Failed loop expr: " ^ pp_expr e - - (* Join abs a & b given the condition c *) - let join_abs w c a b = - match c, a, b with - | _, a, b when a = b -> a - (* This is a trivial result, constant for all loop iterations *) - | Constant c, Constant a, Constant b -> - Constant (Expr_TApply(FIdent("ite_bits",0), [w], [c;a;b])) - (* Vector base ite *) - | _ when List.for_all (fun v -> is_vec_op v || is_constant v) [c;a;b] -> - VecOp (FIdent("ite",0), [w], [c;a;b]) - | _ -> failwith @@ "Failed join_abs: " ^ pp_abs c ^ " ? " ^ pp_abs a ^ " : " ^ pp_abs b - - (* Join states a & b given the condition cond *) - let join_st cond st1 st2 = - (* Merge loop defined constructs, assume they are defined - on both paths *) - let ld = Bindings.merge (fun k l r -> - match l, r with - | Some l, Some r when l = r -> Some l - | Some l, Some r -> - let w = expr_of_int (width_of_expr (Expr_Var k) st1) in - Some (join_abs w cond l r) - | _ -> None) st1.ld st2.ld in - (* Merge external constructs, support conditional effects *) - let vars = Bindings.merge (fun k l r -> - match l, r with - (* Same effect *) - | Some l, Some r when l = r -> Some l - (* Conditional write *) - | Some (Write(v,pos,w,we,e)), None -> - let w' = expr_of_int (width_of_expr (Expr_Var k) st1) in - Some (Write(v,pos,w,we,join_abs w' cond e (Read(Expr_Var v,pos,w,we)))) - | None, Some (Write(v,pos,w,we,e)) -> - let w' = expr_of_int (width_of_expr (Expr_Var k) st1) in - Some (Write(v,pos,w,we,join_abs w' cond (Read(Expr_Var v,pos,w,we)) e)) - | Some (Constant e), None -> - let w' = expr_of_int (width_of_expr (Expr_Var k) st1) in - Some (join_abs w' cond (Constant e) (Constant (Expr_Var k))) - (* Conditional write *) - | _ -> - failwith @@ "Failed join_st: " ^ pprint_ident k ^ ":" ^ - (Utils.pp_option pp_abs l) ^ " " ^ Utils.pp_option pp_abs r - ) st1.vars st2.vars in - { st1 with vars; ld } - - (* Transfer function for a list of statements *) - let rec tf_stmts st s = - List.fold_left (fun st stmt -> - match stmt with - (* Loop Internal Calculations *) - | Stmt_ConstDecl(ty, v, e, loc) -> - let abs = tf_expr st e in - decl_ld v abs st - | Stmt_VarDecl(ty, v, e, loc) -> - let abs = tf_expr st e in - decl_ld v abs st - | Stmt_VarDeclsNoInit(ty, [v], loc) -> - decl_ld v Undecl st - | Stmt_Assign(LExpr_Var v, e, loc) -> - let abs = tf_expr st e in - assign_var v abs st - | Stmt_If(c, t, [], f, loc) -> - let abs = tf_expr st c in - let tst = tf_stmts st t in - let fst = tf_stmts st f in - join_st abs tst fst - | Stmt_Assert(e, loc) -> - (* TODO: We should actually validate or keep this around *) - st - | _ -> failwith @@ "Unknown loop stmt: " ^ pp_stmt stmt) st s - - (**************************************************************** - * Phase 2: Fixed Point Identification - ****************************************************************) - - (* - Given summaries of each externally scoped variable write, - determine if they are trivially parallelized. - - As a first phase, we attempt to show all externally scoped variables - are only self-referential, i.e., there is no dependence relation - between externally scoped variables. - The only exception to this is trivial reductions to functions over - the loop index, such as x := x + 1. - - Once we know variables are at most self-referential, we determine the - necessary reduction to capture their cumulative effects. - This occurs in Phase 3. - *) - - (* If we pre-load definitions for external values, fix them up here. - Only handles the case where we define a value to be a function of - index (x := (base + index * mult) and we anticipate the final value - to be an additional increment of mult. - *) - let amend_pre_load init_st st = - let vars = Bindings.mapi (fun var def -> - match def, Bindings.find_opt var init_st.vars with - | x, None -> x - | BVIndex(Expr_TApply(FIdent("add_bits",0), [w], [base;mult]),mult',w'), Some (BVIndex(base',mult'',w'')) - when base = base' && mult = mult' && w = w' && mult = mult'' && w = w'' -> - BVIndex(base',mult'',w'') - | BVIndex(Expr_TApply(FIdent("sub_bits",0), [w], [base;mult]),mult',w'), Some (BVIndex(base',mult'',w'')) - when base = base' && neg_bits w mult = mult' && w = w' && mult' = mult'' && w = w'' -> - BVIndex(base',mult'',w'') - | x, Some y -> - failwith @@ "Failed to re-establish initial conditions: " ^ pp_abs x ^ " and " ^ pp_abs y - ) st.vars in - { st with vars } - - (* Determine if the summary is valid: - 1. All constants are actually constant - 2. Modified variables are at most self-referential - Can produce fixes for cases where a constant is not constant, but instead a function of loop index. - *) - let validate_summary effects = - (* Identify possible fixes before validation *) - let constant_fixes = Bindings.fold (fun var def acc -> - match def with - | Constant (Expr_TApply(FIdent("add_bits",0), [w], [Expr_Var var'; b])) - when var = var' && not (IdentSet.mem var (fv_expr b)) -> - Bindings.add var (BVIndex(Expr_Var var, b, w)) acc - | Constant (Expr_TApply(FIdent("sub_bits",0), [w], [Expr_Var var'; b])) - when var = var' && not (IdentSet.mem var (fv_expr b)) -> - Bindings.add var (BVIndex(Expr_Var var, neg_bits w b, w)) acc - | _ -> acc) effects Bindings.empty in - (* If no fixes, validate *) - if constant_fixes <> Bindings.empty then constant_fixes else - let _ = Bindings.iter (fun var def -> - (* No cross-references *) - let _ = Bindings.iter (fun var' def' -> - match var,def,var',def' with - (* Allow for references to BVIndex vars *) - | _,BVIndex _,_,_-> () - (* Ignore self *) - | v,_,v',_ when v = v' -> () - (* Check for reference to var in def' *) - | v,d,v',d' when IdentSet.mem v (deps d') -> - failwith @@ "Cross-reference: " ^ pprint_ident v ^ " := " ^ pp_abs d ^ " && " ^ pprint_ident v' ^ " := " ^ pp_abs d' - | _ -> () - ) effects in - (* Constants are truely constant *) - match def with - | Constant e when IdentSet.disjoint (deps def) (bindings_domain effects) -> () - | Constant e -> failwith @@ "Failed to generalise: " ^ pprint_ident var ^ " := " ^ pp_abs def - | _ -> () - ) effects in - Bindings.empty - - (* Run the analysis from an initial state. - Re-runs if we identify abstractions for external state. - *) - let rec fixed_point init_st body = - let cand_st = tf_stmts init_st body in - let cand_st = amend_pre_load init_st cand_st in - let fixes = validate_summary cand_st.vars in - if fixes = Bindings.empty then cand_st - else - let init_st' = { init_st with vars = fixes } in - fixed_point init_st' body - - (**************************************************************** - * Phase 3: Build expression from the abstract points - ****************************************************************) - - (* - Convert abstract points into expressions. - *) - - (* - Build vector primitive operations from the abstract state. - *) - let rec build_vec_prim st f i tes es = - let iters = st.iterations in - let mul_iters i = mul_int i iters in - let std_args l = List.map (build_vec_expr st) l in - let vec_args l = (List.map (build_vec_expr st) l) @ [iters] in - - match f, i, tes, es with - (* Bool Ops, all applied bit-wise *) - | "not_bool", 0, [], [x] -> - Expr_TApply(FIdent("not_bits", 0), [iters], std_args [x]) - | "and_bool", 0, [], [x;y] -> - Expr_TApply(FIdent("and_bits", 0), [iters], std_args [x;y]) - | "or_bool", 0, [], [x;y] -> - Expr_TApply(FIdent("or_bits", 0), [iters], std_args [x;y]) - - (* Bit-wise Ops *) - | "not_bits", 0, [w], [x] -> - Expr_TApply(FIdent("not_bits", 0), [mul_iters w], std_args [x]) - | "and_bits", 0, [w], [x;y] -> - Expr_TApply(FIdent("and_bits", 0), [mul_iters w], std_args [x;y]) - | "or_bits", 0, [w], [x;y] -> - Expr_TApply(FIdent("or_bits", 0), [mul_iters w], std_args [x;y]) - | "eor_bits", 0, [w], [x;y] -> - Expr_TApply(FIdent("eor_bits", 0), [mul_iters w], std_args [x;y]) - - (* Element-wise Ops *) - | "add_bits", 0, [w], [x;y] -> - Expr_TApply(FIdent("add_vec", 0), [iters; w], vec_args [x; y]) - | "sub_bits", 0, [w], [x;y] -> - Expr_TApply(FIdent("sub_vec", 0), [iters; w], vec_args [x; y]) - | "mul_bits", 0, [w], [x;y] -> - Expr_TApply(FIdent("mul_vec", 0), [iters; w], vec_args [x; y]) - | "sdiv_bits", 0, [w], [x;y] -> - Expr_TApply(FIdent("sdiv_vec", 0), [iters; w], vec_args [x; y]) - | "sle_bits", 0, [w], [x;y] -> - Expr_TApply(FIdent("sle_vec", 0), [iters; w], vec_args [x; y]) - | "slt_bits", 0, [w], [x;y] -> - Expr_TApply(FIdent("slt_vec", 0), [iters; w], vec_args [x; y]) - | "eq_bits", 0, [w], [x;y] -> - Expr_TApply(FIdent("eq_vec", 0), [iters; w], vec_args [x; y]) - - | "asr_bits", 0, [w;w'], [x;y] when w = w' -> - Expr_TApply(FIdent("asr_vec", 0), [iters; w], vec_args [x;y]) - | "asr_bits", 0, [Expr_LitInt w;Expr_LitInt w'], [x;y] when Z.gt (Z.of_string w) (Z.of_string w') -> - let w = Expr_LitInt w and w' = Expr_LitInt w' in - let y = Expr_TApply(FIdent("scast_vec", 0), [iters; w; w'], (vec_args [y]) @ [w]) in - Expr_TApply(FIdent("asr_vec", 0), [iters; w], [build_vec_expr st x;y;iters]) - - | "lsl_bits", 0, [w;w'], [x;y] when w = w' -> - Expr_TApply(FIdent("lsl_vec", 0), [iters; w], vec_args [x;y]) - | "lsl_bits", 0, [Expr_LitInt w;Expr_LitInt w'], [x;y] when Z.gt (Z.of_string w) (Z.of_string w') -> - let w = Expr_LitInt w and w' = Expr_LitInt w' in - let y = Expr_TApply(FIdent("scast_vec", 0), [iters; w; w'], (vec_args [y]) @ [w]) in - Expr_TApply(FIdent("lsl_vec", 0), [iters; w], [build_vec_expr st x;y;iters]) - - | "ite", 0, [w], [c;x;y] -> - Expr_TApply(FIdent("ite_vec", 0), [iters; w], vec_args [c;x;y]) - - (* Casts *) - | "ZeroExtend", 0, [ow;nw], [x;_] -> - Expr_TApply(FIdent("zcast_vec", 0), [iters; nw; ow], (vec_args [x]) @ [nw]) - | "SignExtend", 0, [ow;nw], [x;_] -> - Expr_TApply(FIdent("scast_vec", 0), [iters; nw; ow], (vec_args [x]) @ [nw]) - | "slice", 0, [ow;nw;lo], [x] -> - let shifted = - match lo with - | Expr_LitInt "0" -> build_vec_expr st x - | _ -> Expr_TApply(FIdent("lsr_vec",0), [iters; ow], vec_args [x; Constant (cvt_int_bits lo ow)]) in - Expr_TApply(FIdent("trunc_vec",0), [iters; nw; ow], [shifted; iters; nw]) - - (* Appends *) - (* Special case for a zero extend, convert into ZeroExtend *) - | "append_bits", 0, [wx;wy], [Constant (Expr_LitBits i);y] when (parse_bits i).v = Z.zero -> - let nw = add_int wx wy in - Expr_TApply(FIdent("zcast_vec", 0), [iters; nw; wy], (vec_args [y]) @ [nw]) - | "append_bits", 0, [wx;wy], [y;Constant (Expr_LitBits i)] when (parse_bits i).v = Z.zero -> - let nw = add_int wx wy in - let cast = Expr_TApply(FIdent("zcast_vec", 0), [iters; nw; wx], (vec_args [y]) @ [nw]) in - let shifts = replicate st.iterations nw (cvt_int_bits wy nw) in - Expr_TApply(FIdent("lsl_vec", 0), [iters; nw], [cast;shifts;iters]) - (* Append over two bitvectors turns into zip TODO: Extend to support gcd of their widths *) - | "append_bits", 0, [wx;wy], [x;y] when wx = wy -> - let input = Expr_TApply(FIdent("append_bits",0), [mul_iters wx; mul_iters wy], std_args [x;y]) in - let sels = build_sels st.iterations (fun i -> [ i ; add_int st.iterations i ]) in - let sels = List.fold_left (@) [] sels in - select_vec (add_int st.iterations st.iterations) wx input sels - - | _ -> failwith @@ "Unsupported conversion: " ^ f ^ " " ^ Utils.pp_list pp_expr tes ^ " " ^ Utils.pp_list pp_abs es - - (* - Turn an abstract point into an operation. - In effect, this corresponds to computing the abstract point simultaneously - for all loop iterations. - *) - and build_vec_expr st abs = - match abs with - (* Constant should not change, replicate it *) - | Constant expr -> - let w = expr_of_int (width_of_expr expr st) in - replicate st.iterations w expr - (* Vector Operation *) - | VecOp(FIdent(f,i), tes, es) -> - build_vec_prim st f i tes es - (* Read becomes a select operation, building based on its stride and width *) - | Read(expr,Index(base,mult),width,expr_width) -> - let sels = build_sels st.iterations (fun i -> add_int base (mul_int mult i)) in - let elems = div_int expr_width width in - select_vec elems width expr sels - (* Write is a select between a base variable and the overwritten component *) - | Write(var,Index(base,mult),width,var_width,e) -> - let elems = div_int var_width width in - let sels = build_sels elems (fun i -> - ite_int (eq_int (mod_int (sub_int i base) mult) zero_int) - (add_int (div_int (sub_int i base) mult) elems) i) in - let expr = append_bits (mul_int st.iterations width) var_width (build_vec_expr st e) (Expr_Var var) in - select_vec (add_int elems st.iterations) width expr sels - | _ -> failwith @@ "Failed to build vector expression for: " ^ pp_abs abs - - (* Identify cases where self-reference is limited to reads of a particular - position and width. *) - let rec parallel_write var pos width e = - match e with - | VecOp(f, tes, es) -> - let tes = not (IdentSet.mem var (unionSets (List.map fv_expr tes))) in - let es = List.map (parallel_write var pos width) es in - tes && List.for_all (fun s -> s) es - | Read(Expr_Var v',pos',width',_) when v' = var -> - pos = pos' && width = width' - | _ -> not (IdentSet.mem var (deps e)) - - (* For a variable and abstract point, produce an expression equivalent to the - parallel evaluation of the abstract point. *) - let summarize_assign st var abs = - match abs with - (* Result is not dependent on itself in anyway *) - | a when not (IdentSet.mem var (deps a)) -> - build_vec_expr st abs - (* Parallel Write, element is only dependent on itself *) - | Write(var',pos,width,exprw,e) when var = var' && parallel_write var pos width e -> - build_vec_expr st abs - (* Final result for a function of loop index *) - | BVIndex(Expr_Var base,mul,w) when base = var -> - let iters = cvt_int_bits st.iterations w in - let m = mul_bits w mul iters in - add_bits w (Expr_Var base) m - - (* Reduce Add *) - | VecOp(FIdent("add_bits", 0), [w], [Constant (Expr_Var var') ; e]) when is_vec_op e && var' = var && not (IdentSet.mem var (deps e)) -> - let e = build_vec_expr st e in - Expr_TApply ( FIdent("reduce_add",0), [st.iterations; w], [e ; Expr_Var var]) - - | _ -> failwith @@ "Failed to summarize " ^ pprint_ident var ^ " <- " ^ pp_abs abs - - (* Given a successful abstract representation of a loop, reduce its observable - effects into a series of assignments. - *) - let loop_summary st loc = - Bindings.fold (fun var abs acc -> - let c = summarize_assign st var abs in - let s = Stmt_Assign(LExpr_Var var, c, loc) in - s::acc (* TODO: Need temps for this *) - ) st.vars [] - - (**************************************************************** - * Analysis Entry Point - ****************************************************************) - - (* Map from inside out *) - let rec walk s types env = - List.fold_left (fun acc stmt -> - match stmt with - | Stmt_For(var, start, dir, stop, body, loc) -> - let body = walk body types env in - let st = init_state var start stop dir types env in - let st' = fixed_point st body in - let sum = loop_summary st' loc in - (acc@sum) - | Stmt_If(c, t, [], f, loc) -> - let t = walk t types env in - let f = walk f types env in - (acc@[Stmt_If(c, t, [], f, loc)]) - | _ -> (acc@[stmt])) ([]) s - - let parse_sels v = - let chars = String.length v in - let elems = chars / 32 in - let e = List.init elems (fun i -> let bv = parse_bits (String.sub v (i * 32) (32)) in Z.to_int bv.v) in - List.rev e - let print_sels sels = - List.fold_left (fun a s -> (print_bv { n = 32 ; v = Z.of_int s } ^ a)) "" sels - - let check_leq x y = - match x, y with - | Expr_LitInt x, Expr_LitInt y -> Z.leq (Z.of_string x) (Z.of_string y) - | _ -> false - - let check_lt x y = - match x, y with - | Expr_LitInt x, Expr_LitInt y -> Z.lt (Z.of_string x) (Z.of_string y) - | _ -> false - - let is_div x y = - match x, y with - | Expr_LitInt x, Expr_LitInt y -> (Z.rem (Z.of_string x) (Z.of_string y)) = Z.zero - | _ -> false - - let is_const_sels sels = - List.for_all (fun i -> match i with Expr_LitInt _ -> true | _ -> false) sels - let force_const_sels sels = - List.map (fun i -> match i with Expr_LitInt i -> int_of_string i | _ -> failwith "force_const") sels - - let apply_sels bv w sels = - let ins = (String.length bv) / w in - let vals = List.init ins (fun i -> String.sub bv (i * w) w) in - let vals = List.rev vals in - let res = List.map (fun i -> List.nth vals i) sels in - let res = List.rev res in - String.concat "" res - - let rec inc_by s is = - match is with - | (Expr_LitInt i)::(Expr_LitInt j)::is when Z.sub (Z.of_string j) (Z.of_string i) = s -> - inc_by s ((Expr_LitInt j)::is) - | [Expr_LitInt l] -> Some (Z.of_string l) - | _ -> None - - let is_slice sels w = - match sels with - | [i] -> Some (Slice_LoWd(mul_int i w,w)) - | (Expr_LitInt i)::is -> - let first = Z.of_string i in - (match inc_by (Z.one) sels with - | Some last -> - let diff = (Z.add (Z.sub last first) Z.one) in - let width = mul_int (expr_of_Z diff) w in - let lo = mul_int (expr_of_Z first) w in - Some (Slice_LoWd(lo, width)) - | _ -> None) - | _ -> None - - let is_const w = - match w with Expr_LitInt _ -> true | _ -> false - - let force_const w = - match w with Expr_LitInt i -> int_of_string i | _ -> failwith "" - - let rec push_select elems w x sels st = - match x with - | Expr_TApply (FIdent ("append_bits", 0), [wr;wl], [r;l]) - when List.for_all (fun i -> check_leq (mul_int w (add_int i (Expr_LitInt "1"))) wl) sels && - is_div wr w && is_div wl w -> - let elems = sub_int elems (div_int wr w) in - push_select elems w l sels st - | Expr_TApply (FIdent ("append_bits", 0), [wr;wl], [r;l]) - when List.for_all (fun i -> check_leq wl (mul_int w i)) sels && is_div wl w && is_div wr w -> - let shift = div_int wl w in - let sels = List.map (fun i -> sub_int i shift) sels in - let elems = sub_int elems (div_int wl w) in - push_select elems w r sels st - | Expr_TApply (FIdent ("append_bits", 0), [wr;wl], [r;l]) when wr = wl -> - let elems = div_int elems (expr_of_int 2) in - shuffle_vec elems w r l sels - - (* Comps *) - | Expr_TApply (FIdent (("sle_vec"|"eq_vec"|"slt_vec") as f, 0), ([_;w] as tes), [l;r;n]) when n = elems -> - let l = push_select elems w l sels st in - let r = push_select elems w r sels st in - Expr_TApply (FIdent (f, 0), tes, [l;r;n]) - (* Binops *) - | Expr_TApply (FIdent (("add_vec"|"sub_vec"|"mul_vec"|"asr_vec"|"lsr_vec"|"lsl_vec") as f, 0), tes, [l;r;n]) when n = elems -> - let l = push_select elems w l sels st in - let r = push_select elems w r sels st in - Expr_TApply (FIdent (f, 0), tes, [l;r;n]) - (* Casts *) - | Expr_TApply (FIdent (("trunc_vec"|"zcast_vec"|"scast_vec"), 0), [n;nw;ow], [x;n';nw']) when nw = ow -> - push_select elems ow x sels st - | Expr_TApply (FIdent (("trunc_vec"|"zcast_vec"|"scast_vec") as f, 0), [n;nw;ow], [x;n';nw']) when n = elems -> - let x = push_select elems ow x sels st in - Expr_TApply (FIdent (f, 0), [n;nw;ow], [x;n';nw']) - (* Ternary *) - | Expr_TApply (FIdent ("ite_vec", 0), tes, [c;l;r;n]) when n = elems -> - let c = push_select elems (expr_of_int 1) c sels st in - let r = push_select elems w r sels st in - let l = push_select elems w l sels st in - Expr_TApply (FIdent ("ite_vec", 0), tes, [c;l;r;n]) - - (* Replicate, given same element count no difference in result *) - | Expr_TApply (FIdent ("replicate_bits", 0), tes, [_;n]) when n = elems -> - x - - (* Slice from 0 to some width is redundant, just slice full expression directly *) - | Expr_Slices (x, [Slice_LoWd(lo, wd)]) when is_div lo w -> - let offset = div_int lo w in - let sels = List.map (add_int offset) sels in - let wd = width_of_expr x st in - let elems = div_int (expr_of_int wd) w in - push_select elems w x sels st - - (* Nested selects, easy case of matching element widths *) - | Expr_TApply (FIdent ("select_vec", 0), [ins'; outs'; w'], [x; Expr_LitBits sels']) when is_const_sels sels && w = w' -> - let sels = force_const_sels sels in - let sels' = parse_sels sels' in - let res = List.map (List.nth sels') sels in - let res = List.map expr_of_int res in - push_select ins' w x res st - - (* Acceptable result, consider possible slice reduction *) - | Expr_Var v -> - (match is_slice sels w with - | Some s -> Expr_Slices(Expr_Var v, [s]) - | _ -> select_vec elems w x sels) - (* Evaluate the select given a constant expression *) - | Expr_LitBits x when is_const_sels sels && is_const w -> - let sels = force_const_sels sels in - let w = force_const w in - Expr_LitBits (apply_sels x w sels) - - (* Failure case, wasn't able to reduce *) - | _ -> - (*Printf.printf "push_select: %s\n" (pp_expr x);*) - select_vec elems w x sels - - class cleanup st = object - inherit Asl_visitor.nopAslVisitor - method !vexpr e = - (match e with - | Expr_TApply (FIdent ("select_vec", 0), [ins; outs; w], [x;Expr_LitBits sels]) -> - let sels = parse_sels sels in - let sels = List.map (fun i -> expr_of_int i) sels in - ChangeDoChildrenPost(push_select ins w x sels st, fun e -> e) - | _ -> DoChildren) - end - - let run (s: stmt list) env : (bool * stmt list) = - let tys = Dis_tc.LocalVarTypes.run [] [] s in - let st = { types = tys ; env ; iterations = Expr_LitInt "0" ; ld = Bindings.empty ; vars = Bindings.empty } in - try - let res = walk s tys env in - let res = visit_stmts (new cleanup st) res in - (true,res) - with e -> - (*let m = Printexc.to_string e in - Printf.printf "\nVec Failure: %s\n" m;*) - (false,s) - -end diff --git a/tests/override.asl b/tests/override.asl index 72d15e0a..d6a0f73a 100644 --- a/tests/override.asl +++ b/tests/override.asl @@ -332,8 +332,7 @@ integer LowestSetBit(bits(N) x) bits(W) ite(boolean c, bits(W) x, bits(W) y) return if c then x else y; -// Vector Operations - +// Element Vector Operations bits(W * N) add_vec(bits(W * N) x, bits(W * N) y, integer N) bits(W * N) result; for i = 0 to (N - 1) @@ -400,24 +399,27 @@ bits(N) eq_vec(bits(W * N) x, bits(W * N) y, integer N) Elem[result, i, 1] = if (Elem[x, i, W] == Elem[y, i, W]) then '1' else '0'; return result; -bits(NW * N) zcast_vec(bits(W * N) x, integer N, integer NW) - bits(NW * N) result; +// Cast Vector Operations + +bits(Z * N) zcast_vec(bits(P * N) x, integer Z, integer N) + bits(Z * N) result; for i = 0 to (N - 1) - Elem[result, i, NW] = ZeroExtend(Elem[x, i, W], NW); + Elem[result, i, Z] = ZeroExtend(Elem[x, i, P], Z); return result; -bits(NW * N) scast_vec(bits(W * N) x, integer N, integer NW) - bits(NW * N) result; +bits(Z * N) scast_vec(bits(P * N) x, integer Z, integer N) + bits(Z * N) result; for i = 0 to (N - 1) - Elem[result, i, NW] = SignExtend(Elem[x, i, W], NW); + Elem[result, i, Z] = SignExtend(Elem[x, i, P], Z); return result; -bits(NW * N) trunc_vec(bits(W * N) x, integer N, integer NW) - bits(NW * N) result; +bits(Z * N) trunc_vec(bits(P * N) x, integer Z, integer N) + bits(Z * N) result; for i = 0 to (N - 1) - Elem[result, i, NW] = (Elem[x, i, W])[ 0 +: NW ]; + Elem[result, i, Z] = (Elem[x, i, P])[ 0 +: Z ]; return result; + bits(W * N) select_vec(bits(W * M) x, bits(32 * N) sel) bits(W * N) result; for i = 0 to (N - 1) @@ -425,18 +427,148 @@ bits(W * N) select_vec(bits(W * M) x, bits(32 * N) sel) Elem[result, i, W] = Elem[x,pos,W]; return result; -bits(W * N) shuffle_vec(bits(W * M) x, bits(W * M) y, bits(32 * N) sel) - bits(W * N) result; - bits(W * M * 2) input = x:y; +bits(W) reduce_add(bits(W * N) x, bits(W) init, integer N) + bits(W) result = init; for i = 0 to (N - 1) - integer pos = UInt(Elem[sel,i,32]); - Elem[result, i, W] = Elem[input,pos,W]; + result = result + Elem[x,i,W]; return result; -bits(W) reduce_add(bits(W * N) x, bits(W) init) +bits(W) reduce_eor(bits(W * N) x, bits(W) init, integer N) bits(W) result = init; for i = 0 to (N - 1) - result = result + Elem[x,i,W]; + result = result EOR Elem[x,i,W]; + return result; + +bits(W) reduce_smin(bits(W * N) x, bits(W) init) + bits(W) result = init; + for i = 0 to (N - 1) + result = if sle_bits(Elem[x, i, W],result) then Elem[x,i,W] else result; + return result; + +bits(W) reduce_smax(bits(W * N) x, bits(W) init) + bits(W) result = init; + for i = 0 to (N - 1) + result = if sle_bits(result,Elem[x, i, W]) then Elem[x,i,W] else result; + return result; + +bits(W) reduce_umin(bits(W * N) x, bits(W) init) + bits(W) result = init; + for i = 0 to (N - 1) + result = if sle_bits(ZeroExtend(Elem[x, i, W],W+1),ZeroExtend(result,W+1)) then Elem[x,i,W] else result; + return result; + +bits(W) reduce_umax(bits(W * N) x, bits(W) init) + bits(W) result = init; + for i = 0 to (N - 1) + result = if sle_bits(ZeroExtend(result,W+1),ZeroExtend(Elem[x, i, W],W+1)) then Elem[x,i,W] else result; + return result; + +bits(W * N) fp_add_vec(bits(W * N) op1, bits(W * N) op2, FPCRType fpcr, integer N) + bits(W * N) result; + for i = 0 to (N - 1) + Elem[result, i, W] = FPAdd(Elem[op1, i, W], Elem[op2, i, W], fpcr); + return result; + +bits(W * N) fp_sub_vec(bits(W * N) op1, bits(W * N) op2, FPCRType fpcr, integer N) + bits(W * N) result; + for i = 0 to (N - 1) + Elem[result, i, W] = FPSub(Elem[op1, i, W], Elem[op2, i, W], fpcr); + return result; + +bits(W * N) fp_mul_vec(bits(W * N) op1, bits(W * N) op2, FPCRType fpcr, integer N) + bits(W * N) result; + for i = 0 to (N - 1) + Elem[result, i, W] = FPMul(Elem[op1, i, W], Elem[op2, i, W], fpcr); + return result; + +bits(W * N) fp_div_vec(bits(W * N) op1, bits(W * N) op2, FPCRType fpcr, integer N) + bits(W * N) result; + for i = 0 to (N - 1) + Elem[result, i, W] = FPDiv(Elem[op1, i, W], Elem[op2, i, W], fpcr); + return result; + +bits(W * N) fp_mul_add_vec(bits(W * N) op1, bits(W * N) op2, bits(W * N) op3, FPCRType fpcr, integer N) + bits(W * N) result; + for i = 0 to (N - 1) + Elem[result, i, W] = FPMulAdd(Elem[op1, i, W], Elem[op2, i, W], Elem[op3, i, W], fpcr); + return result; + +bits(W * N) fp_sqrt_vec(bits(W * N) op1, FPCRType fpcr, integer N) + bits(W * N) result; + for i = 0 to (N - 1) + Elem[result, i, W] = FPSqrt(Elem[op1, i, W], fpcr); + return result; + +bits(32 * N) bf_mul_vec(bits(16 * N) op1, bits(16 * N) op2, integer N) + bits(32 * N) result; + for i = 0 to (N - 1) + Elem[result, i, 32] = BFMul(Elem[op1, i, 16], Elem[op2, i, 16]); + return result; + +bits(32 * N) bf_add_vec(bits(32 * N) op1, bits(32 * N) op2, integer N) + bits(32 * N) result; + for i = 0 to (N - 1) + Elem[result, i, 32] = BFAdd(Elem[op1, i, 32], Elem[op2, i, 32]); + return result; + +bits(W * N) fp_max_vec(bits(W * N) op1, bits(W * N) op2, FPCRType fpcr, integer N) + bits(W * N) result; + for i = 0 to (N - 1) + Elem[result, i, W] = FPMax(Elem[op1, i, W], Elem[op2, i, W], fpcr); + return result; + +bits(W * N) fp_min_vec(bits(W * N) op1, bits(W * N) op2, FPCRType fpcr, integer N) + bits(W * N) result; + for i = 0 to (N - 1) + Elem[result, i, W] = FPMin(Elem[op1, i, W], Elem[op2, i, W], fpcr); + return result; + +bits(W * N) fp_max_num_vec(bits(W * N) op1, bits(W * N) op2, FPCRType fpcr, integer N) + bits(W * N) result; + for i = 0 to (N - 1) + Elem[result, i, W] = FPMaxNum(Elem[op1, i, W], Elem[op2, i, W], fpcr); + return result; + +bits(W * N) fp_min_num_vec(bits(W * N) op1, bits(W * N) op2, FPCRType fpcr, integer N) + bits(W * N) result; + for i = 0 to (N - 1) + Elem[result, i, W] = FPMinNum(Elem[op1, i, W], Elem[op2, i, W], fpcr); + return result; + +bits(W * N) fp_mulx_vec(bits(W * N) op1, bits(W * N) op2, FPCRType fpcr, integer N) + bits(W * N) result; + for i = 0 to (N - 1) + Elem[result, i, W] = FPMulX(Elem[op1, i, W], Elem[op2, i, W], fpcr); + return result; + +bits(W * N) fp_mul_addh_vec(bits(W * N) op1, bits((W * N) DIV 2) op2, bits((W * N) DIV 2) op3, FPCRType fpcr, integer N) + bits(W * N) result; + for i = 0 to (N - 1) + Elem[result, i, W] = FPMulAddH(Elem[op1, i, W], Elem[op2, i, W DIV 2], Elem[op3, i, W DIV 2], fpcr); + return result; + +bits(N) fp_cmp_eq_vec(bits(W * N) op1, bits(W * N) op2, FPCRType fpcr, integer N) + bits(N) result; + for i = 0 to (N - 1) + Elem[result, i, 1] = if (FPCompareEQ(Elem[op1, i, W], Elem[op2, i, W], fpcr)) then '1' else '0'; + return result; + +bits(N) fp_cmp_ge_vec(bits(W * N) op1, bits(W * N) op2, FPCRType fpcr, integer N) + bits(N) result; + for i = 0 to (N - 1) + Elem[result, i, 1] = if (FPCompareGE(Elem[op1, i, W], Elem[op2, i, W], fpcr)) then '1' else '0'; + return result; + +bits(N) fp_cmp_gt_vec(bits(W * N) op1, bits(W * N) op2, FPCRType fpcr, integer N) + bits(N) result; + for i = 0 to (N - 1) + Elem[result, i, 1] = if (FPCompareGT(Elem[op1, i, W], Elem[op2, i, W], fpcr)) then '1' else '0'; + return result; + +bits(W * N) fpr_sqrt_est_vec(bits(W * N) op1, FPCRType fpcr, integer N) + bits(W * N) result; + for i = 0 to (N - 1) + Elem[result, i, W] = FPRSqrtEstimate(Elem[op1, i, W], fpcr); return result; // bits(8*size) _Mem[AddressDescriptor desc, integer size, AccessDescriptor accdesc]; From 81a15bf9d6feb3dc8261f8dbf91a0e11ca73d467 Mon Sep 17 00:00:00 2001 From: Nicholas Coughlin Date: Tue, 26 Nov 2024 14:26:08 +1000 Subject: [PATCH 6/8] Whitespace in BDDSimp, update tests --- libASL/transforms.ml | 110 ++++++++++++++++----------------- tests/aslt/test_cntlm_vec.t | 72 +++++++++++++-------- tests/coverage/aarch64_float | 36 +++++------ tests/coverage/aarch64_vector2 | 90 +++++++++++++-------------- 4 files changed, 165 insertions(+), 143 deletions(-) diff --git a/libASL/transforms.ml b/libASL/transforms.ml index 1e827f4a..5e32d2d8 100644 --- a/libASL/transforms.ml +++ b/libASL/transforms.ml @@ -1916,7 +1916,7 @@ module type ScopedBindings = sig val add_bind : 'elt t -> ident -> 'elt -> unit val find_binding : 'elt t -> ident -> 'elt option val current_scope_bindings : 'elt t -> 'elt Bindings.t - val init: unit -> 'elt t + val init: unit -> 'elt t end module ScopedBindings : ScopedBindings = struct @@ -2268,7 +2268,7 @@ end module BDDSimp = struct let log = false - type abs = + type abs = Top | Val of MLBDD.t list | Bot @@ -2282,9 +2282,9 @@ module BDDSimp = struct module type Lattice = RTAnalysisLattice with type olt = state - module NopAnalysis = struct + module NopAnalysis = struct type rt = unit - type olt = state + type olt = state let xfer_stmt o r s = r,[s] let join o c j r ro = () let init _ = () @@ -2295,7 +2295,7 @@ module BDDSimp = struct man = MLBDD.manager ctx; vars = Bindings.empty ; ctx ; - stmts = [] + stmts = [] } @@ -2348,7 +2348,7 @@ module BDDSimp = struct let to_bool abs st = match abs with - | Top + | Top | Bot -> MLBDD.dtrue st.man | Val [v] -> v | _ -> failwith "unexpected to_bool" @@ -2383,7 +2383,7 @@ module BDDSimp = struct let wrap_bop f a b = match a, b with - | Bot, _ + | Bot, _ | _, Bot -> Bot | Top, _ | _, Top -> Top @@ -2465,72 +2465,72 @@ module BDDSimp = struct match e with | Top -> Top | Bot -> Bot - | Val v -> + | Val v -> let start = List.length v - lo - wd in Val (sublist v start wd) - let half_add_bit l r = MLBDD.dand l r, MLBDD.xor l r (* carry, sum *) - let full_add_bit l r carry = + let half_add_bit l r = MLBDD.dand l r, MLBDD.xor l r (* carry, sum *) + let full_add_bit l r carry = let c1,s1 = half_add_bit l r in let c2,o = half_add_bit s1 carry in let ocarry = MLBDD.dor c1 c2 in ocarry,o - let twos_comp_add (xs : MLBDD.t list) (ys: MLBDD.t list) : MLBDD.t * (MLBDD.t list)= + let twos_comp_add (xs : MLBDD.t list) (ys: MLBDD.t list) : MLBDD.t * (MLBDD.t list)= let xs = List.rev xs in let ys = List.rev ys in - match xs,ys with - | hx::tlx,hy::tly -> + match xs,ys with + | hx::tlx,hy::tly -> let lscarry,lsb = half_add_bit hx hy in let bits,carry = List.fold_left2 - (fun (acc,carry) (l:MLBDD.t) (r:MLBDD.t) -> let carry,o = (full_add_bit l r carry) in o::acc , carry) + (fun (acc,carry) (l:MLBDD.t) (r:MLBDD.t) -> let carry,o = (full_add_bit l r carry) in o::acc , carry) ([lsb], lscarry) tlx tly in carry,bits | _,_ -> failwith "invalid bit strings" let signed_add_wrap x y = let _,bits = twos_comp_add x y in bits - + let addone m xs = let one = MLBDD.dtrue m in let xs = List.rev xs in - let c,rs = match xs with - | hx::tlx -> + let c,rs = match xs with + | hx::tlx -> let lscarry,lsb = half_add_bit hx one in let bits,carry = List.fold_left - (fun (acc,carry) (l:MLBDD.t) -> let carry,o = (half_add_bit l carry) in o::acc, carry) + (fun (acc,carry) (l:MLBDD.t) -> let carry,o = (half_add_bit l carry) in o::acc, carry) ([lsb], lscarry) tlx in carry,bits | _ -> failwith "no" in rs - + let signed_negation m (x:MLBDD.t list) = addone m (List.map MLBDD.dnot x) let signed_sub_wrap m x y = let _,bits = twos_comp_add x (signed_negation m y) in bits (* - let signed_lt m x y = + let signed_lt m x y = let signed_gt m x y = List.map MLBDD.dnot (signed_lt m x y) *) - let eq_bvs a b = + let eq_bvs a b = let bits = List.map2 MLBDD.eq a b in match bits with | x::xs -> List.fold_right MLBDD.dand xs x | _ -> failwith "bad bits width" - let sle_bits m x y = - MLBDD.dor + let sle_bits m x y = + MLBDD.dor (MLBDD.dand (List.hd x) (MLBDD.dnot (List.hd y))) (MLBDD.dnot (MLBDD.xor (List.hd x) (List.hd y)) ) (* https://cs.nyu.edu/pipermail/smt-lib/2007/000182.html *) let unknown_prims = ref Bindings.empty - let print_unknown_prims (c:unit) = if log then (Bindings.to_seq !unknown_prims |> List.of_seq |> List.sort (fun a b -> compare (snd a) (snd b)) + let print_unknown_prims (c:unit) = if log then (Bindings.to_seq !unknown_prims |> List.of_seq |> List.sort (fun a b -> compare (snd a) (snd b)) |> List.iter (fun (id,c) -> Printf.printf "%d \t : %s\n" c (pprint_ident id))) let eq_bit a b = MLBDD.dnot (MLBDD.xor a b) @@ -2542,23 +2542,23 @@ module BDDSimp = struct (MLBDD.dfalse m, MLBDD.dtrue m) (s) (t)) in (MLBDD.dand a b) - let bvult m x y : MLBDD.t = bvugt m y x + let bvult m x y : MLBDD.t = bvugt m y x let bvule m x y = MLBDD.dor (bvult m x y) (eq_bvs x y) let bvuge m x y = MLBDD.dor (bvugt m x y) (eq_bvs x y) - let bvslt m x y = MLBDD.dor + let bvslt m x y = MLBDD.dor (MLBDD.dand (List.hd x) (MLBDD.dnot (List.hd y))) (MLBDD.dand (eq_bit (List.hd x) (List.hd y)) (bvult m x y)) let bvsgt m x y = bvslt m y x - let bvsle m x y = MLBDD.dor + let bvsle m x y = MLBDD.dor (MLBDD.dand (List.hd x) (MLBDD.dnot (List.hd y))) (MLBDD.dand (eq_bit (List.hd x) (List.hd y)) (bvule m x y)) - let bvsge m x y = bvsle m y x + let bvsge m x y = bvsle m y x - let wrap_bv_bool f m x y = match x , y with + let wrap_bv_bool f m x y = match x , y with | Val x, Val y -> Val [(f m x y)] | _,_ -> Top @@ -2569,7 +2569,7 @@ module BDDSimp = struct let twos_comp_sub man (xs : MLBDD.t list) (ys: MLBDD.t list) = () - let replicate_bits newlen bits = match bits with + let replicate_bits newlen bits = match bits with | Val bits -> if Int.rem newlen (List.length bits) <> 0 then failwith "indivisible rep length" ; let repeats = newlen / (List.length bits) in Val (List.concat (List.init repeats (fun i -> bits))) | _ -> Top @@ -2579,7 +2579,7 @@ module BDDSimp = struct (****************************************************************) - let eval_prim f tes es st = + let eval_prim f tes es st = match f, tes, es with | "and_bool", [], [x; y] -> and_bool x y | "or_bool", [], [x; y] -> or_bool x y @@ -2601,20 +2601,20 @@ module BDDSimp = struct zero_extend_bits x (int_of_string nw) st | "SignExtend", [w;Expr_LitInt nw], [x; y] -> sign_extend_bits x (int_of_string nw) st - - | "add_bits", [Expr_LitInt w], [x; y] -> (match x,y with + + | "add_bits", [Expr_LitInt w], [x; y] -> (match x,y with | Val x, Val y -> let r = (signed_add_wrap x y) in assert (List.length r == (int_of_string w)); Val r | _,_ -> Top) - | "sub_bits", [w], [x; y] -> (match x,y with + | "sub_bits", [w], [x; y] -> (match x,y with | Val x, Val y -> Val (signed_add_wrap x (signed_negation st.man y)) - | _,_ -> Top) - - | "ule_bits", [w], [x; y] -> wrap_bv_bool bvule st.man x y - | "uge_bits", [w], [x; y] -> wrap_bv_bool bvuge st.man x y - | "sle_bits", [w], [x; y] -> wrap_bv_bool bvsle st.man x y - | "sge_bits", [w], [x; y] -> wrap_bv_bool bvsge st.man x y - | "slt_bits", [w], [x; y] -> wrap_bv_bool bvslt st.man x y - | "sgt_bits", [w], [x; y] -> wrap_bv_bool bvsgt st.man x y + | _,_ -> Top) + + | "ule_bits", [w], [x; y] -> wrap_bv_bool bvule st.man x y + | "uge_bits", [w], [x; y] -> wrap_bv_bool bvuge st.man x y + | "sle_bits", [w], [x; y] -> wrap_bv_bool bvsle st.man x y + | "sge_bits", [w], [x; y] -> wrap_bv_bool bvsge st.man x y + | "slt_bits", [w], [x; y] -> wrap_bv_bool bvslt st.man x y + | "sgt_bits", [w], [x; y] -> wrap_bv_bool bvsgt st.man x y (* @@ -2624,8 +2624,8 @@ module BDDSimp = struct | "mul_bits", _, [x; y] -> Top *) - | _, _, _ -> - unknown_prims := (Bindings.find_opt (Ident f) !unknown_prims) |> (function Some x -> x + 1 | None -> 0) + | _, _, _ -> + unknown_prims := (Bindings.find_opt (Ident f) !unknown_prims) |> (function Some x -> x + 1 | None -> 0) |> (fun x -> Bindings.add (Ident f) x !unknown_prims) ; Top @@ -2633,7 +2633,7 @@ module BDDSimp = struct match e with | Expr_Var (Ident "TRUE") -> Val ([ MLBDD.dtrue st.man ]) | Expr_Var (Ident "FALSE") -> Val ([ MLBDD.dfalse st.man ]) - | Expr_LitBits b -> + | Expr_LitBits b -> Val (String.fold_right (fun c acc -> match c with | '1' -> (MLBDD.dtrue st.man)::acc @@ -2666,7 +2666,7 @@ module BDDSimp = struct | Expr_LitString _ -> if log then Printf.printf "unexpected Expr_LitString %s" (pp_expr e); Top | Expr_If _ -> if log then Printf.printf "unexpected Expr_If %s" (pp_expr e); Top - | _ -> failwith @@ Printf.sprintf "BDDSimp eval_expr: unexpected expr: %s\n" (pp_expr e) + | _ -> failwith @@ Printf.sprintf "BDDSimp eval_expr: unexpected expr: %s\n" (pp_expr e) (****************************************************************) (** Stmt Walk *) @@ -2677,7 +2677,7 @@ module BDDSimp = struct let ctx_to_mask c = let imps = MLBDD.allprime c in - match imps with + match imps with | x::xs -> List.fold_right join_imps xs x | _ -> invalid_arg "ctx_to_mask" @@ -2689,7 +2689,7 @@ module BDDSimp = struct let bdd_to_expr cond st = - let bd_to_test b = + let bd_to_test b = let bv = Value.to_mask Unknown (Value.from_maskLit b) in sym_expr @@ sym_inmask Unknown (Exp (Expr_Var (Ident "enc"))) bv in @@ -2718,18 +2718,18 @@ module BDDSimp = struct ) | _ -> None - let rebuild_expr e cond st = match bdd_to_expr cond st with + let rebuild_expr e cond st = match bdd_to_expr cond st with | Some x -> x | None -> if log then Printf.printf "Unable to simplify expr" ; e - class nopvis = object(self) + class nopvis = object(self) method xf_stmt (x:stmt) (st:state) : stmt list = [x] end let nop_transform = new nopvis - module EvalWithXfer (Xf: Lattice) = struct + module EvalWithXfer (Xf: Lattice) = struct let rec eval_stmt (xs:Xf.rt) (s:stmt) (st:state) = (* (transfer : xs, s, st -> xs', s' ; eval : st -> s -> st' ; write s' : s' , st' -> st'' ) -> xs' s' st'' *) @@ -2761,7 +2761,7 @@ module BDDSimp = struct restrict_ctx abs st, xs (* State becomes bot - unreachable *) - | Stmt_Throw _ -> + | Stmt_Throw _ -> if log then Printf.printf "%s : %s\n" (pp_stmt s) (pp_state st); let st = writeall ns st in halt st,xs @@ -2770,7 +2770,7 @@ module BDDSimp = struct | Stmt_If(c, tstmts, [], fstmts, loc) -> let cond = eval_expr c st in - if is_true cond st then + if is_true cond st then eval_stmts xs tstmts st else if is_false cond st then eval_stmts xs fstmts st @@ -2789,7 +2789,7 @@ module BDDSimp = struct (* Can't do anything here *) | Stmt_Assign _ - | Stmt_TCall _ -> + | Stmt_TCall _ -> writeall ns st,xs | _ -> failwith "unknown stmt" @@ -2803,7 +2803,7 @@ module BDDSimp = struct let enc = Val (List.rev (List.init 32 (MLBDD.ithvar st.man))) in {st with vars = Bindings.add (Ident "enc") enc st.vars} - module Eval = EvalWithXfer(NopAnalysis) + module Eval = EvalWithXfer(NopAnalysis) let just_eval a b c = fst (Eval.eval_stmts (NopAnalysis.init ()) a b) diff --git a/tests/aslt/test_cntlm_vec.t b/tests/aslt/test_cntlm_vec.t index 8a5f19c6..8adb581a 100644 --- a/tests/aslt/test_cntlm_vec.t +++ b/tests/aslt/test_cntlm_vec.t @@ -10,7 +10,7 @@ constant bits ( 128 ) Exp8__5 = __array _Z [ 0 ] ; constant bits ( 128 ) Exp10__5 = __array _Z [ 1 ] ; bits ( 64 ) result__4 ; - result__4 = shuffle_vec.0 {{ 8,8,8 }} ( Exp10__5 [ 0 +: 64 ],Exp8__5 [ 0 +: 64 ],'0000000000000000000000000000111000000000000000000000000000001100000000000000000000000000000010100000000000000000000000000000100000000000000000000000000000000110000000000000000000000000000001000000000000000000000000000000001000000000000000000000000000000000' ) ; + result__4 = select_vec.0 {{ 16,8,8 }} ( append_bits.0 {{ 64,64 }} ( Exp10__5 [ 0 +: 64 ],Exp8__5 [ 0 +: 64 ] ),'0000000000000000000000000000111000000000000000000000000000001100000000000000000000000000000010100000000000000000000000000000100000000000000000000000000000000110000000000000000000000000000001000000000000000000000000000000001000000000000000000000000000000000' ) ; __array _Z [ 0 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; "0x0e040ea8" Decoding instruction A64 e040ea8 @@ -23,18 +23,22 @@ __array _Z [ 0 ] = ZeroExtend.0 {{ 64,128 }} ( and_bits.0 {{ 64 }} ( __array _Z [ 0 ] [ 0 +: 64 ],__array _Z [ 1 ] [ 0 +: 64 ] ),128 ) ; "0x0ea00800" Decoding instruction A64 ea00800 + constant bits ( 128 ) Exp8__5 = __array _Z [ 0 ] ; bits ( 64 ) result__4 ; - __array _Z [ 0 ] = ZeroExtend.0 {{ 64,128 }} ( Elem.set.0 {{ 64,32 }} ( Elem.set.0 {{ 64,32 }} ( result__4,1,32,Elem.read.0 {{ 64,32 }} ( __array _Z [ 0 ] [ 0 +: 64 ],0,32 ) ),0,32,Elem.read.0 {{ 64,32 }} ( __array _Z [ 0 ] [ 0 +: 64 ],1,32 ) ),128 ) ; + result__4 = select_vec.0 {{ 2,2,32 }} ( Exp8__5 [ 0 +: 64 ],'0000000000000000000000000000000000000000000000000000000000000001' ) ; + __array _Z [ 0 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; "0x0ea00801" Decoding instruction A64 ea00801 + constant bits ( 128 ) Exp8__5 = __array _Z [ 0 ] ; bits ( 64 ) result__4 ; - __array _Z [ 1 ] = ZeroExtend.0 {{ 64,128 }} ( Elem.set.0 {{ 64,32 }} ( Elem.set.0 {{ 64,32 }} ( result__4,1,32,Elem.read.0 {{ 64,32 }} ( __array _Z [ 0 ] [ 0 +: 64 ],0,32 ) ),0,32,Elem.read.0 {{ 64,32 }} ( __array _Z [ 0 ] [ 0 +: 64 ],1,32 ) ),128 ) ; + result__4 = select_vec.0 {{ 2,2,32 }} ( Exp8__5 [ 0 +: 64 ],'0000000000000000000000000000000000000000000000000000000000000001' ) ; + __array _Z [ 1 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; "0x0ea03020" Decoding instruction A64 ea03020 constant bits ( 128 ) Exp8__5 = __array _Z [ 1 ] ; constant bits ( 128 ) Exp11__6 = __array _Z [ 0 ] ; bits ( 128 ) result__4 ; - result__4 = sub_vec.0 {{ 2,64 }} ( trunc_vec.0 {{ 2,64,128 }} ( scast_vec.0 {{ 2,128,64 }} ( Exp8__5 [ 0 +: 128 ],2,128 ),2,64 ),trunc_vec.0 {{ 2,64,128 }} ( scast_vec.0 {{ 2,128,32 }} ( Exp11__6 [ 0 +: 64 ],2,128 ),2,64 ),2 ) ; + result__4 = sub_vec.0 {{ 2,64 }} ( trunc_vec.0 {{ 2,128,64 }} ( scast_vec.0 {{ 2,64,128 }} ( Exp8__5,128,2 ),64,2 ),trunc_vec.0 {{ 2,128,64 }} ( scast_vec.0 {{ 2,32,128 }} ( Exp11__6 [ 0 +: 64 ],128,2 ),64,2 ),2 ) ; __array _Z [ 0 ] = result__4 ; "0x0ea18508" Decoding instruction A64 ea18508 @@ -63,22 +67,26 @@ Decoding instruction A64 f20a402 constant bits ( 128 ) Exp9__6 = __array _Z [ 0 ] ; bits ( 128 ) result__4 ; - result__4 = scast_vec.0 {{ 2,64,32 }} ( Exp9__6 [ 0 +: 64 ],2,64 ) ; + result__4 = scast_vec.0 {{ 2,32,64 }} ( Exp9__6 [ 0 +: 64 ],64,2 ) ; __array _Z [ 2 ] = result__4 ; "0x0f20a423" Decoding instruction A64 f20a423 constant bits ( 128 ) Exp9__6 = __array _Z [ 1 ] ; bits ( 128 ) result__4 ; - result__4 = scast_vec.0 {{ 2,64,32 }} ( Exp9__6 [ 0 +: 64 ],2,64 ) ; + result__4 = scast_vec.0 {{ 2,32,64 }} ( Exp9__6 [ 0 +: 64 ],64,2 ) ; __array _Z [ 3 ] = result__4 ; "0x2e200800" Decoding instruction A64 2e200800 + constant bits ( 128 ) Exp8__5 = __array _Z [ 0 ] ; bits ( 64 ) result__4 ; - __array _Z [ 0 ] = ZeroExtend.0 {{ 64,128 }} ( Elem.set.0 {{ 64,8 }} ( Elem.set.0 {{ 64,8 }} ( Elem.set.0 {{ 64,8 }} ( Elem.set.0 {{ 64,8 }} ( Elem.set.0 {{ 64,8 }} ( Elem.set.0 {{ 64,8 }} ( Elem.set.0 {{ 64,8 }} ( Elem.set.0 {{ 64,8 }} ( result__4,3,8,Elem.read.0 {{ 64,8 }} ( __array _Z [ 0 ] [ 0 +: 64 ],0,8 ) ),2,8,Elem.read.0 {{ 64,8 }} ( __array _Z [ 0 ] [ 0 +: 64 ],1,8 ) ),1,8,Elem.read.0 {{ 64,8 }} ( __array _Z [ 0 ] [ 0 +: 64 ],2,8 ) ),0,8,Elem.read.0 {{ 64,8 }} ( __array _Z [ 0 ] [ 0 +: 64 ],3,8 ) ),7,8,Elem.read.0 {{ 64,8 }} ( __array _Z [ 0 ] [ 0 +: 64 ],4,8 ) ),6,8,Elem.read.0 {{ 64,8 }} ( __array _Z [ 0 ] [ 0 +: 64 ],5,8 ) ),5,8,Elem.read.0 {{ 64,8 }} ( __array _Z [ 0 ] [ 0 +: 64 ],6,8 ) ),4,8,Elem.read.0 {{ 64,8 }} ( __array _Z [ 0 ] [ 0 +: 64 ],7,8 ) ),128 ) ; + result__4 = select_vec.0 {{ 8,8,8 }} ( Exp8__5 [ 0 +: 64 ],'0000000000000000000000000000010000000000000000000000000000000101000000000000000000000000000001100000000000000000000000000000011100000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000001000000000000000000000000000000011' ) ; + __array _Z [ 0 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; "0x2e200820" Decoding instruction A64 2e200820 + constant bits ( 128 ) Exp8__5 = __array _Z [ 1 ] ; bits ( 64 ) result__4 ; - __array _Z [ 0 ] = ZeroExtend.0 {{ 64,128 }} ( Elem.set.0 {{ 64,8 }} ( Elem.set.0 {{ 64,8 }} ( Elem.set.0 {{ 64,8 }} ( Elem.set.0 {{ 64,8 }} ( Elem.set.0 {{ 64,8 }} ( Elem.set.0 {{ 64,8 }} ( Elem.set.0 {{ 64,8 }} ( Elem.set.0 {{ 64,8 }} ( result__4,3,8,Elem.read.0 {{ 64,8 }} ( __array _Z [ 1 ] [ 0 +: 64 ],0,8 ) ),2,8,Elem.read.0 {{ 64,8 }} ( __array _Z [ 1 ] [ 0 +: 64 ],1,8 ) ),1,8,Elem.read.0 {{ 64,8 }} ( __array _Z [ 1 ] [ 0 +: 64 ],2,8 ) ),0,8,Elem.read.0 {{ 64,8 }} ( __array _Z [ 1 ] [ 0 +: 64 ],3,8 ) ),7,8,Elem.read.0 {{ 64,8 }} ( __array _Z [ 1 ] [ 0 +: 64 ],4,8 ) ),6,8,Elem.read.0 {{ 64,8 }} ( __array _Z [ 1 ] [ 0 +: 64 ],5,8 ) ),5,8,Elem.read.0 {{ 64,8 }} ( __array _Z [ 1 ] [ 0 +: 64 ],6,8 ) ),4,8,Elem.read.0 {{ 64,8 }} ( __array _Z [ 1 ] [ 0 +: 64 ],7,8 ) ),128 ) ; + result__4 = select_vec.0 {{ 8,8,8 }} ( Exp8__5 [ 0 +: 64 ],'0000000000000000000000000000010000000000000000000000000000000101000000000000000000000000000001100000000000000000000000000000011100000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000001000000000000000000000000000000011' ) ; + __array _Z [ 0 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; "0x2e211c00" Decoding instruction A64 2e211c00 __array _Z [ 0 ] = ZeroExtend.0 {{ 64,128 }} ( eor_bits.0 {{ 64 }} ( __array _Z [ 1 ] [ 0 +: 64 ],eor_bits.0 {{ 64 }} ( '0000000000000000000000000000000000000000000000000000000000000000',__array _Z [ 0 ] [ 0 +: 64 ] ) ),128 ) ; @@ -93,28 +101,40 @@ __array _Z [ 0 ] = '00000000000000000000000000000000000000000000000000000000000000001111111101111111111111111111111111111111011111111111111111111111' ; "0x2f280400" Decoding instruction A64 2f280400 + constant bits ( 128 ) Exp7__5 = __array _Z [ 0 ] ; bits ( 64 ) result__4 ; - __array _Z [ 0 ] = ZeroExtend.0 {{ 64,128 }} ( Elem.set.0 {{ 64,32 }} ( Elem.set.0 {{ 64,32 }} ( result__4,0,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 0 ] [ 0 +: 64 ],0,32 ),'00000000000000000000000000011000' ) ),1,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 0 ] [ 0 +: 64 ],1,32 ),'00000000000000000000000000011000' ) ),128 ) ; + result__4 = add_vec.0 {{ 2,32 }} ( '0000000000000000000000000000000000000000000000000000000000000000',lsr_vec.0 {{ 2,32 }} ( Exp7__5 [ 0 +: 64 ],'0000000000000000000000000001100000000000000000000000000000011000',2 ),2 ) ; + __array _Z [ 0 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; "0x2f280424" Decoding instruction A64 2f280424 + constant bits ( 128 ) Exp7__5 = __array _Z [ 1 ] ; bits ( 64 ) result__4 ; - __array _Z [ 4 ] = ZeroExtend.0 {{ 64,128 }} ( Elem.set.0 {{ 64,32 }} ( Elem.set.0 {{ 64,32 }} ( result__4,0,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 1 ] [ 0 +: 64 ],0,32 ),'00000000000000000000000000011000' ) ),1,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 1 ] [ 0 +: 64 ],1,32 ),'00000000000000000000000000011000' ) ),128 ) ; + result__4 = add_vec.0 {{ 2,32 }} ( '0000000000000000000000000000000000000000000000000000000000000000',lsr_vec.0 {{ 2,32 }} ( Exp7__5 [ 0 +: 64 ],'0000000000000000000000000001100000000000000000000000000000011000',2 ),2 ) ; + __array _Z [ 4 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; "0x2f300423" Decoding instruction A64 2f300423 + constant bits ( 128 ) Exp7__5 = __array _Z [ 1 ] ; bits ( 64 ) result__4 ; - __array _Z [ 3 ] = ZeroExtend.0 {{ 64,128 }} ( Elem.set.0 {{ 64,32 }} ( Elem.set.0 {{ 64,32 }} ( result__4,0,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 1 ] [ 0 +: 64 ],0,32 ),'00000000000000000000000000010000' ) ),1,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 1 ] [ 0 +: 64 ],1,32 ),'00000000000000000000000000010000' ) ),128 ) ; + result__4 = add_vec.0 {{ 2,32 }} ( '0000000000000000000000000000000000000000000000000000000000000000',lsr_vec.0 {{ 2,32 }} ( Exp7__5 [ 0 +: 64 ],'0000000000000000000000000001000000000000000000000000000000010000',2 ),2 ) ; + __array _Z [ 3 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; "0x2f300446" Decoding instruction A64 2f300446 + constant bits ( 128 ) Exp7__5 = __array _Z [ 2 ] ; bits ( 64 ) result__4 ; - __array _Z [ 6 ] = ZeroExtend.0 {{ 64,128 }} ( Elem.set.0 {{ 64,32 }} ( Elem.set.0 {{ 64,32 }} ( result__4,0,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 2 ] [ 0 +: 64 ],0,32 ),'00000000000000000000000000010000' ) ),1,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 2 ] [ 0 +: 64 ],1,32 ),'00000000000000000000000000010000' ) ),128 ) ; + result__4 = add_vec.0 {{ 2,32 }} ( '0000000000000000000000000000000000000000000000000000000000000000',lsr_vec.0 {{ 2,32 }} ( Exp7__5 [ 0 +: 64 ],'0000000000000000000000000001000000000000000000000000000000010000',2 ),2 ) ; + __array _Z [ 6 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; "0x2f380422" Decoding instruction A64 2f380422 + constant bits ( 128 ) Exp7__5 = __array _Z [ 1 ] ; bits ( 64 ) result__4 ; - __array _Z [ 2 ] = ZeroExtend.0 {{ 64,128 }} ( Elem.set.0 {{ 64,32 }} ( Elem.set.0 {{ 64,32 }} ( result__4,0,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 1 ] [ 0 +: 64 ],0,32 ),'00000000000000000000000000001000' ) ),1,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 1 ] [ 0 +: 64 ],1,32 ),'00000000000000000000000000001000' ) ),128 ) ; + result__4 = add_vec.0 {{ 2,32 }} ( '0000000000000000000000000000000000000000000000000000000000000000',lsr_vec.0 {{ 2,32 }} ( Exp7__5 [ 0 +: 64 ],'0000000000000000000000000000100000000000000000000000000000001000',2 ),2 ) ; + __array _Z [ 2 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; "0x2f380445" Decoding instruction A64 2f380445 + constant bits ( 128 ) Exp7__5 = __array _Z [ 2 ] ; bits ( 64 ) result__4 ; - __array _Z [ 5 ] = ZeroExtend.0 {{ 64,128 }} ( Elem.set.0 {{ 64,32 }} ( Elem.set.0 {{ 64,32 }} ( result__4,0,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 2 ] [ 0 +: 64 ],0,32 ),'00000000000000000000000000001000' ) ),1,32,lsr_bits.0 {{ 32 }} ( Elem.read.0 {{ 64,32 }} ( __array _Z [ 2 ] [ 0 +: 64 ],1,32 ),'00000000000000000000000000001000' ) ),128 ) ; + result__4 = add_vec.0 {{ 2,32 }} ( '0000000000000000000000000000000000000000000000000000000000000000',lsr_vec.0 {{ 2,32 }} ( Exp7__5 [ 0 +: 64 ],'0000000000000000000000000000100000000000000000000000000000001000',2 ),2 ) ; + __array _Z [ 5 ] = ZeroExtend.0 {{ 64,128 }} ( result__4,128 ) ; "0x4cdf0860" Decoding instruction A64 4cdf0860 __array _Z [ 0 ] = Elem.set.0 {{ 128,32 }} ( __array _Z [ 0 ],0,32,Mem.read.0 {{ 4 }} ( __array _R [ 3 ],4,1 ) ) ; @@ -316,28 +336,28 @@ constant bits ( 128 ) Exp7__5 = __array _Z [ 0 ] ; constant bits ( 128 ) Exp9__5 = __array _Z [ 2 ] ; bits ( 128 ) result__4 ; - result__4 = add_vec.0 {{ 4,32 }} ( Exp7__5 [ 0 +: 128 ],Exp9__5 [ 0 +: 128 ],4 ) ; + result__4 = add_vec.0 {{ 4,32 }} ( Exp7__5,Exp9__5,4 ) ; __array _Z [ 0 ] = result__4 ; "0x4ee08484" Decoding instruction A64 4ee08484 constant bits ( 128 ) Exp7__5 = __array _Z [ 4 ] ; constant bits ( 128 ) Exp9__5 = __array _Z [ 0 ] ; bits ( 128 ) result__4 ; - result__4 = add_vec.0 {{ 2,64 }} ( Exp7__5 [ 0 +: 128 ],Exp9__5 [ 0 +: 128 ],2 ) ; + result__4 = add_vec.0 {{ 2,64 }} ( Exp7__5,Exp9__5,2 ) ; __array _Z [ 4 ] = result__4 ; "0x4ee08c00" Decoding instruction A64 4ee08c00 constant bits ( 128 ) Exp7__5 = __array _Z [ 0 ] ; constant bits ( 128 ) Exp9__5 = __array _Z [ 0 ] ; bits ( 128 ) result__4 ; - result__4 = ite_vec.0 {{ 2,64 }} ( select_vec.0 {{ 2,2,1 }} ( not_bits.0 {{ 2 }} ( eq_vec.0 {{ 2,64 }} ( and_bits.0 {{ 128 }} ( Exp7__5 [ 0 +: 128 ],Exp9__5 [ 0 +: 128 ] ),replicate_bits.0 {{ 64,2 }} ( '0000000000000000000000000000000000000000000000000000000000000000',2 ),2 ) ),'0000000000000000000000000000000100000000000000000000000000000000' ),replicate_bits.0 {{ 64,2 }} ( '1111111111111111111111111111111111111111111111111111111111111111',2 ),replicate_bits.0 {{ 64,2 }} ( '0000000000000000000000000000000000000000000000000000000000000000',2 ),2 ) ; + result__4 = ite_vec.0 {{ 2,64 }} ( not_bits.0 {{ 2 }} ( eq_vec.0 {{ 2,64 }} ( and_bits.0 {{ 128 }} ( Exp7__5,Exp9__5 ),'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000',2 ) ),'11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111','00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000',2 ) ; __array _Z [ 0 ] = result__4 ; "0x4ee28420" Decoding instruction A64 4ee28420 constant bits ( 128 ) Exp7__5 = __array _Z [ 1 ] ; constant bits ( 128 ) Exp9__5 = __array _Z [ 2 ] ; bits ( 128 ) result__4 ; - result__4 = add_vec.0 {{ 2,64 }} ( Exp7__5 [ 0 +: 128 ],Exp9__5 [ 0 +: 128 ],2 ) ; + result__4 = add_vec.0 {{ 2,64 }} ( Exp7__5,Exp9__5,2 ) ; __array _Z [ 0 ] = result__4 ; "0x4f000400" Decoding instruction A64 4f000400 @@ -361,19 +381,19 @@ Decoding instruction A64 4f20a400 constant bits ( 128 ) Exp9__6 = __array _Z [ 0 ] ; bits ( 128 ) result__4 ; - result__4 = scast_vec.0 {{ 2,64,32 }} ( Exp9__6 [ 64 +: 64 ],2,64 ) ; + result__4 = scast_vec.0 {{ 2,32,64 }} ( Exp9__6 [ 64 +: 64 ],64,2 ) ; __array _Z [ 0 ] = result__4 ; "0x4f20a401" Decoding instruction A64 4f20a401 constant bits ( 128 ) Exp9__6 = __array _Z [ 0 ] ; bits ( 128 ) result__4 ; - result__4 = scast_vec.0 {{ 2,64,32 }} ( Exp9__6 [ 64 +: 64 ],2,64 ) ; + result__4 = scast_vec.0 {{ 2,32,64 }} ( Exp9__6 [ 64 +: 64 ],64,2 ) ; __array _Z [ 1 ] = result__4 ; "0x4f20a421" Decoding instruction A64 4f20a421 constant bits ( 128 ) Exp9__6 = __array _Z [ 1 ] ; bits ( 128 ) result__4 ; - result__4 = scast_vec.0 {{ 2,64,32 }} ( Exp9__6 [ 64 +: 64 ],2,64 ) ; + result__4 = scast_vec.0 {{ 2,32,64 }} ( Exp9__6 [ 64 +: 64 ],64,2 ) ; __array _Z [ 1 ] = result__4 ; "0x5ef1b820" Decoding instruction A64 5ef1b820 @@ -446,13 +466,15 @@ __array _Z [ 0 ] = Elem.set.0 {{ 128,8 }} ( __array _Z [ 0 ],15,8,Elem.read.0 {{ 64,8 }} ( __array _Z [ 1 ] [ 0 +: 64 ],0,8 ) ) ; "0x6e200800" Decoding instruction A64 6e200800 + constant bits ( 128 ) Exp8__5 = __array _Z [ 0 ] ; bits ( 128 ) result__4 ; - __array _Z [ 0 ] = Elem.set.0 {{ 128,8 }} ( Elem.set.0 {{ 128,8 }} ( Elem.set.0 {{ 128,8 }} ( Elem.set.0 {{ 128,8 }} ( Elem.set.0 {{ 128,8 }} ( Elem.set.0 {{ 128,8 }} ( Elem.set.0 {{ 128,8 }} ( Elem.set.0 {{ 128,8 }} ( Elem.set.0 {{ 128,8 }} ( Elem.set.0 {{ 128,8 }} ( Elem.set.0 {{ 128,8 }} ( Elem.set.0 {{ 128,8 }} ( Elem.set.0 {{ 128,8 }} ( Elem.set.0 {{ 128,8 }} ( Elem.set.0 {{ 128,8 }} ( Elem.set.0 {{ 128,8 }} ( result__4,3,8,Elem.read.0 {{ 128,8 }} ( __array _Z [ 0 ],0,8 ) ),2,8,Elem.read.0 {{ 128,8 }} ( __array _Z [ 0 ],1,8 ) ),1,8,Elem.read.0 {{ 128,8 }} ( __array _Z [ 0 ],2,8 ) ),0,8,Elem.read.0 {{ 128,8 }} ( __array _Z [ 0 ],3,8 ) ),7,8,Elem.read.0 {{ 128,8 }} ( __array _Z [ 0 ],4,8 ) ),6,8,Elem.read.0 {{ 128,8 }} ( __array _Z [ 0 ],5,8 ) ),5,8,Elem.read.0 {{ 128,8 }} ( __array _Z [ 0 ],6,8 ) ),4,8,Elem.read.0 {{ 128,8 }} ( __array _Z [ 0 ],7,8 ) ),11,8,Elem.read.0 {{ 128,8 }} ( __array _Z [ 0 ],8,8 ) ),10,8,Elem.read.0 {{ 128,8 }} ( __array _Z [ 0 ],9,8 ) ),9,8,Elem.read.0 {{ 128,8 }} ( __array _Z [ 0 ],10,8 ) ),8,8,Elem.read.0 {{ 128,8 }} ( __array _Z [ 0 ],11,8 ) ),15,8,Elem.read.0 {{ 128,8 }} ( __array _Z [ 0 ],12,8 ) ),14,8,Elem.read.0 {{ 128,8 }} ( __array _Z [ 0 ],13,8 ) ),13,8,Elem.read.0 {{ 128,8 }} ( __array _Z [ 0 ],14,8 ) ),12,8,Elem.read.0 {{ 128,8 }} ( __array _Z [ 0 ],15,8 ) ) ; + result__4 = select_vec.0 {{ 16,16,8 }} ( Exp8__5,'00000000000000000000000000001100000000000000000000000000000011010000000000000000000000000000111000000000000000000000000000001111000000000000000000000000000010000000000000000000000000000000100100000000000000000000000000001010000000000000000000000000000010110000000000000000000000000000010000000000000000000000000000000101000000000000000000000000000001100000000000000000000000000000011100000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000001000000000000000000000000000000011' ) ; + __array _Z [ 0 ] = result__4 ; "0x6e205800" Decoding instruction A64 6e205800 constant bits ( 128 ) Exp4__5 = __array _Z [ 0 ] ; bits ( 128 ) result__4 ; - result__4 = select_vec.0 {{ 16,16,8 }} ( not_bits.0 {{ 128 }} ( Exp4__5 [ 0 +: 128 ] ),'00000000000000000000000000001111000000000000000000000000000011100000000000000000000000000000110100000000000000000000000000001100000000000000000000000000000010110000000000000000000000000000101000000000000000000000000000001001000000000000000000000000000010000000000000000000000000000000011100000000000000000000000000000110000000000000000000000000000001010000000000000000000000000000010000000000000000000000000000000011000000000000000000000000000000100000000000000000000000000000000100000000000000000000000000000000' ) ; + result__4 = not_bits.0 {{ 128 }} ( Exp4__5 ) ; __array _Z [ 0 ] = result__4 ; "0x6e211c00" Decoding instruction A64 6e211c00 @@ -462,14 +484,14 @@ constant bits ( 128 ) Exp7__5 = __array _Z [ 0 ] ; constant bits ( 128 ) Exp9__5 = __array _Z [ 6 ] ; bits ( 128 ) result__4 ; - result__4 = ite_vec.0 {{ 4,32 }} ( eq_vec.0 {{ 4,32 }} ( Exp7__5 [ 0 +: 128 ],Exp9__5 [ 0 +: 128 ],4 ),replicate_bits.0 {{ 32,4 }} ( '11111111111111111111111111111111',4 ),replicate_bits.0 {{ 32,4 }} ( '00000000000000000000000000000000',4 ),4 ) ; + result__4 = ite_vec.0 {{ 4,32 }} ( eq_vec.0 {{ 4,32 }} ( Exp7__5,Exp9__5,4 ),'11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111','00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000',4 ) ; __array _Z [ 0 ] = result__4 ; "0x6ee08421" Decoding instruction A64 6ee08421 constant bits ( 128 ) Exp7__5 = __array _Z [ 1 ] ; constant bits ( 128 ) Exp9__5 = __array _Z [ 0 ] ; bits ( 128 ) result__4 ; - result__4 = sub_vec.0 {{ 2,64 }} ( Exp7__5 [ 0 +: 128 ],Exp9__5 [ 0 +: 128 ],2 ) ; + result__4 = sub_vec.0 {{ 2,64 }} ( Exp7__5,Exp9__5,2 ) ; __array _Z [ 1 ] = result__4 ; "0x6f000400" Decoding instruction A64 6f000400 diff --git a/tests/coverage/aarch64_float b/tests/coverage/aarch64_float index f0a9292d..80e07702 100644 --- a/tests/coverage/aarch64_float +++ b/tests/coverage/aarch64_float @@ -2741,12 +2741,12 @@ ENCODING: aarch64_float_arithmetic_unary 0x1e2143e0: [ftype=0 ; opc=2 ; Rn=31 ; Rd=0] --> OK 0x1e2143e1: [ftype=0 ; opc=2 ; Rn=31 ; Rd=1] --> OK 0x1e2143ff: [ftype=0 ; opc=2 ; Rn=31 ; Rd=31] --> OK -0x1e21c000: [ftype=0 ; opc=3 ; Rn=0 ; Rd=0] --> OK +0x1e21c000: [ftype=0 ; opc=3 ; Rn=0 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 0x1e21c001: [ftype=0 ; opc=3 ; Rn=0 ; Rd=1] --> OK -0x1e21c01f: [ftype=0 ; opc=3 ; Rn=0 ; Rd=31] --> OK -0x1e21c020: [ftype=0 ; opc=3 ; Rn=1 ; Rd=0] --> OK +0x1e21c01f: [ftype=0 ; opc=3 ; Rn=0 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1e21c020: [ftype=0 ; opc=3 ; Rn=1 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 0x1e21c021: [ftype=0 ; opc=3 ; Rn=1 ; Rd=1] --> OK -0x1e21c03f: [ftype=0 ; opc=3 ; Rn=1 ; Rd=31] --> OK +0x1e21c03f: [ftype=0 ; opc=3 ; Rn=1 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 0x1e21c3e0: [ftype=0 ; opc=3 ; Rn=31 ; Rd=0] --> OK 0x1e21c3e1: [ftype=0 ; opc=3 ; Rn=31 ; Rd=1] --> OK 0x1e21c3ff: [ftype=0 ; opc=3 ; Rn=31 ; Rd=31] --> OK @@ -2777,15 +2777,15 @@ ENCODING: aarch64_float_arithmetic_unary 0x1e6143e0: [ftype=1 ; opc=2 ; Rn=31 ; Rd=0] --> OK 0x1e6143e1: [ftype=1 ; opc=2 ; Rn=31 ; Rd=1] --> OK 0x1e6143ff: [ftype=1 ; opc=2 ; Rn=31 ; Rd=31] --> OK -0x1e61c000: [ftype=1 ; opc=3 ; Rn=0 ; Rd=0] --> OK -0x1e61c001: [ftype=1 ; opc=3 ; Rn=0 ; Rd=1] --> OK -0x1e61c01f: [ftype=1 ; opc=3 ; Rn=0 ; Rd=31] --> OK -0x1e61c020: [ftype=1 ; opc=3 ; Rn=1 ; Rd=0] --> OK -0x1e61c021: [ftype=1 ; opc=3 ; Rn=1 ; Rd=1] --> OK -0x1e61c03f: [ftype=1 ; opc=3 ; Rn=1 ; Rd=31] --> OK -0x1e61c3e0: [ftype=1 ; opc=3 ; Rn=31 ; Rd=0] --> OK -0x1e61c3e1: [ftype=1 ; opc=3 ; Rn=31 ; Rd=1] --> OK -0x1e61c3ff: [ftype=1 ; opc=3 ; Rn=31 ; Rd=31] --> OK +0x1e61c000: [ftype=1 ; opc=3 ; Rn=0 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1e61c001: [ftype=1 ; opc=3 ; Rn=0 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1e61c01f: [ftype=1 ; opc=3 ; Rn=0 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1e61c020: [ftype=1 ; opc=3 ; Rn=1 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1e61c021: [ftype=1 ; opc=3 ; Rn=1 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1e61c03f: [ftype=1 ; opc=3 ; Rn=1 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1e61c3e0: [ftype=1 ; opc=3 ; Rn=31 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1e61c3e1: [ftype=1 ; opc=3 ; Rn=31 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1e61c3ff: [ftype=1 ; opc=3 ; Rn=31 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 0x1ea04000: [ftype=2 ; opc=0 ; Rn=0 ; Rd=0] --> (invalid) 0x1ea04001: [ftype=2 ; opc=0 ; Rn=0 ; Rd=1] --> (invalid) 0x1ea0401f: [ftype=2 ; opc=0 ; Rn=0 ; Rd=31] --> (invalid) @@ -2850,14 +2850,14 @@ ENCODING: aarch64_float_arithmetic_unary 0x1ee143e1: [ftype=3 ; opc=2 ; Rn=31 ; Rd=1] --> OK 0x1ee143ff: [ftype=3 ; opc=2 ; Rn=31 ; Rd=31] --> OK 0x1ee1c000: [ftype=3 ; opc=3 ; Rn=0 ; Rd=0] --> OK -0x1ee1c001: [ftype=3 ; opc=3 ; Rn=0 ; Rd=1] --> OK -0x1ee1c01f: [ftype=3 ; opc=3 ; Rn=0 ; Rd=31] --> OK -0x1ee1c020: [ftype=3 ; opc=3 ; Rn=1 ; Rd=0] --> OK +0x1ee1c001: [ftype=3 ; opc=3 ; Rn=0 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1ee1c01f: [ftype=3 ; opc=3 ; Rn=0 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1ee1c020: [ftype=3 ; opc=3 ; Rn=1 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 0x1ee1c021: [ftype=3 ; opc=3 ; Rn=1 ; Rd=1] --> OK 0x1ee1c03f: [ftype=3 ; opc=3 ; Rn=1 ; Rd=31] --> OK -0x1ee1c3e0: [ftype=3 ; opc=3 ; Rn=31 ; Rd=0] --> OK +0x1ee1c3e0: [ftype=3 ; opc=3 ; Rn=31 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 0x1ee1c3e1: [ftype=3 ; opc=3 ; Rn=31 ; Rd=1] --> OK -0x1ee1c3ff: [ftype=3 ; opc=3 ; Rn=31 ; Rd=31] --> OK +0x1ee1c3ff: [ftype=3 ; opc=3 ; Rn=31 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 ENCODING: aarch64_float_compare_cond 0x1e201400: [ftype=0 ; Rm=0 ; cond=1 ; Rn=0 ; op=0 ; nzcv=0] --> OK diff --git a/tests/coverage/aarch64_vector2 b/tests/coverage/aarch64_vector2 index 155f5958..c3c4733d 100644 --- a/tests/coverage/aarch64_vector2 +++ b/tests/coverage/aarch64_vector2 @@ -4931,15 +4931,15 @@ ENCODING: aarch64_vector_arithmetic_unary_special_recip_int 0x4ee1cbff: [Q=1 ; sz=1 ; Rn=31 ; Rd=31] --> UNDEFINED (file "./mra_tools/arch/arch_instrs.asl" line 88202 char 39 - line 88203 char 0) ENCODING: aarch64_vector_arithmetic_unary_special_sqrt -0x2ea1f800: [Q=0 ; sz=0 ; Rn=0 ; Rd=0] --> OK -0x2ea1f801: [Q=0 ; sz=0 ; Rn=0 ; Rd=1] --> OK -0x2ea1f81f: [Q=0 ; sz=0 ; Rn=0 ; Rd=31] --> OK -0x2ea1f820: [Q=0 ; sz=0 ; Rn=1 ; Rd=0] --> OK -0x2ea1f821: [Q=0 ; sz=0 ; Rn=1 ; Rd=1] --> OK -0x2ea1f83f: [Q=0 ; sz=0 ; Rn=1 ; Rd=31] --> OK -0x2ea1fbe0: [Q=0 ; sz=0 ; Rn=31 ; Rd=0] --> OK -0x2ea1fbe1: [Q=0 ; sz=0 ; Rn=31 ; Rd=1] --> OK -0x2ea1fbff: [Q=0 ; sz=0 ; Rn=31 ; Rd=31] --> OK +0x2ea1f800: [Q=0 ; sz=0 ; Rn=0 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x2ea1f801: [Q=0 ; sz=0 ; Rn=0 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x2ea1f81f: [Q=0 ; sz=0 ; Rn=0 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x2ea1f820: [Q=0 ; sz=0 ; Rn=1 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x2ea1f821: [Q=0 ; sz=0 ; Rn=1 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x2ea1f83f: [Q=0 ; sz=0 ; Rn=1 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x2ea1fbe0: [Q=0 ; sz=0 ; Rn=31 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x2ea1fbe1: [Q=0 ; sz=0 ; Rn=31 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x2ea1fbff: [Q=0 ; sz=0 ; Rn=31 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 0x2ee1f800: [Q=0 ; sz=1 ; Rn=0 ; Rd=0] --> UNDEFINED (file "./mra_tools/arch/arch_instrs.asl" line 82851 char 42 - line 82852 char 0) 0x2ee1f801: [Q=0 ; sz=1 ; Rn=0 ; Rd=1] --> UNDEFINED (file "./mra_tools/arch/arch_instrs.asl" line 82851 char 42 - line 82852 char 0) 0x2ee1f81f: [Q=0 ; sz=1 ; Rn=0 ; Rd=31] --> UNDEFINED (file "./mra_tools/arch/arch_instrs.asl" line 82851 char 42 - line 82852 char 0) @@ -4949,24 +4949,24 @@ ENCODING: aarch64_vector_arithmetic_unary_special_sqrt 0x2ee1fbe0: [Q=0 ; sz=1 ; Rn=31 ; Rd=0] --> UNDEFINED (file "./mra_tools/arch/arch_instrs.asl" line 82851 char 42 - line 82852 char 0) 0x2ee1fbe1: [Q=0 ; sz=1 ; Rn=31 ; Rd=1] --> UNDEFINED (file "./mra_tools/arch/arch_instrs.asl" line 82851 char 42 - line 82852 char 0) 0x2ee1fbff: [Q=0 ; sz=1 ; Rn=31 ; Rd=31] --> UNDEFINED (file "./mra_tools/arch/arch_instrs.asl" line 82851 char 42 - line 82852 char 0) -0x6ea1f800: [Q=1 ; sz=0 ; Rn=0 ; Rd=0] --> OK -0x6ea1f801: [Q=1 ; sz=0 ; Rn=0 ; Rd=1] --> OK -0x6ea1f81f: [Q=1 ; sz=0 ; Rn=0 ; Rd=31] --> OK -0x6ea1f820: [Q=1 ; sz=0 ; Rn=1 ; Rd=0] --> OK -0x6ea1f821: [Q=1 ; sz=0 ; Rn=1 ; Rd=1] --> OK -0x6ea1f83f: [Q=1 ; sz=0 ; Rn=1 ; Rd=31] --> OK -0x6ea1fbe0: [Q=1 ; sz=0 ; Rn=31 ; Rd=0] --> OK -0x6ea1fbe1: [Q=1 ; sz=0 ; Rn=31 ; Rd=1] --> OK -0x6ea1fbff: [Q=1 ; sz=0 ; Rn=31 ; Rd=31] --> OK -0x6ee1f800: [Q=1 ; sz=1 ; Rn=0 ; Rd=0] --> OK -0x6ee1f801: [Q=1 ; sz=1 ; Rn=0 ; Rd=1] --> OK -0x6ee1f81f: [Q=1 ; sz=1 ; Rn=0 ; Rd=31] --> OK -0x6ee1f820: [Q=1 ; sz=1 ; Rn=1 ; Rd=0] --> OK -0x6ee1f821: [Q=1 ; sz=1 ; Rn=1 ; Rd=1] --> OK -0x6ee1f83f: [Q=1 ; sz=1 ; Rn=1 ; Rd=31] --> OK -0x6ee1fbe0: [Q=1 ; sz=1 ; Rn=31 ; Rd=0] --> OK -0x6ee1fbe1: [Q=1 ; sz=1 ; Rn=31 ; Rd=1] --> OK -0x6ee1fbff: [Q=1 ; sz=1 ; Rn=31 ; Rd=31] --> OK +0x6ea1f800: [Q=1 ; sz=0 ; Rn=0 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ea1f801: [Q=1 ; sz=0 ; Rn=0 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ea1f81f: [Q=1 ; sz=0 ; Rn=0 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ea1f820: [Q=1 ; sz=0 ; Rn=1 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ea1f821: [Q=1 ; sz=0 ; Rn=1 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ea1f83f: [Q=1 ; sz=0 ; Rn=1 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ea1fbe0: [Q=1 ; sz=0 ; Rn=31 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ea1fbe1: [Q=1 ; sz=0 ; Rn=31 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ea1fbff: [Q=1 ; sz=0 ; Rn=31 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ee1f800: [Q=1 ; sz=1 ; Rn=0 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ee1f801: [Q=1 ; sz=1 ; Rn=0 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ee1f81f: [Q=1 ; sz=1 ; Rn=0 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ee1f820: [Q=1 ; sz=1 ; Rn=1 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ee1f821: [Q=1 ; sz=1 ; Rn=1 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ee1f83f: [Q=1 ; sz=1 ; Rn=1 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ee1fbe0: [Q=1 ; sz=1 ; Rn=31 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ee1fbe1: [Q=1 ; sz=1 ; Rn=31 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ee1fbff: [Q=1 ; sz=1 ; Rn=31 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 ENCODING: aarch64_vector_arithmetic_unary_special_sqrt_est_float_simd 0x2ea1d800: [Q=0 ; sz=0 ; Rn=0 ; Rd=0] --> OK @@ -5096,24 +5096,24 @@ ENCODING: aarch64_vector_arithmetic_unary_special_sqrt_est_int 0x6ee1cbff: [Q=1 ; sz=1 ; Rn=31 ; Rd=31] --> UNDEFINED (file "./mra_tools/arch/arch_instrs.asl" line 29716 char 39 - line 29717 char 0) ENCODING: aarch64_vector_arithmetic_unary_special_sqrt_fp16 -0x2ef9f800: [Q=0 ; Rn=0 ; Rd=0] --> OK -0x2ef9f801: [Q=0 ; Rn=0 ; Rd=1] --> OK -0x2ef9f81f: [Q=0 ; Rn=0 ; Rd=31] --> OK -0x2ef9f820: [Q=0 ; Rn=1 ; Rd=0] --> OK -0x2ef9f821: [Q=0 ; Rn=1 ; Rd=1] --> OK -0x2ef9f83f: [Q=0 ; Rn=1 ; Rd=31] --> OK -0x2ef9fbe0: [Q=0 ; Rn=31 ; Rd=0] --> OK -0x2ef9fbe1: [Q=0 ; Rn=31 ; Rd=1] --> OK -0x2ef9fbff: [Q=0 ; Rn=31 ; Rd=31] --> OK -0x6ef9f800: [Q=1 ; Rn=0 ; Rd=0] --> OK -0x6ef9f801: [Q=1 ; Rn=0 ; Rd=1] --> OK -0x6ef9f81f: [Q=1 ; Rn=0 ; Rd=31] --> OK -0x6ef9f820: [Q=1 ; Rn=1 ; Rd=0] --> OK -0x6ef9f821: [Q=1 ; Rn=1 ; Rd=1] --> OK -0x6ef9f83f: [Q=1 ; Rn=1 ; Rd=31] --> OK -0x6ef9fbe0: [Q=1 ; Rn=31 ; Rd=0] --> OK -0x6ef9fbe1: [Q=1 ; Rn=31 ; Rd=1] --> OK -0x6ef9fbff: [Q=1 ; Rn=31 ; Rd=31] --> OK +0x2ef9f800: [Q=0 ; Rn=0 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x2ef9f801: [Q=0 ; Rn=0 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x2ef9f81f: [Q=0 ; Rn=0 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x2ef9f820: [Q=0 ; Rn=1 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x2ef9f821: [Q=0 ; Rn=1 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x2ef9f83f: [Q=0 ; Rn=1 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x2ef9fbe0: [Q=0 ; Rn=31 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x2ef9fbe1: [Q=0 ; Rn=31 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x2ef9fbff: [Q=0 ; Rn=31 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ef9f800: [Q=1 ; Rn=0 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ef9f801: [Q=1 ; Rn=0 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ef9f81f: [Q=1 ; Rn=0 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ef9f820: [Q=1 ; Rn=1 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ef9f821: [Q=1 ; Rn=1 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ef9f83f: [Q=1 ; Rn=1 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ef9fbe0: [Q=1 ; Rn=31 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ef9fbe1: [Q=1 ; Rn=31 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x6ef9fbff: [Q=1 ; Rn=31 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 ENCODING: aarch64_vector_bfmmla 0x6e40ec00: [Rm=0 ; Rn=0 ; Rd=0] --> OK From b7e68b26193ff01c123a76ea7a47b02bf1c7b038 Mon Sep 17 00:00:00 2001 From: Nicholas Coughlin Date: Wed, 27 Nov 2024 00:08:11 +1000 Subject: [PATCH 7/8] Extend vectorizer * Add more fp prims * Support general append patterns * Support popcount * Fix unsigned min/max * Support bit set pattern --- libASL/loops.ml | 88 +++++++++++++++++++++++++++++++++++++++---------- 1 file changed, 70 insertions(+), 18 deletions(-) diff --git a/libASL/loops.ml b/libASL/loops.ml index 6f1ff10e..28e92cdc 100644 --- a/libASL/loops.ml +++ b/libASL/loops.ml @@ -33,7 +33,7 @@ let elem_ops = [ ("ite", "ite_vec"); ("BFMul", "bf_mul_vec"); ("BFAdd", "bf_add_vec"); -] +] (* FPRSqrtStepFused, FPRecipStepFused, UnsignedRSqrtEstimate *) (* Operations expecting an additional, final scalar argument. *) let sv_final_ops = [ @@ -53,11 +53,21 @@ let sv_final_ops = [ ("FPCompareGE", "fp_cmp_ge_vec"); ("FPCompareGT", "fp_cmp_gt_vec"); ("FPRSqrtEstimate", "fpr_sqrt_est_vec"); + ("FPRecipEstimate", "fp_recip_est_vec"); ("ZeroExtend", "zcast_vec"); ("SignExtend", "scast_vec"); ("trunc", "trunc_vec"); ] +let cast_ops = [ + ("FPConvert", "fp_convert_vec"); + ("FPConvertBF", "fp_convert_bf_vec"); + ("FPRoundInt", "fp_round_int_vec"); + ("FPRoundIntN", "fp_round_intn_vec"); + ("FPToFixed", "fp_to_fixed_vec"); + ("FixedToFP", "fixed_to_fp_vec"); +] + (* Trivial vector operations, with a iteration count as the final argument. *) let vec_ops = List.map snd elem_ops (* Subset of vector operations that perform a size cast. *) @@ -828,14 +838,9 @@ module Vectorize = struct Value e | Value e, Value lo, Value wd -> Value (Expr_Slices(e, [Slice_LoWd(lo, wd)])) - (* A truncate operation *) - | Map _, Value lo, Value nw when expr_is_int lo 0 -> - Map ("trunc", [ow; nw], [e; Value nw]) (* A shift and truncate operation *) - | Map _, Value lo, Value nw -> - let lo = cvt_int_bits lo ow in - let e' = Map("asr_bits", [ow], [e; Value lo]) in - Map ("trunc", [ow; nw], [e'; Value nw]) + | Map _, Value _, Value _-> + Map("slice", [ow], [e; lo; nw]) (* Slice that can be converted to Elem.read *) | Value e, Index[b,m], Value wd when is_factor b wd && is_factor m wd && is_factor ow wd -> @@ -891,6 +896,7 @@ module Vectorize = struct | f, 0, tes, es when List.mem_assoc f elem_ops -> Map(f, tes, es) (* Element-wise + Scalar Arg Operations *) | f, 0, tes, es when List.mem_assoc f sv_final_ops -> Map(f, tes, es) + | f, 0, tes, es when List.mem_assoc f cast_ops -> Map(f, tes, es) (* Vec Ops *) | f, 0, tes, es when List.mem f vec_ops -> Map(f, tes, es) | f, 0, tes, es when List.mem f sv_final_vec_ops -> Map(f, tes, es) @@ -1060,8 +1066,11 @@ module Vectorize = struct | Map(f,[w],es) when List.mem_assoc f bit_ops -> Expr_TApply(FIdent(List.assoc f bit_ops,0), [mul_int iters w], List.map (unroll st) es) (* Element-wise Vector Operations *) - | Map(f,[w],es) when List.mem_assoc f elem_ops -> - Expr_TApply(FIdent(List.assoc f elem_ops,0), [iters; w], (List.map (unroll st) es)@[iters]) + | Map(f,tes,es) when List.mem_assoc f elem_ops -> + Expr_TApply(FIdent(List.assoc f elem_ops,0), iters::tes, (List.map (unroll st) es)@[iters]) + | Map(f,tes,e::es) when List.mem_assoc f cast_ops && List.for_all is_val es -> + let es = List.map force_val es in + Expr_TApply(FIdent(List.assoc f cast_ops,0), iters::tes, (unroll st e)::es@[iters]) (* Element-wise + Scalar Arg Operations *) | Map(f, tes, es) as abs when List.mem_assoc f sv_final_ops -> let (es,l) = Utils.getlast es in @@ -1114,6 +1123,7 @@ module Vectorize = struct let iters = expr_of_int (List.length sel) in select_vec elems iters elemw e (mk_int_list sel) + (* Append patterns *) | Map("append_bits", [w1;w2], [e1;e2]) when w1 = w2 -> let e1 = unroll st e1 in let e2 = unroll st e2 in @@ -1123,6 +1133,30 @@ module Vectorize = struct let sel = mk_int_list sel in let i = mul_int st.iterations (expr_of_int 2) in select_vec i i w1 e sel + | Map("append_bits", [w1;w2], [e1;Value (Expr_LitBits s)]) when (parse_bits s).v = Z.zero -> + let e = unroll st e1 in + let w = add_int w1 w2 in + let s = unroll st (Value (cvt_int_bits w2 w)) in + let e' = Expr_TApply(FIdent("zcast_vec",0), [st.iterations; w1; w], [e; w; st.iterations]) in + Expr_TApply(FIdent("lsl_vec", 0), [st.iterations; w], [e'; s; st.iterations]) + | Map("append_bits", [w1;w2], [ + Map("not_bits", _, [Map("slice", _, [e;Value lo;_])]); + Map("slice",[ow],[e';Value lo';_])]) + when expr_is_int w1 1 && e = e' && lo = w2 && expr_is_int lo' 0 && ow = add_int w2 w1 -> + let w = int_of_expr ow in + let m = expr_of_bv { n = w ; v = Z.shift_left Z.one (w - 1) } in + let m = unroll st (Value m) in + let e = unroll st e in + Expr_TApply(FIdent("eor_bits", 0), [mul_int st.iterations ow], [e;m]) + | Map("append_bits", [w1;w2], [e1;e2]) -> + let e1 = unroll st e1 in + let e2 = unroll st e2 in + let w = add_int w1 w2 in + let s = unroll st (Value (cvt_int_bits w2 w)) in + let e1 = Expr_TApply(FIdent("zcast_vec",0), [st.iterations; w1; w], [e1; w; st.iterations]) in + let e2 = Expr_TApply(FIdent("zcast_vec",0), [st.iterations; w2; w], [e2; w; st.iterations]) in + let e1 = Expr_TApply(FIdent("lsl_vec", 0), [st.iterations; w], [e1; s; st.iterations]) in + Expr_TApply(FIdent("add_vec",0), [st.iterations; w], [e1; e2; st.iterations]) (* Array Loads *) | Map("array", [], [Value v; Index[b,m]]) -> @@ -1131,6 +1165,11 @@ module Vectorize = struct let z = List.map (fun i -> (w,Expr_Array(v, i))) is in concat_bits z + (* Slice ops *) + | Map("slice", [ow], [e; Value lo; Value nw]) -> + let e = if expr_is_int lo 0 then e else Map("asr_bits", [ow], [e; Value (cvt_int_bits lo ow)]) in + unroll st (Map ("trunc", [ow; nw], [e; Value nw])) + (* Index unrolling *) | Index l -> let is = elist iters (fun i -> List.map (fun (b,m) -> add_int b (mul_int i m)) l) in @@ -1161,6 +1200,12 @@ module Vectorize = struct tes && es | _ -> no_fv var abs + let is_bit_set w var e = + match e with + | Expr_TApply(FIdent("append_bits",0), _, [Expr_Slices(var', [Slice_LoWd(lo,wd)]);Expr_TApply(FIdent("append_bits",0), _, [Expr_LitBits "1"; Expr_Slices(var'', [Slice_LoWd(lo',wd')])])]) -> + expr_is_int lo' 0 && add_int wd' (expr_of_int 1) = lo && add_int lo wd = w && var = var' && var = var'' + | _ -> false + (* Ensure a vector write does not create a write-write dependency. Takes the position argument of an update_vec and ensures all locations are distinct. @@ -1197,19 +1242,26 @@ module Vectorize = struct update_vec elems iters elemw (Expr_Var var) sel arg (* Reduce Add/EOR *) - | Map(("add_bits" | "eor_bits") as f, [w], [Value (Expr_Var var') ; e]) + | Map(("add_bits" | "eor_bits" | "BFAdd") as f, tes, [Value (Expr_Var var') ; e]) when var' = var && not (IdentSet.mem var (deps e)) -> let e = unroll st e in - let op = if f = "add_bits" then "reduce_add" else "reduce_eor" in - Expr_TApply (FIdent(op,0), [st.iterations; w], [e ; Expr_Var var; st.iterations]) + let op = if f = "add_bits" then "reduce_add" else if f = "eor_bits" then "reduce_eor" else "reduce_bf_add" in + Expr_TApply (FIdent(op,0), st.iterations::tes, [e ; Expr_Var var; st.iterations]) | Map("ite", [w], [c; Map("eor_bits" as f, _, [Value (Expr_Var var') ; e]); Value (Expr_Var var'')]) - when var' = var && var'' = var && not (IdentSet.mem var (deps e)) -> + when var' = var && var'' = var && not (IdentSet.mem var (deps e)) && not (IdentSet.mem var (deps c)) -> let z = zeroes (mul_int st.iterations w) in let e = unroll st e in let c = unroll st c in let f = if f = "add_bits" then "reduce_add" else "reduce_eor" in let i = Expr_TApply (FIdent("ite_vec", 0), [st.iterations; w], [c ; e ; z ; st.iterations]) in Expr_TApply (FIdent(f,0), [st.iterations; w], [i;Expr_Var var;st.iterations]) + | Map("ite", [w], [c; Value(Expr_TApply(FIdent("add_bits",0), _, [Expr_Var var'; e])); Value(Expr_Var var'')]) + when var = var' && var = var'' && not (IdentSet.mem var (fv_expr e)) && no_fv var c -> + let z = zeroes (mul_int st.iterations w) in + let e = unroll st (Value e) in + let c = unroll st c in + let i = Expr_TApply (FIdent("ite_vec", 0), [st.iterations; w], [c ; e ; z ; st.iterations]) in + Expr_TApply (FIdent("reduce_add", 0), [st.iterations; w], [i; Expr_Var var; st.iterations]) (* Signed Min : var <= e ? var : e *) | Map("ite", [w], [Map("sle_bits", _, [Value (Expr_Var var'); e]); Value (Expr_Var var''); e']) @@ -1225,20 +1277,20 @@ module Vectorize = struct | Map("ite", [w], [Map("sle_bits", _, [Value (Expr_TApply (FIdent("ZeroExtend", 0), _, [Expr_Var var';_])); Map("ZeroExtend", _, [e;_])]); Value (Expr_Var var''); e']) when var' = var'' && var = var' && e = e' && no_fv var e -> let e = unroll st e in - Expr_TApply (FIdent("reduce_smin",0), [st.iterations; w], [e; Expr_Var var]) + Expr_TApply (FIdent("reduce_umin",0), [st.iterations; w], [e; Expr_Var var]) (* Unsigned Max : zcast e <= zcast var ? var : e *) | Map("ite", [w], [Map("sle_bits", _, [Map("ZeroExtend", _, [e;_]); Value (Expr_TApply (FIdent("ZeroExtend", 0), _, [Expr_Var var';_]))]); Value (Expr_Var var''); e']) when var' = var'' && var = var' && e = e' && no_fv var e -> let e = unroll st e in - Expr_TApply (FIdent("reduce_smax",0), [st.iterations; w], [e; Expr_Var var]) + Expr_TApply (FIdent("reduce_umax",0), [st.iterations; w], [e; Expr_Var var]) (* Conditional Bit Set *) - (*| Map("ite", tes, [c;Value t;Value f]) when var = Ident "FPSR" -> + | Map("ite", [w], [c;Value t; Value (Expr_Var var')]) when no_fv var c && var' = var && is_bit_set w (Expr_Var var) t -> let ew = width_of_expr st t in let c = unroll st c in let w = width_of_expr st c in let test = Expr_TApply(FIdent("eq_bits", 0), [w], [c; zeroes w]) in - Expr_TApply(FIdent("ite", 0), [ew], [test; f; t]) *) + Expr_TApply(FIdent("ite", 0), [ew], [test; Expr_Var var; t]) | _ -> error @@ "Failed to summarize " ^ pprint_ident var ^ " <- " ^ pp_abs abs From ee242981a8336c3edcbaeabfc08f385deca8e8b8 Mon Sep 17 00:00:00 2001 From: Nicholas Coughlin Date: Wed, 27 Nov 2024 07:36:24 +1000 Subject: [PATCH 8/8] Guess sqrt impl Original evaluator did not implement real sqrt. Not entirely clear how this should be done, but an implementation is needed for coverage to work. --- libASL/primops.ml | 4 +++- libASL/value.ml | 2 +- tests/aslt/test_cntlm_vec.t | 32 ++++++++++++++++++++------------ tests/coverage/aarch64_float | 36 ++++++++++++++++++------------------ 4 files changed, 42 insertions(+), 32 deletions(-) diff --git a/libASL/primops.ml b/libASL/primops.ml index 97b453bb..37f42b7c 100644 --- a/libASL/primops.ml +++ b/libASL/primops.ml @@ -104,7 +104,9 @@ let prim_round_up_real (x: real): bigint = Z.add Z.one (Q.to_bigint x) end -let prim_sqrt_real (x: real): real = failwith "prim_sqrt_real" +(* TODO: Not sure exactly what rounding/precision is expected here *) +let prim_sqrt_real (x: real): real = + Q.make (Z.sqrt (Q.num x)) (Z.sqrt (Q.den x)) (****************************************************************) diff --git a/libASL/value.ml b/libASL/value.ml index 4b106365..8fd89fa1 100644 --- a/libASL/value.ml +++ b/libASL/value.ml @@ -307,7 +307,7 @@ let eval_prim (f: string) (tvs: value list) (vs: value list): value option = | ("round_tozero_real", [ ], [VReal x ]) -> Some (VInt (prim_round_tozero_real x)) | ("round_down_real", [ ], [VReal x ]) -> Some (VInt (prim_round_down_real x)) | ("round_up_real", [ ], [VReal x ]) -> Some (VInt (prim_round_up_real x)) - | ("sqrt_real", [ ], [VReal x; VReal y ]) -> Some (VReal (prim_sqrt_real x)) + | ("sqrt_real", [ ], [VReal x ]) -> Some (VReal (prim_sqrt_real x)) | ("cvt_int_bits", [_ ], [VInt x; VInt n ]) -> Some (VBits (prim_cvt_int_bits n x)) | ("cvt_bits_sint", [VInt n], [VBits x ]) -> Some (VInt (prim_cvt_bits_sint x)) | ("cvt_bits_uint", [VInt n], [VBits x ]) -> Some (VInt (prim_cvt_bits_uint x)) diff --git a/tests/aslt/test_cntlm_vec.t b/tests/aslt/test_cntlm_vec.t index 8adb581a..e89b9012 100644 --- a/tests/aslt/test_cntlm_vec.t +++ b/tests/aslt/test_cntlm_vec.t @@ -298,36 +298,44 @@ __array _Z [ 1 ] = and_bits.0 {{ 128 }} ( __array _Z [ 5 ],__array _Z [ 1 ] ) ; "0x4e61d800" Decoding instruction A64 4e61d800 + constant bits ( 128 ) Exp6__5 = __array _Z [ 0 ] ; bits ( 128 ) result__4 ; + constant bits ( 32 ) Exp7__4 = FPCR ; bits ( 4 ) FPDecodeRounding9__6 ; FPDecodeRounding9__6 = ZeroExtend.0 {{ 2,4 }} ( FPCR [ 22 +: 2 ],4 ) ; - constant bits ( 64 ) Exp12__5 = FixedToFP.0 {{ 64,64 }} ( Elem.read.0 {{ 128,64 }} ( __array _Z [ 0 ],0,64 ),0,FALSE,FPCR,cvt_bits_uint.0 {{ 4 }} ( FPDecodeRounding9__6 ) ) ; - constant bits ( 64 ) Exp13__5 = FixedToFP.0 {{ 64,64 }} ( Elem.read.0 {{ 128,64 }} ( __array _Z [ 0 ],1,64 ),0,FALSE,FPCR,cvt_bits_uint.0 {{ 4 }} ( FPDecodeRounding9__6 ) ) ; - __array _Z [ 0 ] = Elem.set.0 {{ 128,64 }} ( Elem.set.0 {{ 128,64 }} ( result__4,0,64,Exp12__5 ),1,64,Exp13__5 ) ; + constant bits ( 4 ) Exp10__6 = FPDecodeRounding9__6 ; + result__4 = fixed_to_fp_vec.0 {{ 2,64,64 }} ( Exp6__5,0,FALSE,Exp7__4,cvt_bits_uint.0 {{ 4 }} ( Exp10__6 ),2 ) ; + __array _Z [ 0 ] = result__4 ; "0x4e61d821" Decoding instruction A64 4e61d821 + constant bits ( 128 ) Exp6__5 = __array _Z [ 1 ] ; bits ( 128 ) result__4 ; + constant bits ( 32 ) Exp7__4 = FPCR ; bits ( 4 ) FPDecodeRounding9__6 ; FPDecodeRounding9__6 = ZeroExtend.0 {{ 2,4 }} ( FPCR [ 22 +: 2 ],4 ) ; - constant bits ( 64 ) Exp12__5 = FixedToFP.0 {{ 64,64 }} ( Elem.read.0 {{ 128,64 }} ( __array _Z [ 1 ],0,64 ),0,FALSE,FPCR,cvt_bits_uint.0 {{ 4 }} ( FPDecodeRounding9__6 ) ) ; - constant bits ( 64 ) Exp13__5 = FixedToFP.0 {{ 64,64 }} ( Elem.read.0 {{ 128,64 }} ( __array _Z [ 1 ],1,64 ),0,FALSE,FPCR,cvt_bits_uint.0 {{ 4 }} ( FPDecodeRounding9__6 ) ) ; - __array _Z [ 1 ] = Elem.set.0 {{ 128,64 }} ( Elem.set.0 {{ 128,64 }} ( result__4,0,64,Exp12__5 ),1,64,Exp13__5 ) ; + constant bits ( 4 ) Exp10__6 = FPDecodeRounding9__6 ; + result__4 = fixed_to_fp_vec.0 {{ 2,64,64 }} ( Exp6__5,0,FALSE,Exp7__4,cvt_bits_uint.0 {{ 4 }} ( Exp10__6 ),2 ) ; + __array _Z [ 1 ] = result__4 ; "0x4e61d842" Decoding instruction A64 4e61d842 + constant bits ( 128 ) Exp6__5 = __array _Z [ 2 ] ; bits ( 128 ) result__4 ; + constant bits ( 32 ) Exp7__4 = FPCR ; bits ( 4 ) FPDecodeRounding9__6 ; FPDecodeRounding9__6 = ZeroExtend.0 {{ 2,4 }} ( FPCR [ 22 +: 2 ],4 ) ; - constant bits ( 64 ) Exp12__5 = FixedToFP.0 {{ 64,64 }} ( Elem.read.0 {{ 128,64 }} ( __array _Z [ 2 ],0,64 ),0,FALSE,FPCR,cvt_bits_uint.0 {{ 4 }} ( FPDecodeRounding9__6 ) ) ; - constant bits ( 64 ) Exp13__5 = FixedToFP.0 {{ 64,64 }} ( Elem.read.0 {{ 128,64 }} ( __array _Z [ 2 ],1,64 ),0,FALSE,FPCR,cvt_bits_uint.0 {{ 4 }} ( FPDecodeRounding9__6 ) ) ; - __array _Z [ 2 ] = Elem.set.0 {{ 128,64 }} ( Elem.set.0 {{ 128,64 }} ( result__4,0,64,Exp12__5 ),1,64,Exp13__5 ) ; + constant bits ( 4 ) Exp10__6 = FPDecodeRounding9__6 ; + result__4 = fixed_to_fp_vec.0 {{ 2,64,64 }} ( Exp6__5,0,FALSE,Exp7__4,cvt_bits_uint.0 {{ 4 }} ( Exp10__6 ),2 ) ; + __array _Z [ 2 ] = result__4 ; "0x4e61d863" Decoding instruction A64 4e61d863 + constant bits ( 128 ) Exp6__5 = __array _Z [ 3 ] ; bits ( 128 ) result__4 ; + constant bits ( 32 ) Exp7__4 = FPCR ; bits ( 4 ) FPDecodeRounding9__6 ; FPDecodeRounding9__6 = ZeroExtend.0 {{ 2,4 }} ( FPCR [ 22 +: 2 ],4 ) ; - constant bits ( 64 ) Exp12__5 = FixedToFP.0 {{ 64,64 }} ( Elem.read.0 {{ 128,64 }} ( __array _Z [ 3 ],0,64 ),0,FALSE,FPCR,cvt_bits_uint.0 {{ 4 }} ( FPDecodeRounding9__6 ) ) ; - constant bits ( 64 ) Exp13__5 = FixedToFP.0 {{ 64,64 }} ( Elem.read.0 {{ 128,64 }} ( __array _Z [ 3 ],1,64 ),0,FALSE,FPCR,cvt_bits_uint.0 {{ 4 }} ( FPDecodeRounding9__6 ) ) ; - __array _Z [ 3 ] = Elem.set.0 {{ 128,64 }} ( Elem.set.0 {{ 128,64 }} ( result__4,0,64,Exp12__5 ),1,64,Exp13__5 ) ; + constant bits ( 4 ) Exp10__6 = FPDecodeRounding9__6 ; + result__4 = fixed_to_fp_vec.0 {{ 2,64,64 }} ( Exp6__5,0,FALSE,Exp7__4,cvt_bits_uint.0 {{ 4 }} ( Exp10__6 ),2 ) ; + __array _Z [ 3 ] = result__4 ; "0x4ea11c23" Decoding instruction A64 4ea11c23 __array _Z [ 3 ] = or_bits.0 {{ 128 }} ( __array _Z [ 1 ],__array _Z [ 1 ] ) ; diff --git a/tests/coverage/aarch64_float b/tests/coverage/aarch64_float index 80e07702..f0a9292d 100644 --- a/tests/coverage/aarch64_float +++ b/tests/coverage/aarch64_float @@ -2741,12 +2741,12 @@ ENCODING: aarch64_float_arithmetic_unary 0x1e2143e0: [ftype=0 ; opc=2 ; Rn=31 ; Rd=0] --> OK 0x1e2143e1: [ftype=0 ; opc=2 ; Rn=31 ; Rd=1] --> OK 0x1e2143ff: [ftype=0 ; opc=2 ; Rn=31 ; Rd=31] --> OK -0x1e21c000: [ftype=0 ; opc=3 ; Rn=0 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1e21c000: [ftype=0 ; opc=3 ; Rn=0 ; Rd=0] --> OK 0x1e21c001: [ftype=0 ; opc=3 ; Rn=0 ; Rd=1] --> OK -0x1e21c01f: [ftype=0 ; opc=3 ; Rn=0 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 -0x1e21c020: [ftype=0 ; opc=3 ; Rn=1 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1e21c01f: [ftype=0 ; opc=3 ; Rn=0 ; Rd=31] --> OK +0x1e21c020: [ftype=0 ; opc=3 ; Rn=1 ; Rd=0] --> OK 0x1e21c021: [ftype=0 ; opc=3 ; Rn=1 ; Rd=1] --> OK -0x1e21c03f: [ftype=0 ; opc=3 ; Rn=1 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1e21c03f: [ftype=0 ; opc=3 ; Rn=1 ; Rd=31] --> OK 0x1e21c3e0: [ftype=0 ; opc=3 ; Rn=31 ; Rd=0] --> OK 0x1e21c3e1: [ftype=0 ; opc=3 ; Rn=31 ; Rd=1] --> OK 0x1e21c3ff: [ftype=0 ; opc=3 ; Rn=31 ; Rd=31] --> OK @@ -2777,15 +2777,15 @@ ENCODING: aarch64_float_arithmetic_unary 0x1e6143e0: [ftype=1 ; opc=2 ; Rn=31 ; Rd=0] --> OK 0x1e6143e1: [ftype=1 ; opc=2 ; Rn=31 ; Rd=1] --> OK 0x1e6143ff: [ftype=1 ; opc=2 ; Rn=31 ; Rd=31] --> OK -0x1e61c000: [ftype=1 ; opc=3 ; Rn=0 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 -0x1e61c001: [ftype=1 ; opc=3 ; Rn=0 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 -0x1e61c01f: [ftype=1 ; opc=3 ; Rn=0 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 -0x1e61c020: [ftype=1 ; opc=3 ; Rn=1 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 -0x1e61c021: [ftype=1 ; opc=3 ; Rn=1 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 -0x1e61c03f: [ftype=1 ; opc=3 ; Rn=1 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 -0x1e61c3e0: [ftype=1 ; opc=3 ; Rn=31 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 -0x1e61c3e1: [ftype=1 ; opc=3 ; Rn=31 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 -0x1e61c3ff: [ftype=1 ; opc=3 ; Rn=31 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1e61c000: [ftype=1 ; opc=3 ; Rn=0 ; Rd=0] --> OK +0x1e61c001: [ftype=1 ; opc=3 ; Rn=0 ; Rd=1] --> OK +0x1e61c01f: [ftype=1 ; opc=3 ; Rn=0 ; Rd=31] --> OK +0x1e61c020: [ftype=1 ; opc=3 ; Rn=1 ; Rd=0] --> OK +0x1e61c021: [ftype=1 ; opc=3 ; Rn=1 ; Rd=1] --> OK +0x1e61c03f: [ftype=1 ; opc=3 ; Rn=1 ; Rd=31] --> OK +0x1e61c3e0: [ftype=1 ; opc=3 ; Rn=31 ; Rd=0] --> OK +0x1e61c3e1: [ftype=1 ; opc=3 ; Rn=31 ; Rd=1] --> OK +0x1e61c3ff: [ftype=1 ; opc=3 ; Rn=31 ; Rd=31] --> OK 0x1ea04000: [ftype=2 ; opc=0 ; Rn=0 ; Rd=0] --> (invalid) 0x1ea04001: [ftype=2 ; opc=0 ; Rn=0 ; Rd=1] --> (invalid) 0x1ea0401f: [ftype=2 ; opc=0 ; Rn=0 ; Rd=31] --> (invalid) @@ -2850,14 +2850,14 @@ ENCODING: aarch64_float_arithmetic_unary 0x1ee143e1: [ftype=3 ; opc=2 ; Rn=31 ; Rd=1] --> OK 0x1ee143ff: [ftype=3 ; opc=2 ; Rn=31 ; Rd=31] --> OK 0x1ee1c000: [ftype=3 ; opc=3 ; Rn=0 ; Rd=0] --> OK -0x1ee1c001: [ftype=3 ; opc=3 ; Rn=0 ; Rd=1] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 -0x1ee1c01f: [ftype=3 ; opc=3 ; Rn=0 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 -0x1ee1c020: [ftype=3 ; opc=3 ; Rn=1 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1ee1c001: [ftype=3 ; opc=3 ; Rn=0 ; Rd=1] --> OK +0x1ee1c01f: [ftype=3 ; opc=3 ; Rn=0 ; Rd=31] --> OK +0x1ee1c020: [ftype=3 ; opc=3 ; Rn=1 ; Rd=0] --> OK 0x1ee1c021: [ftype=3 ; opc=3 ; Rn=1 ; Rd=1] --> OK 0x1ee1c03f: [ftype=3 ; opc=3 ; Rn=1 ; Rd=31] --> OK -0x1ee1c3e0: [ftype=3 ; opc=3 ; Rn=31 ; Rd=0] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1ee1c3e0: [ftype=3 ; opc=3 ; Rn=31 ; Rd=0] --> OK 0x1ee1c3e1: [ftype=3 ; opc=3 ; Rn=31 ; Rd=1] --> OK -0x1ee1c3ff: [ftype=3 ; opc=3 ; Rn=31 ; Rd=31] --> [1] Evaluation failure: EvalError at file "./prelude.asl" line 318 char 11 - line 319 char 0: getFun sqrt_real.0 +0x1ee1c3ff: [ftype=3 ; opc=3 ; Rn=31 ; Rd=31] --> OK ENCODING: aarch64_float_compare_cond 0x1e201400: [ftype=0 ; Rm=0 ; cond=1 ; Rn=0 ; op=0 ; nzcv=0] --> OK