README.md

Back

---

Digital Systems in Verilog and System Verilog - Level 5

Digital Systems (Level 5)

This is part of a level 5 course in digital systems engineering using Verilog and System-Verilog. These notes form part of a taught module on real-time sytems at the University of Plymouth (UK).

It is assumed the student is knowledgable in digital electronics, including the fundamentals of combinational and sequential logic.

Dr. Nicholas J Outram

Table of Contents

1. Getting Started
2. Combinational Logic
3. Combinational Logic components
4. Sequential Logic
5. Sequential Logic Components
6. Finite State Machines
7. Complex Systems
8. Hardware Debugging
9. Glossary

Plymouth Students

Below is a table cross referencing the series of lectures and associated lab sessions. Some of topics are covered in Semester 1, with most covered in Semester 2.

Lecture	Title	Lab	Week
Lecture 1	SystemVerilog and FPGAs	Getting Started	S1
Lecture 2	Combinational Logic with SystemVerilog	Combinational Logic	S1
Lecture 3	Combinational Logic Components	Combinational Logic components	1
Lecture 4	Sequential Logic	Sequential Logic	2
Lecture 5	Sequential Logic Components	Sequential Logic Components	3
Lecture 6	Finite State Machines	Finite State Machines	4
Lecture 7	Complex Systems	Complex Systems	5

Note that these videos are only accessible to University of Plymouth (UK) students.

---

(c) 2021 Dr. Nicholas J Outram, University of Plymouth (UK). Licensed under Creative Commons

---

Back