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Releases: VeriSilicon/TIM-VX

v1.1.30.3

08 Jun 09:39
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Add support for layout inference
Add various unit_test for CI
Add new OP support for

  • GroupedConv2d
  • ScatterND
  • Unstack
  • Linear
  • UnMaxpool2d
  • MaxpoolWithArgmax
  • LogSoftmax
  • Resize1d
  • FloorDiv
  • DeConv1d
  • Conv1d

v1.1.30.2

06 Apr 05:40
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Add support for S905D3 SoC (aka VIM3L)
Add support for Mish, SoftRelu and HardSigmoid activation Layers
Add support for Select Layer
Fix a bug in Multiply Layer

v1.1.30

26 Feb 09:31
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02/2021 Update

  • Add support for Deconv2d
  • Add support for NBG (Network Binary Graph)
  • Fix Average Pooling implementation in TIM
  • Various Internal Op update and bug fixes

v1.1.28

29 Jan 08:16
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Initial release for v1.1.28 version