diff --git a/llvm/lib/Target/AIE/AIE2AddrSpace.h b/llvm/lib/Target/AIE/AIE2AddrSpace.h index 3229b0b94236..9dce4b540267 100644 --- a/llvm/lib/Target/AIE/AIE2AddrSpace.h +++ b/llvm/lib/Target/AIE/AIE2AddrSpace.h @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // @@ -12,6 +12,9 @@ // //===----------------------------------------------------------------------===// +#include "AIEBaseAddrSpaceInfo.h" +#include + #ifndef LLVM_SUPPORT_AIE2ADDRSPACE_H #define LLVM_SUPPORT_AIE2ADDRSPACE_H @@ -41,6 +44,73 @@ enum class AddressSpaces { enum class AIEBanks { A, B, C, D, TileMemory }; } // end namespace AIE2 + +class AIE2AddrSpaceInfo final : public AIEBaseAddrSpaceInfo { + +public: + MemoryBankBits getDefaultMemoryBank() const override { + std::bitset<32> MemoryBanks; + using namespace AIE2; + MemoryBanks.set(static_cast(AIEBanks::A)) + .set(static_cast(AIEBanks::B)) + .set(static_cast(AIEBanks::C)) + .set(static_cast(AIEBanks::D)); + return MemoryBanks.to_ulong(); + } + + MemoryBankBits + getMemoryBanksFromAddressSpace(unsigned AddrSpace) const override { + std::bitset<32> MemoryBanks; + using namespace AIE2; + switch (static_cast(AddrSpace)) { + case AddressSpaces::a: + MemoryBanks.set(static_cast(AIEBanks::A)); + break; + case AddressSpaces::b: + MemoryBanks.set(static_cast(AIEBanks::B)); + break; + case AddressSpaces::c: + MemoryBanks.set(static_cast(AIEBanks::C)); + break; + case AddressSpaces::d: + MemoryBanks.set(static_cast(AIEBanks::D)); + break; + case AddressSpaces::ab: + MemoryBanks.set(static_cast(AIEBanks::A)) + .set(static_cast(AIEBanks::B)); + break; + case AddressSpaces::ac: + MemoryBanks.set(static_cast(AIEBanks::A)) + .set(static_cast(AIEBanks::C)); + break; + case AddressSpaces::ad: + MemoryBanks.set(static_cast(AIEBanks::A)) + .set(static_cast(AIEBanks::D)); + break; + case AddressSpaces::bc: + MemoryBanks.set(static_cast(AIEBanks::B)) + .set(static_cast(AIEBanks::C)); + break; + case AddressSpaces::bd: + MemoryBanks.set(static_cast(AIEBanks::B)) + .set(static_cast(AIEBanks::D)); + break; + case AddressSpaces::cd: + MemoryBanks.set(static_cast(AIEBanks::C)) + .set(static_cast(AIEBanks::D)); + break; + case AddressSpaces::TM: + MemoryBanks.set(static_cast(AIEBanks::TileMemory)); + break; + default: + MemoryBanks.set(); + break; + } + + return MemoryBanks.to_ulong(); + } +}; + } // end namespace llvm #endif // LLVM_SUPPORT_AIE2ADDRSPACE_H diff --git a/llvm/lib/Target/AIE/AIE2Subtarget.cpp b/llvm/lib/Target/AIE/AIE2Subtarget.cpp index 10c7f3e9bbd7..ee930b4de117 100644 --- a/llvm/lib/Target/AIE/AIE2Subtarget.cpp +++ b/llvm/lib/Target/AIE/AIE2Subtarget.cpp @@ -77,65 +77,6 @@ InstructionSelector *AIE2Subtarget::getInstructionSelector() const { return InstSelector.get(); } -MemoryBankBits AIE2Subtarget::getDefaultMemoryBank() const { - using namespace AIE2; - std::bitset<32> MemoryBanks; - MemoryBanks.set(static_cast(AIEBanks::A)) - .set(static_cast(AIEBanks::B)) - .set(static_cast(AIEBanks::C)) - .set(static_cast(AIEBanks::D)); - return MemoryBanks.to_ulong(); -} - -MemoryBankBits -AIE2Subtarget::getMemoryBanksFromAddressSpace(unsigned AddrSpace) const { - using namespace AIE2; - std::bitset<32> MemoryBanks; - - switch (static_cast(AddrSpace)) { - case AddressSpaces::a: - MemoryBanks.set(static_cast(AIEBanks::A)); - break; - case AddressSpaces::b: - MemoryBanks.set(static_cast(AIEBanks::B)); - break; - case AddressSpaces::c: - MemoryBanks.set(static_cast(AIEBanks::C)); - break; - case AddressSpaces::d: - MemoryBanks.set(static_cast(AIEBanks::D)); - break; - case AddressSpaces::ab: - MemoryBanks.set(static_cast(AIEBanks::A)) - .set(static_cast(AIEBanks::B)); - break; - case AddressSpaces::ac: - MemoryBanks.set(static_cast(AIEBanks::A)) - .set(static_cast(AIEBanks::C)); - break; - case AddressSpaces::ad: - MemoryBanks.set(static_cast(AIEBanks::A)) - .set(static_cast(AIEBanks::D)); - break; - case AddressSpaces::bc: - MemoryBanks.set(static_cast(AIEBanks::B)) - .set(static_cast(AIEBanks::C)); - break; - case AddressSpaces::bd: - MemoryBanks.set(static_cast(AIEBanks::B)) - .set(static_cast(AIEBanks::D)); - break; - case AddressSpaces::cd: - MemoryBanks.set(static_cast(AIEBanks::C)) - .set(static_cast(AIEBanks::D)); - break; - case AddressSpaces::TM: - MemoryBanks.set(static_cast(AIEBanks::TileMemory)); - break; - default: - return getDefaultMemoryBank(); - break; - } - - return MemoryBanks.to_ulong(); +const AIEBaseAddrSpaceInfo &AIE2Subtarget::getAddrSpaceInfo() const { + return AddrSpaceInfo; } diff --git a/llvm/lib/Target/AIE/AIE2Subtarget.h b/llvm/lib/Target/AIE/AIE2Subtarget.h index 9b094da7ef86..b614e44f34ac 100644 --- a/llvm/lib/Target/AIE/AIE2Subtarget.h +++ b/llvm/lib/Target/AIE/AIE2Subtarget.h @@ -39,6 +39,7 @@ class StringRef; class AIE2Subtarget : public AIE2GenSubtargetInfo, public AIEBaseSubtarget { virtual void anchor(); std::string CPUName; + AIE2AddrSpaceInfo AddrSpaceInfo; AIE2FrameLowering FrameLowering; AIE2InstrInfo InstrInfo; AIE2RegisterInfo RegInfo; @@ -93,10 +94,6 @@ class AIE2Subtarget : public AIE2GenSubtargetInfo, public AIEBaseSubtarget { return &TSInfo; } - MemoryBankBits getDefaultMemoryBank() const override; - MemoryBankBits - getMemoryBanksFromAddressSpace(unsigned AddrSpace) const override; - // Perform target-specific adjustments to the latency of a schedule // dependency. // If a pair of operands is associated with the schedule dependency, DefOpIdx @@ -143,6 +140,7 @@ class AIE2Subtarget : public AIE2GenSubtargetInfo, public AIEBaseSubtarget { const LegalizerInfo *getLegalizerInfo() const override; const RegisterBankInfo *getRegBankInfo() const override; InstructionSelector *getInstructionSelector() const override; + const AIEBaseAddrSpaceInfo &getAddrSpaceInfo() const override; }; } // namespace llvm diff --git a/llvm/lib/Target/AIE/AIEBaseAddrSpaceInfo.h b/llvm/lib/Target/AIE/AIEBaseAddrSpaceInfo.h new file mode 100644 index 000000000000..ccb0809dabae --- /dev/null +++ b/llvm/lib/Target/AIE/AIEBaseAddrSpaceInfo.h @@ -0,0 +1,40 @@ +//===-- AIEBaseAddrSpaceInfo.h - Define Base AddressSpace Class -*- C++-*-===// +// +// This file is licensed under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +// (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates +// +//===----------------------------------------------------------------------===// +// +// This file declares the AIEngine Base Address Space class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_AIEBASEADDRSPACEINFO_H +#define LLVM_SUPPORT_AIEBASEADDRSPACEINFO_H + +#include + +namespace llvm { + +using MemoryBankBits = uint64_t; + +class AIEBaseAddrSpaceInfo { +public: + virtual MemoryBankBits getDefaultMemoryBank() const { + // By default assume conflicts. + return ~0; + } + + virtual MemoryBankBits + getMemoryBanksFromAddressSpace(unsigned AddrSpace) const { + // By default assume conflicts. + return ~0; + } +}; + +} // end namespace llvm + +#endif // LLVM_SUPPORT_AIEBASEADDRSPACEINFO_H diff --git a/llvm/lib/Target/AIE/AIEBaseSubtarget.cpp b/llvm/lib/Target/AIE/AIEBaseSubtarget.cpp index e86123e6c888..2d4e3b112199 100644 --- a/llvm/lib/Target/AIE/AIEBaseSubtarget.cpp +++ b/llvm/lib/Target/AIE/AIEBaseSubtarget.cpp @@ -146,17 +146,6 @@ const AIEBaseSubtarget &AIEBaseSubtarget::get(const MachineFunction &MF) { llvm_unreachable("Unknown subtarget"); } -MemoryBankBits -AIEBaseSubtarget::getMemoryBanksFromAddressSpace(unsigned AddrSpace) const { - // By default assume there are no conflicts. - return 0; -} - -MemoryBankBits AIEBaseSubtarget::getDefaultMemoryBank() const { - // By default assume there are no conflicts. - return 0; -} - namespace { // Set latency and declare height/depth dirty if it changes diff --git a/llvm/lib/Target/AIE/AIEBaseSubtarget.h b/llvm/lib/Target/AIE/AIEBaseSubtarget.h index 91279a3fcf23..9ac2d4c837b4 100644 --- a/llvm/lib/Target/AIE/AIEBaseSubtarget.h +++ b/llvm/lib/Target/AIE/AIEBaseSubtarget.h @@ -15,13 +15,13 @@ #ifndef LLVM_LIB_TARGET_AIE_AIEBASESUBTARGET_H #define LLVM_LIB_TARGET_AIE_AIEBASESUBTARGET_H +#include "AIEBaseAddrSpaceInfo.h" #include "AIEBaseInstrInfo.h" #include "Utils/AIEBaseInfo.h" #include "llvm/CodeGen/ScheduleDAGMutation.h" #include "llvm/CodeGenTypes/MachineValueType.h" #include "llvm/MC/MCInstrItineraries.h" #include "llvm/TargetParser/Triple.h" -#include namespace llvm { @@ -34,8 +34,6 @@ class ScheduleDAGMutation; class SUnit; class SDep; -using MemoryBankBits = uint64_t; - class AIEBaseSubtarget { private: Triple TargetTriple; @@ -48,6 +46,7 @@ class AIEBaseSubtarget { virtual const TargetRegisterInfo *getRegisterInfo() const = 0; virtual const TargetFrameLowering *getFrameLowering() const = 0; virtual const AIEBaseInstrInfo *getInstrInfo() const = 0; + virtual const AIEBaseAddrSpaceInfo &getAddrSpaceInfo() const = 0; AIEABI::ABI getTargetABI() const { return TargetABI; } bool isAIE1() const { return (TargetTriple.isAIE1()); } bool isAIE2() const { return (TargetTriple.isAIE2()); } @@ -70,10 +69,6 @@ class AIEBaseSubtarget { int DefOpIdx, SUnit *Use, int UseOpIdx, SDep &Dep) const; - virtual MemoryBankBits - getMemoryBanksFromAddressSpace(unsigned AddrSpace) const; - virtual MemoryBankBits getDefaultMemoryBank() const; - /// Required DAG mutations during Post-RA scheduling. static std::vector> getPostRAMutationsImpl(const Triple &TT); diff --git a/llvm/lib/Target/AIE/AIEHazardRecognizer.cpp b/llvm/lib/Target/AIE/AIEHazardRecognizer.cpp index 9cb4a95996b8..6e122321d56a 100644 --- a/llvm/lib/Target/AIE/AIEHazardRecognizer.cpp +++ b/llvm/lib/Target/AIE/AIEHazardRecognizer.cpp @@ -619,10 +619,11 @@ AIEHazardRecognizer::getMemoryBanks(const MachineInstr *MI) const { return ~0; const AIEBaseSubtarget &STI = AIEBaseSubtarget::get(*MI->getMF()); - MemoryBankBits MemoryBankUsed = STI.getDefaultMemoryBank(); + const AIEBaseAddrSpaceInfo &ASI = STI.getAddrSpaceInfo(); + MemoryBankBits MemoryBankUsed = ASI.getDefaultMemoryBank(); for (auto &MMO : MI->memoperands()) { MemoryBankBits MemoryBank = - STI.getMemoryBanksFromAddressSpace(MMO->getAddrSpace()); + ASI.getMemoryBanksFromAddressSpace(MMO->getAddrSpace()); MemoryBankUsed &= MemoryBank; } return MemoryBankUsed; diff --git a/llvm/lib/Target/AIE/AIEHazardRecognizer.h b/llvm/lib/Target/AIE/AIEHazardRecognizer.h index 55eeb6accaf5..0b9c7b2c9f76 100644 --- a/llvm/lib/Target/AIE/AIEHazardRecognizer.h +++ b/llvm/lib/Target/AIE/AIEHazardRecognizer.h @@ -13,6 +13,7 @@ #ifndef LLVM_LIB_TARGET_AIE_AIEHAZARDRECOGNIZER_H #define LLVM_LIB_TARGET_AIE_AIEHAZARDRECOGNIZER_H +#include "AIEBaseAddrSpaceInfo.h" #include "AIEBaseSubtarget.h" #include "AIEBundle.h" #include "MCTargetDesc/AIEMCFormats.h" diff --git a/llvm/lib/Target/AIE/AIESubtarget.cpp b/llvm/lib/Target/AIE/AIESubtarget.cpp index cb965d73c2e7..88aaa132b8ba 100644 --- a/llvm/lib/Target/AIE/AIESubtarget.cpp +++ b/llvm/lib/Target/AIE/AIESubtarget.cpp @@ -47,7 +47,7 @@ AIESubtarget::AIESubtarget(const Triple &TT, StringRef CPU, StringRef TuneCPU, : AIEGenSubtargetInfo(TT, CPU, TuneCPU, FS), AIEBaseSubtarget(TT), FrameLowering(initializeSubtargetDependencies(TT, CPU, FS, ABIName)), InstrInfo(), RegInfo(getHwMode()), TLInfo(TM, *this), - InstrItins(getInstrItineraryForCPU(StringRef(CPU))) { // CPUName)) { + InstrItins(getInstrItineraryForCPU(StringRef(CPU))) { LLVM_DEBUG(dbgs() << "CPU:" << CPU << "." << CPUName << "." << FS << "." << ABIName << "\n"); @@ -75,3 +75,7 @@ const RegisterBankInfo *AIESubtarget::getRegBankInfo() const { InstructionSelector *AIESubtarget::getInstructionSelector() const { return InstSelector.get(); } + +const AIEBaseAddrSpaceInfo &AIESubtarget::getAddrSpaceInfo() const { + return AddrSpaceInfo; +} diff --git a/llvm/lib/Target/AIE/AIESubtarget.h b/llvm/lib/Target/AIE/AIESubtarget.h index fe5c5e8a30f2..59ea206e6582 100644 --- a/llvm/lib/Target/AIE/AIESubtarget.h +++ b/llvm/lib/Target/AIE/AIESubtarget.h @@ -37,6 +37,7 @@ class StringRef; class AIESubtarget final : public AIEGenSubtargetInfo, public AIEBaseSubtarget { virtual void anchor(); std::string CPUName; + AIEBaseAddrSpaceInfo AddrSpaceInfo; AIEFrameLowering FrameLowering; AIEInstrInfo InstrInfo; AIERegisterInfo RegInfo; @@ -117,6 +118,7 @@ class AIESubtarget final : public AIEGenSubtargetInfo, public AIEBaseSubtarget { const LegalizerInfo *getLegalizerInfo() const override; const RegisterBankInfo *getRegBankInfo() const override; InstructionSelector *getInstructionSelector() const override; + const AIEBaseAddrSpaceInfo &getAddrSpaceInfo() const override; }; } // namespace llvm