From 461f7497ab5af961d04418dd63746961326cd839 Mon Sep 17 00:00:00 2001 From: Krishnam Tibrewala Date: Wed, 28 Aug 2024 14:55:46 -0700 Subject: [PATCH 1/2] [AIE2] Annotate AS for load/store to TileMemory --- clang/lib/Headers/aiev2intrin.h | 6 +++-- .../CodeGen/aie/aie2/aie2-store-load-TM.cpp | 24 +++++++++++-------- llvm/lib/Target/AIE/AIE2AddrSpace.h | 2 +- 3 files changed, 19 insertions(+), 13 deletions(-) diff --git a/clang/lib/Headers/aiev2intrin.h b/clang/lib/Headers/aiev2intrin.h index adae70734b54..359e142926ad 100644 --- a/clang/lib/Headers/aiev2intrin.h +++ b/clang/lib/Headers/aiev2intrin.h @@ -61,11 +61,13 @@ event_error() { return __builtin_aiev2_event(3); } #if defined(__cplusplus) && !defined(__AIECC__DISABLE_READ_WRITE_TM) // Read/Write for Tile Memory Map INTRINSIC(uint32) read_tm(uint32 regAddr, uint32 TMAddrSpaceStart = 0x80000) { - return __builtin_aiev2_read_tm((int *)(TMAddrSpaceStart + regAddr)); + return __builtin_aiev2_read_tm( + (int __aie_dm_resource_TM *)(TMAddrSpaceStart + regAddr)); } INTRINSIC(void) write_tm(uint32 regVal, uint32 regAddr, uint32 TMAddrSpaceStart = 0x80000) { - return __builtin_aiev2_write_tm(regVal, (int *)(TMAddrSpaceStart + regAddr)); + return __builtin_aiev2_write_tm( + regVal, (int __aie_dm_resource_TM *)(TMAddrSpaceStart + regAddr)); } #endif /* __cplusplus && !(__AIECC__DISABLE_READ_WRITE_TM) */ diff --git a/clang/test/CodeGen/aie/aie2/aie2-store-load-TM.cpp b/clang/test/CodeGen/aie/aie2/aie2-store-load-TM.cpp index d645081edb5a..93250635245e 100644 --- a/clang/test/CodeGen/aie/aie2/aie2-store-load-TM.cpp +++ b/clang/test/CodeGen/aie/aie2/aie2-store-load-TM.cpp @@ -14,9 +14,10 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = xor i32 [[REGADDR:%.*]], 524288 // CHECK-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP0]] to i20 -// CHECK-NEXT: [[TMP1:%.*]] = inttoptr i20 [[CONV_I]] to ptr -// CHECK-NEXT: [[TMP2:%.*]] = tail call noundef i32 @llvm.aie2.read.tm(ptr [[TMP1]]) -// CHECK-NEXT: ret i32 [[TMP2]] +// CHECK-NEXT: [[TMP1:%.*]] = inttoptr i20 [[CONV_I]] to ptr addrspace(15) +// CHECK-NEXT: [[TMP2:%.*]] = addrspacecast ptr addrspace(15) [[TMP1]] to ptr +// CHECK-NEXT: [[TMP3:%.*]] = tail call noundef i32 @llvm.aie2.read.tm(ptr [[TMP2]]) +// CHECK-NEXT: ret i32 [[TMP3]] // uint32 test_read_tm(uint32 regAddr) { return read_tm(regAddr); @@ -26,8 +27,9 @@ uint32 test_read_tm(uint32 regAddr) { // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = xor i32 [[REGADDR:%.*]], 524288 // CHECK-NEXT: [[CONV_I:%.*]] = trunc i32 [[TMP0]] to i20 -// CHECK-NEXT: [[TMP1:%.*]] = inttoptr i20 [[CONV_I]] to ptr -// CHECK-NEXT: tail call void @llvm.aie2.write.tm(i32 [[REGVAL:%.*]], ptr [[TMP1]]) +// CHECK-NEXT: [[TMP1:%.*]] = inttoptr i20 [[CONV_I]] to ptr addrspace(15) +// CHECK-NEXT: [[TMP2:%.*]] = addrspacecast ptr addrspace(15) [[TMP1]] to ptr +// CHECK-NEXT: tail call void @llvm.aie2.write.tm(i32 [[REGVAL:%.*]], ptr [[TMP2]]) // CHECK-NEXT: ret void // void test_write_tm(uint32 regVal, uint32 regAddr) { @@ -38,9 +40,10 @@ void test_write_tm(uint32 regVal, uint32 regAddr) { // CHECK-NEXT: entry: // CHECK-NEXT: [[ADD_I:%.*]] = add i32 [[TMADDRSPACESTART:%.*]], [[REGADDR:%.*]] // CHECK-NEXT: [[CONV_I:%.*]] = trunc i32 [[ADD_I]] to i20 -// CHECK-NEXT: [[TMP0:%.*]] = inttoptr i20 [[CONV_I]] to ptr -// CHECK-NEXT: [[TMP1:%.*]] = tail call noundef i32 @llvm.aie2.read.tm(ptr [[TMP0]]) -// CHECK-NEXT: ret i32 [[TMP1]] +// CHECK-NEXT: [[TMP0:%.*]] = inttoptr i20 [[CONV_I]] to ptr addrspace(15) +// CHECK-NEXT: [[TMP1:%.*]] = addrspacecast ptr addrspace(15) [[TMP0]] to ptr +// CHECK-NEXT: [[TMP2:%.*]] = tail call noundef i32 @llvm.aie2.read.tm(ptr [[TMP1]]) +// CHECK-NEXT: ret i32 [[TMP2]] // uint32 test_read_tm(uint32 regAddr, uint32 TMAddrSpaceStart) { return read_tm(regAddr, TMAddrSpaceStart); @@ -50,8 +53,9 @@ uint32 test_read_tm(uint32 regAddr, uint32 TMAddrSpaceStart) { // CHECK-NEXT: entry: // CHECK-NEXT: [[ADD_I:%.*]] = add i32 [[TMADDRSPACESTART:%.*]], [[REGADDR:%.*]] // CHECK-NEXT: [[CONV_I:%.*]] = trunc i32 [[ADD_I]] to i20 -// CHECK-NEXT: [[TMP0:%.*]] = inttoptr i20 [[CONV_I]] to ptr -// CHECK-NEXT: tail call void @llvm.aie2.write.tm(i32 [[REGVAL:%.*]], ptr [[TMP0]]) +// CHECK-NEXT: [[TMP0:%.*]] = inttoptr i20 [[CONV_I]] to ptr addrspace(15) +// CHECK-NEXT: [[TMP1:%.*]] = addrspacecast ptr addrspace(15) [[TMP0]] to ptr +// CHECK-NEXT: tail call void @llvm.aie2.write.tm(i32 [[REGVAL:%.*]], ptr [[TMP1]]) // CHECK-NEXT: ret void // void test_write_tm(uint32 regVal, uint32 regAddr, uint32 TMAddrSpaceStart) { diff --git a/llvm/lib/Target/AIE/AIE2AddrSpace.h b/llvm/lib/Target/AIE/AIE2AddrSpace.h index 9dce4b540267..a31ac666011c 100644 --- a/llvm/lib/Target/AIE/AIE2AddrSpace.h +++ b/llvm/lib/Target/AIE/AIE2AddrSpace.h @@ -103,7 +103,7 @@ class AIE2AddrSpaceInfo final : public AIEBaseAddrSpaceInfo { MemoryBanks.set(static_cast(AIEBanks::TileMemory)); break; default: - MemoryBanks.set(); + return getDefaultMemoryBank(); break; } From 02d53b804ca50b136f62b7796ef414f64a17a1af Mon Sep 17 00:00:00 2001 From: Krishnam Tibrewala Date: Mon, 16 Sep 2024 16:40:50 -0700 Subject: [PATCH 2/2] [AIE2] Alias Analysis using AddrSpace Info --- .../Target/AIE/AIE2TargetTransformInfo.cpp | 15 ++ llvm/lib/Target/AIE/AIE2TargetTransformInfo.h | 2 + llvm/lib/Target/AIE/AIEBaseAddrSpaceInfo.h | 5 + llvm/lib/Target/AIE/AIEBaseAliasAnalysis.cpp | 14 ++ llvm/lib/Target/AIE/AIEBaseAliasAnalysis.h | 22 ++- llvm/lib/Target/AIE/AIETargetTransformInfo.h | 8 + llvm/test/CodeGen/AIE/alias-analysis-AA.ll | 148 ++++++++++++++++++ 7 files changed, 208 insertions(+), 6 deletions(-) create mode 100644 llvm/test/CodeGen/AIE/alias-analysis-AA.ll diff --git a/llvm/lib/Target/AIE/AIE2TargetTransformInfo.cpp b/llvm/lib/Target/AIE/AIE2TargetTransformInfo.cpp index 191fda6d9c25..5a6d55af0e16 100644 --- a/llvm/lib/Target/AIE/AIE2TargetTransformInfo.cpp +++ b/llvm/lib/Target/AIE/AIE2TargetTransformInfo.cpp @@ -197,3 +197,18 @@ AIE2TTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const { } return std::nullopt; } + +bool AIE2TTIImpl::addrspacesMayAlias(unsigned AS0, unsigned AS1) const { + if (AS0 == AS1) + return true; + + // Tile Memory and Data Memory are disjoint, since we allways annotate Tile + // Memory access even if another address space is not annotated we can assume + // that they are disjoint. + const unsigned TileMemoryAS = static_cast(AIE2::AddressSpaces::TM); + if (AS0 == TileMemoryAS || AS1 == TileMemoryAS) + return false; + + const AIEBaseAddrSpaceInfo &ASI = ST->getAddrSpaceInfo(); + return ASI.addrspacesMayAlias(AS0, AS1); +} diff --git a/llvm/lib/Target/AIE/AIE2TargetTransformInfo.h b/llvm/lib/Target/AIE/AIE2TargetTransformInfo.h index ab11c13be61e..16ce1f520e1b 100644 --- a/llvm/lib/Target/AIE/AIE2TargetTransformInfo.h +++ b/llvm/lib/Target/AIE/AIE2TargetTransformInfo.h @@ -71,6 +71,8 @@ class AIE2TTIImpl : public BasicTTIImplBase { // This type of code can lead to additional pointer arithmetics and // and pointer moves (especially due to the pre-pipeliner). bool isProfitableFoldGEPIntoPHI() const { return false; } + + bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const; }; } // end namespace llvm diff --git a/llvm/lib/Target/AIE/AIEBaseAddrSpaceInfo.h b/llvm/lib/Target/AIE/AIEBaseAddrSpaceInfo.h index 1d9afa9eaf5a..8c7cfcb67358 100644 --- a/llvm/lib/Target/AIE/AIEBaseAddrSpaceInfo.h +++ b/llvm/lib/Target/AIE/AIEBaseAddrSpaceInfo.h @@ -35,6 +35,11 @@ class AIEBaseAddrSpaceInfo { // By default assume conflicts. return ~0; } + + virtual bool addrspacesMayAlias(unsigned AS1, unsigned AS2) const { + return getMemoryBanksFromAddressSpace(AS1) & + getMemoryBanksFromAddressSpace(AS2); + } }; } // end namespace llvm diff --git a/llvm/lib/Target/AIE/AIEBaseAliasAnalysis.cpp b/llvm/lib/Target/AIE/AIEBaseAliasAnalysis.cpp index d9d214946f61..9c161fb4036e 100644 --- a/llvm/lib/Target/AIE/AIEBaseAliasAnalysis.cpp +++ b/llvm/lib/Target/AIE/AIEBaseAliasAnalysis.cpp @@ -39,6 +39,11 @@ static cl::opt DisambiguateAccessSameOriginPointers( cl::desc("Disambiguate pointers derived from the same origin"), cl::init(true), cl::Hidden); +static cl::opt + AddrSpaceAA("aie-alias-analysis-addrspace", + cl::desc("Disambiguate pointers based on address space"), + cl::init(false), cl::Hidden); + #define DEBUG_TYPE "aie-aa" AnalysisKey AIEBaseAA::Key; @@ -69,6 +74,7 @@ AIEBaseAAWrapperPass::AIEBaseAAWrapperPass() : ImmutablePass(ID) { void AIEBaseAAWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const { AU.setPreservesAll(); + AU.addRequired(); } static bool isAIEPtrAddIntrinsic(Intrinsic::ID ID, unsigned &InPtrIdx) { @@ -478,6 +484,14 @@ AliasResult AIEBaseAAResult::alias(const MemoryLocation &LocA, const Value *BaseA = getUnderlyingObjectAIE(LocA.Ptr); const Value *BaseB = getUnderlyingObjectAIE(LocB.Ptr); + if (AddrSpaceAA) { + const unsigned AddrSpaceA = LocA.Ptr->getType()->getPointerAddressSpace(); + const unsigned AddrSpaceB = LocB.Ptr->getType()->getPointerAddressSpace(); + + if (!TTI.addrspacesMayAlias(AddrSpaceA, AddrSpaceB)) + return AliasResult::NoAlias; + } + if (DisambiguateAccessSameOriginPointers && aliasAIEIntrinsic(LocA.Ptr, LocB.Ptr, BaseA, BaseB, 0, 0 /*No virtually unrolled*/) == AliasResult::NoAlias) diff --git a/llvm/lib/Target/AIE/AIEBaseAliasAnalysis.h b/llvm/lib/Target/AIE/AIEBaseAliasAnalysis.h index 493169a1d46d..c32b6113c443 100644 --- a/llvm/lib/Target/AIE/AIEBaseAliasAnalysis.h +++ b/llvm/lib/Target/AIE/AIEBaseAliasAnalysis.h @@ -16,6 +16,7 @@ #include "AIE.h" #include "llvm/Analysis/AliasAnalysis.h" +#include "llvm/Analysis/TargetTransformInfo.h" namespace llvm { @@ -37,11 +38,13 @@ AliasResult aliasAcrossVirtualUnrolls(const MachineInstr *MIA, class AIEBaseAAResult : public AAResultBase { const DataLayout &DL; + const TargetTransformInfo &TTI; public: - explicit AIEBaseAAResult(const DataLayout &DL) : DL(DL) {} + explicit AIEBaseAAResult(const DataLayout &DL, const TargetTransformInfo &TTI) + : DL(DL), TTI(TTI) {} AIEBaseAAResult(AIEBaseAAResult &&Arg) - : AAResultBase(std::move(Arg)), DL(Arg.DL) {} + : AAResultBase(std::move(Arg)), DL(Arg.DL), TTI(Arg.TTI) {} /// Handle invalidation events from the new pass manager. /// @@ -51,8 +54,9 @@ class AIEBaseAAResult : public AAResultBase { return false; } - AliasResult alias(const MemoryLocation &LocA, const MemoryLocation &LocB, - AAQueryInfo &AAQI, const Instruction *CtxI); + virtual AliasResult alias(const MemoryLocation &LocA, + const MemoryLocation &LocB, AAQueryInfo &AAQI, + const Instruction *CtxI); }; /// Analysis pass providing a never-invalidated alias analysis result. @@ -65,7 +69,8 @@ class AIEBaseAA : public AnalysisInfoMixin { using Result = AIEBaseAAResult; AIEBaseAAResult run(Function &F, AnalysisManager &AM) { - return AIEBaseAAResult(F.getParent()->getDataLayout()); + const TargetTransformInfo &TTI = AM.getResult(F); + return AIEBaseAAResult(F.getParent()->getDataLayout(), TTI); } }; @@ -82,7 +87,12 @@ class AIEBaseAAWrapperPass : public ImmutablePass { const AIEBaseAAResult &getResult() const { return *Result; } bool doInitialization(Module &M) override { - Result.reset(new AIEBaseAAResult(M.getDataLayout())); + if (!M.getFunctionList().empty()) { + const TargetTransformInfo &TTI = + getAnalysis().getTTI( + M.getFunctionList().front()); + Result.reset(new AIEBaseAAResult(M.getDataLayout(), TTI)); + } return false; } diff --git a/llvm/lib/Target/AIE/AIETargetTransformInfo.h b/llvm/lib/Target/AIE/AIETargetTransformInfo.h index 797e340d048a..35ad8294233f 100644 --- a/llvm/lib/Target/AIE/AIETargetTransformInfo.h +++ b/llvm/lib/Target/AIE/AIETargetTransformInfo.h @@ -62,6 +62,14 @@ class AIETTIImpl : public BasicTTIImplBase { UP.Threshold = 200; BaseT::getUnrollingPreferences(L, SE, UP, ORE); } + + bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const { + if (AS0 == AS1) + return true; + + const AIEBaseAddrSpaceInfo &ASI = ST->getAddrSpaceInfo(); + return ASI.addrspacesMayAlias(AS0, AS1); + } }; } // end namespace llvm diff --git a/llvm/test/CodeGen/AIE/alias-analysis-AA.ll b/llvm/test/CodeGen/AIE/alias-analysis-AA.ll new file mode 100644 index 000000000000..23069e0a3b37 --- /dev/null +++ b/llvm/test/CodeGen/AIE/alias-analysis-AA.ll @@ -0,0 +1,148 @@ +; +; This file is licensed under the Apache License v2.0 with LLVM Exceptions. +; See https://llvm.org/LICENSE.txt for license information. +; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +; +; (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates +; RUN: opt -mtriple=aie2 -passes=aa-eval -print-all-alias-modref-info --aie-alias-analysis-addrspace=true -disable-output < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,ENABLED-AIE-AS-AA +; RUN: opt -mtriple=aie2 -passes=aa-eval -print-all-alias-modref-info --aie-alias-analysis-addrspace=false -disable-output < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,DISABLED-AIE-AS-AA + +; CHECK-LABEL: Function: basic_without_AS +; CHECK: MayAlias: i8* %p, i8* %p1 +define void @basic_without_AS(ptr %p, ptr %p1) { + load i8, ptr %p + load i8, ptr %p1 + ret void +} + +; ENABLED-AIE-AS-AA-LABEL: Function: basic_withAS_56 +; ENABLED-AIE-AS-AA: NoAlias: i8 addrspace(5)* %p, i8 addrspace(6)* %p1 + +; DISABLED-AIE-AS-AA-LABEL: Function: basic_withAS_56 +; DISABLED-AIE-AS-AA: MayAlias: i8 addrspace(5)* %p, i8 addrspace(6)* %p1 +define void @basic_withAS_56(ptr addrspace(5) %p, ptr addrspace(6) %p1) { + load i8, ptr addrspace(5) %p + load i8, ptr addrspace(6) %p1 + ret void +} + +; ENABLED-AIE-AS-AA-LABEL: Function: basic_withAS_67 +; ENABLED-AIE-AS-AA: NoAlias: i8 addrspace(6)* %p, i8 addrspace(7)* %p1 + +; DISABLED-AIE-AS-AA-LABEL: Function: basic_withAS_67 +; DISABLED-AIE-AS-AA: MayAlias: i8 addrspace(6)* %p, i8 addrspace(7)* %p1 +define void @basic_withAS_67(ptr addrspace(6) %p, ptr addrspace(7) %p1) { + load i8, ptr addrspace(6) %p + load i8, ptr addrspace(7) %p1 + ret void +} + +; ENABLED-AIE-AS-AA-LABEL: Function: basic_withAS_78 +; ENABLED-AIE-AS-AA: NoAlias: i8 addrspace(8)* %p, i8 addrspace(7)* %p1 + +; DISABLED-AIE-AS-AA-LABEL: Function: basic_withAS_78 +; DISABLED-AIE-AS-AA: MayAlias: i8 addrspace(8)* %p, i8 addrspace(7)* %p1 +define void @basic_withAS_78(ptr addrspace(8) %p, ptr addrspace(7) %p1) { + load i8, ptr addrspace(8) %p + load i8, ptr addrspace(7) %p1 + ret void +} + +; ENABLED-AIE-AS-AA-LABEL: Function: basic_withAS_58 +; ENABLED-AIE-AS-AA: NoAlias: i8 addrspace(5)* %p, i8 addrspace(8)* %p1 + +; DISABLED-AIE-AS-AA-LABEL: Function: basic_withAS_58 +; DISABLED-AIE-AS-AA: MayAlias: i8 addrspace(5)* %p, i8 addrspace(8)* %p1 +define void @basic_withAS_58(ptr addrspace(5) %p, ptr addrspace(8) %p1) { + load i8, ptr addrspace(5) %p + load i8, ptr addrspace(8) %p1 + ret void +} + +; ENABLED-AIE-AS-AA-LABEL: Function: basic_withAS_compund_A_AB +; ENABLED-AIE-AS-AA: MayAlias: i8 addrspace(5)* %p, i8 addrspace(9)* %p1 + +; DISABLED-AIE-AS-AA-LABEL: Function: basic_withAS_compund_A_AB +; DISABLED-AIE-AS-AA: MayAlias: i8 addrspace(5)* %p, i8 addrspace(9)* %p1 +define void @basic_withAS_compund_A_AB(ptr addrspace(5) %p, ptr addrspace(9) %p1) { + load i8, ptr addrspace(5) %p + load i8, ptr addrspace(9) %p1 + ret void +} + +; ENABLED-AIE-AS-AA-LABEL: Function: basic_withAS_compund_B_AB +; ENABLED-AIE-AS-AA: MayAlias: i8 addrspace(6)* %p, i8 addrspace(9)* %p1 + +; DISABLED-AIE-AS-AA-LABEL: Function: basic_withAS_compund_B_AB +; DISABLED-AIE-AS-AA: MayAlias: i8 addrspace(6)* %p, i8 addrspace(9)* %p1 +define void @basic_withAS_compund_B_AB(ptr addrspace(6) %p, ptr addrspace(9) %p1) { + load i8, ptr addrspace(6) %p + load i8, ptr addrspace(9) %p1 + ret void +} + +; ENABLED-AIE-AS-AA-LABEL: Function: basic_withAS_compund_C_AB +; ENABLED-AIE-AS-AA: NoAlias: i8 addrspace(7)* %p, i8 addrspace(9)* %p1 + +; DISABLED-AIE-AS-AA-LABEL: Function: basic_withAS_compund_C_AB +; DISABLED-AIE-AS-AA: MayAlias: i8 addrspace(7)* %p, i8 addrspace(9)* %p1 +define void @basic_withAS_compund_C_AB(ptr addrspace(7) %p, ptr addrspace(9) %p1) { + load i8, ptr addrspace(7) %p + load i8, ptr addrspace(9) %p1 + ret void +} + +; ENABLED-AIE-AS-AA-LABEL: Function: basic_withAS_compund_AB_CD +; ENABLED-AIE-AS-AA: NoAlias: i8 addrspace(9)* %p, i8 addrspace(14)* %p1 + +; DISABLED-AIE-AS-AA-LABEL: Function: basic_withAS_compund_AB_CD +; DISABLED-AIE-AS-AA: MayAlias: i8 addrspace(9)* %p, i8 addrspace(14)* %p1 +define void @basic_withAS_compund_AB_CD(ptr addrspace(9) %p, ptr addrspace(14) %p1) { + load i8, ptr addrspace(9) %p + load i8, ptr addrspace(14) %p1 + ret void +} + +; ENABLED-AIE-AS-AA-LABEL: Function: basic_TM_noAS +; ENABLED-AIE-AS-AA: NoAlias: i8 addrspace(15)* %p, i8* %p1 + +; DISABLED-AIE-AS-AA-LABEL: Function: basic_TM_noAS +; DISABLED-AIE-AS-AA: MayAlias: i8 addrspace(15)* %p, i8* %p1 +define void @basic_TM_noAS(ptr addrspace(15) %p, ptr %p1) { + load i8, ptr addrspace(15) %p + load i8, ptr %p1 + ret void +} + +; ENABLED-AIE-AS-AA-LABEL: Function: basic_noAS_TM +; ENABLED-AIE-AS-AA: NoAlias: i8* %p, i8 addrspace(15)* %p1 + +; DISABLED-AIE-AS-AA-LABEL: Function: basic_noAS_TM +; DISABLED-AIE-AS-AA: MayAlias: i8* %p, i8 addrspace(15)* %p1 +define void @basic_noAS_TM(ptr %p, ptr addrspace(15) %p1) { + load i8, ptr %p + load i8, ptr addrspace(15) %p1 + ret void +} + +; ENABLED-AIE-AS-AA-LABEL: Function: basic_withAS_TM_TM +; ENABLED-AIE-AS-AA: MayAlias: i8 addrspace(15)* %p, i8 addrspace(15)* %p1 + +; DISABLED-AIE-AS-AA-LABEL: Function: basic_withAS_TM_TM +; DISABLED-AIE-AS-AA: MayAlias: i8 addrspace(15)* %p, i8 addrspace(15)* %p1 +define void @basic_withAS_TM_TM(ptr addrspace(15) %p, ptr addrspace(15) %p1) { + load i8, ptr addrspace(15) %p + load i8, ptr addrspace(15) %p1 + ret void +} + +; ENABLED-AIE-AS-AA-LABEL: Function: basic_withAS_A_TM +; ENABLED-AIE-AS-AA: NoAlias: i8 addrspace(5)* %p, i8 addrspace(15)* %p1 + +; DISABLED-AIE-AS-AA-LABEL: Function: basic_withAS_A_TM +; DISABLED-AIE-AS-AA: MayAlias: i8 addrspace(5)* %p, i8 addrspace(15)* %p1 +define void @basic_withAS_A_TM(ptr addrspace(5) %p, ptr addrspace(15) %p1) { + load i8, ptr addrspace(5) %p + load i8, ptr addrspace(15) %p1 + ret void +}