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Currently trellis only offers MULT18X18D primitives for the DSP blocks.
Internally these DSP blocks appear quite configurable, and offer a 9x9bit mode.
Official tooling enables this at the verilog level with a MULT9X9D primitive.
I'm not sure on exactly the current state of documentation of the DSP bits, I assume enabling this will require changes at the fuzzing level all the way up the toolchain flow.
The text was updated successfully, but these errors were encountered:
I am also interested in the support of MULT9X9D mode, because it means I could use twice as much DSP than with MULT18X18D. Is there anyone currently working on it? Otherwise, I would be glad to try to contribute for this part.
Currently trellis only offers
MULT18X18D
primitives for the DSP blocks.Internally these DSP blocks appear quite configurable, and offer a 9x9bit mode.
Official tooling enables this at the verilog level with a
MULT9X9D
primitive.I'm not sure on exactly the current state of documentation of the DSP bits, I assume enabling this will require changes at the fuzzing level all the way up the toolchain flow.
The text was updated successfully, but these errors were encountered: