From 07fb8af05baa2f47ebcbacfe8f036196ae8a8ba7 Mon Sep 17 00:00:00 2001 From: Philippe Sauter Date: Fri, 20 Sep 2024 13:56:14 +0200 Subject: [PATCH] rtlil: handle all-zeros case in Const::compress --- kernel/rtlil.cc | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index 0a3d2082dfe..4403b538211 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -286,20 +286,22 @@ void RTLIL::Const::compress(bool is_signed) // back to front (MSB to LSB) RTLIL::State leading_bit; - if(is_signed) + if (is_signed) leading_bit = (bits.back() == RTLIL::State::Sx) ? RTLIL::State::S0 : bits.back(); else leading_bit = RTLIL::State::S0; - size_t idx = bits.size(); - while (idx > 0 && bits[idx -1] == leading_bit) { - --idx; - } + size_t idx = bits.size(); + while (idx > 0 && bits[idx -1] == leading_bit) { + idx--; + } // signed needs one leading bit if (is_signed && idx < bits.size()) { - ++idx; - } + idx++; + } + // must be at least one bit + idx = (idx == 0) ? 1 : idx; bits.erase(bits.begin() + idx, bits.end()); }