From 1bdb80d348c9c880f324e5ba3a9c6cb97645a5b9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20Povi=C5=A1er?= Date: Wed, 31 Jan 2024 13:24:12 +0100 Subject: [PATCH] opt_expr: In clkinv loop ignore irrelevant cells early Each call to `handle_clkpol_celltype_swap` has a conversion of the cell's type ID to an allocated string. This can sum up to a non-negligible time being spent in the clkpol code even for a design which doesn't have any flip-flop gates. --- passes/opt/opt_expr.cc | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/passes/opt/opt_expr.cc b/passes/opt/opt_expr.cc index b26ffc54263..07c54c9d044 100644 --- a/passes/opt/opt_expr.cc +++ b/passes/opt/opt_expr.cc @@ -409,6 +409,9 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool cons } } + CellTypes ct_memcells; + ct_memcells.setup_stdcells_mem(); + if (!noclkinv) for (auto cell : module->cells()) if (design->selected(module, cell)) { @@ -432,6 +435,9 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool cons if (cell->type.in(ID($dffe), ID($adffe), ID($aldffe), ID($sdffe), ID($sdffce), ID($dffsre), ID($dlatch), ID($adlatch), ID($dlatchsr))) handle_polarity_inv(cell, ID::EN, ID::EN_POLARITY, assign_map, invert_map); + if (!ct_memcells.cell_known(cell->type)) + continue; + handle_clkpol_celltype_swap(cell, "$_SR_N?_", "$_SR_P?_", ID::S, assign_map, invert_map); handle_clkpol_celltype_swap(cell, "$_SR_?N_", "$_SR_?P_", ID::R, assign_map, invert_map);